JP2007174644A - Synchronized data communication - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of retransmitting a packet and/or bringing a node into a safe state in response to a defective signal included in a received data packet when an acknowledgement field in the received data packet is a negative acknowledgement (NAK), and to also provide a computer program. <P>SOLUTION: The data packet is provided with a synchronized field, acknowledgement field indicating acknowledgement of the reception of a previous data packet, response field including information indicating defective of a system, header field, sequence number field including a number assigned to the data packet, data field, packet terminal field, and error inspection field. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

(Priority claim)
This application claims the benefit of US Provisional Patent Application No. 60 / 753,991, filed Dec. 22, 2005, the entire contents of which are hereby incorporated by reference.

  The present disclosure relates to information systems.

(background)
Some applications have high bandwidth requirements and stringent synchronization, delay and reliability requirements for communication. For example, robot-assisted surgery requires high bandwidth in order to transmit control signals and feedback signals in real time. Since there should ideally be as little delay as possible between the surgeon's movement and the robot's movement, the requirements for synchronization and delay in such applications become severe. Communication in these applications must be reliable because errors in data transmission can harm the patient.

  One conventional communication system used in robot-assisted surgery connects a surgeon's control console to a robotic arm by using hundreds of paths (eg, wires). However, using hundreds of routes complicates system setup and maintenance, and requires substantial space to route all routes.

  Conventional communication standards provide reasonable performance in some areas, but do not provide sufficient performance in other areas. For example, the IEEE-1394 interface standard provides synchronous, serial, and point-to-point communication. The IEEE-1394 channel has a licensed bandwidth, but can only provide synchronization up to a range of about 125 microseconds. Such performance may not be sufficient for some applications that require tighter synchronization.

(wrap up)
In one aspect, a data packet is provided, the data packet including a synchronization field and an acknowledgment field indicating acknowledgment of receipt of a previous data packet. The data packet also includes a response field that contains information indicating a system defect, a header field, and a sequence number field that contains a number assigned to the data packet. The data packet further includes a data field, a packet end field, and an error check field.

  Particular implementations may include one or more of the following features. The synchronization field, acknowledgment field, response field, header field, sequence number field, and packet end field may each be 1 byte long. The data field may be 32 bytes long. The error check field may be 2 bytes long. The packet end field may include an indication of how many of the 32 bytes in the data field are fill bytes. The synchronization field may include a predetermined shift invariant value. The response field includes flow control information, and the flow control information may include flow control information for a plurality of channels. The header field may include a channel selection subfield that indicates a channel intended for the data packet. The header field includes a command subfield, and the command subfield may include a synchronization command.

  In another aspect, a method and computer program product are provided, the method and program product comprising receiving an acknowledgment field in a first data packet from a second node at a first node. In response to receiving the acknowledgment field, two or more data packets already transmitted from the first node are retransmitted only if the acknowledgment field in the first data packet is negative acknowledgment (NAK). Can be done. Instead, if the acknowledgment field is a positive acknowledgment (ACK), the second data packet is transmitted from the first node to the second node, and after the start of transmission of the second data packet, The first data packet is checked for errors. If an error is detected in the first data packet, a NAK is transmitted from the first node to the second node substantially immediately after completing the transmission of the second data packet. If no error is detected in the first data packet, the third data packet is transmitted from the first node to the second node substantially immediately after completing the transmission of the second data packet. .

  In yet another aspect, a method and computer program product are provided, the method and program product comprising receiving, at a first node, a first data packet transmitted from a second node. The first data packet includes a defect signal. In response to the defect signal, the first node is placed in a safe state and the first node includes a second signal including the defect signal before processing the information contained in the data field of the first data packet. The data packet is transmitted from the first node to the third node. Particular implementations include receiving at a first node a third data packet transmitted from a second node. The third data packet does not include a defect signal, and the first data node is in a safe state. The first node is placed in an operable state, and a fourth packet is transmitted from the first node to the third node. The fourth packet does not include a defect signal.

  Particular embodiments may be implemented to realize one or more of the following advantages. The transmitter and receiver can be synchronized very accurately (eg, substantially in the range of 10 microseconds or less). The delay is limited and kept low (eg, substantially below 10 microseconds). On a single physical path connector, data can be transmitted with a small delay. The same communication protocol can be used for multiple communication links operating at different speeds in a single system. Communication protocols are implemented at low cost in hardware. Bandwidth can be used for data transmission, otherwise it can be used to wait for acknowledgment. Error detection and recovery are performed simultaneously on the flow control information and the reception confirmation information. Defect information can be quickly transmitted throughout the system. Multiple independent data streams at different priorities can be transmitted throughout the system.

  These general and specific aspects may be implemented using a method, apparatus, system, or any combination of methods, apparatuses, and systems.

  The details of one or more embodiments of the invention are set forth in the accompanying drawings and the detailed description below. Other features, aspects, and advantages of the invention can be understood from the detailed description, the drawings, and the claims.

  The same reference numbers and reference symbols in the various drawings indicate the same elements.

The present invention further provides the following.
(Item 1)
A synchronization field;
An acknowledgment field indicating the receipt of receipt of the previous data packet;
A response field containing information indicating a system defect;
A header field,
A sequence number field containing a number assigned to the data packet;
A data field,
A packet end field;
A data packet comprising an error checking field.
(Item 2)
The synchronization field is 1 byte long,
The reception confirmation field is 1 byte long,
The response field is 1 byte long,
The header field is 1 byte long,
The sequence number field is 1 byte long,
The data field is 32 bytes long,
The packet end field is 1 byte long,
The error check field is 2 bytes long.
The data bucket according to item 1.
(Item 3)
The data packet of item 2, wherein the packet end field includes an indication of how many of the 32 bytes in the data field are fill bytes.
(Item 4)
The data packet of item 1, wherein the synchronization field includes a predetermined shift invariant value.
(Item 5)
The data packet according to item 1, wherein the response field includes flow control information.
(Item 6)
6. The data packet according to item 5, wherein the flow control information includes flow control information for a plurality of channels.
(Item 7)
6. The data packet according to item 5, wherein the header field includes a channel selection subfield indicating a channel targeted for the data packet.
(Item 8)
The data packet according to item 1, wherein the header field includes a command subfield.
(Item 9)
Item 9. The data packet of item 8, wherein the command subfield includes a synchronization command.
(Item 10)
Receiving a receipt confirmation field in a first data packet from a second node at a first node;
In response to receiving the acknowledgment field, two data packets that have already been transmitted from the first node are obtained only if the acknowledgment field in the first data packet is negative acknowledgment (NAK). Re-transmitting,
In response to receiving the acknowledgment field, only if the acknowledgment field is a positive acknowledgment (ACK), transmits a second data packet from the first node to the second node, and After starting the transmission of the second data packet, checking for errors in the first data packet;
A NAK is transmitted from the first node to the second node substantially immediately after completing the transmission of the second data packet only if an error is detected in the first data packet. When,
Only if no error is detected in the first data packet, immediately after completing the transmission of the second data packet, the third data packet is sent from the first node to the second data packet. Transmitting to a node.
(Item 11)
Receiving a first data packet transmitted from a second node at a first node, wherein the first data packet includes a defect signal;
In response to the defect signal, placing the first node in a safe state;
The first node transmits the second data packet including the defect signal from the first node to the third node before processing the information included in the data field of the first data packet. A method that includes
(Item 12)
Receiving the third data packet transmitted from the second node at the first node, wherein the third data packet does not include the defect signal; The node is in a safe state, and
Placing the first node in an operable state;
Item 12. The method according to Item 11, further comprising: transmitting a fourth packet from the first node to the third node, wherein the fourth packet does not include the defect signal. the method of.
(Item 13)
A computer program product clearly embodied in a computer readable medium, the computer program product comprising:
Receiving a receipt confirmation field in the first data packet from the second node at the first node;
In response to receiving the acknowledgment field, two data packets that have already been transmitted from the first node are obtained only if the acknowledgment field in the first data packet is negative acknowledgment (NAK). Retransmit
In response to receiving the acknowledgment field, only if the acknowledgment field is a positive acknowledgment (ACK), transmits a second data packet from the first node to the second node, and Check for errors in the first data packet after the start of transmission of the second data packet;
Only if an error is detected in the first data packet, transmits a NAK from the first node to the second node substantially immediately after completing the transmission of the second data packet;
Only if no error is detected in the first data packet, immediately after completing the transmission of the second data packet, the third data packet is sent from the first node to the second data packet. A computer program product comprising instructions that are operable to cause a programmable processor to perform an operation that is transmitted to a node.
(Item 14)
A computer program product clearly embodied in a computer readable medium, the computer program product comprising:
The first node receives the first data packet transmitted from the second node, and the first data packet includes a defect signal;
In response to the defect signal, the first node is placed in a safe state;
The first node transmits the second data packet including the defect signal from the first node to the third node before processing the information included in the data field of the first data packet. A computer program product comprising instructions operable to cause a programmable processor to perform an operation.
(Item 15)
The first node receives the third data packet transmitted from the second node, the third data packet does not include the defect signal, and the first node In state
Put the first node in a safe state,
The fourth packet is further transmitted from the first node to the third node, and the fourth packet further includes an instruction operable to execute an operation that does not include the defect signal. Item 15. The product according to Item 14.

(Summary)
A data packet is provided that includes a synchronization field and an acknowledgment field that indicates an acknowledgment of receipt of a previous data packet. The data packet also includes a response field that contains information indicating a system defect, a header field, and a sequence number field that contains a number assigned to the data packet. The data packet further includes a data field, a packet end field, and an error check field. In some implementations, the node retransmits the packet if the acknowledgment field in the received data packet is a negative acknowledgment (NAK) and / or a node in response to a defect signal included in the received data packet A method and computer program product are provided for placing a computer in a safe state.

(Detailed description)
A link layer is described that uses a substantially continuous stream of full-duplex serial data between two system nodes. A node may include, for example, a computer, a programmable processor, a field programmable gate array (FPGA), or other data processing device. Data is divided into fixed-length packets. Each fixed-length packet includes data, error inspection information, flow control information, diagnostic information, defect information, and retransmission control information. The data in each packet may include a portion of hardware level data or a message (eg, a software message).

  Fixed-length packets are transmitted continuously between two nodes, regardless of whether data is available for transmission. If there is no data available for transmission, the data field of the packet can be filled with “filler” data, which can be discarded at the receiving node. The transmitted packet includes an acknowledgment of the already received packet. The transmitting node may transmit the first packet and begin transmitting at least one subsequent packet before receiving the first packet acknowledgment from the receiving node. As will be described in more detail below, the transmission and reception of packets at a node are coordinated.

  As shown in FIG. 1, the data from the first node 110 is multiplexed with data on the link to provide a plurality of destination nodes, eg, the second node 120, the third node 130, and the second node. 4 nodes 140 may be transmitted. A node between the first node 110 and a particular destination node may route the data. The first node 110 may transmit data for the second node 120 via the first link 125. The node 110 also transmits data for the third node 130 to the second node 120 via the first link 125, and the second node 120 transmits the above data via the second link 135. Data may be routed to the third node 130. Similarly, the first node 110 transmits data to the fourth node 140 via the first link 125, and the second node 120 transmits the above data via the third link 145. May be transmitted to the fourth node 140.

  In some implementations, the destination node destination may be processed in a message included in the transmitted data. In this implementation, the second node 120 typically processes at least a portion of the message sent from the first node 110 before sending a packet containing a portion of the message to the destination node. If the second node 120 is itself the destination node, the message need not be transmitted any further.

  In some systems, the communication between the first node 110 and the third node 130 and the fourth node 140 is more than the communication between the third node 130 and the fourth node 140 occurs. Also occurs more frequently. In such a system, the first link 125 is more than the second link 135 or the third link 145 to provide sufficient capacity for large volumes of data passing through the first link 125. It can be a fast link.

  Nodes 110, 120, 130, and 140 include one or more hardware data buffers 152-164 that receive messages and that communicate messages on or with each node. The message may be held until the software executing above is ready to receive the message.

  As shown in FIG. 2, a fixed length packet 200 in one implementation may include a plurality of bytes 201-240. Although a 40 byte packet is shown, a fixed length packet may be of other lengths. In the implementation shown, the control information is placed in 8 of the 40 bytes and the data is placed in the remaining 32 bytes. The first byte 201 is a synchronization field, which can be used to maintain byte framing at the node receiving the packet. To compensate for clock drift between multiple nodes, additional synchronization bytes may be added to the packet (eg, once every 128 packets). The second byte 202 is an acknowledgment field, which indicates that the last node received by the node transmitting the packet 200 was received correctly (eg, including valid error checking information). It can indicate whether or not. The second byte 202 is set to a value (eg, 0xAC) to indicate a positive acknowledgment (ACK) that the last packet was received correctly (eg, 0xAC) (eg, the last packet was not received correctly) Can be set to an inverse value (eg, 0x53) to indicate negative acknowledgment or NAK). In some implementations, any value except the positive acknowledgment value may be interpreted as a negative acknowledgment. In this implementation, if the NAK value is the inverse of the ACK value, an 8-bit error is required to transfer the transmitted NAK to the ACK.

  The third byte 203 is a response field, which includes, for example, a test mode bit indicating that the system is in a diagnostic test mode, and a plurality of message channels (eg, low priority, medium priority, high It includes a plurality of control bits, such as XOFF bits for each (priority channel). The control bits may also include retransmission bits, which when set may indicate that the packet 200 is a retransmission of a previous packet when set. Also, the one or more control bits can be defective bits, which can indicate that an error has occurred in the system.

  The fourth byte 204 is a header field. The header field may include a plurality of subfields such as a channel selection subfield and a command subfield. The channel selection subfield is used to indicate on which priority channel the data in the packet 200 is transmitted. The command subfield may include instructions for flushing the buffer and resuming the stream of messages. The command subfield may include instructions that require specific data to be transmitted on the hardware channel or on a code that identifies such data. The command subfield is also used to synchronize the system. For example, at the start of a synchronization cycle, a packet containing a synchronization command can be transmitted, allowing subsystems in the system to maintain synchronization (eg, in the 10 microsecond range). The fifth byte 205 is a sequence number field that contains a sequence number that can be used by the receiving node to detect transmission errors. Sixth byte 206 through thirty-seventh byte 237 belong to a data field that holds 32-byte data, such as a message or part of a message.

  The 38th byte 238 is a packet end field, which can specify how many bytes in the data field can correspond to the message and how many bytes are fill bytes. . The packet end field may also include a packet end direction bit, which is set when the byte in the data field ends the message. The message end indication bit may trigger an interruption at the receiving node. The 39th byte 239 and the 40th byte 240 are part of an error check field, which in one embodiment is calculated using a 16-bit CRC value (eg, using a CCITT 16-bit CRC algorithm). Can be included). When a node receives a packet, the node can determine whether an error has occurred while the packet is being transmitted or received by using an error check field.

  The structure of the packet 200 allows a fault reaction logic (FRL) signal indicating a defect in the node to be communicated in multiple ways. For example, the FRL signal may be transmitted in packet control information (eg, in the control bits of the response field of packet 200) or in a message. Transmitting the FRL signal directly in the packet control information allows defect information to be transmitted very quickly throughout the system and handled at a very low level. The system-wide defect signal can be propagated without software intervention, and the defect reaction hardware can place the system in a safe state once the defect signal is received. Once the problem that caused the defect has been resolved (eg, by human operator intervention), the defect signal can be cleared and the system can be returned to an operational state. Once the defect signal is cleared, the FRL signal that typically indicates a defect is not transmitted in the packet control information until another defect occurs.

  An example of a system in which rapid propagation of defect signals is advantageous is a robotic surgical system. Such a system may include a plurality of robotic arms that hold surgical instruments or devices (eg, laparoscopes, endoscopes, lights, cameras, and inhalers), some of which are May be located within the patient. Typically, the robotic arm is operated remotely by a surgeon. Communication between the surgeon-operated control and the node controlling the robotic arm may use the methods, systems, and apparatus described in the disclosure herein. When an error occurs in such a system, the robotic arm can be locked in place to prevent the patient from being injured by unexpected movement of the robotic arm. When a system fault occurs and the system fault propagates between multiple nodes, the robotic arm joint can be braked and the fault is automatically cleared by a human operator or system monitoring unit Until then, movement commands can be suspended.

  The described packet structure allows data such as messages to be transmitted over a single channel or multiple channels that are multiplexed over a serial connection. The channel on which a particular message is transmitted is indicated by the channel selection subfield in packet 200. The system software places messages in different hardware buffers on each channel (eg, by using different addresses), and the system hardware automatically places the messages based on which buffer the messages are placed on Can be assigned to a channel. Multiple channels may be assigned different priorities. In some implementations, a packet or group of packets containing data transmitted on a high priority channel is transmitted to a low priority channel when waiting for messages of different priority to be transmitted. Transmitted to a packet or group of packets. In another implementation, a packet containing data transmitted on a high priority channel may be allocated more transmission slots than a packet containing data transmitted on a low priority channel. Time-critical messages can be transmitted on high priority channels, while relatively unimportant messages can be transmitted on low priority channels. Once enough data is written to the buffer and fills the packet, the system hardware can automatically transmit a portion of the message. That is, message transmission can be performed when data becomes available and it is no longer necessary to wait until all messages have been written to the buffer.

  The XOFF bit in the third byte 203 controls the flow of data in the channel. Each node may include a plurality of hardware buffers, which may receive messages transmitted on each of the plurality of channels. For example, high priority messages are stored in a high priority buffer and low priority messages are stored in a low priority buffer. When the first node transmitting packet 200 sets the XOFF bit in packet 200, the first node sends data to the second node receiving packet 200 to the first node on the respective data channel. Command to stop transmitting. The first node's hardware may automatically set the XOFF bit for the data channel, for example when the first node is about to fill up a buffer that stores messages from the data channel. . In one implementation, the threshold for when a node sets the XOFF bit for a given channel is 32 words (4 packets) minus the size of the receive buffer for each channel in the node (eg, 512 words). Equal to the thing. The margin of 32 words gives the receiving node time to receive the XOFF signal and take an action in response to it using the margin for error. Other threshold levels are also possible. The first node's hardware may also set the XOFF bit for the data channel when multiple (eg, 12) messages are present in the receive buffer. Once the packet or message is removed from the buffer, the hardware can automatically clear the XOFF bit for the data channel. Each priority channel may have a respective receive buffer in the node. Since the XOFF bit is transmitted in every packet, an error check field can be applied to the XOFF bit to guard against corruption of the XOFF bit.

  By using the channel selection subfield described above, multiple communication channels can be made available at the link layer. For example, hardware channels and high priority, medium priority, and low priority channels may be implemented. Messages can vary in length (eg, between 3 and 128 words) and can be transmitted in one or more packets depending on the length of the message. The first byte of the message may contain the address of the destination node of the message. The system hardware may subdivide the message into multiple packets at the transmitting node and defragment the message at the receiving node. If the message does not fill the data portion of the packet, the fill data can be inserted into the remainder of the data portion. A message transmission buffer and a reception buffer may be implemented in hardware. For example, a node may include a hardware transmit buffer and a receive buffer for each channel (eg, high priority, medium priority, low priority channel). In one implementation, the transmit and receive buffers for the channel are 1.5 times the maximum message size.

  FIG. 3 shows a conceptual timing diagram for communication between two nodes by using a packet as discussed in the context of FIG. Packets 301-304 are continuously transmitted from the first node to the second node. The packets 311 to 314 are received by the second node and correspond to the packets 301 to 304. However, when a transmission error occurs, the packets 311 to 314 are the corrupted versions of the respective packets 301 to 304. obtain. Over time, reception of packets 311-314 is delayed with respect to packet 301-304 transmission due to the finite propagation time of the packets along the link. In the example shown in FIG. 3, the packet propagation time is shorter than the packet duration (the length of time required by the first node to transmit the packet).

  The second node transmits packets 355-358 to the first node. Packets 365-368 are received at the first node after the corresponding packets 355-358. Packet 356 includes an acknowledgment field that is applied to packet 301. If packet 311 (corresponding to packet 301) is received simultaneously at the second node, packet 356 includes an ACK for packet 301. If packet 311 is not received at the same time, packet 356 includes a NAK. Packet 357 includes an acknowledgment field corresponding to packet 302. Similarly, packet 303 includes an acknowledgment field that indicates whether packet 365 has been received simultaneously at the first node, and packet 304 includes an acknowledgment field for packet 366.

  In some implementations, the second node does not begin transmitting packets until the first acknowledgment field is received from the first node. For example, the second node does not start transmitting the packet 355 until the second node receives the acknowledgment field in the packet 311. In order to facilitate initial synchronization between the first node and the second node, the two nodes may have several consecutive synchronization bytes before the first node transmits the packet 301. Each can be transmitted.

  FIG. 3 shows a case where a “pipeline” of two packets exists between the first node and the second node. Packet 356 includes an acknowledgment field for packet 301. If the acknowledgment field includes ACK, the first node transmits the packet 303. However, if the acknowledgment field of packet 356 includes a NAK, the first node may reframe and retransmit packets 301 and 302. To resynchronize the system, in this implementation, two packets can be retransmitted when a NAK is received for the first of the two packets. If the first of the two packets is not received at the same time, the second packet checks whether the second packet is received correctly when the second packet is transmitted for the first time. Without being retransmitted. In the situation where an error in the first packet has occurred due to a loss of synchronization between the two nodes, the second packet is preemptively transmitted because the second packet is considered to contain an error. Is done. The node that transmitted the NAK may also transmit the last two packets that were transmitted before transmitting the NAK. For a given packet, the acknowledgment field is received only after another packet is transmitted, so FIG. 3 has a pipeline of two packets between the first node and the second node. It is described as follows. The round trip time between the first node and the second node is the same as or slightly shorter than the time required to transmit one packet. That is, the first node can start receiving packet 365 before the first node finishes transmitting packet 301. Typically, the round trip time depends on the propagation delay on the link and the processing time at the node. Within the system, a longer round trip time (long absolute time or longer time for packet duration) can also be used, and as a result, the pipeline can be deeper than two packets. .

  Packets are transmitted substantially continuously between the first node and the second node, regardless of whether there is a message located in the data field of the packet. As shown in FIG. 3, the packets are transmitted in an interlocking manner. Coordinated transmission of fixed length packets can generate an offset with a fixed phase between the packets received at the node and the packets transmitted by the node. The node receives a packet from the remote node that contains an acknowledgment of error-free receipt of the already transmitted packet after a predetermined length of time from the transmission of the already transmitted packet. The continuous transmission of linked packets enables high bandwidth, low delay communication with accurate synchronization between multiple nodes. In addition, the continuous transmission of packets allows the system to calculate the bit error rate (BER) of connections between multiple nodes accurately and substantially continuously.

  As shown in FIG. 4, when the second node receives the packet 411 from the first node and determines that a transmission error has occurred that causes data corruption in the packet 411, the second node Instead of transmitting the next packet, the transmission of the packet is terminated, and the NAK and the reframing sequence 456 are transmitted to the first node. One reason that the packet 411 can be corrupted is that the synchronization between the first node and the second node is reduced or lost, so the reframing sequence 456 is transmitted and the first Reconstruct the synchronization between one node and the second node. The reframing sequence may include an alternative synchronization field and a link field, which may be a predetermined code such as 0xA3. In one implementation, the fourth link byte must be received before the node is considered to be reframed. The first node receives the NAK, reframes the sequence 466, and transmits the reframing sequence 403. After the first node transmits the reframing sequence 403, the first node retransmits the last packet transmitted before receiving the NAK. For a pipeline of N packets, the last N packets are retransmitted. Once the second node receives an ACK in the first retransmitted packet 414, the second node also begins to retransmit the packet.

  As shown in FIG. 5, when the first node receives the packet 565 from the second node and determines that a transmission error has occurred that causes data corruption in the packet 565, the first node , NAK and reframing sequence 503 are transmitted to the second node. The second node receives the NAK and the reframing sequence 513, and transmits the reframing sequence 557. After the first node transmits the NAK and reframing sequence 503, the first node resends the last packet transmitted before receiving the corrupted packet. Once the second node receives an ACK in the first retransmitted packet 514, the second node also begins transmitting the packet.

  The error counter may track the number of hardware errors that occur in the node. Suspension can be enabled when the counter reaches a threshold. In one implementation, the error counter is read by software in the node, which may set a break threshold. In this system, error detection and correction can be handled at a very low level, and the software layer operating on top of the described link layer does not need to perform additional error detection and correction.

  FIG. 6 shows a process 600 performed at a node in an implementation. The node starts receiving the first packet (step 610), and receives the reception confirmation field in the first packet (step 615). The node determines whether the reception confirmation field is ACK or NAK (step 620). If the acknowledgment field is NAK, the node transmits a reframing sequence (step 625) and retransmits a packet such that the received NAK corresponds to any packet transmitted after that packet (step 630). . If the acknowledgment field is ACK, the node starts transmitting the second packet (step 635) and checks for errors in the first packet, eg, by verifying the CRC value in the packet (step 635). 640). If an error is detected in the first packet, the node ends the transmission of the second packet (step 645) and transmits the NAK and reframing sequence (step 650).

  If no error is detected in the first packet, the node determines whether a defective bit is set in the first packet (step 655). If the defect bit is set, the node is placed in a defect mode or safe state (step 660). If the defective bit is not set, or once the node is in the defective mode, the node finishes transmitting the second packet (step 665) and starts transmitting the third packet (step 670). .

  Embodiments of the present invention and all of the functional operations described herein may be implemented in digital electronic circuitry or computer software, firmware, or hardware and are described herein. Structures, their structural equivalents, and combinations of one or more of them. Embodiments of the invention are encoded on a computer readable medium as one or more computer program products, ie, executed by a data processing device or for controlling the operation of the data processing device. May be implemented as one or more modules of computer program instructions. The computer readable medium may be a machine readable storage device, a machine readable storage substrate, a memory device, a configuration that operates on a machine readable propagation signal, or a combination of one or more thereof. The term “data processing apparatus” encompasses any apparatus, device, and machine for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers as a means. In addition to hardware, the apparatus may include code that forms an execution environment for the computer program in question, such as processor firmware, protocol stack, database management system, operating system, or their It may be a code constituting one or more combinations. A propagated signal can be an artificially generated signal, for example, an electrical, optical, or electromagnetic signal generated by a machine that encodes information for transmission to an appropriate receiving device. Can be generated.

  A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, as a stand-alone program or as a module , Components, subroutines, or as any other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. The program can be part of a file that holds other programs or data (eg, one or more scripts stored in a markup language document), a single file dedicated to the program in question, Or, it can be stored in a number of organized files (eg, storing one or more modules, subprograms, or portions of code). A computer program may be executed on one or more computers or computers located in one location or distributed across multiple locations and interconnected by a communication network Can be delivered.

  The processing and logic flows described herein may be performed by one or more programmable processors executing one or more computer programs, operating to input data and generate output. Thus, a plurality of functions are executed. The processing and logic flow can also be performed by an application specific logic circuit such as, for example, a field programmable gate array (FPGA) or an application-specific integrated circuit (ASIC), and the device is also application specific It can be implemented as a logic circuit.

  Processors suitable for the execution of computer programs include, for example, both general-purpose processors and application-specific processors, one or more arbitrary processors of any type of digital computer. Generally, a processor may receive instructions and data from a read only memory or a random access memory or both. The main elements of a computer are a processor for executing instructions and one or more memories for storing instructions and data. In general, a computer may include one or more mass storage devices, eg, a magnetic disk, a magneto-optical disk, or an optical disk, to store data, or to receive data, or Operatively connected to the storage device for transmitting data or for both receiving and transmitting. However, a computer need not necessarily have those devices. Further, the computer may be embedded in another device, for example, a mobile phone, personal digital assistant (PDA), portable audio player, global positioning system (GPS) receiver, to name a few. Computer readable media suitable for storing computer program instructions and data include any form of non-volatile memory, media, and memory devices such as semiconductor memory devices (eg, EPROM, EEPROM, flash). Memory devices), magnetic disks (eg, built-in hard disks or removable disks), magneto-optical disks, and CD-ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or implemented in, application specific logic.

  In order to provide user interaction, embodiments of the present invention provide a display device, such as a CRT (Cathode Ray Tube) or LCD (Liquid Crystal Display), for displaying information to the user and the user to the computer. Can be implemented in a computer having a keyboard and a pointing device, such as a mouse or trackball, for providing input. Other types of devices can be used to provide user interaction as well. For example, the feedback provided to the user can be any form of perceptual feedback, for example, visual feedback, acoustic feedback, or tactile feedback. Also, input from the user may be received in any form, and the input may include acoustic input, utterance input, or tactile input.

  This specification includes many specific examples, which should not be construed as limiting the scope of the invention or claimed subject matter, but rather are specific to a particular embodiment of the invention. Should be considered as describing the characteristics of Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, although features are described above as acting on a particular combination, in some cases one or more features from the claimed combination may have been cut from the above combination. Even the main claim can be claimed and the claimed combination can be directed to a small combination or a combination of small combinations.

  Similarly, in the drawings, operations have been described in a particular order, which may be performed in such a particular or sequential order shown, or all shown. Should not be construed as requiring that the operation be performed to achieve the desired result. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of the various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and the program components and systems described are In general, it should be understood that they can be integrated together into a single software product or packaged into multiple software products.

  Thus, embodiments of the present invention have been described. Other embodiments are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and even achieve undesirable results. The methods, systems, and devices described above include an optical fiber (eg, operating at 160 Mb / s), a low voltage differential signal (eg, operating at 122 Mb / s), a synchronous serial of the source, an asynchronous back It can be used with a variety of physical transmission mechanisms, including plain wire. In some implementations, a corrupted packet does not necessarily retransmit when the packet contains data that can tolerate errors. For example, malfunctions that occur from time to time in video or audio streams are acceptable. In addition, error detection and reframing are used in this implementation, allowing the hardware to perform fast recovery from framing errors.

FIG. 1 is a block diagram of a system including a plurality of nodes connected by links. FIG. 2 is a diagram of the structure of the data packet. FIG. 3 is a timing diagram of packet transmission between a plurality of nodes. FIG. 4 is a timing diagram of an error recovery scenario. FIG. 5 is a timing diagram of an error recovery scenario. FIG. 6 is a flowchart of processing executed in the node.

Explanation of symbols

200 Data packet 201 Synchronization field 202 Acknowledgment field 203 Response field 204 Header field 205 Sequence number field 206-237 Data field 238 Packet end field 239, 240 Error check field

Claims (15)

A synchronization field;
An acknowledgment field indicating the receipt of receipt of the previous data packet;
A response field containing information indicating a system defect;
A header field,
A sequence number field containing a number assigned to the data packet;
A data field,
A packet end field;
A data packet comprising an error checking field. The synchronization field is 1 byte long;
The receipt confirmation field is 1 byte long;
The response field is 1 byte long;
The header field is 1 byte long;
The sequence number field is 1 byte long;
The data field is 32 bytes long;
The packet end field is 1 byte long;
The data bucket of claim 1, wherein the error check field is 2 bytes long.   The data packet of claim 2, wherein the packet end field includes an indication of how many of the 32 bytes in the data field are fill bytes.   The data packet of claim 1, wherein the synchronization field includes a predetermined shift invariant value.   The data packet of claim 1, wherein the response field includes flow control information.   The data packet according to claim 5, wherein the flow control information includes flow control information for a plurality of channels.   The data packet according to claim 1, wherein the header field includes a channel selection subfield indicating a channel intended for the data packet.   The data packet of claim 1, wherein the header field includes a command subfield.   The data packet of claim 8, wherein the command subfield includes a synchronization command. Receiving a receipt confirmation field in a first data packet from a second node at a first node;
In response to receiving the acknowledgment field, two data packets that have already been transmitted from the first node are included only if the acknowledgment field in the first data packet is a negative acknowledgment (NAK). Re-transmitting,
In response to receiving the acknowledgment field, a second data packet is transmitted from the first node to the second node only if the acknowledgment field is a positive acknowledgment (ACK), and After starting transmission of the second data packet, checking for errors in the first data packet;
Transmit a NAK from the first node to the second node substantially immediately after completing the transmission of the second data packet only if an error is detected in the first data packet. When,
A third data packet is transmitted from the first node to the second node substantially immediately after completing the transmission of the second data packet only if no error is detected in the first data packet. Transmitting to a node. Receiving a first data packet transmitted from a second node at a first node, the first data packet including a defect signal;
In response to the defect signal, placing the first node in a safe state;
The first node transmits a second data packet containing the defect signal from the first node to a third node before processing the information contained in the data field of the first data packet. A method that includes Receiving the third data packet transmitted from the second node at the first node, wherein the third data packet does not include the defect signal; The node is in a safe state, and
Placing the first node in an operable state;
12. The method of claim 11, further comprising: transmitting a fourth packet from the first node to the third node, wherein the fourth packet does not include the defect signal. The method described. A computer program product clearly embodied in a computer-readable medium, the computer program product comprising:
Receiving a receipt confirmation field in the first data packet from the second node at the first node;
In response to receiving the acknowledgment field, two data packets that have already been transmitted from the first node are included only if the acknowledgment field in the first data packet is a negative acknowledgment (NAK). Retransmit
In response to receiving the acknowledgment field, a second data packet is transmitted from the first node to the second node only if the acknowledgment field is a positive acknowledgment (ACK), and After the start of transmission of the second data packet, check for errors in the first data packet;
Only if an error is detected in the first data packet, transmits a NAK from the first node to the second node substantially immediately after completing the transmission of the second data packet;
A third data packet is transmitted from the first node to the second node substantially immediately after completing the transmission of the second data packet only if no error is detected in the first data packet. A computer program product comprising instructions that are operable to cause a programmable processor to perform an operation that is transmitted to a node. A computer program product clearly embodied in a computer-readable medium, the computer program product comprising:
The first node receives the first data packet transmitted from the second node, and the first data packet includes a defect signal;
In response to the defect signal, place the first node in a safe state;
The first node transmits a second data packet containing the defect signal from the first node to a third node before processing the information contained in the data field of the first data packet. A computer program product comprising instructions operable to cause a programmable processor to perform an operation. The first node receives a third data packet transmitted from the second node, the third data packet does not include the defect signal, and the first node In state
Put the first node in a safe state;
Transmitting a fourth packet from the first node to the third node, the fourth packet further comprising instructions operable to cause an operation not including the defect signal to be performed; The product of claim 14.

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