JP2003197628A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve frequency characteristics in a lateral PNP transistor. <P>SOLUTION: A method for manufacturing a semiconductor device comprises steps of ion-implanting an impurity in a boundary of an emitter layer 14, then heat-treating to diffuse the impurity to form an ion implanted layer 20 in the case of forming the lateral PNP transistor having an emitter layer 14 having a P-type impurity, a base layer 15 having an N-type impurity and a collector layer 13 having a P-type impurity disposed on a surface of a semiconductor substrate (P-type substrate 10) along an in-plane direction. The method further comprises a step of forming a concentration gradient of the impurity by the layer 20 along the in-plane direction as the substrate between the collector layer 13 and the emitter layer 14. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an emitter region having a P-type impurity, a base region having an N-type impurity, and
The present invention relates to a semiconductor device including a lateral PNP transistor in which a collector region having P-type impurities is arranged in an in-plane direction of a semiconductor substrate, and a manufacturing method thereof.

[0002]

2. Description of the Related Art Generally, an NPN type transistor and a PNP type transistor are required for a bipolar transistor incorporated in an integrated circuit. As PNP type transistors, so-called vertical PNP transistors and horizontal PNP transistors are used.
It can be roughly divided into a transistor. The vertical PNP transistor has a structure in which a P-type emitter region, an N-type base region, and a P-type collector region are arranged in the thickness direction of the semiconductor substrate. Also, the lateral PNP transistor is
The P-type emitter region, the N-type base region, and the P-type collector region are arranged in the in-plane direction of the semiconductor substrate.

[0003]

By the way, a lateral PNP is used.
Since the transistor can be manufactured at the same time as the vertical NPN transistor by the double diffusion vertical NPN transistor manufacturing process using the planar technology, it is widely used in the bipolar transistor described above for the purpose of simplifying the manufacturing process. ing. However, since the lateral PNP transistor manufactured by the conventional manufacturing process is formed by the epitaxial growth layer in which the impurity concentration of the base region is uniform and has no concentration gradient, a drift electric field is obtained when used in the high frequency region. However, there is a problem that the frequency characteristic is limited.

In order to improve the limitation of such characteristics,
Various manufacturing processes using a vertical PNP transistor in place of the horizontal PNP transistor have been proposed, but all of these processes cause an increase in the number of steps and increase the manufacturing cost of the entire semiconductor device such as a bipolar transistor. was there.

Therefore, the present invention has been made in view of the above conventional circumstances, and an object thereof is to provide a semiconductor device including a lateral PNP transistor having improved frequency characteristics in a high frequency region. Another object of the present invention is to provide a semiconductor device manufacturing method capable of manufacturing such a semiconductor device by a simple process.

[0006]

A semiconductor device according to claim 1 of the present invention comprises an emitter region having a P-type impurity and an N-type emitter region.
In a semiconductor device including a lateral PNP transistor in which a base region having a type impurity and a collector region having a P type impurity are arranged in an in-plane direction of a semiconductor substrate, an impurity is added in the in-plane direction of the semiconductor substrate in the base region. It is characterized in that a concentration gradient of is formed.

Claim 1 of the present invention having the above-mentioned structure
According to the semiconductor device of the second aspect, since the impurity concentration gradient is formed in the in-plane direction of the semiconductor substrate in the base region, a drift electric field is applied to the carriers passing through the base region. Therefore, the frequency characteristic in the high frequency region can be improved.

According to a second aspect of the present invention, there is provided a semiconductor device manufacturing method, wherein an emitter region having a P-type impurity and an N-type are included.
When manufacturing a semiconductor device including a lateral PNP transistor in which a base region having a type impurity and a collector region having a P type impurity are arranged in an in-plane direction of a semiconductor substrate, the impurity is ion-implanted at a boundary portion of the emitter region. An impurity implantation step of implanting and an impurity diffusion step of diffusing the impurities by subjecting the semiconductor substrate to heat treatment to form an impurity concentration gradient in the in-plane direction of the semiconductor substrate in the base region are included. It is a feature.

A second aspect of the present invention configured as described above.
According to the method of manufacturing a semiconductor device of the above, the impurity concentration gradient can be formed in the in-plane direction of the semiconductor substrate in the base region by the extremely simple steps of the impurity implantation step and the impurity diffusion step. When the lateral PNP transistor having such a concentration gradient is used in a high frequency region, a drift electric field is given to carriers passing through the base region, and the frequency characteristic can be improved. Therefore, a semiconductor device including a lateral PNP transistor having good characteristics can be manufactured by an extremely simple process, which can contribute to cost reduction of the semiconductor device.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following, first, the semiconductor device 1 having the structure shown in FIG. 1 will be described. Note that FIG. 1A is an enlarged plan view of an essential part showing a part of the semiconductor device 1 in an enlarged manner, and FIG.
It is a principal part sectional view which expands and shows the AA cross section shown in (a).

As shown in FIG. 1, the semiconductor device 1 has an N ⁺ type buried diffusion layer 11 formed by a buried diffusion on a P type substrate 10 and an epitaxial growth on the N ⁺ type buried diffusion layer 11. N-type epitaxial growth layer 12, and P ⁺ -type collector layer 13 and P ⁺ -type emitter layer 1 diffused and formed on the N-type epitaxial growth layer 12.
4 and N ⁺ formed on the N-type epitaxial growth layer 12
Type base contact 15, electrically insulating layer 16 formed on the main surface of N type epitaxial growth layer 12, P ⁺ type collector layer 13, P ⁺ type emitter layer 14, and N ⁺ type base contact 15, respectively. The collector electrode 17, the emitter electrode 18, and the base electrode 19 are formed.

In the semiconductor device 1, the collector layer 13 and the collector electrode 17 are formed in an annular shape around the formation positions of the emitter layer 14 and the emitter electrode 18. Further, in the semiconductor device 1, the collector layer 13,
Since the emitter layer 14 and the base contact 15 are arranged in the in-plane direction of the substrate, and the N-type epitaxial growth layer 12, that is, the base region is arranged between the collector layer 13 and the emitter layer 14, So-called horizontal P
It has a structure including an NP transistor.

Further, in the semiconductor device 1, the N ⁺ type ion implantation layer 20 is formed in the base region between the collector layer 13 and the emitter layer 14. Ion implantation layer 20
Before the emitter layer 14 is formed, this emitter layer 1
Impurities such as phosphorus (P) are ion-implanted at the positions corresponding to the boundaries of No. 4, and the impurities are diffused by heat treatment. Note that, in FIG. 1A, a portion corresponding to a region into which impurities are ion-implanted when forming the ion-implanted layer 20 is indicated by a hatched portion.

Since the semiconductor device 1 includes the ion-implanted layer 20, the base region between the collector layer 13 and the emitter layer 14 has an impurity concentration as shown in FIG. 2, for example. In FIG. 2, the horizontal axis indicates the distance from the center of the emitter layer 18 to the in-plane direction of the substrate,
The impurity concentration is shown on the vertical axis.

That is, in the semiconductor device 1, the impurity concentration has a gradient in the in-plane direction of the substrate in the base region between the emitter region and the collector region. Therefore, when the semiconductor device 1 is used in a high frequency region, a drift electric field is given to the carriers passing through the base region, and good frequency characteristics can be obtained.

Here, in order to clarify the characteristics of the semiconductor device 1, an example of the impurity concentration between the emitter region and the collector region in the conventional lateral PNP transistor is shown in FIG. As is clear from FIG. 3, in the conventional lateral PNP transistor, since there is no impurity concentration gradient in the base region, carrier movement is restricted in the high frequency region and the drift electric field is restricted. It is obvious that there is a limit to the frequency characteristics because it cannot be obtained. That is, the semiconductor device 1 can improve the carrier mobility in the base region in a high frequency region and can obtain a drift electric field as compared with the conventional lateral PNP transistor, and can exhibit excellent frequency characteristics.

Next, a case of manufacturing the semiconductor device 1 having the above structure will be described with reference to the drawings.

In manufacturing the semiconductor device 1, first, as shown in FIG. 4A, N ⁺ type impurities are buried in the P type substrate 10 and then thermally diffused to form the N + type buried diffusion layer 11. Form.

Next, as shown in FIG. 4B, epitaxial growth is performed to form an N-type epitaxial layer 12 with a predetermined thickness. Further, the isolation layer 21 formed by diffusing P ⁺ -type impurities is formed around the region where the lateral PNP transistor is formed.

Next, as shown in FIG. 4C, an N-type impurity such as phosphorus (P) is ion-implanted on the circumference around the position where the emitter layer 14 is formed, and heat treatment is performed. To spread. Thereby, the ion implantation layer 20 is formed. Note that FIG. 2C illustrates the case where the impurities are ion-implanted on the circumference of the radius a centering on the formation position of the emitter layer 14.

Next, as shown in FIG. 4D, the P ⁺ -type impurities are thermally diffused to collect the collector layer 13 and the emitter layer 14.
To form. After that, the N ⁺ -type impurities are thermally diffused to form the base contact 15.

Next, the insulating layer 16 is formed on the main surface of the N-type epitaxial layer 12, a hole is formed at a predetermined position of the insulating layer 16 by using various photolithography techniques, and at the position of this hole. A collector electrode 17, an emitter electrode 18, and a base electrode 19 are formed respectively. As a result, the semiconductor device 1 having the structure shown in FIG. 1 is completed.

In this example, as described above, the ion-implanted layer 20 is formed by the step of implanting impurities and the step of diffusing the impurities by applying heat treatment. Therefore, it is possible to form the ion implantation layer 20 by an extremely simple process and thereby to form an impurity concentration gradient in the in-plane direction of the semiconductor substrate in the base region of the lateral PNP transistor. Therefore, the semiconductor device 1 including the lateral PNP transistor having good frequency characteristics can be manufactured by an extremely simple process, and the cost of the semiconductor device 1 can be reduced.

In the above description, the lateral PNP transistor provided in the semiconductor device 1 is focused on, but the semiconductor device 1 is not limited to having only the lateral PNP transistor, and may be, for example, an NPN transistor. Various semiconductor elements may be formed on the P-type substrate 10. In this case as well, in the same manner as described above, for example, with the NPN transistor or the like, the lateral P
An NP transistor can be created. At this time,
By using the method described above, for example, a vertical PNP
Unlike the case of forming a transistor, the lateral PNP transistor can be formed by the same process as other semiconductor elements without requiring a particularly complicated process.

[0025]

According to the semiconductor device of the present invention, since the impurity concentration gradient is formed in the in-plane direction of the semiconductor substrate in the base region, an electric field can be applied to the carriers passing through the base region. it can. Therefore, the frequency characteristics can be improved due to the influence of the drift current. Further, according to the method for manufacturing a semiconductor device of the present invention, the impurity concentration gradient can be formed in the in-plane direction of the semiconductor substrate in the base region by the extremely simple steps of the impurity implantation step and the impurity diffusion step. . Therefore, a semiconductor device including a lateral PNP transistor having good characteristics can be manufactured by an extremely simple process, which can contribute to cost reduction of the semiconductor device.

Therefore, according to the present invention, a semiconductor device including a lateral PNP transistor having good frequency characteristics can be realized at low cost without complicating the manufacturing process.

[Brief description of drawings]

FIG. 1 shows an example of a semiconductor device manufactured by applying the present invention, and FIG. 1A is a plan view showing an enlarged main part,
FIG. 1B is a cross-sectional view taken along the line AA shown in FIG.

FIG. 2 is a schematic diagram showing an impurity concentration between an emitter region and a collector region in the same semiconductor device.

FIG. 3 is a diagram for explaining the characteristics of the semiconductor device, and is a schematic diagram showing an impurity concentration between an emitter region and a collector region in a conventional lateral PNP transistor.

FIG. 4 is a diagram for explaining the case of manufacturing the same semiconductor device.

[Explanation of symbols]

1 Semiconductor device 10 P-type substrate 11 N + type buried diffusion layer 12 N-type epitaxial growth layer 13 Collector layer 14 Emitter layer 15 Base layer 16 Insulation layer 17 Collector electrode 18 Emitter electrode 19 Base electrode 20 Ion implantation layer

Claims (2)

[Claims] 1. An emitter region having P-type impurities, and N.
In a semiconductor device including a lateral PNP transistor in which a base region having a type impurity and a collector region having a P type impurity are arranged in an in-plane direction of a semiconductor substrate, an impurity in the in-plane direction of the semiconductor substrate in the base region is provided. A semiconductor device having a concentration gradient of 2. An emitter region having P-type impurities, and N
When manufacturing a semiconductor device including a lateral PNP transistor in which a base region having a type impurity and a collector region having a P type impurity are arranged in an in-plane direction of a semiconductor substrate, impurities are ion-implanted at a boundary portion of the emitter region. An impurity implantation step of implanting, and an impurity diffusion step of diffusing the impurities by subjecting the semiconductor substrate to heat treatment to form a concentration gradient of impurities in the in-plane direction of the semiconductor substrate in the base region. A method of manufacturing a semiconductor device, comprising: