CN113360436A - PCIe device processing method, apparatus, device and storage medium - Google Patents

PCIe device processing method, apparatus, device and storage medium Download PDF

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Publication number
CN113360436A
CN113360436A CN202010151463.3A CN202010151463A CN113360436A CN 113360436 A CN113360436 A CN 113360436A CN 202010151463 A CN202010151463 A CN 202010151463A CN 113360436 A CN113360436 A CN 113360436A
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pcie
signal
equipment
differential signal
sender
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CN113360436B (en
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冯声威
李小民
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Zhejiang Uniview Technologies Co Ltd
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Zhejiang Uniview Technologies Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The embodiment of the invention discloses a processing method, a processing device, equipment and a storage medium of PCIe equipment. The method comprises the following steps: determining a current PCIe differential signal received from the sender PCIe device; if the signal difference value of the current PCIe differential signal is smaller than a preset difference value, controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal; and adjusting the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal. By adopting the scheme, the phenomenon that the PCIe differential signal on the PCIe link between the receiver PCIe equipment and the sender PCIe equipment is too attenuated to cause the receiver PCIe equipment to mistakenly enter an electric idle state due to misjudgment under the condition that the receiver PCIe equipment does not receive the EIOS sequence can be avoided as much as possible, and further the condition that the PCIe link is abnormal in communication is avoided.

Description

PCIe device processing method, apparatus, device and storage medium
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a processing method, an apparatus, a device, and a storage medium for PCIe devices.
Background
PCIe is a new type of high-speed serial computer expansion bus and interface standard, and PCIe devices are connected through PCIe links. The PCIe standard defines an electrical idle state, and in order to save power consumption, the PCIe device determines whether to switch from the normal operating state to the low power consumption state according to the usage condition of the PCIe link, and in the low power consumption state, the PCIe link is to be placed in the electrical idle state to reduce power consumption.
Currently, under normal conditions, a PCIe device may enter an electrical idle state after receiving an electrical idle sequence ordered set (EIOS sequence for short) sent by an opposite device. However, in some special cases, since signals on the PCIe link are attenuated during transmission, the voltage value of the signals received by the PCIe device is very low, and thus the PCIe device may erroneously determine to enter an electrical idle state, so that the PCIe link communication is abnormal. Therefore, there is a need to solve the above misjudgment problem.
Disclosure of Invention
In view of the foregoing problems, embodiments of the present invention provide a processing method, an apparatus, a device, and a storage medium for PCIe devices, so as to implement accurate switching operation of an electrical idle state.
In a first aspect, an embodiment of the present invention provides a processing method for a PCIe device, where the processing method is executed by a PCIe device of a receiving party, and the method includes:
determining a current PCIe differential signal received from the sender PCIe device;
if the signal difference value of the current PCIe differential signal is smaller than a preset difference value, controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal;
and adjusting the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal.
In a second aspect, an embodiment of the present invention further provides a processing apparatus for a PCIe device, configured in a receiver PCIe device, where the apparatus includes:
the signal determining module is used for determining the current PCIe differential signal received from the PCIe device of the sender;
the strength control module is used for controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal if the signal difference value of the current PCIe differential signal is smaller than a preset difference value;
and the state adjusting module is used for adjusting the working state of the receiving party PCIe equipment according to the received next PCIe differential signal.
In a third aspect, an embodiment of the present invention further provides an electronic device, including:
one or more processors;
storage means for storing one or more programs;
the one or more programs are executed by the one or more processors, so that the one or more processors implement the processing method of the PCIe device according to any of the embodiments of the present invention.
In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the processing method of the PCIe device according to any one of the embodiments of the present invention.
The embodiment of the invention provides a processing method of PCIe equipment, wherein the PCIe equipment of a receiving party can determine a current PCIe differential signal received from the PCIe equipment of the sending party and detect and determine a signal difference value of the current PCIe differential signal, if the signal difference value of the current PCIe differential signal is smaller than a preset difference value, the PCIe equipment of the receiving party does not immediately enter an electric idle state, but controls the PCIe equipment of the sending party to improve the strength of a next PCIe differential signal, and then adjusts the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal so as to determine whether to enter the electric idle state. By adopting the scheme, the phenomenon that the PCIe differential signal on the PCIe link between the receiver PCIe equipment and the sender PCIe equipment is too attenuated to cause the receiver PCIe equipment to mistakenly enter an electric idle state due to misjudgment under the condition that the receiver PCIe equipment does not receive the EIOS sequence can be avoided as much as possible, and further the condition that the PCIe link is abnormal in communication is avoided.
The above summary of the present invention is merely an overview of the technical solutions of the present invention, and the present invention can be implemented in accordance with the content of the description in order to make the technical means of the present invention more clearly understood, and the above and other objects, features, and advantages of the present invention will be more clearly understood.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a state diagram of a power management state machine provided in an embodiment of the present invention;
fig. 2 is a flowchart of a processing method of a PCIe device provided in the embodiment of the present invention;
fig. 3 is a schematic diagram of adding a driver chip between PCIe devices according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a PCIe device and a PCIe link between the PCIe devices provided in the embodiments of the present invention;
FIG. 5 is a flow chart of another PCIe device processing method provided in the embodiments of the present invention;
FIG. 6 is a flow chart of yet another PCIe device processing method provided in the embodiments of the present invention;
fig. 7 is a block diagram of a processing apparatus of a PCIe device provided in the embodiment of the present invention;
fig. 8 is a schematic structural diagram of an electronic device provided in an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the operations (or steps) as a sequential process, many of the operations (or steps) can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations may be re-arranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figure. The processes may correspond to methods, functions, procedures, subroutines, and the like.
In order to better understand the processing scheme of the PCIe device in the present application, the following is briefly set forth an application scenario of the processing scheme of the PCIe device. To save power consumption, the PCIe bus specification specifies two power management mechanisms, a PCI-PM power management mechanism based on software control, and an ASPM power management mechanism based on hardware control. The ASPM power management mechanism is a power management mode which is autonomously performed by a PCIe link under the condition that no system software participates in the PCIe link. Fig. 1 is a state diagram of a power management state machine according to an embodiment of the present invention. As shown in fig. 1, taking PCIe devices as an example, the PCIe devices normally operate as the L0 state, and in order to save power consumption, the PCIe devices determine whether to switch from the L0 state to the low power consumption states such as L0s, L1, and L2 according to the usage of the PCIe link. In the low power consumption state, the PCIe link is placed in an electrical idle state to reduce energy consumption, and after the PCIe link enters the electrical idle state, the difference voltage V of PCIe differential signals on the PCIe link isdiffUsually between 0mV and 20 mV. In the normal working state of L0, the difference voltage V of the PCIe differential signaldiffUsually between 0.8V and 1.2V.
The following embodiments and alternatives thereof will describe a processing method, an apparatus, a device, and a storage medium of a PCIe device provided in the solution of the present application in detail.
Fig. 2 is a flowchart of a processing method of a PCIe device provided in the embodiment of the present invention. The embodiment of the invention can be suitable for adjusting the working state of the PCIe equipment. The processing method of the PCIe device may be executed by a processing apparatus of the PCIe device, and the apparatus may be implemented in a software and/or hardware manner, and may be integrated on any electronic device with a network communication function. For example, the electronic device may be a PCIe device, and the processing method of the PCIe device may be performed by the receiving PCIe device. As shown in fig. 2, the processing method of the PCIe device in the embodiment of the present application may include the following steps:
s210, determining the current PCIe differential signal received from the PCIe device of the sender.
In this embodiment, taking the PCIe device as the sender and the PCIe device as an example, under a normal condition, before the sending logic TX of the PCIe device as the sender enters the electrical idle state, a plurality of EIOS sequences (for example, 1 EIOS is sent at 2.5GT/s, and 2 EIOS is sent at 5 GT/s) need to be sent to the PCIe device as the receiver, and the receiving logic RX of the PCIe device as the receiver needs to receive the EIOS sequence provided by the sending logic TX of the PCIe device as the sender and then can enter the electrical idle state. However, when the receiving logic RX of the receiving PCIe device finds the difference voltage V of the PCIe differential signaldiffAnd the electric idle state is also entered when the electric idle judgment threshold value is less than the electric idle judgment threshold value (the judgment threshold value can be 65 mV).
In this embodiment, since the PCIe differential signal will be attenuated when the sending logic TX of the sender PCIe device transmits the PCIe differential signal to the receiving logic RX of the receiver PCIe device through the PCIe link, the difference voltage V of the PCIe differential signal from the sender PCIe device to the receiver PCIe devicediffMay be reduced to 65 mV-175 mV or less. At this time, the receiving logic RX of the receiving PCIe device may generate a misjudgment, so that the receiving logic of the receiving PCIe device may enter the electrical idle state by mistake, thereby causing an exception to occur in PCIe link communication. Fig. 3 is a schematic diagram of adding a driver chip between PCIe devices according to an embodiment of the present invention. Referring to fig. 3, a driver chip, for example, a PCIe driver chip, may be added between the receiver PCIe device and the sender PCIe device, so that the electrical idle state can be avoided as much as possible due to misjudgment by introducing the driver chip. However, the above-mentioned solution of introducing hardware will not only occupy PCB area, but also increase material cost and hardware wiring difficulty.
In this embodiment, fig. 4 is a schematic diagram of a PCIe device and a PCIe link between the PCIe devices provided in the embodiment of the present invention. Referring to fig. 4, a PCIe link exists between the receiving PCIe device and the transmitting PCIe device, the PCIe link uses an end-to-end data transfer method, and each PCIe device includes a transmitting logic TX and a receiving logic RX. In a PCIe link, one or more data lanes Lane may be included, and a data Lane may include two groups of differential signals, which are specifically divided into: the receiver PCIe device receives the set of PCIe differential signals from the PCIe transmitter device and transmits the set of PCIe differential signals to the PCIe receiver device.
In this embodiment, the PCIe devices of the receiver and the PCIe devices of the sender are PCIe devices, and which PCIe device belongs to the receiver and which PCIe device belongs to the sender may be defined according to actual situations. Referring to fig. 4, after the PCIe devices of the receiving party and the PCIe devices of the sending party are subjected to link training, the PCIe devices of the receiving party and the PCIe devices of the sending party may operate in a normal operating state L0. The sending logic of the sender PCIe device can send the PCIe differential signal to the receiving logic of the receiver PCIe device through a PCIe link between the sender PCIe device and the receiver PCIe device. Meanwhile, the receiving logic of the receiving PCIe device can receive the PCIe differential signal sent by the sending PCIe device through the PCIe link. To facilitate distinguishing the PCIe differential signals received by the receiving PCIe device at different times, the PCIe differential signal received by the receiving PCIe device from the transmitting PCIe device at the current time may be used as the current PCIe differential signal.
And S220, if the signal difference value of the current PCIe differential signal is smaller than the preset difference value, controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal.
In this embodiment, upon determining the current PCIe differential signal, the receiving PCIe device may calculate a difference value between the differential pair D + and D-signals of the current PCIe differential signal, and use the difference value as the signal difference value of the current PCIe differential signal. For example, the signal difference may specifically be a differential voltage value. Under the condition that the receiving PCIe device does not receive the EIOS sequence, the receiving PCIe device can determine whether the signal difference value of the current PCIe differential signal is smaller than a preset difference value. The preset difference may be an electrical idle determination threshold, and the electrical idle determination threshold may be any voltage value within 65mV to 175 mV. And if the signal difference value of the current PCIe differential signal is determined to be larger than or equal to the preset difference value, the PCIe equipment of the receiving party can keep a normal working state. And if the signal difference value of the current PCIe differential signal is determined to be smaller than the preset difference value, the current PCIe differential signal does not enter an electrical idle state immediately, and the PCIe equipment of the sender is controlled to improve the strength of the next PCIe differential signal. Therefore, the receiving PCIe device can receive the next PCIe differential signal after the signal enhancement, and whether the signal difference value of the current PCIe differential signal is smaller than the preset difference value is caused by signal attenuation due to the reason of too long PCIe link or other signal integrity problems or the like is judged according to the next PCIe differential signal after the signal enhancement.
In an optional manner of this embodiment, controlling the PCIe device at the sending party to increase the strength of the next PCIe differential signal may include: and sending a pre-configured signal lifting instruction to the PCIe equipment of the sender to indicate the PCIe equipment of the sender to lift the signal sending strength of a preset size, and sending a next PCIe differential signal according to the lifted signal sending strength.
In this embodiment, the signal lifting command may carry information on a character sequence set that is different from the existing sequence set in the PCIe standard, which is a custom sequence set. The level of boost in signal transmission strength may be indicated by the character sequence set information. The character sequence set can include a plurality of bytes, and the specific value of the signal transmission strength which needs to be improved can be indicated through the plurality of bytes. Table 1 shows the character sequence set information and its function description information of the present embodiment. Among them, only three character sequence sets are exemplarily shown in table 1, specifically including a character sequence set 1, a character sequence set 2, and a character sequence set 3.
TABLE 1 character sequence set information and its function description information
Figure BDA0002402587340000081
In this embodiment, the sending logic of the receiver PCIe device may send the preconfigured signal lifting instruction to the sender PCIe device through a PCIe link between the receiver PCIe device and the sender PCIe device. Therefore, the receiving logic of the PCIe device of the sending party can receive the signal lifting instruction sent by the sending logic of the PCIe device of the receiving party, and the signal sending strength with the preset size is lifted according to the self-defined character sequence set information included in the signal lifting instruction. Optionally, the PCIe device on the transmitting side may use pre-emphasis technique to increase its own signaling strength. On this basis, when the PCIe device on the transmission side transmits the next PCIe differential signal at the next time, the PCIe device on the transmission side may transmit the PCIe differential signal according to the increased signal transmission strength.
By adopting the above mode, the signal sending strength of the PCIe device of the sender can be improved, so that the PCIe device of the sender sends the next PCIe differential signal according to the improved signal sending strength, and the judgment is performed according to the signal difference of the next PCIe differential signal, wherein the signal difference of the received PCIe differential signal is smaller than the preset difference due to signal attenuation, or the signal difference of the received PCIe differential signal is smaller than the preset difference due to the fact that the PCIe link actually enters an electrical idle state.
In an optional manner of this embodiment, before sending the preconfigured signal boost instruction to the sender PCIe device, the method may further include: and the signal sending strength of the PCIe equipment of the receiving party is improved.
In this embodiment, when sending a preconfigured signal lifting instruction to a sender PCIe device, signal attenuation is too large due to reasons such as a PCIe link between PCIe devices being too long or other signal integrity problems, and then the sender PCIe device may not accurately receive the lifting instruction sent by a receiver PCIe device. Therefore, the PCIe device on the receiving side needs to increase the signal sending strength of the PCIe device on the receiving side, and then send a signal increasing instruction to the PCIe device on the sending side according to the increased signal sending strength, so that the PCIe device on the sending side receives an accurate signal increasing instruction as much as possible, so that the PCIe device on the sending side can accurately increase the signal sending strength of the PCIe device on the sending side according to the signal increasing instruction to send a next PCIe differential signal, and further can determine a true reason that the signal difference value of the received PCIe differential signal is smaller than the preset difference value according to the received next PCIe differential signal. Optionally, the PCIe device on the receiving side may employ pre-emphasis techniques to increase its own signaling strength.
And S230, adjusting the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal.
In this embodiment, after the PCIe device on the sender is controlled to increase the strength of the next PCIe differential signal, the PCIe device on the sender sequentially sends the next PCIe differential signal. The receiver PCIe device may receive a next PCIe differential signal sent by the sender PCIe device, and the next PCIe differential signal is a differential signal sent by the sender PCIe device after the sending strength of the signal is increased. For this reason, the receiving PCIe device may determine whether a signal difference of the received next PCIe differential signal is smaller than a preset difference.
In this embodiment, if it is determined that the signal difference of the next received PCIe differential signal is greater than or equal to the preset difference, it indicates that the PCIe device of the sender is still online, and the reason why the PCIe differential signal received before is less than the preset difference is due to signal attenuation is that, at this time, the PCIe link between the PCIe device of the receiver and the PCIe device of the sender may be maintained in a non-electrical idle state, so that the PCIe device of the receiver is still maintained in a non-low power consumption state to perform normal operation. Optionally, in order to ensure that the PCIe device on the receiving side can normally receive the signal sent by the PCIe device on the sending side without being affected by signal attenuation, after controlling the PCIe device on the sending side to increase the strength of the next PCIe differential signal, if it is determined that the signal difference of the received next PCIe differential signal is greater than or equal to the preset difference, the PCIe device on the sending side may further instruct the signal sending strength of the PCIe device on the sending side to continue to be maintained or continue to be increased.
In this embodiment, if it is determined that the signal difference of the next received PCIe differential signal is smaller than the preset difference, it indicates that the PCIe differential signal received before is smaller than the preset difference, not caused by signal attenuation, but because the PCIe link has indeed entered the electrical idle state, the signal transmission strength of the PCIe device on the receiving side may be restored to the initial state at this time, and enter the electrical idle state.
In an optional manner of this embodiment, adjusting the working state of the PCIe device on the receiving side according to the received next PCIe differential signal may include the following steps:
and if the signal difference value of the received next PCIe differential signal is smaller than the preset difference value and the signal lifting frequency of the PCIe equipment of the sender is smaller than the preset frequency, returning to continue executing the operation of controlling the PCIe equipment of the sender to lift the strength of the next PCIe differential signal, and temporarily not entering the electrical idle state.
In this embodiment, the signal attenuation degree of the PCIe link may not be compensated for by increasing a small number of times or increasing the signal transmission strength of a lower level for the PCIe device of the sender, because even if the PCIe device of the sender sends the next PCIe differential signal, the PCIe differential signal may be attenuated to below the preset difference value when reaching the PCIe device of the receiver, thereby causing misjudgment. Therefore, when the signal difference value of the next received PCIe differential signal is smaller than the preset difference value, the signal sending strength of the PCIe device of the sender can be continuously improved. Furthermore, the PCIe device of the sender may send the next PCIe differential signal, and the PCIe device of the receiver may perform the next round of comparison according to the received new next PCIe differential signal.
In the present embodiment, in consideration of the problem of power consumption, it is impossible to increase the signal transmission strength of the PCIe device on the transmission side without limit, and since this greatly increases the power consumption, it is necessary to limit the number of times of signal increase of the PCIe device on the transmission side. When the signal difference value of the next received PCIe differential signal is determined to be smaller than the preset difference value, it is also necessary to determine whether the signal lifting frequency of the PCIe device of the sender is smaller than the preset frequency. And if the number of times is less than the preset number of times, returning to continue to execute the operation of controlling the PCIe equipment of the sender to increase the strength of the next PCIe differential signal, so that the PCIe equipment does not enter the electrical idle state temporarily. Optionally, when the PCIe device of the receiving party controls the PCIe device of the sending party to increase the strength of the next PCIe differential signal, the PCIe device of the receiving party may perform real-time statistics on the number of times of signal increase of the signal sending strength of the PCIe device of the sending party.
The embodiment of the invention provides a processing method of PCIe equipment, which can determine whether a PCIe link really enters an electrical idle state or not according to a received next PCIe differential signal by controlling the PCIe equipment of a sender to improve the strength of the next PCIe differential signal.
Fig. 5 is a flowchart of another PCIe device processing method provided in the embodiment of the present invention. The embodiments of the present invention are optimized based on the embodiments described above, and the embodiments of the present invention may be combined with various alternatives in one or more of the embodiments described above. As shown in fig. 5, a processing method for a PCIe device in the embodiment of the present application may include the following steps:
s510, determining the current PCIe differential signal received from the PCIe device of the sender.
S520, if the signal difference value of the current PCIe differential signal is smaller than the preset difference value, the signal sending strength of the PCIe equipment of the receiving party is improved.
And S530, sending a pre-configured signal lifting instruction to the PCIe device of the sender to indicate the PCIe device of the sender to lift the signal sending strength of a preset size, and enabling the PCIe device of the sender to send a next PCIe differential signal according to the lifted signal sending strength.
And S540, determining the signal lifting times of the PCIe equipment of the sender for lifting the signal sending strength.
And S550, if the signal difference value of the received next PCIe differential signal is smaller than the preset difference value and the signal lifting frequency of the PCIe equipment of the sender is smaller than the preset frequency, returning to execute the operation of the S530 and temporarily not entering the electric idle state.
In this embodiment, the PCIe device on the receiving side may gradually increase and enhance the signal sending strength of the PCIe device on the sending side through the operations in S520 to S530, so as to avoid as much as possible that the PCIe device on the receiving side detects that the signal difference of the next PCIe differential signal is smaller than the preset difference due to the fact that the attenuation of the next PCIe differential signal sent by the PCIe device on the sending side is too large in the PCIe link. The signal sending strength of the PCIe equipment of the sender is gradually improved, so that the next PCIe differential signal sent can be ensured not to be excessively attenuated as far as possible, the condition that the next PCIe differential signal received due to signal attenuation is smaller than a preset difference value can be eliminated as far as possible, and whether the PCIe link really enters an electric idle state or not is accurately judged.
And S560, if the signal difference value of the received next PCIe differential signal is smaller than the preset difference value and the signal lifting frequency of the PCIe device of the sender is larger than or equal to the preset frequency, determining the signal lifting frequency of the PCIe device of the receiver.
In this embodiment, the signal sending strength of the PCIe device at the sender is gradually increased by determining whether the number of times of signal increase of the PCIe device at the sender is smaller than the preset number of times, and the determination is performed according to the next PCIe differential signal received after the gradual increase, so that it is possible to eliminate the situation that the signal difference of the received differential signal is lower than the preset number of times due to signal attenuation of the PCIe link as much as possible, and further cause erroneous determination. However, considering that the signal transmission strength of the PCIe device on the receiving side affects the transmission accuracy of the signal lifting instruction, it is necessary to gradually improve the signal transmission strength of the PCIe device on the receiving side, so as to eliminate the problem that the signal lifting instruction cannot accurately reach the PCIe device on the transmitting side due to the low signal transmission strength of the PCIe device on the receiving side, and further cause the PCIe device on the transmitting side to be unable to improve the signal transmission strength. In addition, considering that the energy consumption problem is impossible to raise the signal transmission strength of the PCIe device on the receiving side without limitation, the number of signal raises of the signal transmission strength of the PCIe device on the receiving side needs to be counted in real time, so as to determine whether to suspend raising.
S570, if the signal lifting times of the PCIe equipment of the receiving party are less than the preset times, resetting the signal lifting times of the PCIe equipment of the sending party to zero and restoring the signal sending intensity of the PCIe equipment of the sending party to an initial state; and returning to execute the operation of improving the signal sending intensity of the PCIe equipment of the receiving party, and temporarily not entering the electric idle state.
In this embodiment, if the number of signal lifting times of the PCIe device on the receiving side is smaller than the preset number of times, the PCIe device on the sending side is notified to reset the number of signal lifting times that have been counted and recorded before, and meanwhile, the signal sending strength of the PCIe device on the sending side is restored to the initial state. On this basis, the PCIe device on the receiving side may return to perform the operation of increasing the signal sending intensity of the PCIe device on the receiving side in step S520, so as to gradually increase the signal sending intensity of the PCIe device on the receiving side, and thus, the PCIe device on the receiving side may return to perform the operations of S520 to S530 on the premise of gradually increasing the signal sending intensity of the PCIe device on the receiving side.
And S580, if the signal lifting times of the PCIe equipment of the receiving party are more than or equal to the preset times, restoring the signal sending intensity of the PCIe equipment of the receiving party to an initial state and entering an electrical idle state.
In this embodiment, when the number of signal lifting times of the PCIe device on the receiver is greater than or equal to the preset number, it indicates that the PCIe device on the receiver and the PCIe device on the sender respectively perform the operation of lifting the signal sending strength for multiple times. On the basis, if it is determined that the signal difference of the next received PCIe differential signal is smaller than the preset difference, it may be basically excluded that the difference is caused by signal attenuation, but the PCIe link may actually enter the electrical idle state, and at this time, the PCIe device on the receiving side may restore the raised signal transmission strength to the initial state, and instruct to enter the electrical idle state, so as to save energy consumption.
The embodiment of the invention provides a processing method of PCIe equipment, which can determine whether a PCIe link really enters an electrical idle state or not according to a successively received next PCIe differential signal by controlling to successively increase the signal sending intensity of the PCIe equipment of a sender so as to send the intensity of the next PCIe differential signal and to successively increase the signal sending intensity of the PCIe equipment of a receiver so as to send a signal increasing instruction, and can avoid that the PCIe differential signal on the PCIe link between the PCIe equipment of the receiver and the PCIe equipment of the sender is too attenuated due to overlong PCIe link or other signal integrity problems and the like, so that the PCIe equipment of the receiver can be wrongly judged and enter the electrical idle state under the condition that the PCIe link of the receiver does not receive an EIOS sequence, further avoid the occurrence of abnormal communication of the PCIe link and improve the reliability of a system.
Fig. 6 is a flowchart of a processing method of a PCIe device provided in the embodiment of the present invention. The embodiments of the present invention are optimized based on the embodiments described above, and the embodiments of the present invention may be combined with various alternatives in one or more of the embodiments described above. As shown in fig. 6, the processing method for PCIe devices in the embodiment of the present application may include the following steps:
s610, under the condition that the EIOS sequence sent by the PCIe equipment of the sender is not received, the PCIe equipment of the receiver is in a normal working state.
S620, determining the current PCIe differential signal received from the PCIe device of the sender.
S630, whether the signal difference value of the current PCIe differential signal is smaller than a preset difference value is detected.
If the difference value is smaller than the preset difference value, continuing to execute the operation of S640; if the difference is greater than or equal to the preset difference, the operation of S610 is executed.
And S640, improving the signal sending intensity of the PCIe equipment of the receiving party.
S650, sending a pre-configured signal lifting instruction to the PCIe device of the sender to indicate the PCIe device of the sender to lift the signal sending strength of a preset size, and sending a next PCIe differential signal according to the lifted signal sending strength.
S660, detecting whether the signal difference value of the received next PCIe differential signal is smaller than a preset difference value.
If the difference value is smaller than the preset difference value, continuing to execute the operation of S670; if the difference value is greater than or equal to the preset difference value, the operation of S610 is returned to be executed to ensure that the PCIe link is maintained in the non-electrical idle state, so that the PCIe device on the receiving side is in the non-low power consumption state.
And S670, detecting whether the signal lifting times of the PCIe equipment of the sender is less than the preset times.
If the number of times is less than the preset number of times, returning to execute the operation of S650; if it is determined that the number of times is greater than or equal to the preset number of times, the operation of S680 continues.
S680, detecting whether the signal lifting times of the PCIe equipment of the receiving party is less than the preset times.
If the number of times is less than the preset number of times, returning to execute the operation of S690; if the number of times is determined to be greater than or equal to the preset number of times, the operation S6100 is continued.
And S690, resetting the lifting times of the signals of the PCIe devices of the sender to zero, restoring the signal sending strength of the PCIe devices of the sender to an initial state, and returning to execute the operation of the S640.
S6100, restoring the signal sending intensity of the PCIe device of the receiving party to the initial state, and entering an electrical idle state.
Wherein, after the PCIe device of the sending party is awakened again, the operation of S610 may be executed in return.
The embodiment of the invention provides a processing method of PCIe equipment, which automatically adjusts the signal sending intensity on a PCIe link between the PCIe equipment of a sending party and the PCIe equipment of a receiving party by sending a signal lifting instruction between the PCIe equipment of the sending party and the PCIe equipment of the receiving party so as to control the PCIe equipment of the sending party to lift the intensity of a next PCIe differential signal and further determine whether the PCIe link really enters an electric idle state or not according to the received next PCIe differential signal. By adopting the scheme, the phenomenon that the PCIe differential signal on the PCIe link between the receiver PCIe equipment and the sender PCIe equipment is too attenuated to cause the receiver PCIe equipment to mistakenly enter an electric idle state due to misjudgment under the condition that the receiver PCIe equipment does not receive the EIOS sequence can be avoided as much as possible, and further the condition that the PCIe link is abnormal in communication is avoided.
Fig. 7 is a block diagram of a processing apparatus of a PCIe device provided in the embodiment of the present invention. The embodiment of the invention can be suitable for adjusting the working state of the PCIe equipment. The processing means of the PCIe device may be implemented in software and/or hardware, and may be integrated on any electronic device with network communication function. For example, the electronic device may be a PCIe device, and the processing apparatus of the PCIe device may be configured to the PCIe device of the receiving party. As shown in fig. 7, a processing apparatus of a PCIe device in the embodiment of the present application includes: a signal determination module 710, an intensity control module 720, and a state adjustment module 730. Wherein:
a signal determining module 710, configured to determine a current PCIe differential signal received from the PCIe device of the sending party;
the strength control module 720 is configured to control the PCIe device of the sender to increase the strength of the next PCIe differential signal if the signal difference value of the current PCIe differential signal is smaller than the preset difference value;
the state adjusting module 730 is configured to adjust the working state of the receiver PCIe device according to the received next PCIe differential signal.
On the basis of the above embodiment, optionally, the intensity control module 720 includes:
and sending a pre-configured signal lifting instruction to the PCIe equipment of the sender to indicate the PCIe equipment of the sender to lift the signal sending strength of a preset size, and sending a next PCIe differential signal according to the lifted signal sending strength.
On the basis of the foregoing embodiment, optionally, the apparatus further includes:
the strength increasing module 740 is configured to increase the signal sending strength of the receiver PCIe device before sending the preconfigured signal increasing instruction to the sender PCIe device, and is configured to send the signal increasing instruction to the sender PCIe device according to the increased signal sending strength.
On the basis of the foregoing embodiment, optionally, the state adjustment module 730 includes:
and if the signal difference value of the received next PCIe differential signal is smaller than the preset difference value and the signal lifting frequency of the PCIe equipment of the sender is smaller than the preset frequency, returning to continue executing the operation of controlling the PCIe equipment of the sender to lift the strength of the next PCIe differential signal, and temporarily not entering the electrical idle state.
On the basis of the foregoing embodiment, optionally, the state adjustment module 730 includes:
if the signal difference value of the received next PCIe differential signal is smaller than a preset difference value and the signal lifting frequency of the PCIe equipment of the sender is larger than or equal to a preset frequency, determining the signal lifting frequency of the PCIe equipment of the receiver;
if the signal lifting times of the PCIe equipment of the receiving party are less than the preset times, resetting the signal lifting times of the PCIe equipment of the sending party to zero and restoring the signal sending intensity of the PCIe equipment of the sending party to an initial state; and returning to execute the operation of improving the signal sending intensity of the PCIe equipment of the receiving party, and temporarily not entering the electrical idle state.
On the basis of the foregoing embodiment, optionally, the state adjustment module 730 further includes:
after the number of signal lifting times of the receiving party PCIe equipment is determined, if the number of signal lifting times of the receiving party PCIe equipment is larger than or equal to the preset number, the signal sending intensity of the receiving party PCIe equipment is restored to an initial state, and an electric idle state is entered.
On the basis of the foregoing embodiment, optionally, the state adjustment module 730 includes:
and if the signal difference value of the received next PCIe differential signal is greater than or equal to a preset difference value, keeping a PCIe link between the PCIe equipment of the receiving party and the PCIe equipment of the sending party in a non-electrical idle state so as to enable the PCIe equipment of the receiving party to be in a non-low power consumption state.
The processing apparatus for a PCIe device provided in the embodiment of the present invention may execute the processing method for a PCIe device provided in any embodiment of the present invention, and have corresponding functions and beneficial effects for executing the processing method for a PCIe device.
Fig. 8 is a schematic structural diagram of an electronic device provided in an embodiment of the present invention. As shown in fig. 8, the electronic device provided in the embodiment of the present invention includes: one or more processors 810 and storage 820; the processor 810 in the electronic device may be one or more, and fig. 8 illustrates one processor 810 as an example; storage 820 is used to store one or more programs; the one or more programs are executed by the one or more processors 810, so that the one or more processors 810 implement the processing method of the PCIe device according to any one of the embodiments of the present invention.
The electronic device may further include: an input device 830 and an output device 840.
The processor 810, the storage device 820, the input device 830 and the output device 840 in the electronic apparatus may be connected by a bus or other means, and fig. 8 illustrates an example of connection by a bus.
The storage 820 in the electronic device is used as a computer readable storage medium for storing one or more programs, which may be software programs, computer executable programs, and modules, such as program instructions/modules corresponding to the processing method of the PCIe device provided in the embodiment of the present invention. The processor 810 executes various functional applications and data processing of the electronic device by executing software programs, instructions and modules stored in the storage 820, that is, implements the processing method of the PCIe device in the above method embodiment.
The storage device 820 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of the electronic device, and the like. Further, storage 820 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, storage 820 may further include memory located remotely from processor 810, which may be connected to devices over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 830 may be used to receive input numeric or character information and generate key signal inputs related to user settings and function control of the electronic apparatus. The output device 840 may include a display device such as a display screen.
And, when the one or more programs included in the electronic device are executed by the one or more processors 810, the programs perform the following operations:
determining a current PCIe differential signal received from the sender PCIe device;
if the signal difference value of the current PCIe differential signal is smaller than a preset difference value, controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal;
and adjusting the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal.
Of course, it will be understood by those skilled in the art that when one or more programs included in the electronic device are executed by the one or more processors 810, the programs may also perform related operations in the processing method for the PCIe device provided in any embodiment of the present invention.
An embodiment of the present invention provides a computer-readable storage medium having stored thereon a computer program, which when executed by a processor, is configured to perform a processing method for a PCIe device, the method including:
determining a current PCIe differential signal received from the sender PCIe device;
if the signal difference value of the current PCIe differential signal is smaller than a preset difference value, controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal;
and adjusting the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal.
Optionally, the program may be further configured to execute the processing method of the PCIe device provided in any embodiment of the present invention when executed by the processor.
Computer storage media for embodiments of the invention may employ any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM), a flash Memory, an optical fiber, a portable CD-ROM, an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. A computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take a variety of forms, including, but not limited to: an electromagnetic signal, an optical signal, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, Radio Frequency (RF), etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A method of processing a PCIe device, performed by a receiving PCIe device, the method comprising:
determining a current PCIe differential signal received from the sender PCIe device;
if the signal difference value of the current PCIe differential signal is smaller than a preset difference value, controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal;
and adjusting the working state of the PCIe equipment of the receiving party according to the received next PCIe differential signal.
2. The method of claim 1, wherein controlling the sender PCIe device to increase the strength of the next PCIe differential signal comprises:
and sending a pre-configured signal lifting instruction to the PCIe equipment of the sender to indicate the PCIe equipment of the sender to lift the signal sending strength of a preset size, and sending a next PCIe differential signal according to the lifted signal sending strength.
3. The method of claim 2, further comprising, prior to sending the preconfigured signal boost directive to the sender PCIe device:
and the signal sending strength of the PCIe equipment of the receiving party is improved, and the PCIe equipment is used for sending a signal improving instruction to the PCIe equipment of the sending party according to the improved signal sending strength.
4. The method of any of claims 1-3, wherein adjusting the operational status of the receiving PCIe device based on the next PCIe differential signal received comprises:
and if the signal difference value of the received next PCIe differential signal is smaller than the preset difference value and the signal lifting frequency of the PCIe equipment of the sender is smaller than the preset frequency, returning to continue executing the operation of controlling the PCIe equipment of the sender to lift the strength of the next PCIe differential signal, and temporarily not entering the electrical idle state.
5. The method of claim 3, wherein adjusting the operational status of the receiving PCIe device in accordance with the next PCIe differential signal received comprises:
if the signal difference value of the received next PCIe differential signal is smaller than a preset difference value and the signal lifting frequency of the PCIe equipment of the sender is larger than or equal to a preset frequency, determining the signal lifting frequency of the PCIe equipment of the receiver;
if the signal lifting times of the PCIe equipment of the receiving party are less than the preset times, resetting the signal lifting times of the PCIe equipment of the sending party to zero and restoring the signal sending intensity of the PCIe equipment of the sending party to an initial state; and returning to execute the operation of improving the signal sending intensity of the PCIe equipment of the receiving party, and temporarily not entering the electrical idle state.
6. The method of claim 5, further comprising, after determining the number of signal boosts for the receiving PCIe device:
and if the signal lifting times of the PCIe equipment of the receiving party are more than or equal to the preset times, the signal sending intensity of the PCIe equipment of the receiving party is restored to the initial state and enters an electrical idle state.
7. The method of claim 1, wherein adjusting the operating state of the receiving PCIe device in accordance with the next PCIe differential signal received comprises:
and if the signal difference value of the received next PCIe differential signal is greater than or equal to a preset difference value, keeping a PCIe link between the PCIe equipment of the receiving party and the PCIe equipment of the sending party in a non-electrical idle state so as to enable the PCIe equipment of the receiving party to be in a non-low power consumption state.
8. An apparatus for processing a PCIe device configured for a receiving PCIe device, the apparatus comprising:
the signal determining module is used for determining the current PCIe differential signal received from the PCIe device of the sender;
the strength control module is used for controlling the PCIe equipment of the sender to improve the strength of the next PCIe differential signal if the signal difference value of the current PCIe differential signal is smaller than a preset difference value;
and the state adjusting module is used for adjusting the working state of the receiving party PCIe equipment according to the received next PCIe differential signal.
9. An electronic device, comprising:
one or more processors;
storage means for storing one or more programs;
when executed by the one or more processors, cause the one or more processors to implement the processing method for a PCIe device as recited in any one of claims 1 to 7.
10. A computer-readable storage medium on which a computer program is stored, the program, when executed by a processor, implementing the processing method for a PCIe device as defined in any one of claims 1 to 7.
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