WO2024077874A1 - Selective etching solution for 3d nand structural sheet of silicon nitride/silicon oxide - Google Patents

Selective etching solution for 3d nand structural sheet of silicon nitride/silicon oxide Download PDF

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WO2024077874A1
WO2024077874A1 PCT/CN2023/083370 CN2023083370W WO2024077874A1 WO 2024077874 A1 WO2024077874 A1 WO 2024077874A1 CN 2023083370 W CN2023083370 W CN 2023083370W WO 2024077874 A1 WO2024077874 A1 WO 2024077874A1
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silicon nitride
silicon oxide
silicon
silane coupling
propyl
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PCT/CN2023/083370
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French (fr)
Chinese (zh)
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李少平
贺兆波
班昌胜
叶瑞
姜飞
张庭
冯帆
冯凯
王书萍
彭飞
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湖北兴福电子材料股份有限公司
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Priority claimed from CN202211235381.2A external-priority patent/CN115873599B/en
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Publication of WO2024077874A1 publication Critical patent/WO2024077874A1/en

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    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C09K13/04—Etching, surface-brightening or pickling compositions containing an inorganic acid
    • C09K13/06—Etching, surface-brightening or pickling compositions containing an inorganic acid with organic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means

Definitions

  • the invention belongs to the field of electronic chemicals, and in particular relates to a selective etching solution for silicon nitride and silicon oxide.
  • 3D NAND technology vertically stacks multiple layers of data storage units, accommodating more storage units in a smaller space. It can create devices with three times the storage capacity of similar NAND technology and is an inevitable trend in the development of storage chips.
  • the 3D NAND process has been continuously developed from 96 layers to 192 layers to obtain higher unit storage capacity.
  • Silicon nitride and silicon oxide are alternately stacked structures.
  • Phosphoric acid quickly etches the silicon nitride layer from the side and also corrodes the silicon oxide layer to a certain extent.
  • the etching solution needs to have a high selectivity for silicon nitride, and almost does not etch the silicon oxide layer while etching the silicon nitride layer. As the etching proceeds, a large amount of silica enters the etching solution. When the content exceeds the solubility limit of the etching solution, it will grow on the silicon dioxide structure layer, causing the yield of the memory chip to decrease or even be scrapped.
  • the technical problem to be solved by the present invention is to provide a selective etching solution for silicon nitride and silicon oxide, which inhibits the etching of silicon dioxide, maintains a high etching rate for silicon nitride at a high silicon nitride content, and is suitable for etching of stacked structures.
  • the present invention relates to a selective etching solution for silicon nitride and silicon oxide, wherein the etching solution comprises 1.5-2.0% by weight of a silane coupling agent A, 1.1-1.4% by weight of a silane coupling agent B, 83.0-85.0% by weight of phosphoric acid, and the remainder is deionized water.
  • the silane coupling agent A is one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine and [3-(phenylamino)propyl]trimethoxysilane.
  • silane coupling agent A The main function of silane coupling agent A is to adjust the etching selectivity ratio of silicon nitride/silicon oxide. Its mechanism of action is that the silane coupling agent is hydrolyzed in phosphoric acid. The hydrophilic segment of phosphate silicon ester tends to attach to the surface of silicon oxide inward due to the effect of chemical bonds. At the same time, the hydrophobic end with larger steric hindrance hinders the etching of silicon oxide by phosphoric acid and water outward. Under the combined effect, the etching of silicon oxide is inhibited. In addition, due to the effects of amino groups and steric hindrance, silane coupling agent A itself can bind a certain amount of free silicic acid.
  • silane coupling agent B The main function of silane coupling agent B is to regulate the life of the etching solution, that is, the etching rate can remain stable at a certain level after the silicon content increases. Within a certain range.
  • the silane coupling agent B is one of N-( ⁇ -aminoethyl- ⁇ -aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane.
  • silane coupling agent B is to extend the life of the etching solution, that is, to combine free silicic acid through the diamino structure so that it cannot stick back to the silicon oxide surface, which is manifested in the widening of the silicon content window of the etching solution and the slowing down of the trend of the etching rate of silicon nitride and silicon oxide decreasing with the increase of silicon content.
  • the content of phosphoric acid and water has a great influence on the initial etching rate of silicon oxide and silicon nitride, that is, the higher the phosphoric acid content, the lower the water content, the faster the silicon oxide etching rate, and the lower the phosphoric acid content, the more water content, the faster the silicon nitride etching rate.
  • too high a phosphoric acid concentration is likely to cause the silane coupling agent to dehydrate and carbonize, thereby failing, while too low a phosphoric acid concentration cannot meet the requirement of stable water content for high-temperature etching.
  • the mass ratio of phosphoric acid to water in the etching solution of the present invention is 5.6-7.4, preferably 6.2-6.6.
  • the present invention provides a method for preparing a selective etching solution for a silicon nitride/silicon oxide 3D NAND structure wafer, wherein silane coupling agents A and B are evenly mixed at room temperature and added together into a phosphoric acid solution to obtain an etching solution.
  • the temperature of the phosphoric acid solution is preheated to 80-100°C; after the silane coupling agents A and B are evenly mixed and added to the 80-100°C phosphoric acid solution, the temperature is again raised to 110-120°C, kept warm for 0.5-1h, and cooled to room temperature to obtain an etching solution.
  • the gel block phenomenon is easy to be realized. If the silane coupling agents A and B are mixed evenly in proportion and added to the phosphoric acid aqueous solution at room temperature, and then slowly heated to 80-100°C, more preferably 80°C, 90°C, 100°C, the formed gel block may not completely disappear but be mixed in the formed mixed solution. After further increasing to 110-120°C, it can be ensured that the formed etching solution is completely dissolved, and further heated to 110°C or 120°C.
  • the mass content of the silane coupling agent A is 1.5-2%;
  • the mass content of B of the silane coupling agent is 1.1-1.4%;
  • the mass content of phosphoric acid is 83.0-85.0%; the balance is deionized water;
  • the silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane;
  • the silane coupling agent B is any one of N-( ⁇ -aminoethyl- ⁇ -aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane.
  • Silicon nitride/silicon oxide is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride is 500- The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  • the present invention provides a method for etching a 3D NAND structure wafer using a selective etching solution for a silicon nitride/silicon oxide 3D NAND structure wafer, wherein a stacked structure of a silicon oxide film and a silicon nitride film is etched in the selective etching solution at an operating temperature of 156-164°C.
  • the etching liquid of the present invention increases the etching rates of silicon nitride and silicon oxide as the temperature increases, but the etching rate of silicon oxide increases more than that of silicon nitride, and the etching selectivity decreases.
  • the selectivity increases as the temperature decreases, but silicon oxide tends to stick back.
  • the working temperature of the etching solution of the present invention is
  • Selective etching solution includes the following raw materials:
  • silane coupling agent B 1.1-1.4% by mass of silane coupling agent B;
  • the silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane;
  • the silane coupling agent B is any one of N-( ⁇ -aminoethyl- ⁇ -aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane;
  • Silicon nitride/silicon oxide is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  • the silicon content during the etching process is 0-500ppm
  • the etching rate of silicon nitride is greater than The etching rate of silicon oxide is less than Silicon nitride/silicon oxide etching selectivity ratio is greater than 2500;
  • the silicon nitride etching rate is greater than The etching rate of silicon oxide is not less than
  • the etching solution of the present invention mainly inhibits the etching of the silicon oxide layer, and inhibits the etching of the silicon nitride layer as little as possible.
  • the silicon oxide film wafer and the silicon nitride film wafer after slicing are used to carry out etching experiments.
  • the etching solution of the present invention is used to etch a stacked structure of silicon oxide and silicon nitride. To verify the etching effect, an etching experiment was carried out using a sliced 3D NAND structure wafer.
  • the reagents and raw materials used in the present invention are commercially available.
  • the present invention provides an etching solution that is selective for silicon nitride and silicon oxide, and has a longer etching life while inhibiting silicon oxide etching.
  • the initial silicon nitride etching rate of the etching solution of the present invention is greater than The etching selectivity ratio is greater than 2500.
  • the etching solution of the present invention effectively improves the service life of the etching solution through the synergistic effect of monoaminosilane and bisaminosilane.
  • the silicon nitride etching rate is greater than Silicon oxide etching rate is greater than
  • the etching solution of the present invention can be used to etch 150-250 layers of 3D NAND structure wafers, with a clear and complete tooth structure, no adhesion between layers, and no re-adhesion of the silicon oxide layer at a silicon content of 100-500ppm.
  • Figure 1 is a SEM image of the bottom of the trench etched on a 192-layer 3D NAND structure wafer in Example 8 when the silicon content is 0 ppm.
  • Figure 2 is a SEM image of the bottom of the trench etched in Example 8 with a 192-layer 3D NAND structure wafer when the silicon content is 100 ppm.
  • Figure 3 is a SEM image of the bottom of the trench etched in Example 8 with a 192-layer 3D NAND structure wafer when the silicon content is 200 ppm.
  • Figure 4 is a SEM image of the bottom of the trench etched in Example 8 with a 192-layer 3D NAND structure wafer when the silicon content is 300 ppm.
  • Figure 5 is a SEM image of the bottom of the trench etched in Comparative Example 3 with a 192-layer 3D NAND structure wafer at a silicon content of 300 ppm.
  • Figure 6 is a SEM image of the bottom of the trench etched in Comparative Example 5 with a 192-layer 3D NAND structure wafer at a silicon content of 300 ppm.
  • Figure 7 is a SEM image of the bottom of the trench etched in Comparative Example 7 with a 192-layer 3D NAND structure wafer at a silicon content of 300 ppm.
  • silane coupling agents A and B are mixed evenly in proportion, and added to a phosphoric acid aqueous solution at a concentration of 86.5% at 80°C. After silane coupling agents A and B are completely dissolved in phosphoric acid, the temperature is raised to 120°C and kept warm for 1 hour, and finally cooled to room temperature. During this configuration process, if the configuration is carried out at room temperature, the gel block phenomenon is easy to achieve. If silane coupling agents A and B are mixed evenly in proportion and added to a phosphoric acid aqueous solution at room temperature, and then the temperature is slowly raised to 80°C, the gel block formed may not completely disappear and mix in the formed mixed solution. After further raising the temperature to 120°C, it can be ensured that the formed etching solution is completely dissolved.
  • Etching wafer silicon oxide film and silicon nitride film; the deposition thickness of the two film materials on the silicon semiconductor wafer is and During the test, the slices were cut into 1.5cm*3cm strips.
  • Etching time 3600s for silicon oxide film etching and 300s for silicon nitride film etching.
  • Etching rate calculation method Use ellipsometry to detect the thickness of silicon oxide and silicon nitride films before and after etching. The difference between the initial thickness and the thickness after etching divided by the etching time is the etching rate.
  • the etching selectivity is the ratio of the silicon nitride etching rate (SiN E/R) to the silicon oxide etching rate (SiO E/R).
  • the silicon content in the etching solution gradually increases, and the etching of silicon oxide and silicon nitride is inhibited.
  • the initial silicon content of the etching solution is 0ppm, and silicon nitride is dissolved therein to prepare etching solutions with silicon contents of 100ppm, 200ppm, and 300ppm, and the etching rates and selectivity of silicon oxide and silicon nitride are tested respectively to characterize the life of the etching solution.
  • Etching experiment 3D NAND structure wafers were etched using etching solutions with silicon content of 0ppm, 100ppm, 200ppm, and 300ppm respectively.
  • the etching conditions were the same as the rate test, and the etching time was 30min.
  • Detection method Take high-resolution SEM images of the cross-section of the 3D NAND structure to analyze the etching effect and re-adhesion.
  • Examples 1-9 and Comparative Examples 1-7 are shown in Table 1, wherein the contents of phosphoric acid and silane coupling agent are expressed in mass percentage, and the balance is water.
  • Negative numbers indicate the rate at which the silicon dioxide film thickens at high silicon content.
  • the etching solution synthesized by silane coupling agent A in comparative examples 1-3 has a relatively high initial selectivity, but as the silicon content increases, the silicon oxide etching rate decreases rapidly and a back-sticking phenomenon occurs.
  • the etching rate is negative, indicating that the silicon oxide film is reversely thickened;
  • the etching solution synthesized by silane coupling agent B in comparative examples 4-6 has a relatively low initial selectivity, but as the silicon content increases, silicon oxide is always in a forward etching state.
  • Example 1-9 combines two silane coupling agents. When the silicon nitride content increases from 0ppm to 300ppm, the silicon oxide etching rate is maintained at 0.3- The silicon nitride etch rate is maintained at No sticking phenomenon occurred.

Abstract

Disclosed in the present invention is a selective etching solution for a 3D NAND structural sheet of silicon nitride/silicon oxide; and the etching solution comprises a silane coupling agent, phosphoric acid, and water. The etching solution for silicon nitride of the present invention can improve the etching selection ratio of silicon nitride to silicon oxide, selectively remove a silicon nitride layer, prolong the service life of the etching solution, and adapt to the etching of a laminated structure.

Description

氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液Selective etching solution for 3D NAND structure wafers made of silicon nitride/silicon oxide 技术领域Technical Field
本发明属于电子化学品领域，具体涉及一种氮化硅和氧化硅的选择性蚀刻液。The invention belongs to the field of electronic chemicals, and in particular relates to a selective etching solution for silicon nitride and silicon oxide.
技术背景technical background
闪存芯片技术中，3D NAND技术垂直堆叠了多层数据存储单元，在更小的空间内容纳更多的存储单元，可打造出同类NAND技术三倍存储容量的设备，是存储芯片发展的必然趋势。In flash memory chip technology, 3D NAND technology vertically stacks multiple layers of data storage units, accommodating more storage units in a smaller space. It can create devices with three times the storage capacity of similar NAND technology and is an inevitable trend in the development of storage chips.
3D NAND工艺从96层向192层不断发展以获取更高的单位存储容量，其中氮化硅和氧化硅是交替层叠结构，磷酸从侧面快速蚀刻氮化硅层的同时对氧化硅层也有一定的腐蚀。蚀刻液需要对氮化硅具有较高的选择性，在蚀刻氮化硅层的同时几乎不蚀刻氧化硅层。随着蚀刻的进行大量硅酸进入蚀刻液中，当含量超过蚀刻液的溶解极限时便会在二氧化硅结构层上生长，造成存储芯片良率的下降甚至报废。The 3D NAND process has been continuously developed from 96 layers to 192 layers to obtain higher unit storage capacity. Silicon nitride and silicon oxide are alternately stacked structures. Phosphoric acid quickly etches the silicon nitride layer from the side and also corrodes the silicon oxide layer to a certain extent. The etching solution needs to have a high selectivity for silicon nitride, and almost does not etch the silicon oxide layer while etching the silicon nitride layer. As the etching proceeds, a large amount of silica enters the etching solution. When the content exceeds the solubility limit of the etching solution, it will grow on the silicon dioxide structure layer, causing the yield of the memory chip to decrease or even be scrapped.
针对以上问题，需要在磷酸中添加复合添加剂，抑制二氧化硅蚀刻的同时稳定氮化硅及氧化硅的蚀刻速率。To address the above problems, it is necessary to add a composite additive to phosphoric acid to inhibit silicon dioxide etching while stabilizing the etching rates of silicon nitride and silicon oxide.
发明内容Summary of the invention
本发明所要解决的技术问题是提供一种氮化硅和氧化硅的选择性蚀刻液，抑制二氧化硅的蚀刻，在较高的氮化硅含量下仍对氮化硅保有较高的蚀刻速率，并且适应层叠结构的蚀刻。The technical problem to be solved by the present invention is to provide a selective etching solution for silicon nitride and silicon oxide, which inhibits the etching of silicon dioxide, maintains a high etching rate for silicon nitride at a high silicon nitride content, and is suitable for etching of stacked structures.
一方面本发明涉及一种氮化硅和氧化硅的选择性蚀刻液，所述蚀刻液组成为1.5-2.0％质量含量的硅烷偶联剂A，1.1-1.4％质量含量的硅烷偶联剂B，83.0-85.0％质量含量的磷酸，余量为去离子水。On the one hand, the present invention relates to a selective etching solution for silicon nitride and silicon oxide, wherein the etching solution comprises 1.5-2.0% by weight of a silane coupling agent A, 1.1-1.4% by weight of a silane coupling agent B, 83.0-85.0% by weight of phosphoric acid, and the remainder is deionized water.
本发明的蚀刻液中，硅烷偶联剂A为[3-(甲氨基)丙基]三甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]丁-1-胺、[3-(苯氨基)丙基]三甲氧基硅烷中的一种。In the etching solution of the present invention, the silane coupling agent A is one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine and [3-(phenylamino)propyl]trimethoxysilane.
硅烷偶联剂A主要作用是调控氮化硅/氧化硅的蚀刻选择比，其作用机理为硅烷偶联剂在磷酸中水解，磷酸硅酯的亲水段由于化学键的作用更倾向于向内附着于氧化硅表面，同时空间位阻较大的疏水端向外阻碍了磷酸和水对氧化硅的蚀刻，共同作用之下氧化硅的蚀刻受到抑制。此外由于氨基和空间位阻的作用，硅烷偶联剂A自身能够结合一定含量的游离硅酸。The main function of silane coupling agent A is to adjust the etching selectivity ratio of silicon nitride/silicon oxide. Its mechanism of action is that the silane coupling agent is hydrolyzed in phosphoric acid. The hydrophilic segment of phosphate silicon ester tends to attach to the surface of silicon oxide inward due to the effect of chemical bonds. At the same time, the hydrophobic end with larger steric hindrance hinders the etching of silicon oxide by phosphoric acid and water outward. Under the combined effect, the etching of silicon oxide is inhibited. In addition, due to the effects of amino groups and steric hindrance, silane coupling agent A itself can bind a certain amount of free silicic acid.
硅烷偶联剂B主要作用是调控蚀刻液寿命，即硅含量增加后蚀刻速率仍能稳定在一 定范围内。The main function of silane coupling agent B is to regulate the life of the etching solution, that is, the etching rate can remain stable at a certain level after the silicon content increases. Within a certain range.
本发明的蚀刻液中，硅烷偶联剂B为N-(β-氨乙基-γ-氨丙基)甲基二甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]乙二胺、3-[2-(2-氨基乙基氨基)乙基氨基]丙基-三甲氧基硅烷中的一种。In the etching solution of the present invention, the silane coupling agent B is one of N-(β-aminoethyl-γ-aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane.
硅烷偶联剂B主要作用是延长蚀刻液寿命，即通过双氨基结构结合游离硅酸，使其无法回粘在氧化硅表面，表现为蚀刻液的硅含量窗口拓宽，氮化硅和氧化硅的蚀刻速率随硅含量增加而下降的趋势变缓。The main function of silane coupling agent B is to extend the life of the etching solution, that is, to combine free silicic acid through the diamino structure so that it cannot stick back to the silicon oxide surface, which is manifested in the widening of the silicon content window of the etching solution and the slowing down of the trend of the etching rate of silicon nitride and silicon oxide decreasing with the increase of silicon content.
本发明的蚀刻液中，磷酸和水的含量对氧化硅及氮化硅的初始蚀刻速率影响较大，即磷酸含量越高，水含量越少，氧化硅蚀刻速率越快，而磷酸含量越低，水含量越多，氮化硅蚀刻速率越快。但过高的磷酸浓度易导致硅烷偶联剂脱水碳化从而失效，而过低的磷酸浓度无法满足高温蚀刻水含量稳定的需求。In the etching solution of the present invention, the content of phosphoric acid and water has a great influence on the initial etching rate of silicon oxide and silicon nitride, that is, the higher the phosphoric acid content, the lower the water content, the faster the silicon oxide etching rate, and the lower the phosphoric acid content, the more water content, the faster the silicon nitride etching rate. However, too high a phosphoric acid concentration is likely to cause the silane coupling agent to dehydrate and carbonize, thereby failing, while too low a phosphoric acid concentration cannot meet the requirement of stable water content for high-temperature etching.
进一步地，本发明的蚀刻液中磷酸和水质量比为5.6-7.4，优选为6.2-6.6。Furthermore, the mass ratio of phosphoric acid to water in the etching solution of the present invention is 5.6-7.4, preferably 6.2-6.6.
另一方面，本发明提供一种氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液的配置方法，在室温下将硅烷偶联剂A和B混合均匀，一同加入到磷酸溶液中，得到蚀刻液。On the other hand, the present invention provides a method for preparing a selective etching solution for a silicon nitride/silicon oxide 3D NAND structure wafer, wherein silane coupling agents A and B are evenly mixed at room temperature and added together into a phosphoric acid solution to obtain an etching solution.
磷酸溶液的温度预先升温至80-100℃；将硅烷偶联剂A和B混合均匀后一同加入到80-100℃磷酸溶液后，再次升温至110-120℃，保温0.5-1h，冷却至室温得到蚀刻液。The temperature of the phosphoric acid solution is preheated to 80-100°C; after the silane coupling agents A and B are evenly mixed and added to the 80-100°C phosphoric acid solution, the temperature is again raised to 110-120°C, kept warm for 0.5-1h, and cooled to room temperature to obtain an etching solution.
所述配置过程中，如果是常温条件下进行配置，则容易实现凝胶的块状现象，而如果将硅烷偶联剂A和B按比例混合均匀后加入到常温磷酸水溶液中，在缓慢升温至80-100℃，进一步优选为80℃、90℃、100℃，则形成的凝胶块状可能并不能完全实现消失而混合在形成的混合液中。进一步提升至110-120℃后，能够保证形成的蚀刻液完全溶解，进一步升温至110℃、或120℃。In the configuration process, if the configuration is performed at room temperature, the gel block phenomenon is easy to be realized. If the silane coupling agents A and B are mixed evenly in proportion and added to the phosphoric acid aqueous solution at room temperature, and then slowly heated to 80-100°C, more preferably 80°C, 90°C, 100°C, the formed gel block may not completely disappear but be mixed in the formed mixed solution. After further increasing to 110-120°C, it can be ensured that the formed etching solution is completely dissolved, and further heated to 110°C or 120°C.
所述的硅烷偶联剂A的质量含量为1.5-2％；The mass content of the silane coupling agent A is 1.5-2%;
硅烷偶联剂的B质量含量为1.1-1.4％；The mass content of B of the silane coupling agent is 1.1-1.4%;
磷酸的质量含量为83.0-85.0％；余量为去离子水；The mass content of phosphoric acid is 83.0-85.0%; the balance is deionized water;
所述的硅烷偶联剂A为[3-(甲氨基)丙基]三甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]丁-1-胺、[3-(苯氨基)丙基]三甲氧基硅烷中的任意一种；The silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane;
所述的硅烷偶联剂B为N-(β-氨乙基-γ-氨丙基)甲基二甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]乙二胺、3-[2-(2-氨基乙基氨基)乙基氨基]丙基-三甲氧基硅烷中的任意一种。The silane coupling agent B is any one of N-(β-aminoethyl-γ-aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane.
氮化硅/氧化硅为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为500-所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。 Silicon nitride/silicon oxide is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride is 500- The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
又一方面，本发明一种氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液蚀刻3D NAND结构片的方法，将氧化硅膜和氮化硅膜的层叠结构在选择性蚀刻液中，在工作温度为156-164℃下进行蚀刻。On the other hand, the present invention provides a method for etching a 3D NAND structure wafer using a selective etching solution for a silicon nitride/silicon oxide 3D NAND structure wafer, wherein a stacked structure of a silicon oxide film and a silicon nitride film is etched in the selective etching solution at an operating temperature of 156-164°C.
本发明的蚀刻液，温度升高氮化硅及氧化硅蚀刻速率均增大，但氧化硅蚀刻速率提升比例较氮化硅更大，蚀刻选择比减小。温度降低选择比增大，但容易出现氧化硅回粘。The etching liquid of the present invention increases the etching rates of silicon nitride and silicon oxide as the temperature increases, but the etching rate of silicon oxide increases more than that of silicon nitride, and the etching selectivity decreases. The selectivity increases as the temperature decreases, but silicon oxide tends to stick back.
进一步地，本发明地蚀刻液工作温度为为 Furthermore, the working temperature of the etching solution of the present invention is
选择性蚀刻液包括如下原料：Selective etching solution includes the following raw materials:
1.5-2％质量含量的硅烷偶联剂A；1.5-2% by mass of silane coupling agent A;
1.1-1.4％质量含量的硅烷偶联剂B；1.1-1.4% by mass of silane coupling agent B;
83.0-85.0％质量含量的磷酸；余量为去离子水；83.0-85.0% by mass phosphoric acid; the balance is deionized water;
所述的硅烷偶联剂A为[3-(甲氨基)丙基]三甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]丁-1-胺、[3-(苯氨基)丙基]三甲氧基硅烷中的任意一种；The silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane;
所述的硅烷偶联剂B为N-(β-氨乙基-γ-氨丙基)甲基二甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]乙二胺、3-[2-(2-氨基乙基氨基)乙基氨基]丙基-三甲氧基硅烷中的任意一种；The silane coupling agent B is any one of N-(β-aminoethyl-γ-aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane;
氮化硅/氧化硅为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。Silicon nitride/silicon oxide is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
所述蚀刻过程中硅含量为0-500ppm，The silicon content during the etching process is 0-500ppm,
所述的蚀刻液对在外加硅含量为0ppm时，氮化硅的蚀刻速率大于氧化硅的蚀刻速率小于氮化硅/氧化硅蚀刻选择比大于2500；When the added silicon content is 0 ppm, the etching rate of silicon nitride is greater than The etching rate of silicon oxide is less than Silicon nitride/silicon oxide etching selectivity ratio is greater than 2500;
所述的蚀刻液当外加硅含量在300ppm及以上时，氮化硅蚀刻速率大于氧化硅的蚀刻速率不低于 When the added silicon content of the etching solution is 300ppm or more, the silicon nitride etching rate is greater than The etching rate of silicon oxide is not less than
[0020]本发明的蚀刻液主要抑制氧化硅层的蚀刻，并尽可能少的抑制氮化硅层的蚀刻，为验证蚀刻速率，分别使用切片后的氧化硅薄膜圆晶和氮化硅薄膜圆晶进行蚀刻实验。The etching solution of the present invention mainly inhibits the etching of the silicon oxide layer, and inhibits the etching of the silicon nitride layer as little as possible. To verify the etching rate, the silicon oxide film wafer and the silicon nitride film wafer after slicing are used to carry out etching experiments.
本发明的蚀刻液用于蚀刻氧化硅和氮化硅的层叠结构，为验证蚀刻效果，使用切片后的3D NAND结构片进行蚀刻实验。The etching solution of the present invention is used to etch a stacked structure of silicon oxide and silicon nitride. To verify the etching effect, an etching experiment was carried out using a sliced 3D NAND structure wafer.
本发明所用试剂和原料均市售可得。The reagents and raw materials used in the present invention are commercially available.
本发明的优点在于：相较于现有技术，本发明提供了一种对氮化硅和氧化硅具有选择性的蚀刻液，在抑制氧化硅蚀刻地同时具有较高的蚀刻寿命。The advantages of the present invention are as follows: compared with the prior art, the present invention provides an etching solution that is selective for silicon nitride and silicon oxide, and has a longer etching life while inhibiting silicon oxide etching.
(1)本发明的蚀刻液初始氮化硅蚀刻速率大于蚀刻选择比大于2500。(1) The initial silicon nitride etching rate of the etching solution of the present invention is greater than The etching selectivity ratio is greater than 2500.
(2)本发明的蚀刻液中通过单氨基硅烷和双氨基硅烷协同作用有效提升蚀刻液寿命，在 300ppm硅含量下氮化硅蚀刻速率大于氧化硅蚀刻速率大于 (2) The etching solution of the present invention effectively improves the service life of the etching solution through the synergistic effect of monoaminosilane and bisaminosilane. At 300ppm silicon content, the silicon nitride etching rate is greater than Silicon oxide etching rate is greater than
(3)本发明的蚀刻液可用于蚀刻150-250层3D NAND结构片，齿状结构清晰完整，层间无粘连，100-500ppm硅含量下氧化硅层无回粘。(3) The etching solution of the present invention can be used to etch 150-250 layers of 3D NAND structure wafers, with a clear and complete tooth structure, no adhesion between layers, and no re-adhesion of the silicon oxide layer at a silicon content of 100-500ppm.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为实施例8在硅含量为0ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 1 is a SEM image of the bottom of the trench etched on a 192-layer 3D NAND structure wafer in Example 8 when the silicon content is 0 ppm.
图2为实施例8在硅含量为100ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 2 is a SEM image of the bottom of the trench etched in Example 8 with a 192-layer 3D NAND structure wafer when the silicon content is 100 ppm.
图3为实施例8在硅含量为200ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 3 is a SEM image of the bottom of the trench etched in Example 8 with a 192-layer 3D NAND structure wafer when the silicon content is 200 ppm.
图4为实施例8在硅含量为300ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 4 is a SEM image of the bottom of the trench etched in Example 8 with a 192-layer 3D NAND structure wafer when the silicon content is 300 ppm.
图5为对比例3在硅含量为300ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 5 is a SEM image of the bottom of the trench etched in Comparative Example 3 with a 192-layer 3D NAND structure wafer at a silicon content of 300 ppm.
图6为对比例5在硅含量为300ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 6 is a SEM image of the bottom of the trench etched in Comparative Example 5 with a 192-layer 3D NAND structure wafer at a silicon content of 300 ppm.
图7为对比例7在硅含量为300ppm时蚀刻192层3D NAND结构片沟槽底部的SEM图片。Figure 7 is a SEM image of the bottom of the trench etched in Comparative Example 7 with a 192-layer 3D NAND structure wafer at a silicon content of 300 ppm.
具体实施方法Specific implementation methods
下面将结合本发明的具体实施例，对本发明实施例中的技术方案进行清楚、完整的描述，所述的实施例仅仅是本发明的一部分实施例，而不是全部实施例。基于本发明中实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本发明的保护范围。The following will be combined with the specific embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. The embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the protection scope of the present invention.
1.蚀刻液配制1. Preparation of etching solution
在室温下先将硅烷偶联剂A和B按比例混合均匀，一同加入到80℃浓度为86.5％的磷酸水溶液中，待硅烷偶联剂A和B完全溶于磷酸后升温至120℃保温1h，最后冷却至室温即可。该配置过程中，如果是常温条件下进行配置，则容易实现凝胶的块状现象，而如果将硅烷偶联剂A和B按比例混合均匀后加入到常温磷酸水溶液中，在缓慢升温至80℃，则形成的凝胶块状可能并不能完全实现消失而混合在形成的混合液中。进一步提升至120℃后，能够保证形成的蚀刻液完全溶解。 At room temperature, silane coupling agents A and B are mixed evenly in proportion, and added to a phosphoric acid aqueous solution at a concentration of 86.5% at 80°C. After silane coupling agents A and B are completely dissolved in phosphoric acid, the temperature is raised to 120°C and kept warm for 1 hour, and finally cooled to room temperature. During this configuration process, if the configuration is carried out at room temperature, the gel block phenomenon is easy to achieve. If silane coupling agents A and B are mixed evenly in proportion and added to a phosphoric acid aqueous solution at room temperature, and then the temperature is slowly raised to 80°C, the gel block formed may not completely disappear and mix in the formed mixed solution. After further raising the temperature to 120°C, it can be ensured that the formed etching solution is completely dissolved.
2.蚀刻实验2. Etching experiment
①蚀刻速率的检测方法① Etching rate detection method
蚀刻圆晶：氧化硅膜和氮化硅膜；两种膜材料在硅半导体晶片上的沉积厚度分别为和在测试时均切片为1.5cm*3cm的长条状。Etching wafer: silicon oxide film and silicon nitride film; the deposition thickness of the two film materials on the silicon semiconductor wafer is and During the test, the slices were cut into 1.5cm*3cm strips.
将Will
蚀刻温度：160±0.5℃。Etching temperature: 160±0.5℃.
蚀刻时间：氧化硅膜蚀刻3600s，氮化硅膜蚀刻300s。Etching time: 3600s for silicon oxide film etching and 300s for silicon nitride film etching.
蚀刻速率计算方法：使用椭圆偏振光谱仪检测蚀刻前后氧化硅及氮化硅膜厚度，初始厚度与时刻后厚度之差除以蚀刻时间即蚀刻速率。蚀刻选择比为氮化硅蚀刻速率(SiN E/R)与氧化硅蚀刻速率(SiO E/R)的比值。Etching rate calculation method: Use ellipsometry to detect the thickness of silicon oxide and silicon nitride films before and after etching. The difference between the initial thickness and the thickness after etching divided by the etching time is the etching rate. The etching selectivity is the ratio of the silicon nitride etching rate (SiN E/R) to the silicon oxide etching rate (SiO E/R).
②蚀刻液寿命检测方法② Etching solution life detection method
随着氮化硅层的蚀刻，蚀刻液中硅含量逐渐升高，氧化硅和氮化硅的蚀刻受到抑制。蚀刻液初始硅含量为0ppm，向其中溶解氮化硅以配置硅含量为100ppm、200ppm、300ppm的蚀刻液，并分别测试氧化硅和氮化硅蚀刻速率及选择比，以此表征蚀刻液寿命。As the silicon nitride layer is etched, the silicon content in the etching solution gradually increases, and the etching of silicon oxide and silicon nitride is inhibited. The initial silicon content of the etching solution is 0ppm, and silicon nitride is dissolved therein to prepare etching solutions with silicon contents of 100ppm, 200ppm, and 300ppm, and the etching rates and selectivity of silicon oxide and silicon nitride are tested respectively to characterize the life of the etching solution.
③层叠结构蚀刻测试③Layered structure etching test
蚀刻实验：分别使用0ppm、100ppm、200ppm、300ppm硅含量的蚀刻液刻蚀3D NAND结构片，蚀刻条件与速率检测相同，蚀刻时间为30min。Etching experiment: 3D NAND structure wafers were etched using etching solutions with silicon content of 0ppm, 100ppm, 200ppm, and 300ppm respectively. The etching conditions were the same as the rate test, and the etching time was 30min.
检测方法：拍摄3D NAND结构片截面的高分辨率SEM图片，以此分析蚀刻效果及回粘情况。Detection method: Take high-resolution SEM images of the cross-section of the 3D NAND structure to analyze the etching effect and re-adhesion.
实施例1-9和对比例1-7见表1，其中磷酸和硅烷偶联剂含量以质量百分比表示，余量为水。Examples 1-9 and Comparative Examples 1-7 are shown in Table 1, wherein the contents of phosphoric acid and silane coupling agent are expressed in mass percentage, and the balance is water.
表1实施例及对比例各组分含量

Table 1 Content of each component in the examples and comparative examples

初始氮化硅硅含量为0ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表2。When the initial silicon nitride silicon content is 0 ppm, the etching rates and selectivities of the etching solutions in Examples 1-9 and Comparative Examples 1-7 for silicon oxide and silicon nitride films are shown in Table 2.
表2 0ppm硅含量下蚀刻速率及选择比

Table 2 Etching rate and selectivity at 0ppm silicon content

氮化硅硅含量为100ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表3。When the silicon content of silicon nitride is 100 ppm, the etching rates and selectivities of the etching solutions in Examples 1-9 and Comparative Examples 1-7 on silicon oxide and silicon nitride films are shown in Table 3.
表3 100ppm硅含量下蚀刻速率及选择比
Table 3 Etching rate and selectivity at 100ppm silicon content
氮化硅硅含量为200ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表4。When the silicon content of silicon nitride is 200 ppm, the etching rates and selectivities of the etching solutions in Examples 1-9 and Comparative Examples 1-7 on silicon oxide and silicon nitride films are shown in Table 4.
表4 200ppm硅含量下蚀刻速率及选择比
Table 4 Etching rate and selectivity at 200ppm silicon content
注：负数表示二氧化硅膜在高硅含量下增厚的速率。Note: Negative numbers indicate the rate at which the silicon dioxide film thickens at high silicon content.
氮化硅硅含量为300ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表4。When the silicon content of silicon nitride is 300 ppm, the etching rates and selectivities of the etching solutions in Examples 1-9 and Comparative Examples 1-7 on silicon oxide and silicon nitride films are shown in Table 4.
表5 300ppm硅含量下蚀刻速率及选择比

Table 5 Etching rate and selectivity at 300ppm silicon content

由实验数据可以看出，对比例1-3中的硅烷偶联剂A合成的蚀刻液初始选择比较高，但随着硅含量的增加，氧化硅蚀刻速率迅速下降并出现回粘现象，在300ppm硅含量下蚀刻速率为负数，表明氧化硅膜反向增厚；对比例4-6中的硅烷偶联剂B合成的蚀刻液初始选择比较低，但随硅含量的增加，氧化硅始终处于正向蚀刻的状态。实施例1-9结合了两种硅烷偶联剂，在氮化硅含量从0ppm增加至300ppm过程中，氧化硅蚀刻速率保持在0.3-氮化硅蚀刻速率保持在始终未出现回粘现象。It can be seen from the experimental data that the etching solution synthesized by silane coupling agent A in comparative examples 1-3 has a relatively high initial selectivity, but as the silicon content increases, the silicon oxide etching rate decreases rapidly and a back-sticking phenomenon occurs. At a silicon content of 300ppm, the etching rate is negative, indicating that the silicon oxide film is reversely thickened; the etching solution synthesized by silane coupling agent B in comparative examples 4-6 has a relatively low initial selectivity, but as the silicon content increases, silicon oxide is always in a forward etching state. Example 1-9 combines two silane coupling agents. When the silicon nitride content increases from 0ppm to 300ppm, the silicon oxide etching rate is maintained at 0.3- The silicon nitride etch rate is maintained at No sticking phenomenon occurred.
由SEM图可以看出，实施例8在0-300ppm硅含量时蚀刻的192层3D NAND结构片沟槽底部表现为齿状结构清晰无粘连，且氧化硅层无回粘现象出现，较对比例3无硅烷偶联剂B体系和对比例7纯磷酸体系有明显提升。此外，其他实施例均可在0-300ppm硅含量下对3D NAND结构片的进行有效蚀刻。实施例1-7、9的蚀刻效果图与实施例8相似。It can be seen from the SEM image that the bottom of the groove of the 192-layer 3D NAND structure wafer etched in Example 8 at a silicon content of 0-300ppm shows a clear tooth-like structure without adhesion, and the silicon oxide layer has no back-adhesion phenomenon, which is significantly improved compared with the system without silane coupling agent B in Comparative Example 3 and the pure phosphoric acid system in Comparative Example 7. In addition, the other embodiments can effectively etch the 3D NAND structure wafer at a silicon content of 0-300ppm. The etching effect diagrams of Examples 1-7 and 9 are similar to those of Example 8.
以上对本发明一种抑制钨蚀刻的氮化铝蚀刻液做了详尽的描述，以上所述仅为本发明的具体实施例，并不用于限定本发明的保护范围，在本发明的基础上，可以对之做一些修改或改进，这对本领域技术人员而言是显而易见的。因此，在不偏离本发明精神的基础上所做的这些修改或改进，均属于本发明要求保护的范围。 The above is a detailed description of an aluminum nitride etching solution for inhibiting tungsten etching of the present invention. The above is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. On the basis of the present invention, some modifications or improvements can be made thereto, which is obvious to those skilled in the art. Therefore, these modifications or improvements made without departing from the spirit of the present invention all belong to the scope of protection claimed by the present invention.

Claims (11)

  1. 一种氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液，其特征在于，所述氮化硅选择性蚀刻液包括如下原料：A selective etching solution for a silicon nitride/silicon oxide 3D NAND structure wafer, characterized in that the silicon nitride selective etching solution comprises the following raw materials:
    1.5-2％质量含量的硅烷偶联剂A；1.5-2% by mass of silane coupling agent A;
    1.1-1.4％质量含量的硅烷偶联剂B；1.1-1.4% by mass of silane coupling agent B;
    83.0-85.0％质量含量的磷酸；余量为去离子水。83.0-85.0% by mass phosphoric acid; the remainder is deionized water.
  2. 根据权利要求1所述的氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液，其特征在于：所述的硅烷偶联剂A为[3-(甲氨基)丙基]三甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]丁-1-胺、[3-(苯氨基)丙基]三甲氧基硅烷中的任意一种。The selective etching solution for the silicon nitride/silicon oxide 3D NAND structure wafer according to claim 1 is characterized in that the silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane.
  3. 根据权利要求1所述的氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液，其特征在于：所述的硅烷偶联剂B为N-(β-氨乙基-γ-氨丙基)甲基二甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]乙二胺、3-[2-(2-氨基乙基氨基)乙基氨基]丙基-三甲氧基硅烷中的任意一种。The selective etching solution for the silicon nitride/silicon oxide 3D NAND structure wafer according to claim 1 is characterized in that the silane coupling agent B is any one of N-(β-aminoethyl-γ-aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane.
  4. 根据权利要求1所述的氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液，其特征在于：氮化硅/氧化硅为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为 所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。The selective etching solution for a 3D NAND structure wafer of silicon nitride/silicon oxide according to claim 1 is characterized in that: silicon nitride/silicon oxide is a stacked structure of a silicon oxide film and a silicon nitride film, and the film thickness of the silicon nitride is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  5. 一种氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液的配置方法，其特征在于，在室温下将硅烷偶联剂A和B混合均匀，一同加入到磷酸溶液中，得到蚀刻液。A method for preparing a selective etching solution for a silicon nitride/silicon oxide 3D NAND structure wafer, characterized in that silane coupling agents A and B are evenly mixed at room temperature and added together into a phosphoric acid solution to obtain an etching solution.
  6. 根据权利要求5所述的方法，其特征在于，磷酸溶液的温度预先升温至80-100℃；将硅烷偶联剂A和B混合均匀后一同加入到80-100℃磷酸溶液后，再次升温至110-120℃，保温0.5-1h，冷却至室温得到蚀刻液。The method according to claim 5 is characterized in that the temperature of the phosphoric acid solution is preheated to 80-100° C.; after the silane coupling agents A and B are evenly mixed and added together to the 80-100° C. phosphoric acid solution, the temperature is again raised to 110-120° C., kept warm for 0.5-1 h, and cooled to room temperature to obtain the etching solution.
  7. 根据权利要求6所述的方法，其特征在于，所述的硅烷偶联剂A的质量含量为1.5-2％；The method according to claim 6, characterized in that the mass content of the silane coupling agent A is 1.5-2%;
    硅烷偶联剂的B质量含量为1.1-1.4％；The mass content of B of the silane coupling agent is 1.1-1.4%;
    磷酸的质量含量为83.0-85.0％；余量为去离子水；The mass content of phosphoric acid is 83.0-85.0%; the balance is deionized water;
    所述的硅烷偶联剂A为[3-(甲氨基)丙基]三甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]丁-1-胺、[3-(苯氨基)丙基]三甲氧基硅烷中的任意一种；The silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane;
    所述的硅烷偶联剂B为N-(β-氨乙基-γ-氨丙基)甲基二甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]乙二胺、3-[2-(2-氨基乙基氨基)乙基氨基]丙基-三甲氧基硅烷中的任意一种。The silane coupling agent B is any one of N-(β-aminoethyl-γ-aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane.
  8. 根据权利要求6所述的方法，其特征在于，氮化硅/氧化硅为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。The method according to claim 6, characterized in that silicon nitride/silicon oxide is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride film is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  9. 一种氮化硅/氧化硅的3D NAND结构片的选择性蚀刻液蚀刻3D NAND结构片的方法，其 特征在于，将氧化硅膜和氮化硅膜的层叠结构在选择性蚀刻液中，在工作温度为156-164℃下进行蚀刻。A method for etching a 3D NAND structure wafer using a selective etching solution of a 3D NAND structure wafer of silicon nitride/silicon oxide, wherein The invention is characterized in that the stacked structure of silicon oxide film and silicon nitride film is etched in a selective etching solution at an operating temperature of 156-164°C.
  10. 根据权利要求9所述的方法，其特征在于，选择性蚀刻液包括如下原料：The method according to claim 9, characterized in that the selective etching solution comprises the following raw materials:
    1.5-2％质量含量的硅烷偶联剂A；1.5-2% by mass of silane coupling agent A;
    1.1-1.4％质量含量的硅烷偶联剂B；1.1-1.4% by mass of silane coupling agent B;
    83.0-85.0％质量含量的磷酸；余量为去离子水；83.0-85.0% by mass phosphoric acid; the remainder is deionized water;
    所述的硅烷偶联剂A为[3-(甲氨基)丙基]三甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]丁-1-胺、[3-(苯氨基)丙基]三甲氧基硅烷中的任意一种；The silane coupling agent A is any one of [3-(methylamino)propyl]trimethoxysilane, N-[3-(trimethoxysilyl)propyl]butan-1-amine, and [3-(phenylamino)propyl]trimethoxysilane;
    所述的硅烷偶联剂B为N-(β-氨乙基-γ-氨丙基)甲基二甲氧基硅烷、N-[3-(三甲氧基硅基)丙基]乙二胺、3-[2-(2-氨基乙基氨基)乙基氨基]丙基-三甲氧基硅烷中的任意一种；The silane coupling agent B is any one of N-(β-aminoethyl-γ-aminopropyl)methyldimethoxysilane, N-[3-(trimethoxysilyl)propyl]ethylenediamine, and 3-[2-(2-aminoethylamino)ethylamino]propyl-trimethoxysilane;
    氮化硅/氧化硅为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为 所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。Silicon nitride/silicon oxide is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  11. 根据权利要求9所述的方法，其特征在于，所述蚀刻过程中硅含量为0-500ppm，The method according to claim 9, characterized in that the silicon content during the etching process is 0-500 ppm,
    所述的蚀刻液对在外加硅含量为0ppm时，氮化硅的蚀刻速率大于氧化硅的蚀刻速率小于氮化硅/氧化硅蚀刻选择比大于2500；When the added silicon content is 0 ppm, the etching rate of silicon nitride is greater than The etching rate of silicon oxide is less than Silicon nitride/silicon oxide etching selectivity ratio is greater than 2500;
    所述的蚀刻液当外加硅含量在300ppm及以上时，氮化硅蚀刻速率大于氧化硅的蚀刻速率不低于 When the added silicon content of the etching solution is 300 ppm or more, the silicon nitride etching rate is greater than The etching rate of silicon oxide is not less than
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