WO2023221752A1 - Procédé de traitement d'informations et dispositif électronique - Google Patents

Procédé de traitement d'informations et dispositif électronique Download PDF

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Publication number
WO2023221752A1
WO2023221752A1 PCT/CN2023/090786 CN2023090786W WO2023221752A1 WO 2023221752 A1 WO2023221752 A1 WO 2023221752A1 CN 2023090786 W CN2023090786 W CN 2023090786W WO 2023221752 A1 WO2023221752 A1 WO 2023221752A1
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Prior art keywords
policy
target
cpu
information
scheduling
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PCT/CN2023/090786
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English (en)
Chinese (zh)
Inventor
李勇
陶有佳
相超
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荣耀终端有限公司
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Publication of WO2023221752A1 publication Critical patent/WO2023221752A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5021—Priority

Definitions

  • This application relates to the field of electronic technology, and specifically to an information processing method and electronic equipment.
  • a resource scheduling method that identifies the current user scenario of the electronic device, determines the resource scheduling strategy based on the user scenario and the system load of the electronic device, and sends the resource scheduling strategy to the central processing unit (central processing unit). , CPU), the CPU schedules resources based on resource scheduling strategies, thereby reducing the power consumption of electronic devices, extending battery life, and rationally allocating resources to ensure the smooth operation of applications and improve the performance of electronic devices.
  • the chip platform types of CPUs of different electronic devices may be different. Therefore, when resource scheduling is performed based on the resource scheduling policy, the resource scheduling policy needs to be translated.
  • This application provides an information processing method and electronic device, which can translate scheduling policy information, make the resource scheduling policy information applicable to different CPU chip platform types, and improve the compatibility of electronic devices.
  • this application provides an information processing method.
  • the method is executed by an electronic device.
  • the method includes: obtaining current scene information and first scheduling policy information corresponding to the current scene information; the current scene information represents the current processing of the electronic device.
  • the user scenario corresponding to the business if the chip platform type of the CPU of the electronic device is the first type, determine the target policy identifier corresponding to the first scheduling policy information, and use the CPU of the first type to resource the electronic device according to the target policy identifier.
  • Scheduling if the chip platform type of the CPU of the electronic device is the second type, determine the second scheduling strategy information based on the current scene information and the first scheduling strategy information, and use the second type CPU to schedule the electronic device according to the second scheduling strategy information. Carry out resource scheduling.
  • the scene information may be, for example, a scene number or a scene name.
  • the first scheduling policy information is also called a CPU scheduling policy and is information that needs to be sent to the CPU for execution to schedule resources for the electronic device.
  • the first scheduling policy information may be, for example, first CPU power consumption scheduling information.
  • the policy identifier may be, for example, a policy number or a policy name.
  • the first type can be chip platform.
  • the second type can be (Advanced Micro Devices, AMD) chip platform. That is to say, if the chip platform type of the CPU of the electronic device is an Intel chip platform, the corresponding target policy identifier is determined according to the first scheduling policy information.
  • the target policy identifier can be recognized by the Intel CPU chip, and the Intel CPU chip can schedule resources based on the target policy identifier.
  • the chip platform type of the CPU of the electronic device is an AMD chip platform, based on the current scene information and the first scheduling policy information information to determine the second scheduling policy information.
  • the second scheduling policy information can be recognized by the AMD CPU chip, and the AMD CPU chip can perform resource scheduling based on the second scheduling policy information.
  • the method provided in the first aspect of this application obtains the current scene information and the first scheduling policy information corresponding to the current scene information, and performs different translations on the first scheduling policy information according to the different chip platform types of the CPU.
  • the generated scheduling policy information can be recognized by different types of chip platforms, so that this method of dynamic resource scheduling based on user scenarios can be applied to different types of electronic devices, improving the method compatibility, thereby improving the performance and battery life of different types of electronic devices.
  • the first scheduling policy information includes a long-term turbo power consumption (power limit1, PL1) target value, an energy efficiency ratio (energy performance preference, EPP) target value and an energy performance optimization (energy performance optimize, EPO) switch status
  • the target policy identifier includes the target dynamic tuning technology (DTT) policy identifier and the target EPO policy identifier; determine the target policy identifier corresponding to the first scheduling strategy information, and pass the first type of The CPU performs resource scheduling on electronic devices, including: obtaining the current system load corresponding to the first scheduling policy information; determining the target DTT policy identifier based on the PL1 target value or the current system load; determining the target EPO policy identifier based on the status of the EPO switch; and determining the target DTT policy identifier based on the target DTT
  • the policy identifier adjusts the power of the CPU through the first type of CPU, and adjusts the energy efficiency ratio of the CPU through the first type of CPU according to the target EPO policy identifier and the EPP target value.
  • both power consumption adjustment and energy efficiency are achieved. Ratio adjustment can effectively reduce CPU power consumption and improve the battery life of electronic devices.
  • determining the target DTT policy identifier based on the PL1 target value or the current system load includes: if the first scheduling policy information is policy information corresponding to the default scenario, determining the target DTT policy identifier based on the first correspondence relationship with the current system load.
  • the corresponding target DTT policy identifier; the first correspondence includes a correspondence between at least one default policy identifier and at least one system load, and the at least one default policy identifier includes the target DTT policy identifier; the default scenario refers to other than the preset scenario In user scenarios, the default policy identifier refers to the DTT policy identifier corresponding to the default scenario; if the first scheduling policy information is not the policy information corresponding to the default scenario, then according to the second correspondence relationship, determine the PL1 value corresponding to the closest PL1 target value
  • the target DTT policy identifier; the second correspondence includes the correspondence between multiple non-default policy identifiers and multiple PL1 values, and the multiple non-default policy identifiers include the target DTT policy identifier; the non-default policy identifier refers to the corresponding non-default scenario DTT policy identifier.
  • the first correspondence relationship and the second correspondence relationship can be queried through the policy table.
  • the policy table may include correspondences between some or all of the parameters such as the DTT policy identifier, PL1, PL2, and system load.
  • the policy table can be created and saved by the basic input output system (BIOS) of the electronic device.
  • the policy table may not include the PL1 target value and the PL2 target value. In other words, the policy table may not be established entirely based on the existing PL1 target value and PL2 target value, and there may not be a one-to-one correspondence between the policy identifier and the existing PL1 target value and PL2 target value.
  • the target DTT policy identifier corresponding to the current system load is determined according to the first correspondence relationship, and the policy identifier can be determined quickly and conveniently. If the first scheduling policy information is not the policy information corresponding to the default scenario, the target DTT policy identifier corresponding to the PL1 value closest to the PL1 target value is determined according to the second correspondence relationship.
  • the DTT policy identifier does not need to increase with the increase of the first scheduling policy information, which reduces the number of expansions of the second corresponding relationship in the policy table, saves BIOS capacity, and can ensure that the second corresponding relationship in the policy table is relatively fixed, making it easy to operate. And maintenance.
  • the non-default policy identifier is a DTT policy number
  • the non-default policy identifier includes at least one set of first DTT policy numbers
  • the first DTT policy number includes multiple DTT policy numbers
  • the multiple DTT policies When the numbers are in ascending order, the PL1 step values corresponding to two adjacent DTT policy numbers are equal; according to the second correspondence relationship, the target DTT policy identifier corresponding to the PL1 value closest to the PL1 target value is determined, including: Determine the target PL1 step value and target compensation value based on the PL1 target value; determine the target DTT strategy identification based on the PL1 target value, target PL1 step value, and target compensation value.
  • the non-default policy identifiers are multiple DTT policy numbers sorted from large to small, and the PL1 step values corresponding to two adjacent DTT policy numbers are equal.
  • the target PL1 step value and the target compensation value can be determined based on the PL1 target value, and then the target DTT strategy identifier can be determined based on the PL1 target value, the target PL1 step value, and the target compensation value.
  • the chip platform type of the CPU is: In the case of , ignore PL2 and determine the target DTT strategy number only through the PL1 target value, thereby simplifying the algorithm and improving the efficiency of information translation.
  • determining the target DTT strategy identifier based on the PL1 target value, the target PL1 step value and the target compensation value includes: determining the target DTT strategy identifier through formula (1):
  • step means the target PL1 step value
  • offset1 means the target compensation value
  • formula (1) can be used to quickly determine the policy number corresponding to the PL1 value in the second correspondence relationship that is closest to the PL1 target value in the first scheduling policy information, so that the target DTT policy can be quickly determined identification, there is no need to traverse the second corresponding relationship in the query strategy table, and the efficiency of information translation is improved.
  • the method further includes: determining whether the first scheduling policy information is policy information corresponding to the default scenario according to the current scenario information.
  • determining the target EPO policy identifier according to the state of the EPO switch includes: if the state of the EPO switch is off, determining the preset EPO policy identifier as the target EPO policy identifier; determining the target EPO policy identifier according to the target EPO policy identifier and The EPP target value is used to adjust the energy efficiency ratio of the CPU through the first type of CPU, including: adjusting the energy efficiency ratio of the CPU to the EPP target value through the first type of CPU according to the preset EPO policy identifier.
  • the electronic device when it is determined that the EPO switch is in a closed state, it can be directly determined that the EPO policy identifier is the default EPO policy identifier.
  • the electronic device turns off the DTT adjustment function and directly adjusts the energy efficiency ratio of the CPU to the EPP target value.
  • determining the target EPO policy identifier based on the state of the EPO switch includes: if the state of the EPO switch is on, determining the EPO gear target value based on the EPP target value, and determining the EPO gear target value based on the third corresponding relationship.
  • the third corresponding relationship can also be queried through the policy table.
  • the policy table includes the EPO policy identifier, EPO Correspondence between gear values.
  • the EPO gear target value is determined based on the EPP target value, and the EPO gear value closest to the EPO gear target value is determined based on the third corresponding relationship.
  • Target EPO policy identifier In this way, in the third corresponding relationship in the policy table, the EPO policy identifier does not need to increase with the increase of the first scheduling policy information, reducing the number of expansions of the third corresponding relationship in the policy table, saving BIOS capacity, and ensuring that the third corresponding relationship in the policy table is The three corresponding relationships are relatively fixed, which facilitates operation and maintenance.
  • multiple EPO policies are identified as multiple EPO policy numbers, and when the multiple EPO policy numbers are in ascending order, the EPO gear step values corresponding to two adjacent EPO policy numbers are are equal, according to the third corresponding relationship, determine the target EPO strategy identifier corresponding to the EPO gear value closest to the EPO gear target value, including: determining the target EPO strategy identifier according to formula (2):
  • EPP target value/255 is the EPO gear target value
  • offset2 represents the EPO gear step value
  • formula (2) can be used to quickly determine the EPO Gear value closest to the EPO Gear target value in the third corresponding relationship, so that the target EPO policy identifier can be quickly determined without traversing the query policy table.
  • the third correspondence relationship improves the efficiency of information translation.
  • determining the second scheduling strategy information based on the current scenario information and the first scheduling strategy information includes: determining the data type of the second scheduling strategy information based on the current scenario information; and obtaining the target parameters included in the data type. ; Obtain the initial parameters in the first scheduling strategy information; assign values to the target parameters according to the fourth correspondence and the values of the initial parameters, and obtain the second scheduling strategy information; the fourth correspondence includes at least one parameter in the target parameters and the initial Correspondence of at least one of the parameters.
  • the data type of the second scheduling information represents the type of resource scheduling performed by the electronic device.
  • the target parameters represent the parameter types required by the second type of CPU chip platform when executing resource scheduling corresponding to the first scheduling policy information in the current scenario.
  • the target parameter is assigned a value to obtain the second scheduling strategy information.
  • the obtained second scheduling strategy parameters can be recognized by the second type of CPU chip platform, so that the second type The CPU chip is capable of performing resource scheduling.
  • the initial parameters include PL1 and short-term turbo power consumption (power limit1, PL2)
  • the target parameters include sustained power limit (sustained power limit, SPL) and slow packet power tracking limit (slow PPT limit).
  • SPPT sustained power limit
  • the fourth correspondence includes the correspondence between SPL and PL1, and the correspondence between SPPT and PL2; according to the fourth correspondence and the value of the initial parameter, the target parameter is assigned a value to obtain the second scheduling policy information, including: Assign the value of PL1 to SPL, assign the value of PL2 to SPPT, and obtain the second scheduling policy information.
  • the first scheduling policy information also includes the EPP target value
  • resource scheduling is performed on the electronic device through the second type of CPU according to the second scheduling policy information, including: according to the value of SPL and the value of SPPT, The power of the CPU is adjusted through the second type of CPU; the energy efficiency ratio of the CPU is adjusted through the second type of CPU according to the EPP target value.
  • resource scheduling is performed on the electronic device through the second type of CPU according to the second scheduling policy information, including: obtaining third scheduling policy information, where the third scheduling policy information is an embedded controller ( Scheduling strategy information generated by Embedded Controller (EC); determine the final scheduling strategy information based on the second scheduling strategy information and the third scheduling strategy information; when the chip platform type of the CPU of the electronic device is the second type,
  • the method also includes: obtaining a data level of the first scheduling strategy information based on the current scene information; the data level represents the importance of the second scheduling strategy information in the process of determining the final scheduling strategy information based on the second scheduling strategy information and the third scheduling strategy information. degree.
  • data levels can include low level, normal level and high level.
  • the low level indicates that in the process of deciding the final scheduling policy information based on the second scheduling policy information and the third scheduling policy information, the second scheduling policy information has the lowest importance level or priority level.
  • the second scheduling strategy information can be ignored in the process of deciding the final scheduling strategy information based on the second scheduling strategy information and the third scheduling strategy information, and the decision can be made based only on the third scheduling strategy information. Output the final scheduling policy information.
  • the normal level indicates that in the process of deciding the final scheduling policy information based on the second scheduling policy information and the third scheduling policy information, the importance level or priority level of the second scheduling policy information is medium, which is equivalent to the importance of the third scheduling policy information.
  • the second scheduling strategy information and the third scheduling strategy information are compared or integrated to obtain the final scheduling strategy information.
  • the high level indicates that in the process of deciding the final scheduling policy information based on the second scheduling policy information and the third scheduling policy information, the second scheduling policy information has the highest importance level or priority level.
  • the third scheduling strategy information can be ignored in the process of deciding the final scheduling strategy information based on the second scheduling strategy information and the third scheduling strategy information, and the decision can be made based only on the second scheduling strategy information. Output the final scheduling policy information.
  • the method further includes: obtaining a vendor identification (VID) of the CPU chip of the electronic device; and determining the chip platform type of the CPU of the electronic device based on the VID.
  • VIP vendor identification
  • the chip platform type of the CPU can be determined simply and quickly through VID, thereby improving the efficiency of information translation.
  • the present application provides a device, which is included in an electronic device and has the function of realizing the behavior of the electronic device in the above-mentioned first aspect and possible implementations of the above-mentioned first aspect.
  • Functions can be implemented by hardware, or by hardware executing corresponding software.
  • Hardware or software includes one or more modules or units corresponding to the above functions. For example, receiving module or unit, processing module or unit, etc.
  • this application provides an electronic device.
  • the electronic device includes: a processor, a memory, and an interface; the processor, the memory, and the interface cooperate with each other to enable the electronic device to execute any method in the technical solution of the first aspect.
  • this application provides a chip including a processor.
  • the processor is configured to read and execute the computer program stored in the memory to perform the method of the first aspect and any possible implementation thereof.
  • the chip also includes a memory, and the memory is connected to the processor through circuits or wires.
  • the chip also includes a communication interface.
  • this application provides a computer-readable storage medium.
  • a computer program is stored in the computer-readable storage medium.
  • the processor is caused to execute any one of the technical solutions of the first aspect. method.
  • the present application provides a computer program product.
  • the computer program product includes: computer program code.
  • the computer program code When the computer program code is run on an electronic device, it causes the electronic device to execute any method in the technical solution of the first aspect.
  • Figure 1 is a schematic structural diagram of an electronic device 100 provided by an embodiment of the present application.
  • Figure 2 is a software structure block diagram of another electronic device 100 provided by an embodiment of the present application.
  • Figure 3 is a schematic workflow diagram of an example of software and hardware scheduling of resources by the electronic device 100 provided by the embodiment of the present application;
  • Figure 4 is a schematic flowchart of an example of an information processing method and power consumption scheduling based on translation results provided by an embodiment of the present application;
  • FIG. 5 is a schematic diagram of the interaction of various modules of the electronic device in an example of the information processing method provided by the embodiment of the present application;
  • Figure 6 is a schematic flow chart of an example of determining the DTT policy number and the EPO policy number provided by the embodiment of the present application;
  • Figure 7 is a schematic flowchart of an example of translating first CPU power consumption scheduling information into second CPU power consumption scheduling information provided by an embodiment of the present application
  • FIG. 8 is a schematic structural diagram of an example chip system provided by an embodiment of the present application.
  • first”, “second” and “third” are used for descriptive purposes only and shall not be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Thus, features defined as “first”, “second”, and “third” may explicitly or implicitly include one or more of these features.
  • Long-term turbo power consumption refers to the power consumption of the CPU under normal load, which is equivalent to the thermal design power consumption.
  • the CPU's operating power consumption does not exceed PL1 most of the time.
  • Short-term turbo power consumption (power limit2, PL2) refers to the highest power consumption that the CPU can achieve in a short period of time, which has a duration limit. Generally, PL2 is larger than PL1.
  • CPU energy efficiency ratio is used to reflect the scheduling tendency of the CPU, and its value range is 0 ⁇ 255. The smaller the CPU energy efficiency ratio, the CPU tends to have high performance; the higher the CPU energy efficiency ratio, the CPU tends to have low power consumption.
  • DTT Dynamic tuning technology
  • processor and Technology that automatically and dynamically allocates power consumption between independent graphics cards to optimize performance and extend battery life. It can improve CPU and GPU performance and intelligently balance workloads for mixed workloads.
  • EPO Gear Energy efficiency-performance optimization gear
  • EPP CPU energy efficiency ratio
  • the value range of EPO Gear can be 1 to 5. The larger the value, the more energy-efficient the EPP adjustment is. The smaller the value, the more performance-oriented EPP adjustment is.
  • Vendor identification also known as vendor ID, represents the identification code of the technology manufacturer of the device, that is, the manufacturer ID. VID is uniformly compiled and named by the peripheral component interconnect special interest group (PCI-SGI). It is a unique manufacturer identification and no duplicate names are allowed.
  • PCI-SGI peripheral component interconnect special interest group
  • Focus window refers to the window that has focus.
  • the focused window is the only window that can receive keyboard input.
  • the way the focus window is determined is related to the system's focus mode.
  • the top-level window of the focused window is called the active window. Only one window can be active at a time. The focus window is most likely the window that the user currently needs to use.
  • Focus mode can be used to determine how the mouse brings focus to a window.
  • focus modes can include three types, namely:
  • Focus follows the mouse (focus-follow-mouse).
  • the window under the mouse can gain focus. That is, when the mouse moves within the scope of a window that can obtain focus, the user can activate the window and receive keyboard input without clicking somewhere in the window, but the window is not necessarily placed at the front of all windows. When the mouse moves out of the scope of this window, this window will also lose focus.
  • this focus mode is similar to focus-follow-mouse: when the mouse moves within the range of a window that can get focus, the user does not need to click somewhere in the window to activate this A window that receives keyboard input, but the window is not necessarily placed at the front of all windows. Different from focus-follow-mouse, when the mouse moves out of the scope of this window, the focus will not change accordingly. The system focus will only change when the mouse moves to other windows that can receive focus.
  • a process includes multiple threads, and threads can create windows.
  • the focus process is the process to which the thread that created the focus window belongs.
  • Translation refers to converting a certain form of data or information to obtain another form of data or information, which can be recognized by the designated platform.
  • the electronic device can translate the obtained policy parameters to obtain parameters that can be recognized by a certain type of CPU chip platform.
  • a resource scheduling method that identifies the user scenario corresponding to the business currently processed by the electronic device and determines the resource scheduling strategy based on the user scenario and the system load of the electronic device.
  • the CPU schedules the resources based on the resource scheduling strategy. , thereby improving the performance and battery life of electronic devices.
  • different electronic devices may use different CPUs, and the types of CPU chip platforms may be different. Therefore, before the CPU performs resource scheduling based on the resource scheduling policy, the resource scheduling policy needs to be translated.
  • the present application provides an information processing method. After the electronic device determines the user scenario in which the electronic device is currently located and the scheduling policy corresponding to the user scenario, it can perform the scheduling policy according to the chip platform type of the CPU of the electronic device. Translation to adapt to different types of CPU chip platforms, so that this method of dynamic resource scheduling based on user scenarios can be applied to different electronic devices, improve the compatibility of the resource scheduling method, and thus improve the performance of different types of electronic devices. Performance and battery life.
  • the information processing method provided by the embodiment of the present application can be applied to notebook computers, ultra-mobile personal computers (UMPC), netbooks, and personal digital assistants. PDA), mobile phones, tablets, wearable devices, vehicle-mounted devices, augmented reality (AR)/virtual reality (VR) devices and other electronic devices.
  • PDA ultra-mobile personal computers
  • AR augmented reality
  • VR virtual reality
  • the embodiments of this application do not make any specific types of electronic devices. limit.
  • FIG. 1 is a schematic structural diagram of an electronic device 100 provided by an embodiment of the present application.
  • the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, and a wireless communication module 150. Display 160 etc.
  • the structure illustrated in this embodiment does not constitute a specific limitation on the electronic device 100 .
  • the electronic device 100 may include more or fewer components than illustrated, some components may be combined, some components may be separated, or components may be arranged differently.
  • the components illustrated may be implemented in hardware, software, or a combination of software and hardware.
  • the processor 110 may include one or more processing units.
  • the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processing unit (GPU), an image signal processor ( image signal processor (ISP), controller, memory, video codec, digital signal processor (digital signal processor, DSP), baseband processor, and/or neural network processing unit (NPU), etc.
  • application processor application processor, AP
  • modem processor graphics processing unit
  • GPU graphics processing unit
  • ISP image signal processor
  • controller memory
  • video codec digital signal processor
  • DSP digital signal processor
  • NPU neural network processing unit
  • different processing units can be independent devices or integrated in one or more processors.
  • the controller may be the nerve center and command center of the electronic device 100 .
  • the controller can generate operation control signals based on the instruction operation code and timing signals to complete the control of fetching and executing instructions.
  • the processor 110 may also be provided with a memory for storing instructions and data.
  • the memory in processor 110 is cache memory. This memory may hold instructions or data that have been recently used or recycled by processor 110 . If the processor 110 needs to use the instructions or data again, it can be called directly from the memory. Repeated access is avoided and the waiting time of the processor 110 is reduced, thus improving the efficiency of the system.
  • processor 110 may include one or more interfaces.
  • the interface can include I2C interface, integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, pulse code modulation (PCM) interface, universal asynchronous receiver/transmitter (UART) interface, mobile industry Processor interface (mobile industry processor interface, MIPI), general-purpose input/output (GPIO) interface, subscriber identity module (subscriber identity module, SIM) interface, and/or USB interface, etc.
  • the interface connection relationships between the modules illustrated in this embodiment are only schematic illustrations and do not constitute a structural limitation of the electronic device 100 .
  • the electronic device 100 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.
  • the charging management module 140 is used to receive charging input from the charger.
  • the charger can be a wireless charger or a wired charger. While the charging management module 140 charges the battery 142, it can also provide power to the electronic device through the power management module 141.
  • the power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110.
  • the power management module 141 receives input from the battery 142 and/or the charging management module 140, and supplies power to the processor 110, internal memory 121, external memory, display screen 160, wireless communication module 150, etc.
  • the power management module 141 and the charging management module 140 may also be provided in the same device.
  • the wireless communication module 150 can provide technologies applied to the electronic device 100 including WLAN (such as Wi-Fi), Bluetooth, global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), short-range wireless communication technology ( Near field communication (NFC), infrared technology (infrared, IR) and other wireless communication solutions.
  • WLAN such as Wi-Fi
  • Bluetooth global navigation satellite system
  • GNSS global navigation satellite system
  • FM frequency modulation
  • FM frequency modulation, FM
  • NFC Near field communication
  • infrared technology infrared, IR
  • the wireless communication module 150 may be one or more devices integrating at least one communication processing module.
  • the wireless communication module 150 receives electromagnetic waves via an antenna, frequency modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110 .
  • the wireless communication module 150 can also receive the signal to be sent from the processor 110, perform frequency modulation on it, amplify it, and convert it into electromagnetic waves through the antenna for radiation.
  • the electronic device 100 implements display functions through a GPU, a display screen 160, an application processor, and the like.
  • the GPU is an image processing microprocessor and is connected to the display screen 160 and the application processor. GPUs are used to perform mathematical and geometric calculations for graphics rendering.
  • Processor 110 may include one or more GPUs that execute program instructions to generate or alter display information.
  • the display screen 160 is used to display images, videos, etc.
  • the display screen 160 includes a display panel.
  • the external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100.
  • the external memory card communicates with the processor 110 through the external memory interface 120 to implement the data storage function. Such as saving music, videos, etc. files in external memory card.
  • Internal memory 121 may be used to store computer executable program code, which includes instructions.
  • the processor 110 executes instructions stored in the internal memory 121 to execute various functional applications and data processing of the electronic device 100 .
  • the processor 110 can execute instructions stored in the internal memory 121, and the internal memory 121 can include a program storage area and a data storage area.
  • the stored program area can store an operating system, at least one application program required for a function (such as a sound playback function, an image playback function, etc.).
  • the storage data area may store data created during use of the electronic device 100 (such as audio data, phone book, etc.).
  • the internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.
  • the software system of the above-mentioned electronic device 100 may adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservice architecture, or a cloud architecture.
  • This embodiment of the present invention takes a Windows system with a layered architecture as an example to illustrate the software structure of the electronic device 100 .
  • FIG. 2 is a software structure block diagram of an example electronic device 100 according to the embodiment of the present application.
  • the layered architecture divides the software into several layers, and each layer has clear roles and division of labor.
  • the layers communicate through software interfaces.
  • the Windows system is divided into user mode and kernel mode.
  • user mode includes application layer and subsystem dynamic link library.
  • the kernel state is divided into firmware layer, hardware abstraction layer (HAL), kernel and driver layer and execution body from bottom to top.
  • HAL hardware abstraction layer
  • the application layer includes music, video, games, office, social networking and other applications.
  • the application layer also includes the environment subsystem, scene recognition engine, and scheduling engine. Among them, only some applications are shown in the figure, and the application layer may also include other applications, such as shopping applications, browsers, etc., which are not limited in this application.
  • the environment subsystem can present certain subsets of basic execution system services to applications in a specific form, providing an execution environment for applications.
  • the scene recognition engine can identify the user scene in which the electronic device 100 is located, and determine the basis matching the user scene.
  • basic scheduling strategy The scheduling engine can obtain the load condition of the electronic device 100 and determine an actual scheduling strategy that is consistent with the actual operating conditions of the electronic device 100 based on the load condition of the electronic device 100 and the above-mentioned basic scheduling strategy. Among them, the specific content of the scene recognition engine and scheduling engine will be found later and will not be described here.
  • the subsystem dynamic link library includes API modules, which include Windows API, Windows native API, etc.
  • Windows API and Windows native API can provide system call entry and internal function support for applications.
  • Windows native API is an API native to the Windows system.
  • Windows API can include user.dll, kernel.dll, and Windows native API can include ntdll.dll.
  • user.dll is the Windows user interface interface, which can be used to perform operations such as creating windows and sending messages.
  • kernel.dll is used to provide an interface for applications to access the kernel.
  • ntdll.dll is an important Windows NT kernel-level file that describes the Windows local NTAPI interface. When Windows starts, ntdll.dll resides in a specific write-protected area of memory so that other programs cannot occupy this memory area.
  • the execution body includes process manager, virtual memory manager, security reference monitor, I/O manager, Windows management instrumentation (WMI), power manager, operating system event driver (OsEventDriver) node , system and chip driver (operatingsystem to System on Chip, OS2SOC) nodes, etc.
  • WMI Windows management instrumentation
  • OsEventDriver operating system event driver
  • the process manager is used to create and terminate processes and threads.
  • the virtual memory manager implements "virtual memory".
  • the virtual memory manager also provides basic support for the cache manager.
  • the Security Reference Monitor enforces security policies on the local computer, protects operating system resources, and performs runtime object protection and monitoring.
  • the I/O manager performs device-independent input/output and calls the appropriate device driver for further processing.
  • Power Manager manages power state changes for all devices that support power state changes.
  • the system event driver node can interact with the kernel and driver layer, for example, with the graphics card driver. After determining that a GPU video decoding event exists, it reports the GPU video decoding event to the scene recognition engine.
  • System and chip driver nodes allow the scheduling engine to send adjustment information to hardware devices, such as sending information to adjust PL1 and PL2 to the CPU.
  • the kernel and driver layer include the kernel and device drivers.
  • the kernel is an abstraction of the processor architecture, which isolates the differences between the execution body and the processor architecture to ensure the portability of the system.
  • the kernel can perform thread arrangement and scheduling, trap handling and exception scheduling, interrupt handling and scheduling, etc.
  • Device drivers run in kernel mode and are the interface between the I/O system and related hardware.
  • Device drivers can include graphics card drivers, Intel DTT drivers, mouse drivers, audio and video drivers, camera drivers, keyboard drivers, etc.
  • the graphics card driver can drive the GPU to run
  • the Intel DTT driver can drive the CPU to run.
  • HAL is a core module that can hide various hardware-related details, such as I/O interfaces, interrupt controllers, and multi-processor communication mechanisms. It provides a unified service interface for different hardware platforms running Windows and implements a variety of Portability across hardware platforms. It should be noted that in order to maintain the portability of Windows, Windows internal components and user-written device drivers do not access the hardware directly, but by calling routines in the HAL.
  • the firmware layer can include the basic input output system (BIOS).
  • BIOS is a set of programs solidified into a read only memory (ROM) chip on the computer motherboard. It stores the most important basic information of the computer. Input and output programs, self-test programs after power-on and system self-starting programs, which can be complementary Detailed information on reading and writing system settings in complementary metal oxide semiconductor (CMOS). Its main function is to provide the lowest and most direct hardware settings and control for the computer.
  • CMOS complementary metal oxide semiconductor
  • the Intel DTT driver can send instructions to the CPU through the BIOS.
  • FIG. 3 shows a schematic workflow diagram of an example of software and hardware for scheduling resources by the electronic device 100 .
  • the scene recognition engine of the application layer may include a system probe module, a scene recognition module and a basic policy matching manager.
  • the scene recognition module can interact with the system probe module and the basic policy matching manager respectively.
  • the scene recognition module can send a request to obtain the probe status to the system probe module.
  • the system probe module can obtain the operating status of the electronic device 100 .
  • the system probe module may include a power status probe, a peripheral status probe, a process load probe, an audio and video status probe, a system load probe, a system event probe, etc.
  • the power status probe can subscribe to the power status event from the kernel state and determine the power status according to the callback function fed back by the kernel state.
  • the power status includes battery (remaining) power, power mode, etc.
  • the power mode can include alternating current (AC). ) and direct current (DC).
  • the power status probe can send a request to subscribe to the power status event to the OsEventDriver node of the execution body layer, and the OsEventDriver node forwards the request to the power manager of the execution body layer.
  • the power manager can feedback the callback function to the power status probe through the OsEventDriver node.
  • Peripheral status probes can subscribe to peripheral events from the kernel state and determine peripheral events based on the callback function fed back by the kernel state.
  • Peripheral events include mouse wheel sliding events, mouse click events, keyboard input events, microphone input events, camera input events, etc.
  • the process load probe can subscribe to the process load in the kernel state and determine the process load based on the callback function fed back by the kernel state.
  • the system load probe can subscribe to the system load in the kernel state and determine the system load based on the callback function fed back by the kernel state.
  • the audio and video status probe can subscribe to audio and video events in the kernel state, and determine the audio and video events currently existing in the electronic device 100 based on the callback function fed back by the kernel state.
  • Audio and video events may include GPU decoding events, etc.
  • the audio and video status probe can send a request to subscribe to the GPU decoding event to the OsEventDriver node at the execution layer, and the OsEventDriver node forwards the request to the graphics card driver at the kernel and driver layers.
  • the graphics card driver can monitor the status of the GPU. After monitoring that the GPU is performing a decoding operation, it will feed back the callback function to the audio and video status probe through the OsEventDriver node.
  • System event probes can subscribe to system events from the kernel state and determine system events based on the callback function fed back by the kernel state.
  • System events can include window change events, process creation events, thread creation events, etc.
  • the system event probe can send a request to subscribe to the process creation event to the OsEventDriver node at the execution layer, and the OsEventDriver node forwards the request to the process manager.
  • the process manager can feedback the callback function to the system event probe through the OsEventDriver node.
  • the system event probe also sends the subscription focus window change event to the API module.
  • the API module can monitor whether the focus window of the electronic device 100 changes, and when monitoring that the focus window changes, feed back the callback function to the system event probe.
  • the system probe module obtains the probe status by subscribing to various events of the electronic device 100 in the kernel state, and then determining the operating status of the electronic device 100 based on the callback function fed back by the kernel state. After the system probe module obtains the probe status, it can feed back the probe status to the scene recognition module. After receiving the probe status, the scene recognition module can determine the user scene in which the electronic device 100 is located based on the probe status.
  • user scenarios can include main scenarios and sub-scenarios, with sub-scenarios being subdivided scenarios under the main scenario.
  • the main scene can include video scenes, game scenes, office scenes, social scenes, idle scenes, etc.
  • Video scenes refer to scenes where users use electronic devices to watch videos.
  • Sub-scenes corresponding to the video scene may include video playback scenes, video browsing scenes, etc.
  • Game scenarios refer to scenarios where users use electronic devices to play games.
  • Sub-scenes corresponding to game scenes may include scenes in the game, etc.
  • Office scenarios refer to scenarios where users use electronic devices to work.
  • Sub-scenarios corresponding to office scenarios can include document editing scenarios, document browsing scenarios, video conferencing scenarios, etc.
  • Social scenarios refer to scenarios where users use electronic devices to socialize.
  • Sub-scenes corresponding to social scenes can include text chat scenes, voice chat scenes, video chat scenes, etc.
  • the idle scene refers to the scene where the user does not perform any operations on the electronic device. Idle scenes may not include sub-scenes. Scenes other than the above video scenes, game scenes, office scenes, social scenes and idle scenes are defined as default scenes, and the default scenes may not include sub-scenes.
  • User scenarios can reflect users’ current usage needs. For example, when the scene recognition engine recognizes that the focus window is the window of a video playback application, it determines that the main scene where the electronic device 100 is located is the video scene and the sub-scene is the video playback scene, indicating that the user needs to use the video application to watch and browse videos. For another example, when the scene recognition engine recognizes that the focus window is the text chat window of WeChat TM , it determines that the main scene where the electronic device 100 is located is the social scene and the sub-scene is the text chat scene.
  • the scenario identification module may also send the user scenario to the underlying policy matching manager.
  • the basic policy matching manager can determine the basic scheduling policy according to the user scenario.
  • the basic policy matching manager can feed back the basic scheduling policy to the scene recognition module.
  • the scene recognition module can send the basic scheduling policy and user scenarios to the scheduling engine of the application layer.
  • the scheduling engine includes a load controller, a chip policy fusion device, and a scheduling executor.
  • the load controller can receive the basic scheduling strategy and user scenarios sent by the scene recognition module.
  • the load controller can also obtain the system load from the system probe module, and adjust the basic scheduling strategy according to the system load and user scenarios to obtain the actual scheduling strategy.
  • the load controller may determine the system load level based on the system load.
  • the system load level can include three levels: light, medium, and heavy.
  • Electronic devices can be pre-configured with actual scheduling strategies corresponding to various user scenarios and various system load levels.
  • the actual scheduling policy may include an OS scheduling policy and a CPU scheduling policy (also called the first scheduling policy).
  • the load controller can send the OS scheduling policy to the scheduling executor, and the scheduling executor performs scheduling based on the OS scheduling policy.
  • OS scheduling policy is used to adjust the process priority and I/O priority of the focus process.
  • the scheduling executor may send an instruction to adjust the process priority of the focus process to the process manager, and in response to the instruction, the process manager adjusts the process priority of the focus process.
  • the scheduling executor may send an instruction to adjust the I/O priority of the focus process to the I/O manager. In response to the instruction, the I/O manager adjusts the I/O priority of the focus process.
  • the CPU scheduling policy refers to the scheduling policy that needs to be delivered to the CPU for execution.
  • the CPU scheduling strategy may include a power consumption scheduling strategy or a performance optimization strategy.
  • the power consumption scheduling policy is used to adjust the parameters of the CPU, GPU or other hardware to achieve power consumption adjustment, for example, adjusting the CPU power limit parameter to adjust the CPU power consumption, or adjusting the CPU energy consumption ratio to adjust the CPU power consumption.
  • Performance optimization strategies are used to adjust the parameters of relevant modules in electronic devices or Working mode, etc. to optimize the performance of electronic devices, for example, performance optimization through system temperature tracking adjustment, performance optimization by adjusting fan speed or sound, or performance optimization by adjusting the BIOS working mode, etc.
  • the load controller can send the user scenario and CPU scheduling policy to the chip policy fusion device.
  • the chip policy fusion device translates the CPU scheduling policy according to the chip platform type and user scenario of the CPU to obtain the translated scheduling policy.
  • the chip policy fusion device delivers the translated scheduling policy to the scheduling executor.
  • the scheduling executor can deliver the translated scheduling policy to the CPU through at least one of the OS2SOC driver nodes, WMI, power manager, BIOS, etc. , resource scheduling is implemented by the CPU.
  • the user scenario can be characterized by scenario information.
  • the scenario information can include, for example, a scenario number, a scenario name, etc.
  • the CPU scheduling policy may be characterized by CPU scheduling policy information, which may include, for example, scheduling parameters, scheduling data, etc.
  • the scene information is used as the scene number
  • the CPU scheduling policy information (first scheduling policy information) is used as the first CPU power consumption scheduling information as an example for explanation, where the first CPU power consumption scheduling The information is used to adjust the CPU's power consumption parameters.
  • Other types of CPU scheduling policy information are similar to this and will not be described again.
  • a CPU used in electronic equipment can be (Advanced Micro Devices, AMD) CPU, the chip platform type is AMD; the CPU used in electronic equipment can also be CPU, chip platform type is
  • AMD Advanced Micro Devices
  • chip platform type is
  • These two types of chip platforms adjust CPU power consumption in different ways, so they need to be distinguished.
  • the following embodiments take these two chip platform types as examples to illustrate the information processing method.
  • FIG. 4 is a schematic flowchart of an example of a method for information processing and power consumption scheduling based on translation results provided by an embodiment of the present application.
  • the execution subject of this method is an electronic device.
  • the execution subject can It is the scheduling engine described in the above embodiment.
  • FIG. 5 is a schematic diagram of the interaction of various modules of the electronic device in an example of the information processing method provided by the embodiment of the present application. Please refer to Figure 4 and Figure 5 together.
  • the information processing method may include:
  • the electronic device can deliver the scene number and the first CPU power consumption scheduling information to the chip policy fusion device through the load manager.
  • Scenario numbers are used to characterize user scenarios.
  • the scene number may be composed of numbers, characters, symbols, etc., and this embodiment of the present application does not impose any limitation on this.
  • a unique corresponding relationship between each main scene and the main scene number can be established in advance, and a unique corresponding relationship between each sub-scene and the sub-scene number can be established in advance.
  • the number corresponding to the main scene and the number corresponding to the sub-scene constitute the final scene number. For example, if the main scene is a video scene and the corresponding main scene number is 4, and the sub-scene is a video playback scene and the corresponding sub-scene number is 1, then the scene number corresponding to the user scene can be 4-1. For another example, the scene number corresponding to the default scene may be -1.
  • the first CPU power consumption scheduling information is used to characterize the adjustment method of parameters related to CPU power consumption.
  • the first CPU power consumption scheduling information may include parameters and target values of the parameters.
  • the parameters in the first CPU power consumption scheduling information may include PL1, PL2, EPP and EPO switch status, etc.
  • the target values of the parameters may include the target value of PL1, the target value of PL2, EPP The target value and information characterizing the EPO switch state, etc.
  • EPO switch Used to select whether to turn on the DTT adjustment function when the chip platform type of the CPU is Inter, that is, whether to adjust the power consumption of the CPU through DTT technology according to EPO Gear.
  • the switch state of EPO can include on state and off state.
  • the DTT adjustment function When the EPO switch is on, the DTT adjustment function is turned on, and the CPU adjusts EPP through DTT technology based on the EPO Gear corresponding to the EPP target value (which can be calculated based on the EPP target value).
  • the EPO switch When the EPO switch is turned off, that is, the DTT adjustment function is turned off, the CPU does not perform DTT adjustment, and the system can directly adjust EPP according to the EPP target value. In this case, the EPP target value can be directly sent to the CPU.
  • whether the EPO switch is on can be determined by the return value of the EPO switch status. For example, a return value of 1 indicates that the EPO switch is on, and a return value of 0 indicates that the EPO switch is on.
  • Different scene numbers and different system load levels correspond to different first CPU power consumption scheduling information.
  • the corresponding relationship between the scene number, the system load level and the first CPU power consumption scheduling information can be as shown in Table 1.
  • user scenarios, parameters in the first CPU power consumption scheduling information and the target values corresponding to the parameters in Table 1 are only examples and do not represent the actual situation, nor do they constitute any limitation on this application.
  • user scenarios may include more or fewer types than Table 1.
  • user scenarios may also include idle scenarios, performance measurement scenarios, etc.
  • the first CPU power consumption scheduling information may also include more parameters than Table 1.
  • S402. Determine the chip platform type of the CPU of the electronic device; if the chip platform type of the CPU is (also called the first type), then execute steps S403 and S404; if the chip platform type of the CPU is AMD (also called the second type), then execute steps S405 to S407.
  • the chip policy fusion device can obtain the VID return value from the VID interface in the OS2SOC driver node and determine the chip platform type of the CPU based on the VID return value.
  • the VID return value is 0x8086, indicating that the chip platform type of the CPU is
  • the return value of the VID interface is 0x1022, which indicates that the chip platform type of the CPU is AMD.
  • the strategy number is used to identify the CPU's strategy for adjusting power consumption.
  • policy identifiers such as policy names, can also be used to identify the CPU power consumption adjustment strategy. As long as different strategies can be distinguished, they can be identified. Just identify the platform.
  • the policy number may include a DTT policy number and an EPO policy number.
  • the DTT policy number is also called the DTT policy ID and is used to identify the DTT policy.
  • the DTT policy corresponding to the DTT policy number is used to adjust the values of PL1 and PL2 of the CPU.
  • the EPO policy number also called the EPO policy ID, is used to identify the EPO policy.
  • the EPO policy corresponding to the EPO policy number is used to adjust the EPP of the CPU.
  • a policy table can be built in the BIOS in advance to store the correspondence between the DTT policy number or EPO policy number and the values of the CPU's PL1, PL2, and EPO parameters.
  • the policy table may be as shown in Table 2. It can be understood that the DTT policy number and the EPO policy number can be distinguished by numbers. For example, in Table 2, policy numbers 0 to 21, 40, and 41 represent DTT policy numbers, and policy numbers 50 to 55 represent EPO policy numbers. In addition, please refer to the remarks in Table 2.
  • the user scenarios corresponding to 0, 41 and 42 are the default scenarios. These three policy numbers are also called the default policy numbers.
  • the DTT policy numbers except the default policy number are Other policy numbers are the policy numbers corresponding to non-default scenarios, also called non-default policy numbers.
  • Table 2 the correspondence between the default policy number and the values of the PL1 and PL2 parameters of the CPU and the system load level is also called the first correspondence. Non-default policy number and PL1 of CPU The correspondence between the values of the PL2 parameters is also called the second correspondence.
  • the correspondence between the EPO policy number and the EPO Gear value is also called the third correspondence.
  • the value of EPO Gear can represent the state of the EPO switch. In a specific embodiment, the value of EPO Gear is 0, indicating that the EPO switch is in a closed state, and the value of EPO Gear is 1, 2, 3, 4 or 5, indicating that the EPO switch is in an open state.
  • Table 2 is only an example and does not constitute a limitation on the policy table.
  • the policy table The content may include more or less content than in Table 2, and each policy number and corresponding parameter value may be different from those in Table 2.
  • the chip platform type of the CPU is In the case of , the chip policy fusion device can determine the corresponding policy number based on the scene number and the first CPU power consumption scheduling information. The specific method will be elaborated in subsequent embodiments.
  • the chip platform type of the CPU is In this case, the chip policy fusion device can deliver the policy number to the scheduling executor, and the scheduling executor delivers the policy number to the BIOS through WMI.
  • the BIOS delivers the policy number to the CPU, and the CPU runs based on the policy number.
  • the CPU power consumption parameters defined in the AMD platform are of different types from the parameters in the first CPU power consumption scheduling information.
  • the parameter defined in the AMD platform to characterize short-term Turbo frequency power consumption is sustained power limit (SPL)
  • the parameter to characterize long-term Turbo frequency power consumption is SPPT. That is to say, among the parameters defined in the AMD platform, the parameter corresponding to PL1 in the first CPU power consumption scheduling information is SPL, and the parameter corresponding to PL2 is the slow packet power tracking limit (slow PPT limit, SPPT), where, PPT It is the abbreviation of package power tracking.
  • SPL sustained power limit
  • SPPT slow packet power tracking limit
  • the chip policy fusion device can determine the CPU power consumption parameters defined in the AMD platform that need to be adjusted based on the scene number, and match the power consumption parameters of the CPU defined in the AMD platform with the scene number.
  • the corresponding relationship between the parameters in the CPU power consumption scheduling information is to assign the target value in the first CPU power consumption scheduling information to the corresponding power consumption parameter in the AMD platform to obtain the second CPU power consumption scheduling information.
  • the chip policy fusion device assigns the PL1 target value to SPL and the PL2 target value to SPPT to obtain the second CPU power consumption scheduling information. For details, see the examples described below.
  • the second CPU power consumption scheduling information may not include parameters representing the energy efficiency ratio. That is to say, the EPP in the first CPU power consumption scheduling information does not need to be translated and can be directly sent to the CPU. For details, see step S407.
  • the chip policy fusion device may deliver the second CPU power consumption scheduling information to the scheduling executor.
  • the scheduling executor may deliver the second CPU power consumption scheduling information to the BIOS through WMI.
  • the BIOS delivers the second CPU power consumption scheduling information to the CPU, and the CPU adjusts the power consumption parameters according to the second CPU power consumption scheduling information.
  • the chip policy fusion device can send the EPP target value to the scheduling executor, and the scheduling executor calls the corresponding interface in the power manager, and through the power manager Send the EPP target value to the CPU.
  • the CPU adjusts the CPU's EPP based on the EPP target value.
  • the power manager is also called the processor power module (PPM).
  • the method provided in this embodiment obtains the scene number of the user scene and the scene number corresponding to the first CPU power consumption scheduling information, and determines the chip platform type of the CPU of the electronic device. According to the different chip platform types of the CPU, the first CPU The parameters in the power consumption scheduling information are translated differently to adapt to different types of CPU chip platforms, so that this method of dynamic resource scheduling based on user scenarios can be applied to different electronic devices, improve the compatibility of the method, and then be able to Improve the performance and battery life of different types of electronic devices.
  • the chip platform types of the CPU are as follows: In the case of AMD, the method of translating the first CPU power consumption scheduling information will be described in detail.
  • the chip platform type of the CPU is In the case of , the chip policy fusion device determines the target policy number corresponding to the current first CPU power consumption scheduling information according to the pre-established policy table.
  • a mapping relationship between the policy number and the first CPU power consumption scheduling information can be established based on the first CPU power consumption scheduling information corresponding to each scene number, that is, The policy number corresponds one-to-one with the first CPU power consumption scheduling information.
  • the target policy number corresponding to the current first CPU power consumption scheduling information can be directly determined. If this method is adopted, the policy table needs to be expanded as user scenarios and first CPU power consumption scheduling information increase. Each time a set of first CPU power consumption scheduling information is added, the policy table in the BIOS needs to be expanded. Inconvenient operation.
  • the capacity of the policy table in the BIOS is limited.
  • Each user scenario will have multiple sets of first CPU power consumption scheduling information depending on the system load level (see Table 1). Therefore, as the number of identifiable user scenarios continues to increase, , the policy table will not be able to meet the expansion needs in the future.
  • the information processing method provided in this embodiment determines, based on the first CPU power consumption scheduling information, the policy number corresponding to the PL1 value closest to the PL1 target value in the policy table, and the EPO Gear value closest to the EPO Gear in the policy table The corresponding policy number is used to determine the target policy number. In this way, the number of expansions of the policy table can be reduced, BIOS capacity can be saved, and the policy table can be ensured to be relatively fixed, making operation and maintenance easier.
  • step S403 is to translate the first CPU power consumption scheduling information and output the policy number, including:
  • the target EPO policy number is determined according to the state of the EPO switch and the EPP target value in the first CPU power consumption scheduling information.
  • the chip policy fusion device can determine the PL1 value in the policy table that is closest to the PL1 target value in the first CPU power consumption scheduling information, and determine the policy number corresponding to the closest PL1 value in the policy table as the target DTT policy. Number.
  • the chip platform type of the CPU is: In the case of , ignore PL2 and determine the target DTT strategy number only through the PL1 target value, thereby simplifying the algorithm and improving the efficiency of information translation.
  • the preset EPO strategy number is directly determined as the target EPO strategy number, and the preset EPO strategy number is used to indicate turning off the DTT adjustment function.
  • the chip strategy fusion device can determine the corresponding EPO Gear target value based on the EPP target value, and then determine the EPO Gear value in the strategy table that is closest to the EPO Gear target value, and add it to the strategy table. The strategy number corresponding to the closest EPO Gear value is determined as the target EPO strategy number.
  • FIG. 6 is a schematic flowchart of an example of determining the DTT policy number and the EPO policy number provided by the embodiment of the present application.
  • the execution subject may be the chip policy fusion device shown in Figure 3, which will not be described again.
  • the target DTT policy number and target EPO policy number can be determined according to the following method:
  • Step S601. Determine whether the first CPU power consumption scheduling information is the default policy information; if the first CPU power consumption scheduling policy is the default policy information, execute step S602; if the first CPU power consumption scheduling information is not the default policy information, execute Step S603.
  • the default policy information refers to the CPU power consumption scheduling information corresponding to the default scenario.
  • the scene number it can be determined according to the scene number whether the first CPU power consumption scheduling information is the default policy information. For example, if the scene number of the preset default scene is -1, then the current scene can be judged Whether the number is -1. If so, it indicates that the first CPU power consumption scheduling information is the default policy information. Otherwise, it indicates that the first CPU power consumption scheduling information is not the default policy information.
  • S602. Determine the target DTT policy number according to the system load condition corresponding to the first CPU power consumption scheduling information.
  • the policy table shown in Table 2 includes the policy numbers and power consumption parameters corresponding to the default policies for the three system load levels.
  • the policy number corresponding to the default policy with a system load level of "Heavy” is 0, the policy number corresponding to the default policy with a system load level of "Light” is 40, and the policy number corresponding to the default policy with a system load level of "Medium” is 41 .
  • the corresponding system load level can be determined according to the first CPU power consumption scheduling information, and the policy number corresponding to the default policy of the system load level is determined in the policy table to obtain the target DTT policy number. Specifically, if the system load level corresponding to the first CPU power consumption scheduling information is "heavy”, then determine the target DTT policy number to be 0; if the system load level corresponding to the first CPU power consumption scheduling information is "light”, then determine The target DTT policy number is 40; if the system load level corresponding to the first CPU power consumption scheduling information is "medium”, then the target DTT policy number is determined to be 41.
  • the system load level here can be subscribed to the system load by the chip policy fusion device to the system load probe, and the system load level can be determined based on the system load, or the system load level can be delivered by the load controller along with the scene number to
  • the chip policy fusion device is not limited in the embodiments of this application.
  • the system can also pre-specify a DTT policy number corresponding to a default policy of the system load level (such as a default policy with a load level of "heavy") as the policy number corresponding to all default scenarios. That is to say, as long as the scene number is determined to be -1 and the first CPU power consumption scheduling information is determined to be the default policy information, the specified DTT policy number (for example, 0) is determined as the target DTT policy number without considering the system load. The reason for this is that when the user scenario is the default scenario, the system load is heavy in most cases. Therefore, directly specifying the policy number corresponding to the default policy with a system load level of "heavy" can cover most situations, and It can simplify the information translation process and improve the efficiency of information translation.
  • a default policy of the system load level such as a default policy with a load level of "heavy
  • the PL1 target value in the first CPU power consumption scheduling information can also be determined directly, and if determined The first CPU power consumption scheduling information is the default policy information, and the corresponding policy number can be directly determined.
  • steps S601 and S602 can also be replaced by the following method:
  • the policy number (0) is determined as the target DTT policy number; if not, determine whether the PL1 target value in the first CPU power consumption scheduling information is equal to the PL1 value (12) corresponding to the default policy with the system load level of "light”, If yes, then determine the policy number (40) corresponding to the default policy with the system load level of "light” as the target DTT policy number; if not, determine whether the PL1 target value in the first CPU power consumption scheduling information is equal to the system load level is the value (20) of PL1 corresponding to the default policy of "Medium”. If so, determine the policy number (41) corresponding to the default policy with the system load level of "Medium” as the target DTT policy number.
  • the target DTT policy number is determined according to the following formula (1).
  • step means the PL1 step value in the strategy table (that is, the absolute value of the difference between the PL1 values corresponding to two adjacent DTT strategy numbers).
  • formula (1) can be used to quickly determine the policy number corresponding to the PL1 value in the policy table that is closest to the PL1 target value in the first CPU power consumption scheduling information, so that the target DTT policy can be quickly determined No., there is no need to traverse the query strategy table, which improves the efficiency of information translation.
  • step S604. Determine whether the state of the EPO switch is on. If yes (that is, the state of the EPO switch is on), execute step S605; if not (ie, the state of the EPO switch is on the off state), execute step S606.
  • offset2 indicates the EPO compensation value
  • offset2 can be 50.
  • formula (2) can be used to quickly determine the EPO Gear value in the strategy table that is closest to the EPO Gear target value, so that the target EPO strategy number can be quickly determined without traversing the query strategy table, which improves information translation. efficiency.
  • S606. Determine the preset EPO policy number (50) as the target EPO policy number.
  • the preset EPO policy number is used to indicate turning off the DTT adjustment function.
  • the corresponding EPO policy number is 50, and 50 is directly determined as the target EPO policy number.
  • step S404 may also be performed to adjust the CPU power consumption based on the policy number, which may include the following process:
  • the chip policy fusion device sends the policy number to the scheduling executor, and the scheduling executor sends the policy number to the BIOS through WMI.
  • the BIOS sends the policy number to the CPU, and the CPU runs based on the policy number and adjusts the PL1 of the CPU. and PL2;
  • the chip policy fusion device sends the EPP target value to the scheduling executor, and the scheduling executor calls the power manager
  • the corresponding interface sends the EPP target value to the CPU through the power manager, and the CPU adjusts the EPP of the CPU according to the EPP target value.
  • step S407 For the specific process of 2), please refer to step S407, which will not be described again.
  • a certain policy number in Table 2 can also be designated as a backup policy number in advance.
  • the backup policy number will be delivered to the BIOS by default to ensure normal resource scheduling and improve system stability and reliability.
  • the backup strategy number may be, for example, strategy number 0 in Table 2, and the power parameter corresponding to the backup strategy number also includes the value of EPO Gear.
  • the policy fusion device delivers the backup policy number to the BIOS, and the BIOS delivers the backup policy number to the CPU.
  • the CPU can directly adjust the CPU's PL1, PL2, EPP and other parameters based on the backup policy number.
  • FIG. 7 is a schematic flowchart of an example of translating the first CPU power consumption scheduling information into the second CPU power consumption scheduling information provided by the embodiment of the present application.
  • the above step S405 is to translate the first CPU power consumption scheduling information according to the scene number to obtain the second CPU power consumption scheduling information, including:
  • WMI policy data type also known as WMI policy data type, that is, WMI policy decision date type.
  • the data type is used to represent the type of resource scheduling (or the direction of resource scheduling) of the second scheduling policy information, that is, which type of resource is scheduled.
  • Data types can be predefined by the BIOS.
  • data types can include the following: power limits (power limits) parameters, system temperature tracking (STT) tuning parameters, BIOS fan speed & sound (cool quiet on lap) event notification, BIOS automatic Mode transfer (auto mode transition) event notification (also known as system interrupt event notification), query OS slider event (slider position event), dynamic power slider notification (dynamic power slider notification) event... system reserved.
  • the power limit parameter is used to represent the type of resource scheduling, which is limiting CPU power
  • the system temperature tracking and tuning parameter is used to represent the type of resource scheduling, which is tracking and adjusting system temperature.
  • Other data types will not be described again.
  • the data type can be determined based on the scene number.
  • a mapping relationship between scene numbers and data types can be established in advance, and the data type corresponding to the current scene number is determined based on the mapping relationship.
  • the data type corresponding to scene number 2-1 (the main scene is an office scene and the sub-scene is a document editing scene) is the power limit parameter.
  • a scene number can correspond to one data type or multiple data types.
  • the data type corresponding to a certain scene number may include both power limitation parameters and STT tuning parameters.
  • Each data type may include one or more parameters defined in the AMD chip platform.
  • the second power consumption scheduling information of each data type may include one or more parameters defined in the AMD chip platform.
  • parameter the data type STT tuning parameters include parameters: STT-SkinTempLimit-APU, STT-SkinTempLimit-HS2, STT-M1, STT-M2, STT-M3, STT-M4, STT-M5, STT-M6, etc.
  • the data type power limit parameters include parameters: FPPT, SPPT, SPPT-APUOnly, SPL and STTMinLimint, etc.
  • APU is the abbreviation of Accelerated Processing Units
  • FPPT is the fast full package power tracking limit fast PPT. Abbreviation for limit.
  • the chip policy fusion device can pre-establish a mapping relationship between each data type and included parameters, determine the parameters included in the data type of the current second CPU power consumption scheduling information based on the mapping relationship, and obtain the target parameters.
  • the parameters included in the first scheduling policy information are also called initial parameters.
  • the initial parameters included in the first CPU power consumption scheduling information may include PL1, PL2, EPP, switch status, etc.
  • the correspondence relationship between the target parameter and the initial parameter included in the first CPU power consumption scheduling information (hereinafter referred to as the fourth correspondence relationship) can be obtained.
  • the fourth correspondence may include the correspondence between all target parameters and some or all of the initial parameters, or may only include the correspondence between the target parameters. Correspondence between some parameters and some or all of the initial parameters.
  • the first CPU power consumption scheduling information may include initial parameters and target values corresponding to all target parameters.
  • the target value of the initial parameter can be set to 0 or empty, or to other preset values. That is, regardless of whether there is an actual corresponding value, the initial parameters are included in the first CPU power consumption scheduling information.
  • the first CPU power consumption scheduling information may also include other parameters besides the initial parameters.
  • the fourth correspondence may include correspondences between all target parameters and some or all of the initial parameters. For example, there are 5 target parameters, and 2 of the initial parameters have actual corresponding values. Then, the first CPU power consumption scheduling information may include 5 initial parameters corresponding to the 5 target parameters. For those parameters that do not have actual corresponding values, 3 initial parameters, whose target value is 0 or empty. In this way, the fourth correspondence includes correspondences between 5 target parameters and 5 initial parameters.
  • the first CPU power consumption scheduling information may also include only the initial parameters and target values corresponding to some of the target parameters. Initial parameters that do not have actual corresponding values are not included in the first CPU Power consumption scheduling information.
  • the fourth correspondence includes a correspondence between some of the target parameters and some or all of the initial parameters. Continuing the above example, for example, if there are 5 target parameters and 2 of the initial parameters have actual corresponding values, then the first CPU power consumption scheduling information can only include 2 initial parameters with actual corresponding values, excluding those that do not. 3 parameters that actually correspond to values. In this way, the fourth corresponding relationship includes the corresponding relationship between 2 parameters among the 5 target parameters and the 2 initial parameters.
  • the fourth correspondence includes a correspondence between at least one parameter among the target parameters and at least one parameter among the initial parameters.
  • the target parameters include: FPPT, SPPT, SPPT-APUOnly, SPL and STTMinLimint, etc.
  • the initial parameters include PL1, PL2, EPP, switch status, etc.
  • the fourth corresponding relationship includes SPL, SPPT and initial parameters among the target parameters.
  • the corresponding relationship between PL1 and PL2 in , where SPL corresponds to PL1 and SPPT corresponds to PL2.
  • the value of the parameter of the first CPU power consumption scheduling information (that is, the target value) is assigned to the corresponding target parameter.
  • the fourth corresponding relationship includes the corresponding relationship between all target parameters and some or all of the initial parameters
  • all target parameters can be assigned one by one according to the corresponding relationship.
  • the target parameter when assigning In the process of setting the value, for the target parameter that does not have a corresponding initial parameter in the fourth relationship, the target parameter can be assigned a value of 0, a null value, or other preset values.
  • the PL1 target value is assigned to SPL
  • the PL2 target value is assigned to SPPT
  • 0 or null values are assigned to FPPT, SPPT-APUOnly, and STTMinLimint to obtain the second CPU power consumption scheduling information.
  • the value can be assigned multiple times according to the data type, and a second CPU power consumption scheduling information is generated each time, and the second CPU power consumption scheduling information generated each time is Information is sent to the BIOS. That is to say, when there are multiple data types corresponding to the scene number, multiple second CPU power consumption scheduling information is generated, and the multiple second CPU power consumption scheduling information is sent to the BIOS in multiple times.
  • the data type corresponding to a certain scene number includes both power limitation parameters and STT tuning parameters
  • the power consumption scheduling information A sends the second CPU power consumption scheduling information A to the BIOS.
  • parameters corresponding to the STT tuning parameters can be assigned according to the first CPU power consumption scheduling information, second CPU power consumption scheduling information B is generated, and the second CPU power consumption scheduling information B is sent to the BIOS.
  • multiple second CPU power consumption scheduling information is generated, and the multiple second CPU power consumption scheduling information is sent to the BIOS in multiple times, which can prevent the information translation process Eliminate data confusion and improve the accuracy of information translation.
  • the chip policy fusion device can also generate a data level of the second CPU power consumption scheduling information based on the scenario information, and deliver the data level to the BIOS for convenience Used during BIOS data processing.
  • the specific instructions are as follows:
  • the chip policy fusion unit outputs the second CPU power consumption scheduling information and sends the second CPU power consumption scheduling information to the scheduling executor, and the scheduling executor delivers the second CPU power consumption scheduling information to the BIOS through WMI.
  • the BIOS can have multiple processing methods, such as:
  • the BIOS can directly deliver the second CPU power consumption scheduling information to the CPU, and the CPU adjusts the power consumption according to the second CPU power consumption scheduling information, as described in the above embodiment.
  • the BIOS can also compare or fuse the second CPU power consumption scheduling information with other power consumption scheduling information, decide on the final CPU power consumption scheduling information, and send the final CPU power consumption scheduling information to the CPU, and the CPU will execute the final CPU power consumption scheduling information to adjust power consumption.
  • the embedded controller Embedded Controller, EC
  • SCI system control interrupt
  • the third CPU power consumption scheduling information is sent to the BIOS.
  • the BIOS After receiving the second CPU power consumption scheduling information and the third CPU power consumption scheduling information, the BIOS can decide the final CPU power consumption scheduling information according to the preset decision rules.
  • the information processing method provided by the embodiment of the present application may also include:
  • the chip policy fusion device determines the data level of the second CPU power consumption scheduling information based on the scene number
  • the chip policy fusion device sends the data level to the BIOS.
  • Data level also known as WMI policy data level, i.e. WMI policy decision date level, is used to represent the final scheduling policy information and the final CPU power consumption scheduling information process based on the second scheduling policy information and the third scheduling policy information.
  • the The data level of the second CPU power consumption scheduling information is used to represent the second CPU power consumption scheduling information issued through WMI during the process of deciding the final CPU power consumption scheduling information based on the second CPU power consumption scheduling information and the third CPU power consumption scheduling information. level of importance or priority.
  • the data level may include low level, normal level and high level.
  • the low level is used to indicate that in the process of deciding the final CPU power consumption scheduling information based on the second CPU power consumption scheduling information and the third CPU power consumption scheduling information, the second CPU power consumption scheduling information has the lowest importance level or priority level.
  • the second CPU power consumption scheduling information can be ignored in the process of deciding the final CPU power consumption scheduling information based on the second CPU power consumption scheduling information and the third CPU power consumption scheduling information.
  • the final CPU power consumption scheduling information is determined only based on the third CPU power consumption scheduling information.
  • the normal level is used to represent that in the process of deciding the final CPU power consumption scheduling information based on the second CPU power consumption scheduling information and the third CPU power consumption scheduling information, the importance level or priority level of the second CPU power consumption scheduling information is medium, which is different from that of the third CPU power consumption scheduling information.
  • the CPU power consumption scheduling information is of equal importance.
  • the second CPU power consumption scheduling information and the third CPU power consumption scheduling information are compared or integrated to obtain the final CPU power consumption scheduling information.
  • the high level is used to indicate that in the process of deciding the final CPU power consumption scheduling information based on the second CPU power consumption scheduling information and the third CPU power consumption scheduling information, the second CPU power consumption scheduling information has the highest importance level or priority level.
  • the third CPU power consumption scheduling information can be ignored in the process of deciding the final CPU power consumption scheduling information based on the second CPU power consumption scheduling information and the third CPU power consumption scheduling information.
  • the final CPU power consumption scheduling information is determined only based on the second CPU power consumption scheduling information.
  • the data level can be determined based on the scene number.
  • a mapping relationship between scene numbers and data levels can be established in advance, and the data level corresponding to the current scene number is determined based on the mapping relationship.
  • the data level corresponding to scene number 5-1 (the main scene is the performance evaluation scene and the sub-scenario is the main evaluation scene) is high level.
  • the data level corresponding to scene number -1 (default scene) is low level.
  • the data level corresponding to the default scene can be set to a low level, that is, according to the second CPU function
  • the second CPU power consumption scheduling information can be ignored in the process of determining the final CPU power consumption scheduling information based on the consumption scheduling information and the third CPU power consumption scheduling information, and the final CPU power consumption scheduling information is determined by the third CPU power consumption scheduling information.
  • the data level of the second CPU power consumption scheduling information is also generated according to the scene number, and the data level is sent to the BIOS, so that the BIOS can calculate the second CPU power consumption scheduling information according to the data level and the second CPU power consumption scheduling information.
  • the CPU power consumption scheduling information and the third CPU power consumption scheduling information are decided to generate final CPU power consumption scheduling information.
  • the final CPU power consumption scheduling decision not only refers to a variety of CPU power consumption scheduling information, but also fully considers the importance of various CPU scheduling information to the decision-making in different scenarios, improving the accuracy and accuracy of the final CPU power consumption scheduling. reliability.
  • the electronic device includes corresponding hardware and/or software modules that perform each function.
  • the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is performed by hardware or computer software driving the hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions in conjunction with the embodiments for each specific application, but such implementations should not be considered to be beyond the scope of this application.
  • Embodiments of the present application can divide the electronic device into functional modules according to the above method examples.
  • the electronic device can be divided into functional modules corresponding to each function, such as a detection unit, a processing unit, a display unit, etc., or two or more functions integrated into one module.
  • the above integrated modules can be implemented in the form of hardware or software function modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical function division. In actual implementation, there may be other division methods.
  • the electronic device provided in this embodiment is used to execute the above information processing method, and therefore can achieve the same effect as the above implementation method.
  • the electronic device may also include processing modules, storage modules and communication modules.
  • the processing module can be used to control and manage the actions of the electronic device.
  • the storage module can be used to support electronic devices to execute stored program codes and data, etc.
  • the communication module can be used to support communication between electronic devices and other devices.
  • the processing module may be a processor or a controller. It may implement or execute the various illustrative logical blocks, modules, and circuits described in connection with this disclosure.
  • a processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of digital signal processing (DSP) and a microprocessor, etc.
  • the storage module may be a memory.
  • the communication module can specifically be a radio frequency circuit, a Bluetooth chip, a Wi-Fi chip and other devices that interact with other electronic devices.
  • the electronic device involved in this embodiment may be a device with the structure shown in Figure 1 .
  • the chip system includes at least one processor 801 and at least one interface circuit 802 .
  • the processor 801 and the interface circuit 802 may be interconnected by wires.
  • interface circuitry 802 may be used to receive signals from other devices, such as memory of an electronic device.
  • interface circuit 802 may be used to send signals to other devices (eg, processor 801).
  • the interface circuit 802 can read instructions stored in the memory and send the instructions to the processor 801 .
  • the electronic device can be caused to perform various steps in the above embodiments.
  • the chip system may also include other discrete devices, which are not specifically limited in the embodiments of this application.
  • Embodiments of the present application also provide a computer-readable storage medium.
  • a computer program is stored in the computer-readable storage medium. When the computer program is executed by a processor, it causes the processor to execute the information processing method of any of the above embodiments.
  • An embodiment of the present application also provides a computer program product.
  • the computer program product When the computer program product is run on a computer, it causes the computer to perform the above related steps to implement the information processing method in the above embodiment.
  • inventions of the present application also provide a device.
  • This device may be a chip, a component or a module.
  • the device may include a connected processor and a memory.
  • the memory is used to store computer execution instructions.
  • the processor can execute computer execution instructions stored in the memory, so that the chip executes the information processing method in each of the above method embodiments.
  • the electronic devices, computer-readable storage media, computer program products or chips provided in this embodiment are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the above provided The beneficial effects of the corresponding methods will not be described again here.
  • the disclosed devices and methods can be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of modules or units is only a logical function division.
  • there may be other division methods for example, multiple units or components may be combined or can be integrated into another device, or some features can be ignored, or not implemented.
  • the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.
  • a unit described as a separate component may or may not be physically separate.
  • a component shown as a unit may be one physical unit or multiple physical units, that is, it may be located in one place, or it may be distributed to multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application can be integrated into one processing unit, each unit can exist physically alone, or two or more units can be integrated into one unit.
  • the above integrated units can be implemented in the form of hardware or software functional units.
  • Integrated units may be stored in a readable storage medium if they are implemented in the form of software functional units and sold or used as independent products.
  • the technical solutions of the embodiments of the present application are essentially or contribute to the existing technology, or all or part of the technical solution can be embodied in the form of a software product, and the software product is stored in a storage medium , including several instructions to cause a device (which can be a microcontroller, a chip, etc.) or a processor to execute all or part of the steps of the methods of various embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program code.

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Abstract

Les modes de réalisation de la présente demande concernent un procédé de traitement d'informations et un dispositif électronique. Le procédé consiste à : acquérir des informations de scénario courant et des premières informations de politique de planification correspondant aux informations de scénario courant, les informations de scénario courant représentant un scénario d'utilisateur correspondant à un service qui est en cours de traitement par un dispositif électronique ; si le type de plateforme de puce d'une unité centrale de traitement (CPU) du dispositif électronique est un premier type, déterminer un identifiant de politique cible correspondant aux premières informations de politique de planification, et effectuer une planification de ressources sur le dispositif électronique conformément à l'identifiant de politique cible et au moyen de la CPU du premier type ; et si le type de plateforme de puce de la CPU du dispositif électronique est un second type, déterminer des secondes informations de politique de planification conformément aux informations de scénario courant et aux premières informations de politique de planification, et effectuer une planification de ressources sur le dispositif électronique conformément aux secondes informations de politique de planification et au moyen de la CPU du second type. Le procédé peut être approprié pour des dispositifs électroniques de différents types de plateforme de puce de CPU.
PCT/CN2023/090786 2022-05-16 2023-04-26 Procédé de traitement d'informations et dispositif électronique WO2023221752A1 (fr)

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