WO2023045049A1 - Method for etching mask of magnetic tunnel junction - Google Patents

Method for etching mask of magnetic tunnel junction Download PDF

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WO2023045049A1
WO2023045049A1 PCT/CN2021/129891 CN2021129891W WO2023045049A1 WO 2023045049 A1 WO2023045049 A1 WO 2023045049A1 CN 2021129891 W CN2021129891 W CN 2021129891W WO 2023045049 A1 WO2023045049 A1 WO 2023045049A1
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etching
dielectric layer
tunnel junction
magnetic tunnel
photoresist
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PCT/CN2021/129891
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French (fr)
Chinese (zh)
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张丛
刘宏喜
陈文静
曹凯华
王戈飞
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北京超弦存储器研究院
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N35/00Magnetostrictive devices
    • H10N35/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N35/00Magnetostrictive devices
    • H10N35/80Constructional details

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  • the invention relates to the technical field of magnetoresistive random access memory DRAM spintronic devices, in particular to an etching mask method for a magnetic tunnel junction.
  • Magnetoresistive Random Access Memory has the advantages of low power consumption, high speed, radiation resistance, etc., and has great advantages in emerging storage technologies.
  • the basic storage unit of MRAM is a magnetic tunnel junction (Magnetic Tunnel Junction: MTJ).
  • the core unit of the magnetic tunnel junction usually includes a three-layer structure free layer, reference layer and tunneling layer. These layers are extremely thin, typically on the order of angstroms.
  • the free layer and the reference layer are generally composed of magnetic materials, and the tunneling layer is generally composed of oxides.
  • MRAM utilizes the magnetic moment directions of the free layer and the reference layer for information storage.
  • the tunneling resistance of the magnetic tunnel junction is low resistance; when the free layer and the reference layer magnetic moment square are antiparallel, the tunneling resistance of the magnetic tunnel junction is high resistance; MRAM read The circuit judges whether the data state is "0" or "1” by reading the size of the tunnel resistance.
  • the magnetic rectangular shape of the free layer can be changed by the applied current, so the data state of the memory cell can be rewritten to "0" or "1" by the write current.
  • STT Spin Transfer Torque
  • STT-MRAM spin transfer Torque
  • in-plane STT-MRAM and vertical STT-MRAM The latter has better performance, which can reverse the magnetic memory by providing spin polarization current to the magnetoresistive element.
  • the magnetization direction of the layer In addition, as the volume of the magnetic memory layer shrinks, the spin-polarized current to be injected becomes smaller.
  • SOT spin orbit moment
  • SOT technology can achieve faster speed and lower power consumption.
  • the device structure is not easily damaged under high current density.
  • the write current density of this SOT MRAM is still very high, which limits the arrangement density of the memory cell array.
  • the dielectric layer is generally used as a hard mask for forming a tunnel junction, and etching gases such as F-based, F-based/Ar, etc. are usually used when preparing such a hard mask.
  • etching gases such as F-based, F-based/Ar, etc. are usually used when preparing such a hard mask.
  • the dielectric layer Before the tunnel junction is etched, the dielectric layer has been completely etched away, and the etching selectivity ratio of the top electrode metal to SiNx (SiO 2 ) is not high, so metal etching is unavoidable in the process of etching the dielectric hard mask. Etching, resulting in polymer adhesion between the photoresist and the contact with the metal film layer, which is difficult to remove by O 2 plasma ashing.
  • the present invention provides an etching mask method for a magnetic tunnel junction, which includes stepwise etching the dielectric layer, and removing the photolithographic mask by ashing process before completing the last etching step of the dielectric layer. Glue and residual organic matter.
  • the etching depth of each sub-step is controlled by controlling the etching time.
  • the etching depth of the last etching step of the dielectric layer is 15-70% of the thickness of the dielectric layer.
  • the etching depth of the last etching step of the dielectric layer is 20-40% of the thickness of the dielectric layer.
  • the etching rate is monitored in real time, and if the etching rate drops significantly, the etching of the dielectric layer is stopped.
  • the etching of the dielectric layer adopts CF4, CHF3, SF6 or Ar gas reactive ion etching.
  • the ashing process adopts an O2 ashing process.
  • the MTJ is etched using the dielectric layer as a hard mask.
  • the etching of the MTJ uses plasma etching or reactive ion etching to etch the tunnel junction to complete the patterning of the tunnel junction.
  • the etching mask method of the magnetic tunnel junction of the present invention adopts the step-by-step etching of the dielectric layer, and adopts the ashing process to remove the photoresist and residual organic matter between the step-by-step etching.
  • the photoresist patterns the tunnel junction pattern to the dielectric layer, and during the etching process, the photoresist will form organic residues. If the organic residues touch the metal film layer under the dielectric layer, they will form metal polymers attached to the metal film. layer, which increases the difficulty of removal.
  • the present invention is used to carry out ashing process before the final etching step of the dielectric layer.
  • the process of the present invention is simple, simplifies the process steps, and eliminates the contact between the organic residue formed by the photoresist in the process and the metal film layer, thereby avoiding the formation of metal polymers .
  • FIG. 1 is a flow chart of an etching mask method for a magnetic tunnel junction in an embodiment of the present invention
  • Fig. 2 is the flow chart of the preparatory work before the etching of the dielectric layer in the embodiment of the etching mask method of the magnetic tunnel junction of the present invention
  • FIG. 3 is a flow chart of an application case of the etching mask method of the magnetic tunnel junction of the present invention.
  • FIG. 4 is a cross-sectional view of the MTJ pattern transfer dielectric layer before the dielectric layer is etched;
  • FIG. 6 is a cross-sectional view of the photoresist after ashing and removal
  • FIG. 8 is a cross-sectional view after MTJ etching.
  • an embodiment of the present invention provides an etching mask method for a magnetic tunnel junction, which etches the dielectric layer step by step, including the following steps:
  • S20 uses ashing process to remove photoresist and residual organic matter
  • this solution etches the dielectric layer step by step, which is specifically divided into the first step of etching and the second step of etching, and completes the last step of etching the dielectric layer (ie, the second step of etching).
  • the etching of the dielectric layer can also be divided into more steps, that is, before or after the ashing process is used to remove the photoresist and residual organic matter. More than one step of sub-etching can be performed, as long as the ashing process is between the first etching step and the last etching step, and even the ashing process can be performed multiple times.
  • this scheme adopts the step-by-step etching of the dielectric layer, and the ashing process is used to remove the photoresist and residual organic matter between the step-by-step etching. Patterning the tunnel junction pattern to the dielectric layer, and during the etching process, the photoresist will form organic residues. If the organic residues touch the metal film layer under the dielectric layer, it will form a metal polymer attached to the metal film layer, increasing In order to reduce the difficulty of removal, this scheme is used to perform ashing process before the last step of etching the dielectric layer.
  • the etching depth of each step is controlled by controlling the etching time.
  • this scheme adopts the method of controlling the etching time to control the etching depth of each sub-step, and takes the total etching time required for etching the dielectric layer as a benchmark, and according to the etching depth of each sub-step
  • the proportion of the etching depth to the total thickness of the dielectric layer is used to allocate the etching time, so as to achieve the precise control of the etching depth of each step and ensure the process requirements of the etching depth of each step.
  • the etching depth of the last etching step of the dielectric layer is 15-70% of the thickness of the dielectric layer; it may preferably be 20-40% of the thickness of the dielectric layer.
  • the etching depth of the final etching step of the selective dielectric layer is 20%, 25%, 30%, 35% or 40% of the thickness of the dielectric layer.
  • this scheme limits the etching depth of the last etching step of the dielectric layer, so as to ensure that the dielectric layer still has sufficient remaining thickness before adopting the ashing process; the scheme It can prevent the dielectric layer from being etched before the last step of etching due to the error of etching control, resulting in the residue formed by the photoresist being in contact with the metal film layer. At this time, the ashing process can no longer achieve the purpose of the invention , Therefore, this solution limits the etching depth of the last etching step to ensure that this unfavorable situation does not occur.
  • the etching rate is monitored in real time, and if the etching rate drops significantly, the etching of the dielectric layer is stopped.
  • this scheme monitors the etching rate in real time during the last etching process of the dielectric layer, and stops the etching of the dielectric layer if the etching rate drops significantly;
  • the following preparations are performed:
  • this scheme needs to be prepared before the dielectric layer is etched, and the substrate with the deposited MTJ film layer is provided, and the dielectric layer is formed on the substrate, and then the photoresist is used for patterning From the MTJ pattern to the dielectric layer, after these preparations, the dielectric layer can be etched according to the MTJ pattern.
  • the parts that do not need to be etched are protected, and on the other hand, the etching range can be precisely defined by the MTJ pattern.
  • CF4, CHF3, SF6 or Ar gas reactive ion etching is used for etching the dielectric layer.
  • this scheme uses CF4, CHF3, SF6 or Ar gas reactive ion etching for the etching of the dielectric layer.
  • the reactive ion etching technology is a kind of strong anisotropy and high selectivity. Dry etching technique. It uses molecular gas plasma for etching in a vacuum system, and uses ion-induced chemical reactions to achieve anisotropic etching, that is, uses ion energy to form a damaged layer that is easy to etch on the surface of the etched layer.
  • ions can also remove surface products to expose a clean etching surface; usually, the entire vacuum wall of the reactive ion etching machine is grounded, as the anode, the cathode is the power electrode, and the ground on the side of the cathode Shields protect the power electrodes from sputtering.
  • the substrate to be etched is placed on the power electrode.
  • the corrosive gas fills the entire reaction chamber according to a certain working pressure and matching ratio. To the corrosive gas in the reaction chamber, a high-frequency electric field greater than the critical value of gas breakdown is added. Under the action of a strong electric field, the stray electrons accelerated by the high-frequency electric field collide randomly with gas molecules or atoms.
  • the ashing process uses an O 2 ashing process.
  • this scheme adopts O2 ashing process for the ashing process, and the ashing method is to use oxygen plasma to carry out low-temperature combustion of organic matter; use oxygen or oxygen ion plasma for ashing, Removing the photoresist pattern can be carried out by introducing plasma into the reaction chamber. In the reaction chamber, the wafer is heated by appropriate heating means under low pressure.
  • the ashing rate in the ashing process is proportional to the temperature
  • the ashing The oxidation process is carried out at high temperature, for example, at 80°C-300°C, the photoresist changes dramatically to the activation energy state in proportion to the increase of temperature, and after the temperature exceeds 300°C, the activation energy decreases to achieve the removal of photoresist and It produces and residual organic matter.
  • the MTJ is etched using the dielectric layer as a hard mask.
  • the MTJ is etched with the dielectric layer as a hard mask. Due to the adoption of the method of the present invention, the photoetched The glue and its generation and the removal of residual organic matter make the surface of the hard mask clean, avoiding the adverse effects of possible impurities on the MTJ etching process, thereby ensuring the quality of MTJ etching, improving the yield rate, and reducing costs.
  • the etching of the MTJ adopts plasma etching or reactive ion etching to etch the tunnel junction to complete the patterning of the tunnel junction.
  • this scheme adopts plasma etching or reactive ion etching to etch the tunnel junction to etch the MTJ, and completes the patterning of the tunnel junction; wherein, the plasma etching machine is also called a plasma etching machine.
  • Plasma etching is the most common form of dry etching. Its principle is that the gas exposed to the electron region forms a plasma, and the resulting ionized gas and gas composed of released high-energy electrons form plasma or ions.
  • plasma cleaning is essentially a milder version of plasma etching.
  • the equipment for performing the dry etching process includes a reaction chamber, a power supply, and a vacuum part, and the workpiece is sent into the reaction chamber evacuated by a vacuum pump. The gas is introduced and exchanged with the plasma, which reacts on the surface of the workpiece, and the volatile by-products of the reaction are removed by the vacuum pump.
  • the plasma etching process is actually a reactive plasma process. This method is mature in technology, ensures the stability of the process, and is also conducive to production cost control.
  • Step S1 providing the substrate 101 on which the tunnel conjunctival layer has been deposited, the thickness of the substrate 101 including the tunnel conjunctival layer 102 is 20-40 nm;
  • Step S2 forming a dielectric layer 103 on the substrate 101 with a thickness of 50-70 nm;
  • Step S3 Patterning the tunnel junction pattern on the dielectric layer 103 by using the photoresist 104, the thickness of the photoresist 104 is 90nm-700nm;
  • Step S4 using CF4, CHF3, SF6, Ar and other gases to etch the dielectric layer 103 in the first step, the etching depth is the first depth 103a, and the tunnel junction pattern is transferred to the remaining thickness 103b of the dielectric layer, the first depth is 103a
  • the specific etching depth is 30-50nm;
  • Step S5 using an O2 ashing process to remove the remaining photoresist 104 and the organic matter left by the photoresist due to etching;
  • Step S6 Etching the dielectric layer in the second step using gas such as reactive ion etching CF4, the etching depth is the remaining thickness 103b of the dielectric layer 103, and measuring the rate during etching. If the rate drops significantly, it means that the dielectric layer is etched Complete contact with the metal film layer, so that the magnetic tunnel junction pattern is transferred to the tunnel conjunctival layer;
  • gas such as reactive ion etching CF4
  • Step S7 Using the dielectric layer 103 as a hard mask, the tunnel junction is etched by plasma or reactive ion etching to complete the patterning of the tunnel junction.
  • the present invention only relates to a dielectric hard mask, which simplifies the process steps and is simple in process.
  • the photoresist is ashed and removed, and the organic residue formed by the photoresist in the process is eliminated. It is in contact with the metal film layer, thereby avoiding the formation of metal polymers and preventing the formation of polymers attached to the surface of the glue in the subsequent tunnel junction metal etching, thereby reducing the difficulty of glue removal and reducing the risk of MRAM circuit open circuit.

Abstract

Provided in the present invention is a method for etching a mask of a magnetic tunnel junction. The method comprises: etching a dielectric layer step by step, and removing a photoresist and residual organic substances by means of an ashing process prior to the final etching step of the dielectric layer. Before the etching of the dielectric layer, a tunnel junction pattern needs to be patterned onto the dielectric layer by means of a photoresist. During the etching process, the photoresist will form organic residues, and if the organic residues come into contact with a metal film layer beneath the dielectric layer, a metal polymer will form and adhere to the metal film layer, which makes removal more difficult. In the present invention, a treatment via an ashing process is carried out prior to the final etching step of the dielectric layer; and since the dielectric layer still has a certain residual thickness, the organic residues formed by the photoresist are isolated from the metal film layer, such that the difficulty in removing the photoresist is reduced and the risk of an open MRAM circuit is also reduced. The process of the present invention is simple, the process steps are simplified, and the contact of organic residues formed by a photoresist in the process with a metal film layer is avoided, such that the formation of a metal polymer is avoided.

Description

磁隧道结的刻蚀掩模方法Etching mask method of magnetic tunnel junction 技术领域technical field
本发明涉及磁阻式随机存取存储器DRAM自旋电子器件技术领域,特别涉及一种磁隧道结的刻蚀掩模方法。The invention relates to the technical field of magnetoresistive random access memory DRAM spintronic devices, in particular to an etching mask method for a magnetic tunnel junction.
背景技术Background technique
磁阻式随机存取存储器(Magnetoresistive Random Access Memory;MRAM)具有低功耗、高速度、防辐射等优点,在新兴存储技术中极具优势。MRAM的基本存储单元为磁隧道结(Magnetic Tunnel Junction:MTJ)。磁隧道结的核心单元通常包含三层结构自由层、参考层和隧穿层。这些层的厚度极薄,通常为埃米量级。自由层和参考层一般由磁性材料组成,隧穿层一般由氧化物组成。MRAM利用自由层和参考层的磁矩方向进行信息存储。自由层和参考层磁矩方形相同时,磁隧道结的隧穿电阻为低阻;当自由层和参考层磁矩方形反平行时,磁隧道结的隧穿电阻为高阻;MRAM的读取电路通过读取隧穿电阻的大小判断数据状态为“0”或“1”。自由层的磁矩方形可以由外加电流进行改变,因此可以通过写入电流改写存储单元的数据状态为“0”或“1”。Magnetoresistive Random Access Memory (MRAM) has the advantages of low power consumption, high speed, radiation resistance, etc., and has great advantages in emerging storage technologies. The basic storage unit of MRAM is a magnetic tunnel junction (Magnetic Tunnel Junction: MTJ). The core unit of the magnetic tunnel junction usually includes a three-layer structure free layer, reference layer and tunneling layer. These layers are extremely thin, typically on the order of angstroms. The free layer and the reference layer are generally composed of magnetic materials, and the tunneling layer is generally composed of oxides. MRAM utilizes the magnetic moment directions of the free layer and the reference layer for information storage. When the free layer and the reference layer have the same magnetic moment square, the tunneling resistance of the magnetic tunnel junction is low resistance; when the free layer and the reference layer magnetic moment square are antiparallel, the tunneling resistance of the magnetic tunnel junction is high resistance; MRAM read The circuit judges whether the data state is "0" or "1" by reading the size of the tunnel resistance. The magnetic rectangular shape of the free layer can be changed by the applied current, so the data state of the memory cell can be rewritten to "0" or "1" by the write current.
传统的MRAM是以自旋转移矩(Spin Transfer Torque,STT)作为MTJ最普遍的写入方式。根据磁极化方向的不同,STT-MRAM又分为面内STT-MRAM和垂直STT-MRAM,后者有更好的性能,即可通过向磁阻元件提供自旋极化电流来反转磁性记忆层的磁化强度方向。此外,随着磁性记忆层体积的缩小,需注入的自旋极化电流也越小。Traditional MRAM uses spin transfer torque (Spin Transfer Torque, STT) as the most common writing method for MTJ. According to the different directions of magnetic polarization, STT-MRAM is divided into in-plane STT-MRAM and vertical STT-MRAM. The latter has better performance, which can reverse the magnetic memory by providing spin polarization current to the magnetoresistive element. The magnetization direction of the layer. In addition, as the volume of the magnetic memory layer shrinks, the spin-polarized current to be injected becomes smaller.
最新发展的是以电流产生的自旋轨道矩(Spin Orbit Torque,SOT)而不是电流产生的磁场来切换钉扎层与自由层的相对磁化取向,从而实现数据写入的SOT MRAM。与当前普遍采用的STT写入方式相比,SOT技术能够实现更快的速度与更低的功耗。同时,器件结构也不易在高电流密度下受到破坏。但这种SOT MRAM的写入电流密度还是很高,限制了存储单元阵列的排列密度。The latest development uses the spin orbit moment (Spin Orbit Torque, SOT) generated by the current instead of the magnetic field generated by the current to switch the relative magnetization orientation of the pinned layer and the free layer, thereby realizing the SOT MRAM for data writing. Compared with the currently commonly used STT writing method, SOT technology can achieve faster speed and lower power consumption. At the same time, the device structure is not easily damaged under high current density. However, the write current density of this SOT MRAM is still very high, which limits the arrangement density of the memory cell array.
在现有的技术条件下,一般采用介质层作为制作隧道结的硬掩模,在制备这种硬掩模的时候通常采用F基、F基/Ar等刻蚀气体。在隧道结刻蚀前,介电层已经被完全刻蚀掉,顶电极金属与SiNx(SiO 2)的刻蚀选择比不高,因此刻蚀介质硬掩模过程中也不可避免地存在金属刻蚀,导致在光刻胶与与金属膜层接触产生的聚合物附着,难以使用O 2plasma灰化去除。 Under the existing technical conditions, the dielectric layer is generally used as a hard mask for forming a tunnel junction, and etching gases such as F-based, F-based/Ar, etc. are usually used when preparing such a hard mask. Before the tunnel junction is etched, the dielectric layer has been completely etched away, and the etching selectivity ratio of the top electrode metal to SiNx (SiO 2 ) is not high, so metal etching is unavoidable in the process of etching the dielectric hard mask. Etching, resulting in polymer adhesion between the photoresist and the contact with the metal film layer, which is difficult to remove by O 2 plasma ashing.
发明内容Contents of the invention
为了解决上述技术问题,本发明提供了一种磁隧道结的刻蚀掩模方法,包括对介质层进行分步刻蚀,并在完成介质层的最后一步刻蚀前采用灰化工艺去除光刻胶及残留的有机物。In order to solve the above-mentioned technical problems, the present invention provides an etching mask method for a magnetic tunnel junction, which includes stepwise etching the dielectric layer, and removing the photolithographic mask by ashing process before completing the last etching step of the dielectric layer. Glue and residual organic matter.
可选的,在对介质层刻蚀过程中,通过控制刻蚀时间的方式以控制各分步的刻蚀深度。Optionally, during the etching process of the dielectric layer, the etching depth of each sub-step is controlled by controlling the etching time.
可选的,介质层的最后一步刻蚀的刻蚀深度为介质层厚度的15-70%。Optionally, the etching depth of the last etching step of the dielectric layer is 15-70% of the thickness of the dielectric layer.
可选的,介质层的最后一步刻蚀的刻蚀深度为介质层厚度的20-40%。Optionally, the etching depth of the last etching step of the dielectric layer is 20-40% of the thickness of the dielectric layer.
可选的,在介质层的最后一步刻蚀过程中,实时进行刻蚀速率监测,若刻蚀速率下降明显则停止介质层的刻蚀。Optionally, during the last etching process of the dielectric layer, the etching rate is monitored in real time, and if the etching rate drops significantly, the etching of the dielectric layer is stopped.
可选的,在介质层刻蚀前,进行以下准备:Optionally, before etching the dielectric layer, perform the following preparations:
S1:提供已沉积MTJ膜层的衬底;S1: Provide the substrate on which the MTJ film layer has been deposited;
S2:在衬底上形成介质层;S2: forming a dielectric layer on the substrate;
S3:采用光刻胶图形化MTJ图案到介质层。S3: using a photoresist to pattern the MTJ pattern onto the dielectric layer.
可选的,所述介质层的刻蚀采用CF4、CHF3、SF6或者Ar气体反应离子刻蚀。Optionally, the etching of the dielectric layer adopts CF4, CHF3, SF6 or Ar gas reactive ion etching.
可选的,所述灰化工艺采用O 2灰化工艺。 Optionally, the ashing process adopts an O2 ashing process.
可选的,在介质层刻蚀完成后,以介质层为硬掩模刻蚀MTJ。Optionally, after the dielectric layer is etched, the MTJ is etched using the dielectric layer as a hard mask.
可选的,所述刻蚀MTJ采用等离子刻蚀或者反应离子刻蚀对隧道结进行刻蚀,完成对隧道结的图形化。Optionally, the etching of the MTJ uses plasma etching or reactive ion etching to etch the tunnel junction to complete the patterning of the tunnel junction.
本发明的磁隧道结的刻蚀掩模方法,采用对介质层进行分步刻蚀,在分步刻蚀之间采用灰化工艺去除光刻胶及残留的有机物,介质层前刻蚀需要以光刻胶图形化隧道结图案到介质层,而在刻蚀过程中,光刻胶会形成有机物残留,该有机物残留若接触到介质层下的金属膜层,会形成金属聚合物附着 在金属膜层,增加了去除难度,采用本发明在介质层的最后一步刻蚀前进行灰化工艺处理,由于介质层仍存在一定剩余厚度,将光刻胶形成的有机物残留与金属膜层隔离,从而降低了去胶的难度,也降低了MRAM电路开路的风险,本发明工艺简单,简化了工艺步骤,排除了光刻胶在工艺中形成的有机物残留与金属膜层接触,从而避免金属聚合物的形成。The etching mask method of the magnetic tunnel junction of the present invention adopts the step-by-step etching of the dielectric layer, and adopts the ashing process to remove the photoresist and residual organic matter between the step-by-step etching. The photoresist patterns the tunnel junction pattern to the dielectric layer, and during the etching process, the photoresist will form organic residues. If the organic residues touch the metal film layer under the dielectric layer, they will form metal polymers attached to the metal film. layer, which increases the difficulty of removal. The present invention is used to carry out ashing process before the final etching step of the dielectric layer. Since the dielectric layer still has a certain residual thickness, the organic matter residue formed by the photoresist is isolated from the metal film layer, thereby reducing The difficulty of deglue removal is also reduced, and the risk of MRAM circuit open circuit is also reduced. The process of the present invention is simple, simplifies the process steps, and eliminates the contact between the organic residue formed by the photoresist in the process and the metal film layer, thereby avoiding the formation of metal polymers .
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。本发明的目的和其他优点可通过在所写的说明书、权利要求书、以及附图中所特别指出的结构来实现和获得。Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。The technical solutions of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.
附图说明Description of drawings
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。在附图中:The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In the attached picture:
图1为本发明实施例中一种磁隧道结的刻蚀掩模方法流程图;1 is a flow chart of an etching mask method for a magnetic tunnel junction in an embodiment of the present invention;
图2为本发明的磁隧道结的刻蚀掩模方法实施例中在介质层刻蚀前的准备工作流程图;Fig. 2 is the flow chart of the preparatory work before the etching of the dielectric layer in the embodiment of the etching mask method of the magnetic tunnel junction of the present invention;
图3为本发明的磁隧道结的刻蚀掩模方法应用案例流程图;3 is a flow chart of an application case of the etching mask method of the magnetic tunnel junction of the present invention;
图4为介质层刻蚀前MTJ图案转移介质层的剖面图;4 is a cross-sectional view of the MTJ pattern transfer dielectric layer before the dielectric layer is etched;
图5为在灰化工艺前的介质层刻蚀分步完成后的剖面图;5 is a cross-sectional view after the step-by-step etching of the dielectric layer before the ashing process;
图6为光刻胶灰化去除后的剖面图;6 is a cross-sectional view of the photoresist after ashing and removal;
图7为在灰化工艺后的介质层剩余厚度刻蚀完成后的剖面图;7 is a cross-sectional view after the remaining thickness of the dielectric layer is etched after the ashing process;
图8为进行MTJ刻蚀后的剖面图。FIG. 8 is a cross-sectional view after MTJ etching.
具体实施方式Detailed ways
以下结合附图对本发明的优选实施例进行说明,应当理解,此处所描述的优选实施例仅用于说明和解释本发明,并不用于限定本发明。The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.
如图1和图3-8所示,本发明实施例提供了一种磁隧道结的刻蚀掩模方法,对介质层进行分步刻蚀,包括以下步骤:As shown in Figure 1 and Figure 3-8, an embodiment of the present invention provides an etching mask method for a magnetic tunnel junction, which etches the dielectric layer step by step, including the following steps:
S10对介质层进行第一步刻蚀,第一步刻蚀的刻蚀深度为第一深度;S10 performing the first step of etching the dielectric layer, and the etching depth of the first step of etching is the first depth;
S20采用灰化工艺去除光刻胶及残留的有机物;S20 uses ashing process to remove photoresist and residual organic matter;
S30对介质层进行第二步刻蚀,第二步刻蚀的刻蚀深度为介质层剩余厚度。S30 performing a second etching step on the dielectric layer, the etching depth of the second etching step being the remaining thickness of the dielectric layer.
上述技术方案的工作原理为:本方案对介质层进行分步刻蚀,具体分为第一步刻蚀和第二步刻蚀,并在完成介质层的最后一步刻蚀(即第二步刻蚀)前采用灰化工艺去除光刻胶及残留的有机物;当然,也可以将介质层的刻蚀分为更多步,即在采用灰化工艺去除光刻胶及残留的有机物之前或者之后都可以进行超过一步的分步刻蚀,只需要保证灰化工艺在第一步刻蚀与最后一步刻蚀之间即可,甚至期间的灰化工艺也可以进行多次。The working principle of the above-mentioned technical solution is as follows: this solution etches the dielectric layer step by step, which is specifically divided into the first step of etching and the second step of etching, and completes the last step of etching the dielectric layer (ie, the second step of etching). Before the ashing process, the photoresist and residual organic matter are removed by ashing process; of course, the etching of the dielectric layer can also be divided into more steps, that is, before or after the ashing process is used to remove the photoresist and residual organic matter. More than one step of sub-etching can be performed, as long as the ashing process is between the first etching step and the last etching step, and even the ashing process can be performed multiple times.
上述技术方案的有益效果为:本方案采用对介质层进行分步刻蚀,在分步刻蚀之间采用灰化工艺去除光刻胶及残留的有机物,介质层前刻蚀需要以光刻胶图形化隧道结图案到介质层,而在刻蚀过程中,光刻胶会形成有机物残留,该有机物残留若接触到介质层下的金属膜层,会形成金属聚合物附着在金属膜层,增加了去除难度,采用本方案在介质层的最后一步刻蚀前进行灰化工艺处理,由于介质层仍存在一定剩余厚度,将光刻胶形成的有机物残留与金属膜层隔离,从而降低了去胶的难度,也降低了MRAM电路开路的风险。本方案工艺简单,简化了工艺步骤,排除了光刻胶在工艺中形成的有机物残留与金属膜层接触,从而避免金属聚合物的形成。The beneficial effect of the above-mentioned technical scheme is: this scheme adopts the step-by-step etching of the dielectric layer, and the ashing process is used to remove the photoresist and residual organic matter between the step-by-step etching. Patterning the tunnel junction pattern to the dielectric layer, and during the etching process, the photoresist will form organic residues. If the organic residues touch the metal film layer under the dielectric layer, it will form a metal polymer attached to the metal film layer, increasing In order to reduce the difficulty of removal, this scheme is used to perform ashing process before the last step of etching the dielectric layer. Since the dielectric layer still has a certain residual thickness, the organic matter residue formed by the photoresist is isolated from the metal film layer, thereby reducing the deglue The difficulty also reduces the risk of MRAM circuit open circuit. This solution has a simple process, simplifies the process steps, and eliminates the contact between the organic matter residue formed in the process of the photoresist and the metal film layer, thereby avoiding the formation of metal polymers.
在一个实施例中,在对介质层刻蚀过程中,通过控制刻蚀时间的方式以控制各分步的刻蚀深度。In one embodiment, during the etching process of the dielectric layer, the etching depth of each step is controlled by controlling the etching time.
上述技术方案的工作原理和有益效果为:本方案采用控制刻蚀时间的方式对各分步的刻蚀深度进行控制,以介质层刻蚀需要的总刻蚀时间为基准,按照各分步的刻蚀深度占介质层总厚度的比例进行刻蚀时间分配,从而达到对各分步刻蚀深度的精确控制,保障各分步刻蚀深度的工艺要求。The working principle and beneficial effects of the above-mentioned technical scheme are as follows: this scheme adopts the method of controlling the etching time to control the etching depth of each sub-step, and takes the total etching time required for etching the dielectric layer as a benchmark, and according to the etching depth of each sub-step The proportion of the etching depth to the total thickness of the dielectric layer is used to allocate the etching time, so as to achieve the precise control of the etching depth of each step and ensure the process requirements of the etching depth of each step.
在一个实施例中,介质层的最后一步刻蚀的刻蚀深度为介质层厚度的15-70%;可优先为介质层厚度的20-40%。例如选择介质层的最后一步刻蚀的刻蚀深度为介质层厚度的20%、25%、30%、35%或者40%。In one embodiment, the etching depth of the last etching step of the dielectric layer is 15-70% of the thickness of the dielectric layer; it may preferably be 20-40% of the thickness of the dielectric layer. For example, the etching depth of the final etching step of the selective dielectric layer is 20%, 25%, 30%, 35% or 40% of the thickness of the dielectric layer.
上述技术方案的工作原理和有益效果为:本方案对介质层的最后一步刻蚀的刻蚀深度进行了限定,以此保障在采用灰化工艺前,介质层仍然有足够的剩余厚度;该方案可以防止由于刻蚀控制的误差导致在最后一步刻蚀前实际已经将介质层刻蚀完成,导致光刻胶形成的残留已经与金属膜层接触,此 时再进行灰化工艺已经不能达到发明目的,因此,本方案对最后一步刻蚀的刻蚀深度进行限定,以保障不发生此不利情况。The working principle and beneficial effects of the above technical scheme are: this scheme limits the etching depth of the last etching step of the dielectric layer, so as to ensure that the dielectric layer still has sufficient remaining thickness before adopting the ashing process; the scheme It can prevent the dielectric layer from being etched before the last step of etching due to the error of etching control, resulting in the residue formed by the photoresist being in contact with the metal film layer. At this time, the ashing process can no longer achieve the purpose of the invention , Therefore, this solution limits the etching depth of the last etching step to ensure that this unfavorable situation does not occur.
在一个实施例中,在介质层的最后一步刻蚀过程中,实时进行刻蚀速率监测,若刻蚀速率下降明显则停止介质层的刻蚀。In one embodiment, during the last etching process of the dielectric layer, the etching rate is monitored in real time, and if the etching rate drops significantly, the etching of the dielectric layer is stopped.
上述技术方案的工作原理和有益效果为:本方案在介质层的最后一步刻蚀过程中,实时进行刻蚀速率监测,若刻蚀速率下降明显则停止介质层的刻蚀;由于介质层和其下面的金属膜层材质的差异,在采用工艺设备选定工作模式进行刻蚀时,介质层刻蚀的速率较高,金属膜层的速率较低,因此,在介质层的最后一步刻蚀时,当刻蚀速率下降明显则表明已经刻蚀至金属膜层,介质层刻蚀已经全部完成,此时应当停止,防止对金属膜层的厚度造成较大影响而对后续工艺不利。The working principle and beneficial effects of the above-mentioned technical scheme are as follows: this scheme monitors the etching rate in real time during the last etching process of the dielectric layer, and stops the etching of the dielectric layer if the etching rate drops significantly; The difference in the material of the metal film layer below, when using the selected working mode of the process equipment for etching, the etching rate of the dielectric layer is higher, and the rate of the metal film layer is lower. Therefore, in the last step of etching the dielectric layer , when the etching rate drops significantly, it indicates that the metal film layer has been etched, and the etching of the dielectric layer has been completely completed. At this time, it should be stopped to prevent the thickness of the metal film layer from being adversely affected by subsequent processes.
在一个实施例中,在介质层刻蚀前,进行以下准备:In one embodiment, before the dielectric layer is etched, the following preparations are performed:
S1:提供已沉积MTJ膜层的衬底;S1: Provide the substrate on which the MTJ film layer has been deposited;
S2:在衬底上形成介质层;S2: forming a dielectric layer on the substrate;
S3:采用光刻胶图形化MTJ图案到介质层。S3: using a photoresist to pattern the MTJ pattern onto the dielectric layer.
上述技术方案的工作原理和有益效果为:本方案在介质层刻蚀前,需要进行准备,提供已沉积MTJ膜层的衬底,并在衬底上形成介质层,再采用光刻胶图形化MTJ图案到介质层,经过这些准备,才能根据MTJ图案对介质层进行刻蚀,一方面对不需要刻蚀的部分加以保护,另一方面可以由MTJ图案精确界定刻蚀范围。The working principle and beneficial effects of the above-mentioned technical scheme are as follows: this scheme needs to be prepared before the dielectric layer is etched, and the substrate with the deposited MTJ film layer is provided, and the dielectric layer is formed on the substrate, and then the photoresist is used for patterning From the MTJ pattern to the dielectric layer, after these preparations, the dielectric layer can be etched according to the MTJ pattern. On the one hand, the parts that do not need to be etched are protected, and on the other hand, the etching range can be precisely defined by the MTJ pattern.
在一个实施例中,介质层刻蚀采用CF4、CHF3、SF6或者Ar气体反应离子刻蚀。In one embodiment, CF4, CHF3, SF6 or Ar gas reactive ion etching is used for etching the dielectric layer.
上述技术方案的工作原理和有益效果为:本方案对介质层刻蚀采用CF4、CHF3、SF6或者Ar气体反应离子刻蚀,反应离子刻蚀技术是一种各向异性很强、选择性高的干法腐蚀技术。它是在真空系统中利用分子气体等离子来进行刻蚀的,利用了离子诱导化学反应来实现各向异性刻蚀,即是利用离子能量来使被刻蚀层的表面形成容易刻蚀的损伤层和促进化学反应,同时离子还可清除表面生成物以露出清洁的刻蚀表面的作用;通常情况下,反应离子刻蚀机的整个真空壁接地,作为阳极,阴极是功率电极,阴极侧面的接地屏蔽罩可防止功率电极受到溅射。要腐蚀的基片放在功率电极上。腐蚀气体按照一 定的工作压力和搭配比例充满整个反应室。对反应腔中的腐蚀气体,加上大于气体击穿临界值的高频电场,在强电场作用下,被高频电场加速的杂散电子与气体分子或原子进行随机碰撞,当电子能量大到一定程度时,随机碰撞变为非弹性碰撞,产生二次电子发射,它们又进一步与气体分子碰撞,不断激发或电离气体分子。这种激烈碰撞引起电离和复合。当电子的产生和消失过程达到平衡时,放电能继续不断地维持下去。由非弹性碰撞产生的离子、电子以及游离基(游离态的原子、分子或原子团)也称为等离子体,具有很强的化学活性,可与被刻蚀样品表面的原子起化学反应,形成挥发性物质,达到腐蚀样品表层的目的。同时,由于阴极附近的电场方向垂直于阴极表面,高能离子在一定的工作压力下,垂直地射向样品表面,进行物理轰击,使得反应离子刻蚀具有很好的各向异性;对于石英材料,可选择气体种类较多,选择时可以充分考虑气体的容易获取性和成本,有利于保障工艺生产的进行以及降低生产成本。The working principle and beneficial effects of the above technical scheme are: this scheme uses CF4, CHF3, SF6 or Ar gas reactive ion etching for the etching of the dielectric layer. The reactive ion etching technology is a kind of strong anisotropy and high selectivity. Dry etching technique. It uses molecular gas plasma for etching in a vacuum system, and uses ion-induced chemical reactions to achieve anisotropic etching, that is, uses ion energy to form a damaged layer that is easy to etch on the surface of the etched layer. And to promote chemical reactions, at the same time, ions can also remove surface products to expose a clean etching surface; usually, the entire vacuum wall of the reactive ion etching machine is grounded, as the anode, the cathode is the power electrode, and the ground on the side of the cathode Shields protect the power electrodes from sputtering. The substrate to be etched is placed on the power electrode. The corrosive gas fills the entire reaction chamber according to a certain working pressure and matching ratio. To the corrosive gas in the reaction chamber, a high-frequency electric field greater than the critical value of gas breakdown is added. Under the action of a strong electric field, the stray electrons accelerated by the high-frequency electric field collide randomly with gas molecules or atoms. When the electron energy is large enough To a certain extent, random collisions become inelastic collisions, resulting in secondary electron emission, which further collide with gas molecules and continuously excite or ionize gas molecules. This violent collision causes ionization and recombination. When the production and disappearance of electrons reaches a balance, the discharge can continue to be maintained. The ions, electrons and free radicals (free atoms, molecules or atomic groups) produced by inelastic collisions are also called plasma, which has strong chemical activity and can chemically react with the atoms on the surface of the etched sample to form volatile substances to achieve the purpose of corroding the surface of the sample. At the same time, since the direction of the electric field near the cathode is perpendicular to the surface of the cathode, the high-energy ions shoot vertically to the surface of the sample under a certain working pressure for physical bombardment, which makes reactive ion etching have good anisotropy; for quartz materials, There are many types of gases that can be selected, and the easy availability and cost of gases can be fully considered when choosing, which is conducive to ensuring the progress of process production and reducing production costs.
在一个实施例中,灰化工艺采用O 2灰化工艺。 In one embodiment, the ashing process uses an O 2 ashing process.
上述技术方案的工作原理和有益效果为:本方案对灰化工艺采用O 2灰化工艺,灰化法是利用氧等离子体进行有机物的低温燃烧;使用氧基或氧离子等离子体进行灰化,除去光刻胶图案,可以将等离子体导入反应室中进行,在该反应室中,晶片在低压下由适当的加热手段进行加热,由于灰化过程中的灰化速率与温度成正比,所以灰化过程在高温下进行,例如在80℃-300℃,光刻胶随温度的升高成比例地巨变到激活能量状态,而在温度超过300℃之后该激活能量下降,达到去除光刻胶及其产生和残留有机物。 The working principle and beneficial effects of the above-mentioned technical scheme are as follows: this scheme adopts O2 ashing process for the ashing process, and the ashing method is to use oxygen plasma to carry out low-temperature combustion of organic matter; use oxygen or oxygen ion plasma for ashing, Removing the photoresist pattern can be carried out by introducing plasma into the reaction chamber. In the reaction chamber, the wafer is heated by appropriate heating means under low pressure. Since the ashing rate in the ashing process is proportional to the temperature, the ashing The oxidation process is carried out at high temperature, for example, at 80°C-300°C, the photoresist changes dramatically to the activation energy state in proportion to the increase of temperature, and after the temperature exceeds 300°C, the activation energy decreases to achieve the removal of photoresist and It produces and residual organic matter.
在一个实施例中,在介质层刻蚀完成后,以介质层为硬掩模刻蚀MTJ。In one embodiment, after the dielectric layer is etched, the MTJ is etched using the dielectric layer as a hard mask.
上述技术方案的工作原理和有益效果为:本方案在介质层刻蚀完成后,以介质层为硬掩模刻蚀MTJ,由于采用了本发明的方法,在刻蚀MTJ前,已经将光刻胶及其产生和残留有机物去除,使得硬掩模表面洁净,避免了可能存在的杂物对MTJ刻蚀工艺的不利影响,从而可以保障MTJ刻蚀质量,提高良品率,降低成本。The working principle and beneficial effects of the above technical solution are as follows: in this solution, after the dielectric layer is etched, the MTJ is etched with the dielectric layer as a hard mask. Due to the adoption of the method of the present invention, the photoetched The glue and its generation and the removal of residual organic matter make the surface of the hard mask clean, avoiding the adverse effects of possible impurities on the MTJ etching process, thereby ensuring the quality of MTJ etching, improving the yield rate, and reducing costs.
在一个实施例中,刻蚀MTJ采用等离子刻蚀或者反应离子刻蚀对隧道结进行刻蚀,完成对隧道结的图形化。In one embodiment, the etching of the MTJ adopts plasma etching or reactive ion etching to etch the tunnel junction to complete the patterning of the tunnel junction.
上述技术方案的工作原理和有益效果为:本方案对刻蚀MTJ采用等离子 刻蚀或者反应离子刻蚀对隧道结进行刻蚀,完成对隧道结的图形化;其中,等离子刻蚀机又叫等离子蚀刻机、等离子平面刻蚀机、等离子体刻蚀机、等离子表面处理仪、等离子清洗系统等。等离子刻蚀是干法刻蚀中最常见的一种形式,其原理是暴露在电子区域的气体形成等离子体,由此产生的电离气体和释放高能电子组成的气体,从而形成了等离子或离子,电离气体原子通过电场加速时,会释放足够的力量与表面驱逐力紧紧粘合材料或蚀刻表面。某种程度来讲,等离子清洗实质上是等离子体刻蚀的一种较轻微的情况。进行干式蚀刻工艺的设备包括反应室、电源、真空部分,工件送入被真空泵抽空的反应室。气体被导入并与等离子体进行交换,等离子体在工件表面发生反应,反应的挥发性副产物被真空泵抽走。等离子体刻蚀工艺实际上便是一种反应性等离子工艺,采用该方式技术成熟,保障了工艺的稳定性,还有利于生产成本控制。The working principle and beneficial effects of the above-mentioned technical scheme are as follows: this scheme adopts plasma etching or reactive ion etching to etch the tunnel junction to etch the MTJ, and completes the patterning of the tunnel junction; wherein, the plasma etching machine is also called a plasma etching machine. Etching machine, plasma planar etching machine, plasma etching machine, plasma surface treatment instrument, plasma cleaning system, etc. Plasma etching is the most common form of dry etching. Its principle is that the gas exposed to the electron region forms a plasma, and the resulting ionized gas and gas composed of released high-energy electrons form plasma or ions. When ionized gas atoms are accelerated through an electric field, they release enough force and surface repelling forces to tightly bond materials or etch surfaces. In a way, plasma cleaning is essentially a milder version of plasma etching. The equipment for performing the dry etching process includes a reaction chamber, a power supply, and a vacuum part, and the workpiece is sent into the reaction chamber evacuated by a vacuum pump. The gas is introduced and exchanged with the plasma, which reacts on the surface of the workpiece, and the volatile by-products of the reaction are removed by the vacuum pump. The plasma etching process is actually a reactive plasma process. This method is mature in technology, ensures the stability of the process, and is also conducive to production cost control.
下面以某磁性隧道结硬掩模的刻蚀为例,对本发明的方法做进一步说明,在磁性隧道结硬掩模的刻蚀中,采用本发明的磁性隧道结硬掩模的刻蚀方法,如图3-8所示,具体步骤如下:Taking the etching of a certain magnetic tunnel junction hard mask as an example below, the method of the present invention is further described. In the etching of the magnetic tunnel junction hard mask, the etching method of the magnetic tunnel junction hard mask of the present invention is adopted, As shown in Figure 3-8, the specific steps are as follows:
步骤S1:提供已沉积隧道结膜层的衬底101,衬底101包含隧道结膜层102的厚度为20~40nm;Step S1: providing the substrate 101 on which the tunnel conjunctival layer has been deposited, the thickness of the substrate 101 including the tunnel conjunctival layer 102 is 20-40 nm;
步骤S2:在衬底101上形成介质层103,厚度50~70nm;Step S2: forming a dielectric layer 103 on the substrate 101 with a thickness of 50-70 nm;
步骤S3:采用光刻胶104将隧道结图案图形化到介质层103,光刻胶104厚度90nm~700nm;Step S3: Patterning the tunnel junction pattern on the dielectric layer 103 by using the photoresist 104, the thickness of the photoresist 104 is 90nm-700nm;
步骤S4:采用CF4、CHF3、SF6、Ar等气体对介质层103进行第一步刻蚀,刻蚀深度为第一深度103a,将隧道结图案转移到介质层剩余厚度103b上,第一深度103a的具体刻蚀深度为30~50nm;Step S4: using CF4, CHF3, SF6, Ar and other gases to etch the dielectric layer 103 in the first step, the etching depth is the first depth 103a, and the tunnel junction pattern is transferred to the remaining thickness 103b of the dielectric layer, the first depth is 103a The specific etching depth is 30-50nm;
步骤S5:采用O 2灰化工艺去除剩余光刻胶104以及由光刻胶因刻蚀残留的有机物; Step S5: using an O2 ashing process to remove the remaining photoresist 104 and the organic matter left by the photoresist due to etching;
步骤S6:采用反应离子刻蚀CF4等气体对介质层进行第二步刻蚀,刻蚀深度为介质层103剩余厚度103b,刻蚀时进行速率测量,若速率存在明显下降,表示介质层刻蚀完成已接触到金属膜层,使磁隧道结图案转移到隧道结膜层;Step S6: Etching the dielectric layer in the second step using gas such as reactive ion etching CF4, the etching depth is the remaining thickness 103b of the dielectric layer 103, and measuring the rate during etching. If the rate drops significantly, it means that the dielectric layer is etched Complete contact with the metal film layer, so that the magnetic tunnel junction pattern is transferred to the tunnel conjunctival layer;
步骤S7:以介质层103为硬掩模,采用等离子或者反应离子刻蚀对隧道 结进行刻蚀,完成对隧道结的图形化。Step S7: Using the dielectric layer 103 as a hard mask, the tunnel junction is etched by plasma or reactive ion etching to complete the patterning of the tunnel junction.
本发明仅涉及一种介质硬掩模,简化了工艺步骤,工艺简单,在介质硬掩模刻蚀过程中对光刻胶进行了灰化去除,排除了光刻胶在工艺中形成的有机物残留与金属膜层接触,从而避免金属聚合物的形成,防止在后面隧道结金属刻蚀中形成附着在胶表面的聚合物,从而降低了去胶的难度,也降低了MRAM电路开路的风险。The present invention only relates to a dielectric hard mask, which simplifies the process steps and is simple in process. During the etching process of the dielectric hard mask, the photoresist is ashed and removed, and the organic residue formed by the photoresist in the process is eliminated. It is in contact with the metal film layer, thereby avoiding the formation of metal polymers and preventing the formation of polymers attached to the surface of the glue in the subsequent tunnel junction metal etching, thereby reducing the difficulty of glue removal and reducing the risk of MRAM circuit open circuit.
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (10)

  1. 一种磁隧道结的刻蚀掩模方法,其特征在于,包括对介质层进行分步刻蚀,并在完成介质层的最后一步刻蚀前采用灰化工艺去除光刻胶及残留的有机物。An etching mask method for a magnetic tunnel junction is characterized in that it includes etching a dielectric layer step by step, and removing photoresist and residual organic matter by using an ashing process before completing the last step of etching the dielectric layer.
  2. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,在对介质层刻蚀过程中,通过控制刻蚀时间的方式以控制各分步的刻蚀深度。The etching mask method of the magnetic tunnel junction according to claim 1, characterized in that, in the etching process of the dielectric layer, the etching depth of each sub-step is controlled by controlling the etching time.
  3. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,介质层的最后一步刻蚀的刻蚀深度为介质层厚度的15-70%。The etching mask method of the magnetic tunnel junction according to claim 1, characterized in that the etching depth of the last etching step of the dielectric layer is 15-70% of the thickness of the dielectric layer.
  4. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,介质层的最后一步刻蚀的刻蚀深度为介质层厚度的20-40%。The etching mask method of the magnetic tunnel junction according to claim 1, characterized in that the etching depth of the last etching step of the dielectric layer is 20-40% of the thickness of the dielectric layer.
  5. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,在介质层的最后一步刻蚀过程中,实时进行刻蚀速率监测,若刻蚀速率下降明显则停止介质层的刻蚀。The etching mask method of the magnetic tunnel junction according to claim 1, characterized in that, in the last etching process of the dielectric layer, the etching rate monitoring is carried out in real time, and if the etching rate drops significantly, then stop the etching of the dielectric layer etch.
  6. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,在介质层刻蚀前,进行以下准备:The etching mask method of the magnetic tunnel junction according to claim 1, characterized in that, before the dielectric layer is etched, the following preparations are carried out:
    S1:提供已沉积MTJ膜层的衬底;S1: Provide the substrate on which the MTJ film layer has been deposited;
    S2:在衬底上形成介质层;S2: forming a dielectric layer on the substrate;
    S3:采用光刻胶图形化MTJ图案到介质层。S3: using a photoresist to pattern the MTJ pattern onto the dielectric layer.
  7. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,所述介质层的刻蚀采用CF4、CHF3、SF6或者Ar气体反应离子刻蚀。The etching mask method of the magnetic tunnel junction according to claim 1, wherein the etching of the dielectric layer adopts CF4, CHF3, SF6 or Ar gas reactive ion etching.
  8. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,所述灰化工艺采用O 2灰化工艺。 The method for etching and masking a magnetic tunnel junction according to claim 1, wherein the ashing process adopts an O2 ashing process.
  9. 根据权利要求1所述的磁隧道结的刻蚀掩模方法,其特征在于,在介质层刻蚀完成后,以介质层为硬掩模刻蚀MTJ。The etching mask method of the magnetic tunnel junction according to claim 1, characterized in that, after the dielectric layer is etched, the MTJ is etched using the dielectric layer as a hard mask.
  10. 根据权利要求9所述的磁隧道结的刻蚀掩模方法,其特征在于,所述刻蚀MTJ采用等离子刻蚀或者反应离子刻蚀对隧道结进行刻蚀,完成对隧道结的图形化。The etching mask method of the magnetic tunnel junction according to claim 9, characterized in that said etching the MTJ adopts plasma etching or reactive ion etching to etch the tunnel junction to complete the patterning of the tunnel junction.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003198007A (en) * 2001-12-25 2003-07-11 Yamaguchi Technology Licensing Organization Ltd Method of forming tunnel junction and tunnel junction device
CN101593691A (en) * 2008-05-26 2009-12-02 中芯国际集成电路制造(北京)有限公司 The lithographic method of groove
CN102969447A (en) * 2011-08-31 2013-03-13 中芯国际集成电路制造(上海)有限公司 Method for forming conductive plug on surface of magnetic tunnel junction (MTJ)
CN103779271A (en) * 2012-10-26 2014-05-07 中微半导体设备(上海)有限公司 Method for etching inverted taper profile
CN104979281A (en) * 2015-05-25 2015-10-14 上海华力微电子有限公司 Contact hole forming method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003198007A (en) * 2001-12-25 2003-07-11 Yamaguchi Technology Licensing Organization Ltd Method of forming tunnel junction and tunnel junction device
CN101593691A (en) * 2008-05-26 2009-12-02 中芯国际集成电路制造(北京)有限公司 The lithographic method of groove
CN102969447A (en) * 2011-08-31 2013-03-13 中芯国际集成电路制造(上海)有限公司 Method for forming conductive plug on surface of magnetic tunnel junction (MTJ)
CN103779271A (en) * 2012-10-26 2014-05-07 中微半导体设备(上海)有限公司 Method for etching inverted taper profile
CN104979281A (en) * 2015-05-25 2015-10-14 上海华力微电子有限公司 Contact hole forming method

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