WO2023000303A1 - Chip turn-off dynamic control method and device - Google Patents

Abstract

A chip turn-off dynamic control method. The method is used in a chip application and comprises: acquiring a first chip parameter of the chip, the first chip parameter indicating a ratio of a remaining life of the chip at the current moment to an expected total working life; dynamically determining a target turn-off threshold of the chip according to the first chip parameter, the target turn-off threshold value indicating an upper limit of the number of turn-offs within a target time period; and controlling chip turn-offs according to the target turn-off threshold value. After the first chip parameter is obtained, the target turn-off threshold of the chip is adjusted according to the first chip parameter. Therefore, the fluctuation of the amplitude of the chip load is reduced, and the reliability of the chip is improved.

Description

Method and device for dynamically controlling chip shutdown technical field

The embodiments of the present application relate to the field of communication technologies, and in particular to a method and device for dynamically controlling the power-off of a chip.

Background technique

With the deployment of the 5th generation mobile networks (5G) system, the excessive power consumption of 5G base stations has gradually become a focus of attention.

At present, when the base station is running, the existing technology only controls the power consumption of the radio frequency power amplifier (Power Amplifier, PA) in the base station, so that the power consumption of the PA changes with the change of the load. However, chips other than the PA in the base station are always running and their power consumption remains almost constant. This part of the chip includes: baseband (Baseband, BB) chip, intermediate frequency (intermediate frequency, IF) chip, enhanced common public radio interface (enhanced Common Public Radio Interface, eCPRI), and radio frequency (Radio Frequency, RF) chip, etc., these The chip is generally a large-scale application-specific integrated circuit (Application-Specific Integrated Circuit, ASIC). Even when the service volume of the base station is small, since these ASICs are always running, the overall power consumption of the base station is relatively large.

Therefore, how to reduce the power consumption of 5G base stations has become the main issue of operators' energy-saving strategies.

Contents of the invention

Embodiments of the present application provide a method and device for dynamically controlling the shutdown of a chip, so as to reduce power consumption of the chip.

The first aspect of the present application provides a method for dynamically controlling the shutdown of a chip. The method includes: acquiring a first chip parameter of the chip, the first chip parameter indicating the ratio of the remaining life of the chip at the current moment to the expected total working life, dynamically determining the target shutdown threshold of the chip according to the first chip parameter, The target turn-off threshold value indicates the upper limit number of times the chip is turned off within the target time period, and within the target time period, the chip is controlled to be turned off according to the target turn-off threshold value.

In the embodiment of the present application, since the total number of times of shutdown in the life cycle of the chip is determined by the total expected working life of the chip, that is to say, the total number of times of shutdown is certain. Therefore, after obtaining the first chip parameters, it is possible to know which stage the chip is currently in in the chip life cycle, and then adjust the target shutdown threshold of the chip according to the first chip parameters, thereby setting Different turn-off threshold times control the turn-off of the chip, so that the chip can be turned off to a large extent in the early stage of the life cycle, thereby reducing the power consumption of the chip. Further, since the chip is generally packaged in a Ball Grid Array Package (BGA). When a BGA packaged chip is running, the temperature difference of the solder balls fluctuates greatly as the load changes, which may cause the solder balls to break. Therefore, in the early stage of the chip life cycle, performing more shutdowns can reduce the large temperature difference of the chip. The probability of amplitude fluctuations prevents solder balls from breaking due to temperature fluctuations, thereby ensuring the reliability of the chip at the beginning of its life cycle.

Based on the method for dynamically controlling chip shutdown in the first aspect of the present application, in a possible implementation, dynamically determine the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold, wherein, At least one target preset threshold is used to divide the expected total working life of the chip into different intervals.

In the embodiment of the present application, the target turn-off threshold is adjusted through the first chip parameter and at least one target preset threshold, so that the target turn-off threshold can be adjusted more accurately.

Based on the method for dynamically controlling the shutdown of the chip in the first aspect of the present application, in a possible implementation manner, controlling the shutdown of the chip according to the target shutdown threshold within the target time period includes: The actual number of shutdowns that have been executed within the period of time. If the actual number of shutdowns does not exceed the target shutdown threshold, the control chip continues to execute the received shutdown command.

In the embodiment of the present application, if the actual number of shutdowns does not exceed the target shutdown threshold, the shutdown will continue, which can protect the device where the chip is located from excessive consumption and prolong the use time of the device where the chip is located.

Based on the method for dynamically controlling the shutdown of the chip in the first aspect of the present application, in a possible implementation manner, controlling the shutdown of the chip according to the target shutdown threshold value within the target time period also includes: When the shutdown times exceed the target shutdown threshold, the control chip stops executing the received shutdown command.

In the embodiment of the present application, if the number of actual shutdowns exceeds the target shutdown threshold, the shutdown is stopped, which can protect the device where the chip is located from excessive consumption and prolong the service life of the device where the chip is located.

Based on the method for dynamically controlling chip shutdown in the first aspect of the present application, in a possible implementation, at least one target preset threshold includes a first preset threshold, and dynamically Determining the target turn-off threshold value of the chip includes: when the first chip parameter is greater than or equal to the first preset threshold value, then determining the target turn-off threshold value as the first turn-off threshold value, the first turn-off gate The limit value is used to indicate the upper limit value for the chip to shut down within the target time period.

In the embodiment of the present application, when the actual number of shutdowns exceeds the first preset threshold, the shutdown will be stopped, which can protect the device where the chip is located, and will not Excessive consumption prolongs the service life of the device where the chip is located.

Based on the method for dynamically controlling chip shutdown in the first aspect of the present application, in a possible implementation manner, at least one target preset threshold further includes a second preset threshold, and the second preset threshold is smaller than the first preset threshold , dynamically determining the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold, further comprising: when the first chip parameter is less than the first preset threshold, and the first chip parameter is greater than the second preset threshold, determine the target turn-off threshold value as the second turn-off threshold value, the second turn-off threshold value is used to represent the upper limit of the chip turning off within the target time period, and the second turn-off threshold value is less than first turn-off threshold.

In the embodiment of the present application, when the first chip parameter is less than the first preset threshold and greater than the second preset threshold, it means that the chip may be in another life period, and at this time the second shutdown threshold is used to limit the chip The upper limit of the shutdown can further reduce the consumption of the chip and prolong the service life of the device where the chip is located.

Based on the method for dynamically controlling chip shutdown in the first aspect of the present application, in a possible implementation manner, at least one target preset threshold is set according to different business application scenarios in the full life cycle of the chip.

In the embodiment of the present application, at least one target preset threshold is set according to different business application scenarios in the full life cycle of the chip, so that the target preset threshold can more accurately determine the life cycle period of the chip, so that the target can be determined more accurately Turn off the threshold, thereby prolonging the use time of the device where the chip is located. For example, in a business application scenario where 4G is the main business, 5G traffic is less, so a base station with 5G always on may result in waste of power consumption. Therefore, considering the balance between power consumption and traffic, set at least one The target preset threshold can set a higher target shutdown threshold when the traffic volume is small, thereby reducing the power consumption of the chip in the scenario of low traffic volume.

Based on the method for dynamically controlling chip shutdown in the first aspect of the present application, in a possible implementation manner, at least one target preset threshold is set according to business application scenarios and different target weights.

In the embodiment of the present application, the target weight represents the needs of the operator, or is set according to human experience, and can also be a weight value set according to an algorithm, such as the weight value after calculation based on a neural network, so according to the target weight And business application scenarios can set the target preset threshold more accurately.

Based on the method for dynamically controlling the shutdown of the chip in the first aspect of the present application, in a possible implementation manner, the first remaining life of the chip at the current moment is obtained, and the first remaining life is obtained by performing a temperature cycle test on the chip, A first chip parameter is generated based on the first remaining lifetime.

In the embodiment of the present application, the first remaining lifetime is obtained by performing a temperature cycle test on the chip, which improves the accuracy of obtaining the first remaining lifetime.

Based on the method for dynamically controlling the shutdown of the chip in the first aspect of the present application, in a possible implementation, the first temperature cycle number of the chip and n first temperature cycle temperature difference values are obtained, and the first temperature cycle number is used to represent The number of temperature cycles accumulated by the chip at the first time point, the first temperature cycle temperature difference value is used to represent the temperature difference of each temperature cycle in the first temperature cycle number, according to the first temperature cycle number and n first temperature cycle temperature difference values , using a preset temperature cycle algorithm to calculate the first remaining life.

In the embodiment of the present application, the first remaining lifetime can be calculated more accurately by acquiring the first number of temperature cycles of the chip and the n first temperature difference values of the temperature cycles.

Based on the method for dynamically controlling the shutdown of a chip in the first aspect of the present application, in a possible implementation manner, the temperature cycle test is performed based on the law of cumulative fatigue damage.

In the embodiment of the present application, when the preset temperature cycle algorithm is fatigue cumulative damage law, the first remaining life can be calculated more accurately.

Based on the method for dynamically controlling the shutdown of a chip in the first aspect of the present application, in a possible implementation manner, the first number of temperature cycles and n first temperature cycle temperature differences of the chip are obtained through a rainflow counting method.

In the embodiment of the present application, the first temperature cycle times and n first temperature cycle temperature differences of the chip are obtained by the rainflow counting method, and the first temperature cycle times and n first temperature cycle temperature differences of the chip can be obtained more accurately value.

Based on the method for dynamically controlling chip shutdown in the first aspect of the present application, in a possible implementation manner, before obtaining the actual number of shutdown times that the chip has performed shutdown within the target time period, it further includes: The first frequency sends a shutdown command to the chip, instructing the chip to shut down.

In the embodiment of the present application, the chip is turned off by the first frequency, and the number of times of shutdown does not exceed the target shutdown threshold value, so that the chip shutdown can be improved to the maximum extent without affecting the stability of the chip. The number of times, thereby reducing the power consumption of the chip.

Based on the method for dynamically controlling the shutdown of a chip in the first aspect of the present application, in a possible implementation, before obtaining the actual number of shutdowns performed by the chip within the target time period, it also includes: obtaining the first load information, the first load information indicates the load condition of the chip at the current moment, and according to the first load information, a shutdown instruction is selectively sent to the chip to instruct the chip to shut down.

In the embodiment of the present application, by first obtaining the load condition of the chip at the current moment, and then shutting down the chip according to the load condition at the current moment, the chip can be turned off when the load condition is small, and the chip can be shut down when the load condition is large. Shutdown is not performed, so that the power consumption of the chip can be saved while ensuring the normal operation of the business.

The second aspect of the present application provides a controller for dynamic energy saving. The controller may include: an acquisition unit, configured to acquire the first chip parameter of the chip, the first chip parameter indicating the ratio of the remaining life of the chip at the current moment to the expected total working life, and a processing unit, configured to obtain the first chip parameter according to the Dynamically determine the target turn-off threshold of the chip. The target turn-off threshold indicates the upper limit of the chip's turn-off times within the target time period. The value controls the shutdown of the chip.

Optionally, the processing unit is specifically configured to dynamically determine the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold, wherein the at least one target preset threshold is used to calculate the total expected working life of the chip divided into different intervals.

Optionally, at least one target preset threshold includes a first preset threshold;

The processing unit is also used to determine that the target shutdown threshold value is the first shutdown threshold value when the first chip parameter is greater than or equal to the first preset threshold value, and the first shutdown threshold value is used to indicate that the chip is in the target state. The upper limit value for shutdown during the time period.

Optionally, at least one target preset threshold further includes a second preset threshold, and the second preset threshold is smaller than the first preset threshold;

The processing unit is specifically configured to determine that the target turn-off threshold value is the second turn-off threshold value when the first chip parameter is less than the first preset threshold and the first chip parameter is greater than the second preset threshold value, and the second turn-off threshold The threshold value is used to indicate the upper limit value for the chip to be turned off within the target time period, and the second turn-off threshold value is smaller than the first turn-off threshold value.

Optionally, the acquisition unit is also used to acquire the actual number of shutdowns performed by the chip within the target time period;

The processing unit is also used for the control chip to continue to execute the received shutdown instruction when the actual shutdown times do not exceed the target shutdown threshold.

Optionally, the processing unit is further configured to control the chip to stop executing the received shutdown instruction when the actual shutdown times exceed the target shutdown threshold.

Optionally, at least one target preset threshold is set according to different business application scenarios in the whole life cycle of the chip.

Optionally, at least one target preset threshold is set according to business application scenarios and different target weights.

Optionally, the obtaining unit is also used to obtain the first remaining life of the chip at the current moment, and the first remaining life is obtained by performing a temperature cycle test on the chip;

The controller also includes:

A generating unit, configured to generate the first chip parameter according to the first remaining lifetime.

Optionally, temperature cycling tests are performed based on the law of fatigue cumulative damage.

Optionally, the controller also includes:

The sending unit is configured to send a shutdown command to the chip at a preset first frequency to instruct the chip to shut down.

Optionally, the acquiring unit is also used to acquire first load information, where the first load information indicates the load condition of the chip at the current moment;

The sending unit is further configured to selectively send a shutdown instruction to the chip according to the first load information, instructing the chip to shut down.

Optionally, the chip is an ASIC chip.

Optionally, the controller is applied to a communication base station.

Optionally, the controller is set in the main control module or transmission module of the communication base station.

Optionally, the controller is applied in the vehicle.

Optionally, the controller is set in the body domain controller of the vehicle, and/or in the intelligent cockpit domain controller, and/or in the intelligent driving domain controller, and/or in the vehicle domain controller.

The steps performed by the controller in the second aspect of the present application are similar to the steps performed in the first aspect of the present application, and details are not repeated here.

The third aspect of the present application provides a computer storage medium. Instructions are stored in the computer storage medium. When the instructions are executed on the computer, the computer executes the method according to the embodiment of the first aspect of the application.

The fourth aspect of the present application provides a computer program product. When the computer program product is executed on a computer, the computer executes the method according to the implementation manner of the first aspect of the present application.

The fifth aspect of the present application provides a controller, including a processor, the processor is coupled with a memory, at least one program instruction or code is stored in the memory, at least one program instruction or code is loaded and executed by the processor, so that the control The device realizes the method of the first aspect of the present application.

The sixth aspect of the present application provides a chip system, including: applied to a controller, the chip system includes at least one processor, a memory, and an interface circuit, the memory, the transceiver, and the at least one processor are interconnected through lines, and the at least one memory Instructions are stored; the instructions are executed by the processor to perform the method of the first aspect of the present application.

The seventh aspect of the present application provides a control system, including: a controller, and the controller may be any one of the controllers in the second aspect of the present application. The device is electrically connected to the controller, the device is provided with a chip, and the device receives a shutdown command sent by the controller, and the shutdown command is used to instruct the device to shut down the chip.

It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

After the first chip parameter is obtained, the target turn-off threshold of the chip is determined according to the first chip parameter, so that the chip can be turned off to the greatest extent under the current service life, thereby reducing the power consumption of the chip.

Description of drawings

FIG. 1 is a schematic diagram of power consumption of the prior art provided by the embodiment of the present application;

FIG. 2 is a schematic diagram of a scene architecture of a method for dynamically controlling chip shutdown provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of another scene architecture of the method for dynamically controlling chip shutdown provided by the embodiment of the present application;

FIG. 4 is a schematic diagram of another scene architecture of the method for dynamically controlling chip shutdown provided by the embodiment of the present application;

FIG. 5 is a schematic flowchart of a method for dynamically controlling chip shutdown provided by an embodiment of the present application;

FIG. 6 is a schematic flow diagram of the temperature cycle algorithm in the method for dynamically controlling the shutdown of the chip provided by the embodiment of the present application;

FIG. 7 is a schematic structural diagram of a controller provided in an embodiment of the present application;

Fig. 8 is another structural schematic diagram of the controller provided by the embodiment of the present application;

FIG. 9 is another schematic structural diagram of the controller provided by the embodiment of the present application.

detailed description

Embodiments of the present application provide a data processing method and device, which can be used to reduce chip power consumption.

The following will describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

With the deployment of 5G, the problem of excessive power consumption of 5G base stations has gradually become a focus of attention. In the prior art, when the base station is in the running state, only the power consumption of the power amplifier PA in the base station changes with the load change, and the power consumption of other parts of the chip hardly changes with the load change, wherein the other parts of the chip include: baseband (baseband, BB), intermediate frequency (intermediate frequency, IF), enhanced common public radio interface + eCPRI) and radio frequency (Radio Frequency, RF) and other chips.

Please refer to FIG. 1 , which is a schematic diagram of power consumption of an existing 3G/4G base station provided by the embodiment of the present application. Among them, the abscissa indicates the load level of the 3G/4G base station, the ordinate indicates the power, the a box indicates the power of the baseband chip, the b box indicates the power of IF+eCPRI, the c box indicates the power of the RF chip, and the d box indicates PA power. Among them, BB, IF+eCPRI and RF are composed of large-scale ASIC chips (hereinafter referred to as chips). It can be seen that when the load increases from 0, the power of the baseband chip, the power of IF+eCPRI and the power of RF remain almost unchanged, while the power of the PA increases with the increase of the load. Why does the power consumption of baseband chips, IF+eCPRI and RF chips seem to have no change? According to the research report, in 3G/4G base stations, baseband chips, IF+eCPRI and RF chips account for a very low proportion of the total power consumption, about 10%. The increase in power consumption is negligible, so they are not like PAs, where power consumption increases dramatically with load. However, in the 5G era, the power consumption of BB, IF+eCPRI, and RF chips in 5G base stations accounts for more than half of the power consumption of 5G base stations. As the load changes, the power consumption of these chips will also vary with the power consumption of PA. The load increases dramatically. In addition, since most of these chips are packaged in BGA, this type of package will cause the temperature difference of the solder balls of the chip to fluctuate greatly when the chip is running, if the load changes continuously, which may cause the solder balls to break. phenomenon, which in turn affects the reliability of the chip.

In order to solve the reliability problem of the above chip, the embodiment of the present application provides a method for dynamically controlling the shutdown of the chip, through the closed-loop management of the chip to adjust the number of shutdowns of the chip correspondingly, reducing the power consumption of the chip, and ensuring the reliability of the chip.

In the following, a system adopting the method for dynamically controlling the shutdown of a chip provided by the embodiment of the present application will be described.

Please refer to FIG. 2 . FIG. 2 is a schematic structural diagram of a system to which the method for dynamically controlling chip shutdown provided by the embodiment of the present application is applied.

As shown in FIG. 2 , the system architecture includes a first module 201 , a second module 202 and a third module 203 . Wherein, the first module 201 is coupled to the second module 202 , and the third module 203 is integrated in the second module 202 . It can be understood that, in an actual application process, the first module 201 may also be integrated into the second module 202, which is not specifically limited here.

In a possible implementation manner, the first module 201 may be a controller for dynamically controlling the shutdown of the chip. It should be understood that the controller may be specifically implemented by a processor, a microprocessor MCU, or a logic circuit. The second module 202 may be a hardware device. The third module 203 is a chip arranged in the hardware device, which can also be called an integrated circuit, that is, the integrated circuit can include but not limited to an ASIC chip, a field programmable gate array (field programmable gate array, FPGA) chip, etc. chip type. Among them, the hardware device estimates the working life of the ASIC chip, and calculates the current remaining life of the ASIC chip. After calculating the remaining life of the ASIC chip, the hardware device sends the remaining life of the ASIC chip to the controller, and the controller then Shutdown of the ASIC chip is controlled according to the remaining lifetime of the ASIC chip.

It should be noted that the shutdown referred to in the embodiment of the present application may mean deep shutdown in a practical application process. Those skilled in the art should know that deep shutdown, also known as deep sleep, refers to turning off the power supply of most of the active devices (ie, the third module 203) in the second module 202 (ie, hardware devices), so that the active Device is in sleep state. It should be noted that, in the embodiment of the present application, the controller can perform deep shutdown of the ASIC chip by setting the deep shutdown threshold value, or can perform deep shutdown of the ASIC chip through real-time instructions. Do limited.

It should be noted that the method for dynamically controlling the shutdown of the chip provided by the embodiment of the present application has many application scenarios. Used in other network products, such as the smart vehicle system in the field of Internet of Vehicles as shown in Figure 4, as long as there is a clear reliability life cycle requirement and its reliability life cycle is sensitive to temperature changes, it is acceptable. The method for dynamically controlling chip shutdown in this application can be applied.

In the following, based on the system architecture provided by the embodiment of the present application, the method for dynamically controlling the shutdown of the chip in the embodiment of the present application will be described in detail in combination with the above-mentioned application scenarios.

Please refer to FIG. 5 , which is a schematic flowchart of a method for dynamically controlling a chip shutdown provided by an embodiment of the present application.

Referring to FIG. 2, in FIG. 5, the first module is still the controller that controls the shutdown of the chip, the second module is each device or hardware that needs to implement dynamic energy saving, and the third module is each of the devices that need to implement dynamic energy saving. A chip (that is, an integrated circuit) is taken as an example for description.

In step 501, the device acquires the current first remaining lifetime of the chip.

Typically, after the device design is complete, the expected total operating life of the chips in the device is determined. During the operation of the chip, it will gradually age, and then continue to consume the working life. During this process, the device can obtain the current first remaining life of the chip. It should be noted that the expected total working life of the semiconductor device is usually also called The reliability of a semiconductor device refers to the fact that a semiconductor device can work reliably within its expected total working life, but after the actual working time exceeds the expected total working life, due to factors such as fatigue or failure, the reliability of the semiconductor device may Unable to meet demand. It should be noted that, in the embodiment of the present application, terms such as the full life cycle of the chip are also used, and it should be understood that this term is the same concept as the total expected working life.

In a possible implementation manner, the device may calculate the current first remaining lifetime of the chip according to a preset temperature cycle algorithm. Those skilled in the art should know that the service life of most semiconductor devices can exceed many years under normal use. Conduct research on the lifetime of semiconductor devices. Researchers have found that in the aging process of semiconductor devices, some common accelerating factors such as temperature, humidity, voltage and current can accelerate the aging of semiconductor devices. Therefore, researchers usually study the lifetime of semiconductor devices by applying stress on these accelerating factors to enhance or accelerate potential failure mechanisms in semiconductor devices. Since this accelerated test does not change the physical characteristics of the failure, the lifetime of the semiconductor device can be inferred from the change between the accelerated condition and the normal use condition. Because temperature is relatively more difficult to control among these acceleration factors, researchers can use temperature cycling (TC) tests to expose semiconductor devices to extreme high and low temperature conditions, and the cycle test reaches a predetermined number of times. , and then evaluate the reliability of the semiconductor device according to the test results. Therefore, the preset temperature cycle algorithm may be an algorithm developed based on the principle of temperature cycle test for calculating the remaining life of the chip, or an algorithm developed based on the law of cumulative fatigue damage, for example. Furthermore, since the actual operating environment of semiconductor devices may also be affected by other acceleration factors besides temperature, such as humidity, voltage and current, etc., the temperature cycle algorithm mentioned in the embodiment of this application includes but is not limited to temperature An acceleration factor may also incorporate other acceleration factors, which are not specifically limited here.

In a possible implementation, before the device obtains the first remaining life according to the preset temperature cycle algorithm, the device also obtains the first number of temperature cycles and n first temperature difference values of the chip. The first temperature cycle The number of times is used to indicate the number of temperature cycles accumulated by the chip at the first time point, and the temperature difference value of the first temperature cycle is used to indicate the temperature difference of each temperature cycle in the first number of temperature cycles. Wherein, the first time point represents the current time point or a certain time point before the current time point. For example, when the first time point represents the current time point, the chip acquires n times of accumulated temperature cycles up to the current time point at the current time point, and the temperature difference of each temperature cycle in the n times of temperature cycles. For another example, when the first time point represents the time point half an hour before the current time point, the chip obtains the number of temperature cycles accumulated at the time point half an hour before the current time point, and the temperature difference of each temperature cycle.

In a possible implementation manner, the device may acquire the number of first temperature cycles of the chip and n first temperature cycle temperature differences by using a rainflow counting method with a period of T. Among them, the T cycle means that after a fixed period of time, the cumulative number of first temperature cycles is obtained once. The T cycle can be in seconds, or in minutes, or in other time The unit is, for example, the unit is day or week, which is not limited here.

Among them, the rainflow counting method is an algorithm for calculating the fatigue life of equipment. Specifically, the abscissa of the rainflow counting method represents the coordinates of the time axis, and the ordinate represents the difference in each temperature cycle. For example, as shown in Figure 6, the X-axis is the ordinate axis, and the time-coordinate axis t-axis is the abscissa axis. Wherein, the entire coordinate axis is rotated by 90°, and the time-coordinate axis is vertically downward. It can be seen that each There are corresponding temperature cycle difference records at each time point, and the device can obtain the corresponding first temperature cycle times and n first temperature cycle temperature difference values through the rainflow counting method.

In a possible implementation, after acquiring the first number of temperature cycles and n first temperature difference values of temperature cycles, the device may The rule gets the first remaining lifetime. Specifically, the equipment obtains the number of temperature cycles n and the temperature difference ΔTi of the temperature cycle according to the rainflow counting method. The fatigue life damage of the i-th temperature cycle is 1/Ti. The fatigue life damage of the number of cycles is ∑1/Tk, then the remaining life cycle = 1-∑1/Tk.

It can be understood that, in an actual application process, the device may also obtain the first remaining life in other ways, for example, by looking up a table to obtain the first remaining life. For example, the record of the chip during testing is a table, in which the number of temperature cycles and the corresponding remaining life are recorded in the table. When the chip is actually running, by querying the corresponding number of temperature cycles in the table, the chip’s temperature can be obtained. remaining life. A specific manner of obtaining the first remaining lifetime is not limited here.

In step 502, the device sends information to the controller indicating the first remaining lifetime.

Specifically, after the device acquires the current first remaining lifetime of the chip, the device sends information to the controller to indicate the first remaining lifetime.

In step 503, the controller obtains a first chip parameter according to the first remaining lifetime.

Specifically, after the controller receives the information indicating the first remaining life, the controller can obtain the first remaining life and obtain the first chip parameter according to the first remaining life, the first chip parameter indicates the remaining time of the chip at the current moment. Ratio of life to total expected working life.

Wherein, the expected total working life indicates the expected total working life of the chip after the design of the chip is completed. The expected total operating lifetime is a fixed value that is determined after the chip design is completed.

In a possible implementation, after obtaining the first remaining life, the controller divides the first remaining life by the total expected working life to obtain the proportion of the first remaining life in the total expected working life, that is, the first Chip parameters. For example, the total expected working life of the chip is L0, and the first remaining life of the chip at the first time point is Lrest, then the first chip parameter=Lrest/L0, and the value of the first chip parameter can be a specific value, such as 0.8, 0.7, etc., can be expressed in the form of percentage, such as 80%, 50%, etc., which are not limited here. Of course, the relationship between the first remaining life and the expected total working life can also be expressed in other ways, which is not specifically limited here.

In step 504, the controller dynamically determines a target turn-off threshold according to the first chip parameter.

After the controller obtains the first chip parameter, the controller can dynamically determine the target turn-off threshold value according to the first chip parameter, and the target turn-off threshold value is used to indicate the upper limit number of times the chip is turned off within the target time period .

In an actual application process, the first chip parameter may decrease as the actual working time of the chip increases, so the target turn-off threshold value is also constantly changing. For example, according to the application scenarios of 5G base station services and the characteristics of operators' needs, in the initial stage of system operation, due to the fact that there may be fewer users handling 5G communication services, the actual traffic volume of access to 5G base stations may be small. There are sporadic user access requirements only a few times, which makes the operator's demand for dynamic energy saving more urgent. Therefore, in the initial stage of 5G base station operation, more deep energy-saving shutdown times can be allowed without affecting normal business. In this case, more shutdowns are performed on the 5G base station, thereby saving the power consumption of the 5G base station. With the continuous maturity of 5G communication and the continuous growth of 5G network traffic, operators gradually reduce the demand for dynamic energy saving, and instead focus on providing users with stable network access capabilities. Therefore, it is necessary for 5G base stations to be in working state as much as possible. In order to ensure that users can access at any time, correspondingly, the number of shutdowns of 5G base stations can be gradually reduced until it is reduced to zero.

In a possible implementation manner, the controller may dynamically determine the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold. Wherein, the at least one target preset threshold is used to divide the expected total working life of the chip into different intervals. Specifically, the at least one target preset threshold may be set according to different business application scenarios in the whole life cycle of the chip, or may be set according to different business application scenarios and different target weights. Among them, the target weight is based on the needs of the operator, or set according to the experience value, or the weight value set according to the algorithm, such as the weight value calculated according to the neural network, and the setting method of the specific target preset threshold There is no limit here.

In a possible implementation manner, the target shutdown threshold further includes a first shutdown threshold, the target time period further includes a first time period, and at least one target preset threshold includes the first preset threshold . The controller judges whether the first chip parameter is greater than or equal to a first preset threshold, and the first preset threshold is preset by the controller. If yes, then determine a first turn-off threshold, where the first turn-off threshold is used to indicate the upper limit number of times the chip is turned off within the first time period. Wherein, the first preset threshold can be set according to experience. For example, when the first chip parameter is greater than 80%, the chip is considered to be in the early stage of system operation according to design requirements, and 80% can be set as the first preset threshold. Correspondingly, when the first chip parameter is greater than the first preset threshold, it indicates that the chip is actually in the initial stage of system operation, and the controller can set the first shutdown threshold value to 3 times, indicating that the chip is in the initial stage of system operation. The upper limit number of shutdown executions is 3 times.

Wherein, the first period of time can be expressed as a deadline, that is, before the deadline, the number of shutdown times of the chip can be set to not exceed the first shutdown threshold. Exemplarily, the first period of time can actually be It is a day, a week, or a month, etc., which is not specifically limited in this application. Alternatively, the first time period can also be expressed as the corresponding time period when the first chip parameter is not lower than the first preset threshold, that is, as long as the first chip parameter is not lower than the first preset threshold, within this time period Both set the turn-off times as the first turn-off threshold.

In a possible implementation manner, the target turn-off threshold value also includes a second turn-off threshold value, the second turn-off threshold value is smaller than the first turn-off threshold value, and the target time period also includes the second turn-off threshold value. During the time period, at least one target preset threshold includes a second preset threshold. If the first chip parameter is less than the first preset threshold, continue to judge whether the first chip parameter is greater than or equal to the second preset threshold, the second preset threshold is also preset, and the second preset threshold is smaller than the first preset threshold. Set the threshold. If the first chip parameter is greater than the second preset threshold and less than the first preset threshold, then determine the second shutdown threshold value, the second shutdown threshold value is used to indicate that the chip is turned off within the second time period Maximum number of times. Wherein, the second preset threshold can be set according to experience, for example, when the first chip parameter is less than 80%, and the first chip parameter is greater than 50%, then it is considered that the remaining life is between [50%, 80%) when this interval , the chip is in the middle of system operation, then 50% is set as the second preset threshold. Also take the operation of 5G base stations as an example. When 5G services are gradually promoted and the number of users increases, the corresponding 5G access requests will gradually increase; The two aspects of stable network access for users are balanced. Therefore, the shutdown strategy in the second time period may be to reduce the number of shutdowns compared with the first time period. That is, when the first chip parameter is less than the first preset threshold and greater than the second preset threshold, the second shutdown threshold can be set to 1 time, which means that the number of chip shutdowns in the middle of the system operation is 1 Second-rate.

Wherein, the second time period may be represented as a deadline, that is, before the deadline, the number of chip shutdowns may be set to not exceed the second shutdown threshold. Alternatively, the second time period may also mean that the first chip parameter is not lower than the second preset threshold, that is, as long as the first chip parameter is not lower than the second preset threshold, within this time period all Set the shutoff times as the second shutoff threshold.

It can be understood that, in the actual application process, more shutdown thresholds can also be set, for example, at least one target preset threshold also includes a third preset threshold of 20%, and the remaining life of the chip is between [ 20%, 50%), this interval is regarded as the middle and late stage of system operation, that is, when the first chip parameter falls within this interval, the controller sets the target shut-off threshold as the third shut-off threshold, which The third shutdown threshold represents the number of times the chip is turned off in the middle and late stages of system operation. It should be understood that the interval [0, 20%) can also be regarded as the late stage of system operation. During this period, the business operation of the system is mainly guaranteed, and the chip may not be shut down, so that the chip can always work. It should be known that the above is only an example of the present application, and the specific number of times to set the shutdown threshold is not limited here, and can be flexibly set according to the needs of system design or system operation strategy.

In step 505, the controller sends the target shutdown threshold to the device.

After the controller sets the target shutdown threshold value, the controller sends the target shutdown threshold value to the device.

In step 506, the device judges whether the actual number of shutdowns is greater than or equal to the target shutdown threshold.

After the device obtains the target shutdown threshold value, the device judges whether the actual shutdown times are greater than or equal to the target shutdown threshold value, and the actual shutdown times indicate the number of times the chip has actually been shut down.

In the actual application process, the device will detect in real time the actual number of times the chip has been shut down within the target time period, or, in a possible implementation, the device will detect in real time that the chip is shut down at the current time point number of breaks. If the number of actual shutdowns exceeds the target shutdown threshold, the device will stop the chip from executing shutdowns, that is, the control chip will stop executing the received shutdown commands. If the actual shutdown times do not exceed the target shutdown threshold, the control chip continues to execute the received shutdown command. It should be understood that taking the operation of a 5G base station as an example, there are other factors that may cause the 5G base station to shut down the chip during actual operation, such as regional power outages, repairs by maintenance personnel, etc. If the target shutdown threshold is exceeded, the above exit mechanism is designed to ignore the subsequent shutdown instructions received to avoid conflicts, because the total number of shutdown times of the chip is certain, and if too many times are consumed in a certain stage, it is difficult to Ensure that there are enough times to consume in the subsequent stages. If the number of actual shutdowns does not exceed the target shutdown threshold, the chip will continue to perform shutdown.

Specifically, in a possible implementation, the device counts the number of shutdown times before the current time point, and reads the currently configured target shutdown threshold value, for example, the currently configured target shutdown threshold value is the first The shutdown threshold value or the second shutdown threshold value is used to determine whether the target shutdown times exceed the first shutdown threshold value or the second shutdown threshold value, and if so, the shutdown is stopped. If not exceeded, shutdown continues.

In step 507, the device sends a shutdown command to the chip.

After the device determines whether to continue to shut down, the device sends a shutdown instruction to the chip, where the shutdown instruction is used to instruct the chip to continue to perform shutdown or stop performing shutdown.

It should be noted that in the actual application process, the shutdown command can be sent to the chip by the controller controlling the device; It may be that the controller directly sends the shutdown command to the chip, and the specific sender of the shutdown command is not limited here.

Specifically, in a possible implementation, the shutdown instruction is sent to the chip through the first frequency to instruct the chip to shut down, the number of shutdowns corresponding to the first frequency is less than or equal to the target shutdown threshold, and the first frequency Used to indicate the number of times the chip is turned off in the first cycle. Wherein, the first cycle may be expressed as a repeated cycle, for example, one day is a first cycle, and the chip is turned off three times a day.

Or, in a possible implementation manner, the device also acquires the first load information, which indicates the load condition of the chip at the current moment, and selectively reports to the chip according to the first load information and the target shutdown threshold value. Send a shutdown command to instruct the chip to shut down. For example, the first load information shows that the load of the chip is low, which indicates that the current traffic may be less, so the shutdown can be performed. When the actual number of shutdowns does not exceed the target shutdown threshold, the The chip sends a shutdown command to instruct the chip to execute shutdown. It is understandable that if the actual number of shutdowns exceeds the target shutdown threshold, even if the current traffic is small, no shutdown command is sent to the chip. Alternatively, when the first load information shows that the load of the chip is good, that is, the good load indicates that the current traffic may be large, so the shutdown may not be executed, that is, no shutdown instruction is sent to the chip.

It should be noted that whether the shutdown command is sent to the chip through the first frequency or the shutdown command is sent to the chip through the first load information, it is the case of actively sending the shutdown command, and the actual number of shutdowns may also include Passive shutdown, for example, the device is forced to power off, or is suddenly damaged, etc., resulting in the sudden shutdown of the chip.

In this embodiment of the application, the execution subject for obtaining the first remaining life may be the device where the chip is located, or the controller, or the chip itself may obtain the first remaining life and then send it to the device or controller where the chip is located. Specifically, there is no limitation here.

In the embodiment of the present application, steps 504 to 506 are optional steps. When the target shutdown threshold value is not set, the controller regulates the number of shutdown times of the chip in real time according to the first chip parameter. In a possible implementation, the controller judges whether the first chip parameter is greater than a first preset threshold, and the first preset threshold is preset. If the first chip parameter is greater than the first preset threshold, it means that the system is running at In the initial stage, the number of times the chip is turned off is increased. For example, when the controller acquires that the first chip parameter is 90%, the controller increases the number of shutdown times from 0 to 3 times. If the first chip parameter is reduced to 60%, the controller will reduce the number of shutdowns from the original 3 times to 2 times.

In the embodiment of the present application, after the first remaining life is obtained, the first chip parameter is obtained according to the first remaining life, and the number of times the chip is turned off is adjusted according to the first chip parameter, which can reduce the amplitude fluctuation of the chip load, Thus, the reliability of the chip is improved.

In the embodiment of this application, since the first remaining life is directly proportional to the number of shutdowns, a closed-loop management method is adopted to reasonably allocate the number of shutdowns without increasing the expected total life, and allocate as many shutdowns as possible at the initial stage of system operation. The number of shutdowns is used for dynamic energy saving, and in the middle of system operation, as the utilization rate of the chip increases, a small number of shutdowns is allocated to achieve effective energy saving.

In order to better illustrate the technical solution of the present application, the technical solution of the present application will be described in detail below in combination with specific application scenarios.

Wherein, the present application also provides a control system, in which the control system includes a controller, a device, and a chip in the device. Wherein, the controller and the device are connected in a wired or wireless manner, and a chip is provided in the device, and the steps performed by the controller are similar to those performed by the controller in the embodiment shown in FIG. 5 , and details are not repeated here. In the actual application process, the device can receive the control instruction sent by the controller, so as to realize the control instruction of the controller to the device and the chip. Specifically, detailed descriptions will be made below in conjunction with specific application scenarios.

Returning to FIG. 3, FIG. 3 is a schematic diagram of applying the method for dynamically controlling chip shutdown provided by the embodiment of the present application to a 5G base station scenario.

As shown in Figure 3, it is a schematic diagram of an architecture in a 5G scenario. Wherein, the architecture diagram includes an active antenna processing unit (Active Antenna Unit, AAU) 301 and a baseband processing unit (Building Base band Unite, BBU) 305. Under the 5G architecture, data transmission can be performed between the AAU301 and the BBU305 through the common public radio interface CPRI or the enhanced common public radio interface. Among them, AAU301 also includes modules such as baseband downshift unit (BaseBand L1-LOW, BBL) 304 and intermediate frequency 303, BBL304 and intermediate frequency 303 are composed of ASIC chips, and the main control/transmission module 302 is used to control BBL304 and intermediate frequency 303 Or to transmit the data of AAU301, a controller may be deployed in the main control/transmission module 302. The BBU305 also includes a baseband upshift unit (BaseBand L1-High, BBH) 306 and a main control/transmission module 307. The BBH306 is composed of an ASIC chip. The main control/transmission module 307 is used to control the baseband processing unit BBU305 or transmit the data of the baseband processing unit BBU305. A controller can be deployed in the main control/transmission module 307. Among them, the baseband downshifting unit BBL304 is the part processed by the baseband unit in the enhanced common public radio interface (enhanced CPRI) mode, eCPRI segmentation. The baseband upshift unit BBH306 is the part processed by the radio frequency unit in the eCPRI mode. The intermediate frequency 303 is used to convert the high frequency signal in the base station into an intermediate frequency signal.

It can be understood that, in an actual application process, the active antenna processing unit AAU301 and/or the baseband processing unit BBU305 may also include more modules or units, which are not specifically limited here.

It should be noted that, in the actual application process, the controller can be included in the main control/transmission module, and can also be set separately in the baseband processing unit BBU305 or the active antenna processing unit AAU301, or can also be set in the baseband processing unit In the BBU305 or outside the active antenna processing unit AAU301, for example, a controller is set in the baseband processing unit BBU305 or outside the active antenna processing unit AAU301, and is connected with the baseband processing unit BBU305 or the active antenna processing unit by wire or other methods The AAU301 communicates, so that the baseband processing unit BBU305 or the active antenna processing unit AAU301 can perform data transmission with the controller, so that the controller can perform closed-loop management on the baseband processing unit BBU305 or the active antenna processing unit AAU301. The specific setting method and setting position of the controller are not limited here.

The controller is used to execute the remaining life consumption rules of the baseband processing unit BBU305 or the active antenna processing unit AAU301, including but not limited to the configuration of the controller itself, visual presentation and alarm of management status and results. The baseband processing unit BBU305 or the active antenna processing unit AAU301 realizes the detection and quantification of the remaining working life of the baseband downshift unit BBL304 and the intermediate frequency 303 or the baseband upshift unit BBH306, and reports the results to the controller, and at the same time executes the command, that is, the baseband downshift unit BBL304 and the intermediate frequency 303 or the baseband upshift unit BBH306 execute the corresponding shutdown times within a specified period.

Specifically, the method steps performed by the baseband downshifting unit BBL304 and the intermediate frequency 303 are similar to the method steps performed by the chip in the above embodiment shown in FIG. 5 , and details are not repeated here. The method steps performed by the active antenna processing unit AAU301 are similar to the method steps performed by the device in the above embodiment shown in FIG. 5 , and details are not repeated here. The method steps performed by the controller are similar to the method performed by the controller in the aforementioned embodiment shown in FIG. 5 , and details are not repeated here.

Please also refer to FIG. 4 . FIG. 4 is a schematic diagram of applying the method for dynamically controlling chip shutdown provided by the embodiment of the present application to a vehicle driving system scenario.

As shown in Figure 4, it is a schematic diagram of the architecture in a vehicle driving system scenario. Among them, the vehicle driving system scenario includes vehicle intelligent terminal Tbox401, central gateway 402, body domain controller BCM406, intelligent cockpit domain controller CDC405, intelligent driving domain controller MDC404 and vehicle domain controller VCU403. Among them, body domain controller BCM406, intelligent cockpit domain controller CDC405, intelligent driving domain controller MDC404 and vehicle domain controller VCU403 are respectively connected to the central gateway 402, body domain The driving domain controller MDC404 and the vehicle domain controller VCU403 contain different ASIC chips respectively. The vehicle-mounted intelligent terminal 401 also includes an ASIC chip, and the vehicle-mounted intelligent terminal 401 is connected to the central gateway 402 .

Among them, the controller can be set in the body domain controller BCM406, the intelligent cockpit domain controller CDC405, the intelligent driving domain controller MDC404 and the vehicle domain controller VCU403, and is used to control the body domain controller BCM406 and the intelligent cockpit domain controller respectively. The CDC405, the intelligent driving domain controller MDC404 and the ASIC chip of the vehicle domain controller VCU403 perform closed-loop management. It can be understood that in the actual application process, the controller can also be set in the vehicle-mounted intelligent terminal Tbox401. The specific controller settings The method is not limited here.

Body domain controller BCM406, intelligent cockpit domain controller CDC405, intelligent driving domain controller MDC404, and vehicle domain controller VCU403 respectively obtain the remaining life of the corresponding chip, and send the remaining life of the corresponding chip to each controller. The controller then adjusts the upper limit times of the chips corresponding to the body domain controller BCM406, the smart cockpit domain controller CDC405, the smart driving domain controller MDC404, and the vehicle domain controller VCU403 according to the remaining life of the corresponding chips. To achieve dynamic adjustment of the energy-saving state of the corresponding chip.

Specifically, the chip in the body domain controller BCM406, the chip in the intelligent cockpit domain controller CDC405, the chip in the intelligent driving domain controller MDC404, the chip in the vehicle domain controller VCU403, and the chip in the vehicle intelligent terminal 401 The executed method steps are similar to those executed by the chip in the aforementioned embodiment shown in FIG. 5 , and details are not repeated here. Body domain controller BCM406, intelligent cockpit domain controller CDC405, intelligent driving domain controller MDC404, vehicle domain controller VCU403, and the method steps performed by the controller in the vehicle intelligent terminal 401 and the control in the embodiment shown in the foregoing Figure 5 The method steps performed by the device are similar, and details are not repeated here. The method steps performed by the body domain controller BCM406, the intelligent cockpit domain controller CDC405, the intelligent driving domain controller MDC404, the vehicle domain controller VCU403, and the vehicle-mounted intelligent terminal 401 and the method performed by the device in the aforementioned embodiment shown in FIG. 5 The steps are similar and will not be repeated here.

The above is an example of the application scenarios of the controller. In the actual application process, the controller can also have more application scenarios, such as some scenarios that require closed-loop management of the working life of the chip. The specific application scenarios are not listed here. Do limited.

The method for dynamically controlling the shutdown of the chip in the present application is described above, and the controller provided in the embodiment of the present application is described below.

Please refer to FIG. 7 , which is a schematic structural diagram of the controller provided by the embodiment of the present application.

A controller comprising:

The acquisition unit 701 is configured to acquire the first chip parameter of the chip, the first chip parameter indicates the ratio of the remaining life of the chip at the current moment to the expected total working life;

The processing unit 702 is configured to dynamically determine a target turn-off threshold of the chip according to the first chip parameter, where the target turn-off threshold indicates an upper limit number of times the chip is turned off within a target time period;

The processing unit 702 is further configured to control the shutdown of the chip according to the target shutdown threshold within the target time period.

The steps performed by each unit of the controller in this embodiment are similar to the steps performed by the controller in FIG. 5 above, and details are not repeated here.

Please refer to FIG. 8 , which is another structural schematic diagram of the controller provided by the embodiment of the present application.

A controller comprising:

The acquisition unit 801 is configured to acquire the first chip parameter of the chip, the first chip parameter indicates the ratio of the remaining life of the chip at the current moment to the total expected working life;

The processing unit 802 is configured to dynamically determine a target turn-off threshold of the chip according to the first chip parameter, where the target turn-off threshold indicates an upper limit number of times the chip is turned off within a target time period;

The processing unit 802 is further configured to control the shutdown of the chip according to the target shutdown threshold within the target time period.

Optionally, the processing unit 802 is specifically configured to dynamically determine the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold, where the at least one target preset threshold The lifetime is divided into different intervals.

Optionally, at least one target preset threshold includes a first preset threshold;

The processing unit 802 is further configured to determine that the target shutdown threshold value is the first shutdown threshold value when the first chip parameter is greater than or equal to the first preset threshold value, and the first shutdown threshold value is used to indicate that the chip is Upper limit for shutdown within the target time period.

Optionally, at least one target preset threshold further includes a second preset threshold, and the second preset threshold is smaller than the first preset threshold;

The processing unit 802 is specifically configured to, when the first chip parameter is less than the first preset threshold and the first chip parameter is greater than the second preset threshold, determine that the target shutdown threshold is the second shutdown threshold, and the second shutdown The turn-off threshold is used to represent the upper limit of the chip turn-off within the target time period, and the second turn-off threshold is smaller than the first turn-off threshold.

Optionally, the acquiring unit 801 is also configured to acquire the actual number of times the chip has been turned off within the target time period;

The processing unit 802 is further configured to continue to execute the received shutdown instruction when the actual shutdown times do not exceed the target shutdown threshold.

Optionally, the processing unit 802 is further configured to control the chip to stop executing the received shutdown instruction when the actual shutdown times exceed the target shutdown threshold.

Optionally, at least one target preset threshold is set according to different business application scenarios in the whole life cycle of the chip.

Optionally, at least one target preset threshold is set according to business application scenarios and different target weights.

Optionally, the obtaining unit 801 is also used to obtain the first remaining life of the chip at the current moment, and the first remaining life is obtained by performing a temperature cycle test on the chip;

The controller also includes:

A generating unit 803, configured to generate a first chip parameter according to the first remaining lifetime.

Optionally, temperature cycling tests are performed based on the law of fatigue cumulative damage.

Optionally, the controller also includes:

The sending unit 804 is configured to send a shutdown command to the chip at a preset first frequency to instruct the chip to shut down.

Optionally, the acquiring unit 801 is also configured to acquire first load information, where the first load information indicates the load condition of the chip at the current moment;

The sending unit 804 is further configured to selectively send a shutdown instruction to the chip according to the first load information, instructing the chip to shut down.

Optionally, the chip is an ASIC chip.

Optionally, the controller is applied to a communication base station.

Optionally, the controller is set in the main control module or transmission module of the communication base station.

Optionally, the controller is applied in the vehicle.

Optionally, the controller is set in the body domain controller of the vehicle, and/or in the intelligent cockpit domain controller, and/or in the intelligent driving domain controller, and/or in the vehicle domain controller.

The steps performed by each unit of the controller in this embodiment are similar to the steps performed by the controller in FIG. 5 above, and details are not repeated here.

Please refer to FIG. 9 , which is another structural schematic diagram of the controller provided by the embodiment of the present application.

A processor 901, a memory 902, a bus 905, and an interface 904, wherein the processor 901 is connected to the memory 902 and the interface 904, and the bus 905 is respectively connected to the processor 901, the memory 902, and the interface 904, and the interface 904 is used to receive or send data, process The processor 901 is a single-core or multi-core central processing unit, or a specific integrated circuit, or one or more integrated circuits configured to implement embodiments of the present invention. The memory 902 may be a random access memory (random access memory, RAM), or a non-volatile memory (non-volatile memory), such as at least one hard disk memory. The memory 902 is used to store computer-executable instructions. Specifically, the program 903 may be included in the instructions executed by the computer. When the program 903 is executed, the steps executed by the controller in FIG. 5 are similar, and details are not repeated here.

It should be understood that the processor mentioned in the controller in the above embodiments of the present application, or the processor provided in the above embodiments of the present application, may be a central processing unit (central processing unit, CPU), or other general-purpose processors , digital signal processor (digital signal processor, DSP), application-specific integrated circuit (application-specific integrated circuit, ASIC), off-the-shelf programmable gate array (field programmable gate array, FPGA) or other programmable logic devices, discrete gates or transistors Logic devices, discrete hardware components, and more. A general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like.

It should also be understood that the number of processors in the controllers in the above embodiments of the present application may be one or multiple, and may be adjusted according to actual application scenarios, which are only illustrative and not limiting. The number of memories in the embodiment of the present application can be one or more, and can be adjusted according to the actual application scenario. This is only an illustration and not a limitation.

It should also be noted that when the controller includes a processor (or processing unit) and a memory, the processor in this application may be integrated with the memory, or the processor and the memory may be connected through an interface. The application scene adjustment is not limited.

The present application provides a chip system, which includes a processor, configured to support a controller to implement functions of the controller involved in the above method, for example, process data and/or information involved in the above method. In a possible design, the system-on-a-chip also includes a memory for storing necessary program instructions and data. The system-on-a-chip may consist of chips, or may include chips and other discrete devices.

In another possible design, when the system-on-a-chip is a chip in user equipment or an access network, the chip includes: a processing unit and a communication unit. The processing unit may be, for example, a processor, and the communication unit may be, for example, an input/ Output interface, pin or circuit, etc. The processing unit can execute the computer-executed instructions stored in the storage unit, so that the chips in the controller etc. execute the steps executed by the first controller in any one of the above embodiments in FIG. 7 . Optionally, the storage unit is a storage unit in the chip, such as a register, a cache, etc., and the storage unit can also be a storage unit located outside the chip in the controller, such as a read-only memory (read-only memory, ROM) or a Other types of static storage devices that store static information and instructions, random access memory (random access memory, RAM), etc.

The embodiment of the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a computer, the method flow executed by the controller in any of the above method embodiments is implemented. Correspondingly, the computer may be the above-mentioned controller.

It should be understood that the controller or processor mentioned in the above embodiments of the present application may be a central processing unit (central processing unit, CPU), and may also be other general-purpose processors, digital signal processors (digital signal processor, DSP) ), application specific integrated circuit (ASIC), off-the-shelf programmable gate array (field programmable gate array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. or Various combinations. A general-purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like.

It should also be understood that the number of processors or controllers in the controller or system-on-a-chip in the above embodiments of the present application may be one or more, and may be adjusted according to actual application scenarios, and this is only an example description, not limitation. The number of memories in the embodiments of the present application may be one or more, and may be adjusted according to actual application scenarios. This is only an illustration and not a limitation.

It should also be understood that the memory or readable storage medium mentioned in the controller in the above embodiments of the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include volatile and non-volatile memory. Both volatile memory. Among them, the non-volatile memory can be read-only memory (read-only memory, ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), electrically programmable Erases programmable read-only memory (electrically EPROM, EEPROM) or flash memory. Volatile memory can be random access memory (RAM), which acts as external cache memory. By way of illustration and not limitation, many forms of RAM are available such as static random access memory (static RAM, SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous connection dynamic random access memory (synchlink DRAM, SLDRAM ) and direct memory bus random access memory (direct rambus RAM, DR RAM).

Those skilled in the art can understand that all or part of the steps performed by the controller or the processor to realize the above embodiments can be completed by hardware or programs instructing related hardware. The program can be stored in a computer-readable storage medium, and the above-mentioned storage medium can be a read-only memory, a random access memory, and the like. Specifically, for example: the above-mentioned processing unit or processor can be a central processing unit, a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices , transistor logic devices, hardware components, or any combination thereof. Whether the above-mentioned functions are executed by means of hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be regarded as exceeding the scope of the present application.

When implemented by software, the method steps described in the above embodiments may be fully or partially implemented in the form of computer program products. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the processes or functions according to the embodiments of the present application will be generated in whole or in part. A computer can be a general purpose computer, special purpose computer, computer network, or other programmable device. Computer instructions may be stored in or transmitted from one computer-readable storage medium to another computer-readable storage medium, e.g. Coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server, a data center, etc. integrated with one or more available media. Usable media may be magnetic media, (eg, floppy disks, hard disks, magnetic tape), optical media (eg, DVD), or semiconductor media, among others.

The terms "first", "second" and the like in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It should be understood that the terms used in this way can be interchanged under appropriate circumstances, and this is merely a description of the manner in which objects with the same attribute are described in the embodiments of the present application. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, product, or apparatus comprising a series of elements is not necessarily limited to those elements, but may include elements not expressly included. Other elements listed explicitly or inherent to the process, method, product, or apparatus.

The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms of "a", "" and "the" used in the embodiments of the present application are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that in the description of this application, unless otherwise specified, "/" indicates that the objects associated with each other are in an "or" relationship, for example, A/B can indicate A or B; in this application, "and /or" is just an association relationship describing associated objects, which means that there can be three kinds of relationships, for example, A and/or B, which can mean: A exists alone, A and B exist at the same time, and B exists alone. Among them, A and B can be singular or plural.

Depending on the context, the words "if" or "if" as used herein may be interpreted as "at" or "when" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrases "if determined" or "if detected (the stated condition or event)" could be interpreted as "when determined" or "in response to the determination" or "when detected (the stated condition or event) )" or "in response to detection of (a stated condition or event)".

As mentioned above, the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: it can still understand the foregoing The technical solutions described in each embodiment are modified, or some of the technical features are replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the various embodiments of the application.

Claims (32)

1. A method for dynamically controlling chip shutdown, comprising:

   Acquire the first chip parameter of the chip, the first chip parameter indicates the ratio of the remaining life of the chip at the current moment to the total expected working life;

   dynamically determining a target shutdown threshold value of the chip according to the first chip parameter, the target shutdown threshold value indicating an upper limit number of shutdown times of the chip within a target time period;

   During the target time period, the chip is controlled to be turned off according to the target turn-off threshold value.
2. The method according to claim 1, wherein dynamically determining the target shutdown threshold of the chip according to the first chip parameter comprises:

   Dynamically determine the target shutdown threshold value of the chip according to the first chip parameter and at least one target preset threshold value, wherein the at least one target preset threshold value is used to set the expected working total of the chip to The lifetime is divided into different intervals.
3. The method according to claim 2, wherein the at least one target preset threshold comprises a first preset threshold;

   The dynamically determining the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold includes:

   When the first chip parameter is greater than or equal to the first preset threshold value, it is determined that the target shutdown threshold value is the first shutdown threshold value, and the first shutdown threshold value is used to represent The upper limit value for the chip to be turned off within the target time period.
4. The method according to claim 3, wherein the at least one target preset threshold further comprises a second preset threshold, and the second preset threshold is smaller than the first preset threshold;

   The dynamically determining the target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold further includes:

   When the first chip parameter is less than the first preset threshold and the first chip parameter is greater than the second preset threshold, determine that the target shutdown threshold is a second shutdown threshold , the second turn-off threshold value is used to represent an upper limit value for turning off the chip within the target time period, and the second turn-off threshold value is smaller than the first turn-off threshold value.
5. The method according to any one of claims 1 to 4, wherein, within the target time period, controlling the shutdown of the chip according to the target shutdown threshold value includes:

   Acquiring the actual number of shutdowns performed by the chip within the target time period;

   In the case that the actual shutdown times do not exceed the target shutdown threshold, the chip is controlled to continue executing the received shutdown instruction.
6. The method according to claim 5, wherein, within the target time period, controlling the shutdown of the chip according to the target shutdown threshold value further includes:

   When the actual number of times of shutdown exceeds the target shutdown threshold, the chip is controlled to stop executing the received shutdown instruction.
7. The method according to any one of claims 2 to 6, wherein the at least one target preset threshold is set according to different service application scenarios in the whole life cycle of the chip.
8. The method according to claim 7, wherein the at least one target preset threshold is set according to the business application scenario and different target weights.
9. The method according to any one of claims 1 to 8, further comprising:

   Obtaining the first remaining life of the chip at the current moment, the first remaining life is obtained by performing a temperature cycle test on the chip;

   The first chip parameter is generated according to the first remaining lifetime.
10. The method according to claim 9, characterized in that the temperature cycle test is carried out based on the law of fatigue cumulative damage.
11. The method according to any one of claims 3 to 10, wherein before acquiring the actual number of times the chip has been turned off within the target time period, further comprising:

    Sending a shutdown command to the chip at a preset first frequency to instruct the chip to shut down.
12. The method according to any one of claims 3 to 10, wherein before acquiring the actual number of times the chip has been turned off within the target time period, further comprising:

    Acquiring first load information, the first load information indicates the load condition of the chip at the current moment;

    Selectively issuing a shutdown instruction to the chip according to the first load information, instructing the chip to shut down.
13. A controller, characterized in that it comprises:

    An acquisition unit, configured to acquire a first chip parameter of the chip, the first chip parameter indicating the ratio of the remaining life of the chip at the current moment to the total expected working life;

    A processing unit, configured to dynamically determine a target turn-off threshold of the chip according to the first chip parameter, the target turn-off threshold indicating an upper limit number of times the chip is turned off within a target time period ;

    The processing unit is further configured to control the shutdown of the chip according to the target shutdown threshold within the target time period.
14. The controller according to claim 13, wherein the processing unit is specifically configured to dynamically determine a target shutdown threshold of the chip according to the first chip parameter and at least one target preset threshold, wherein , the at least one target preset threshold is used to divide the expected total working life of the chip into different intervals.
15. The controller according to claim 14, wherein the at least one target preset threshold comprises a first preset threshold;

    The processing unit is further configured to determine that the target turn-off threshold is a first turn-off threshold when the first chip parameter is greater than or equal to the first preset threshold, and the first turn-off threshold is The cut-off threshold is used to represent the upper limit of the chip being turned off within the target time period.
16. The controller according to claim 15, wherein the at least one target preset threshold further includes a second preset threshold, and the second preset threshold is smaller than the first preset threshold;

    The processing unit is specifically configured to determine that the target shutdown threshold is The second shut-off threshold value, the second shut-off threshold value is used to represent the upper limit value of the chip shut-off within the target time period, the second shut-off threshold value is smaller than the first shut-off threshold value off threshold.
17. The controller according to any one of claims 13 to 16, wherein the acquisition unit is further configured to acquire the actual number of times the chip has been shut down within the target time period;

    The processing unit is further configured to control the chip to continue to execute the received shutdown instruction when the actual number of shutdowns does not exceed the target shutdown threshold.
18. The controller according to claim 17, wherein the processing unit is further configured to control the chip to stop executing the received shutdown command.
19. The controller according to any one of claims 14 to 18, wherein the at least one target preset threshold is set according to different business application scenarios in the whole life cycle of the chip.
20. The controller according to claim 19, wherein the at least one target preset threshold is set according to the business application scenario and different target weights.
21. The controller according to any one of claims 13 to 20, wherein the acquiring unit is further configured to acquire the first remaining lifetime of the chip at the current moment, and the first remaining lifetime is obtained by analyzing the obtained by performing temperature cycle test on the above-mentioned chip;

    The controller also includes:

    A generating unit, configured to generate the first chip parameter according to the first remaining lifetime.
22. The controller according to claim 21, characterized in that the temperature cycle test is performed based on the law of fatigue cumulative damage.
23. The controller according to any one of claims 13 to 22, wherein the controller further comprises:

    The sending unit is configured to send a shutdown command to the chip at a preset first frequency to instruct the chip to shut down.
24. The controller according to any one of claims 13 to 23, wherein the acquiring unit is further configured to acquire first load information, and the first load information indicates the load condition of the chip at the current moment;

    The sending unit is further configured to selectively send a shutdown instruction to the chip according to the first load information, instructing the chip to shutdown.
25. The controller according to any one of claims 13 to 24, wherein the chip is an application specific integrated chip (ASIC).
26. The controller according to any one of claims 13 to 25, wherein the controller is applied in a communication base station.
27. The controller according to claim 26, characterized in that, the controller is set in a main control module or a transmission module of the communication base station.
28. The controller according to any one of claims 13 to 25, wherein the controller is applied in a vehicle.
29. The controller according to claim 28, characterized in that the controller is set in the body domain controller of the vehicle, and/or in the intelligent cockpit domain controller, and/or in the intelligent driving domain controller in, and/or, in the vehicle domain controller.
30. A computer-readable storage medium, characterized by comprising instructions, which, when run on a computer, cause the computer to execute the method described in any one of claims 1 to 12 above.
31. A computer program product comprising instructions, characterized in that, when run on a computer, it causes the computer to perform the method of any one of claims 1 to 12 above.
32. A control system, characterized in that it comprises:

    A controller, said controller being any one of the controllers in claims 13 to 29 above;

    a device electrically connected to the controller;

    A chip is set in the device, and the device receives a shutdown instruction sent by the controller, and the shutdown instruction is used to instruct the device to execute shutdown on the chip.

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