WO2022250563A1 - Devices and methods for transmission rate adjustment - Google Patents
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- WO2022250563A1 WO2022250563A1 PCT/RU2021/000227 RU2021000227W WO2022250563A1 WO 2022250563 A1 WO2022250563 A1 WO 2022250563A1 RU 2021000227 W RU2021000227 W RU 2021000227W WO 2022250563 A1 WO2022250563 A1 WO 2022250563A1
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 230000005540 biological transmission Effects 0.000 title claims abstract description 28
- 238000004891 communication Methods 0.000 claims abstract description 46
- 238000012545 processing Methods 0.000 claims abstract description 46
- 238000004590 computer program Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 10
- 238000013507 mapping Methods 0.000 description 7
- 230000006870 function Effects 0.000 description 6
- 238000000638 solvent extraction Methods 0.000 description 5
- 230000006978 adaptation Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/3405—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
- H04L27/3416—Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power in which the information is carried by both the individual signal points and the subset to which the individual points belong, e.g. using coset coding, lattice coding, or related schemes
Definitions
- the present disclosure relates to telecommunications. More specifically, the present disclosure relates to devices and methods for transmission rate adjustment in a communication system.
- the data transmission rate is one of the fundamental characteristics of the communication between transceivers of a communication system via a communication link.
- the data transmission rate is determined by several factors, ranging from technical ones such as the frequency band and the modulation technique, to implementation features such as the complexity of the transceiver.
- technical ones such as the frequency band and the modulation technique
- implementation features such as the complexity of the transceiver.
- RA rate adaptation
- embodiments disclosed herein provide a larger number of different data transmission rates, which are almost uniformly distributed between the conventional rates of 10G and 5G, 5G and 2.5G, and so on.
- Embodiments disclosed herein use for the first downshift, i.e. reduction step the same order of modulation as the next higher rate, such as 10G, 5G, and the like.
- embodiments disclosed herein allow to avoid a retrain procedure after such a downshift.
- a transceiver apparatus comprising a communication interface configured to communicate with a further transceiver apparatus via a communication link using an adjustable transmission rate.
- the transceiver apparatus further comprises a processing circuitry configured to encode an adjustable number of a plurality of data symbols with a multidimensional multi-level code, MLC, wherein the MLC includes an outer FEC code and an inner FEC code.
- the outer FEC code is a Reed-Solomon, RS, code and the inner FEC code is a Bose, Chaudhuri, and Hocquenghem, BCH, code.
- the processing circuitry of the transceiver apparatus is further configured to modulate the encoded data symbols with a pulse-amplitude modulation, PAM.
- the processing circuitry of the transceiver apparatus is configured to adjust the adjustable transmission rate by adjusting the adjustable number of the plurality of data symbols.
- the transceiver apparatus according to the first aspect allows for a fine-grained adjustment of the data transmission rate.
- the processing circuitry of the transceiver apparatus is configured to encode the adjustable number of the plurality of data symbols with the MLC by encoding an adjustable first portion of the adjustable number of the plurality of data symbols with the outer FEC code and an adjustable second portion of the adjustable number of the plurality of data symbols with the outer FEC code and the inner FEC code.
- the communication link is an Ethernet link (as defined in one or more of the standards of the family of standards IEEE 802.3).
- the BCH code i.e. the inner FEC code
- the RS code i.e. the outer FEC code
- the RS code has a codeword length of 360 symbols with 326 data symbols.
- the processing circuitry of the transceiver apparatus is configured to modulate the encoded data symbols using a PAM-4 scheme and/or a PAM-8 scheme.
- a method of communicating with a transceiver apparatus via a communication link is provided.
- the method comprises the steps of: encoding an adjustable number of a plurality of data symbols with a multidimensional multi-level code, MLC, including an outer FEC code and an inner FEC code, wherein the outer FEC code is a Reed-Solomon, RS, code and the inner FEC code is a Bose, Chaudhuri, and Hocquenghem, BCH, code; modulating the encoded data symbols with a pulse-amplitude modulation, PAM, scheme; and adjusting the adjustable transmission rate by adjusting the adjustable number of the plurality of data symbols.
- MLC multidimensional multi-level code
- MLC multidimensional multi-level code
- RS Reed-Solomon
- BCH Hocquenghem
- the step of encoding the adjustable number of the plurality of data symbols with the MLC comprises encoding an adjustable first portion of the adjustable number of the plurality of data symbols with the outer FEC code and an adjustable second portion of the adjustable number of the plurality of data symbols with the outer FEC code and the inner FEC code.
- the communication link is an Ethernet link.
- the BCH code i.e. the inner FEC code
- the RS code i.e. the outer FEC code
- the RS code has a codeword length of 360 symbols with 326 data symbols.
- the step of modulating the encoded data symbols comprises modulating the encoded data symbols with a PAM-4 scheme and/or a PAM-8 scheme.
- a computer program product comprising a computer-readable storage medium for storing program code which causes a computer or a processor to perform the method according to the second aspect when the program code is executed by the computer or the processor.
- Fig. 1 is a schematic diagram illustrating a communication system including a transceiver apparatus according to an embodiment communicating with a further transceiver apparatus via a communication link;
- Fig. 2 shows a table listing data rates for a plurality of exemplary modulation schemes
- Fig. 3 is a diagram illustrating aspects of a multi-dimensional multi-level code
- Fig. 4 is a schematic diagram illustrating processing blocks implemented by a transceiver apparatus
- Fig. 5 is a schematic diagram illustrating further aspects of the transceiver apparatus and the further transceiver apparatus of figure 1 ;
- Figs. 6a-c are schematic diagrams illustrating in more detail processing blocks implemented by the transceiver apparatus according to different embodiments
- Fig. 7 shows a table listing data rates provided by a transceiver apparatus according to an embodiment
- Fig. 8 shows graphs illustrating the bit error rate as a function of the noise for different modulation schemes implemented by a transceiver apparatus according to an embodiment
- Fig. 9 is a flow diagram illustrating a method of operating a transceiver apparatus according to an embodiment.
- a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa.
- a corresponding device may include one or a plurality of units, e.g. functional units, to perform the described one or plurality of method steps (e.g. one unit performing the one or plurality of steps, or a plurality of units each performing one or more of the plurality of steps), even if such one or more units are not explicitly described or illustrated in the figures.
- a specific apparatus is described based on one or a plurality of units, e.g.
- a corresponding method may include one step to perform the functionality of the one or plurality of units (e.g. one step performing the functionality of the one or plurality of units, or a plurality of steps each performing the functionality of one or more of the plurality of units), even if such one or plurality of steps are not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless specifically noted otherwise.
- FIG. 1 is schematic diagram illustrating a communication system 100 including a transceiver apparatus 110 according to an embodiment communicating with a further transceiver apparatus 160 via a communication link 150 (also referred to as communication channel 150).
- the communication link 150 may be a wireless communication link 150 or a wired communication link 150.
- the communication link 150 may be an Ethernet link 150 according to one o more standards of the family of standards IEEE 802.3.
- the transceiver apparatus 110 comprises a processing circuitry 120 for processing data and a communication interface 130 for transmitting and receiving data via the communication link 150.
- the communication interface 130 of the transceiver apparatus 110 is configured to communicate with the further transceiver apparatus 160 (i.e. its communication interface 180) via the communication link 150 using an adjustable transmission rate.
- the communication interface 130 may comprise one or more antennas for wireless communication or a network interface, in particular an Ethernet interface for communicating via the communication link 150.
- the processing circuitry 120 may be implemented in hardware and/or software.
- the hardware may comprise digital circuitry, or both analog and digital circuitry.
- Digital circuitry may comprise components such as application-specific integrated circuits (ASICs), field-programmable arrays (FPGAs), digital signal processors (DSPs), or general-purpose processors.
- the transceiver apparatus 110 may further comprise a memory 140, e.g. a Flash memory 140, configured to store executable program code which, when executed by the processing circuitry 110, causes the transceiver apparatus 110 to perform the functions and operations described herein.
- the further transceiver apparatus 160 may comprise a processing circuitry 170 for processing data, a communication interface 180 for transmitting and receiving data via the communication link 150.
- the communication interface 180 may comprise one or more antennas for wireless communication or a network interface, in particular an Ethernet interface for communicating via the communication link 150.
- the processing circuitry 170 may be implemented in hardware and/or software.
- the hardware may comprise digital circuitry, or both analogue and digital circuitry.
- Digital circuitry may comprise components such as application-specific integrated circuits (ASICs), field- programmable arrays (FPGAs), digital signal processors (DSPs), or general-purpose processors.
- the further transceiver apparatus 160 may further comprise a memory 190, e.g. a Flash memory 190, configured to store executable program code which, when executed by the processing circuitry 110, causes the transceiver apparatus 160 to perform the functions and operations described herein.
- the data transmission rate in particular bit rate R may be defined as
- R S (log 2 M) , where B denotes the Nyquist bandwidth, M denotes the order of modulation, k denotes the payload in bits, and n denotes number of bits to be transmitted through the channel 150, i.e. the code length.
- the modulation order M between adjacent values thereof, such as from PAM-8 to PAM-16 and vice versa, but not from PAM-4 to PAM-16 or vice versa (which would skip PAM-8).
- the simple change of the modulation order from, for instance, PAM-4 to PAM-8 or from PAM-8 to PAM-16 achieves only one intermediate transmission rate.
- the series of possible transmission rates with normalized B would be 4, 3, 2, 3/2, 1 , 3/4, 1/2, 3/8, 1/4, and so on, which achieves respective intermediate rates between the conventional rates, namely 7.5 G between 10 G and 5G, 3.75 G between 5 G and 2.5 G, and so on.
- embodiments disclosed herein make use of multidimensional coding. More specifically, embodiments disclosed herein make use of (i) concatenated forward error correction (FEC) codes; (ii) multilevel coding and (iii) generalized two-dimensional (2D) modulation.
- FEC forward error correction
- Multilevel coding is a coded modulation in which each input to the constellation mapper is driven by an independent encoder. The common goal is to optimize the code in Euclidean space rather than dealing with Hamming distance as in classical coding schemes. Further details about multilevel coding can be found in Udo Wachsmann, Robert F. H. Fischer, and Johannes B. Huber, “Multilevel Codes: Theoretical Concepts and Practical Design Rules”, IEEE Trans on Info. Theory, Vol. 45, No. 5, July 1999, pp. 1361 - 1391 , which is herein fully incorporated by reference.
- the following set partitioning strategy is chosen: maximize the minimum intra-subset Euclidean distance.
- the binary addresses are usually divided into two parts: the least significant binary symbols (LSB) are FEC encoded and the most significant binary symbols (MSB) (if presented) remain uncoded.
- FIG. 3 A 2D partitioning that may be used for a transceiver apparatus 110 according to an embodiment for PAM 4 and PAM 8 is illustrated in figure 3 and disclosed in L.-F. Wei, ’’Trellis-coded modulation with multidimensional constellations”, IEEE Transaction on Information Theory, Vol.33, July 1987, pp. 483 - 501, which is herein fully incorporated by reference.
- the mapping shown in figure 3 follows from a successive partitioning of a channel-signal set into subsets with increasing minimum distances d 0 ⁇ d t ⁇ d 2 ⁇ ⁇ between the signals of these subsets.
- the transceiver apparatus 110 implements a Bose, Chaudhuri, and Hocquenghem (BCH) code as inner code, because these codes demonstrate better performance in comparison with a convolutional code of rate 2/3 (known as trellis coded modulation (TCM)), as illustrated in figure 4.
- BCH Bose, Chaudhuri, and Hocquenghem
- FIG. 5 is a schematic diagram illustrating further aspects implemented by the processing circuitry 121 of the transceiver apparatus 110 and the processing circuitry 170 of the further transceiver apparatus 160 of figure 1.
- the processing circuitry 120 of the transceiver apparatus 110 is configured to encode an adjustable number of a plurality of data symbols with a multidimensional multi level code (MLC), including an outer FEC code 121 and an inner FEC code 123a.
- MLC multidimensional multi level code
- the outer FEC code 121 is a Reed-Solomon code (implemented by the processing block 121)
- the inner FEC code 123a is a Bose, Chaudhuri, and Hocquenghem, BCH, code (implemented by the processing block 123a).
- the multidimensional MLC mapping is illustrated by processing block 123a in figure 5.
- the processing circuitry 120 of the transceiver apparatus 110 is further configured to modulate the encoded data symbols with a pulse-amplitude modulation, PAM (illustrated by the processing block 125 in figure 5). As illustrated in figure 5, in an embodiment, the processing circuitry 120 of the transceiver apparatus 110 is configured to modulate the encoded data symbols using PAM-4 and/or PAM-8.
- PAM pulse-amplitude modulation
- the processing circuitry 170 of the further transceiver apparatus 160 is configured to implement processing blocks for performing the "inverse" operations of the processing blocks implemented by the processing circuitry 120 of the transceiver apparatus 110. More specifically, the processing circuitry 170 of the further transceiver apparatus 160 is configured to (i) perform a demapping of the data received from the transceiver apparatus 110 using a PAM, in particular a PAM-4 or a PAM-8 (see processing block 175 of figure 5), and (ii) to decode the demodulated data symbols using the multidimensional MLC (see processing block 173b), including the outer RS code 171 and the inner BCH code 173a.
- a PAM in particular a PAM-4 or a PAM-8
- the processing circuitry 120 of the transceiver apparatus 110 is further configured to adjust the adjustable transmission rate by adjusting the adjustable number of the plurality of data symbols encoded by the multidimensional multi-level code.
- the processing circuitry 120 of the transceiver apparatus 110 is configured to encode the adjustable number of the plurality of data symbols with the MLC by encoding an adjustable first portion of the adjustable number of the plurality of data symbols with the outer RS code 121 and an adjustable second portion of the adjustable number of the plurality of data symbols with the outer RS code and the inner BCH code.
- one uncoded and three encoded bits are consistent with a code rate of a BCH(255, 199) code and vice versa.
- the transceiver apparatus 110 is configured to obtain a uniform distribution of transmission rates. Due to the multidimensional multilevel coding different groups of bits have different resistances against noise, in particular additive white Gaussian noise (AWGN).
- AWGN additive white Gaussian noise
- the MSB most significant bit, i.e. the zero bit to the left
- the LSBs are not so well protected, thus they are additionally encoded by the inner (BCH) code 123a and only thereafter the resulting inner codeword (based on the LSBs) is provided to the PAM processing block 125.
- Figures 6a-c are schematic diagrams illustrating in more detail processing blocks implemented by the transceiver apparatus 110 according to different embodiments for communication over an Ethernet link.
- the inner BCH FEC code has a codeword length of 255 symbols with 199 data symbols and the outer RS FEC code has a codeword length of 360 symbols with 326 data symbols.
- the embodiments shown in figures 6a-c are based on the standardized structure for BASE-T (where further details may be found).
- figures 6a-c show the bit ordering in the Physical Coding Sublayer (PCS) and illustrate how the bit allocation (highlighted in gray for the LSBs and in white for the MSBs) provided by embodiments disclosed herein forms the IEEE standard frame and allows an improved rate adaptation.
- PCS Physical Coding Sublayer
- the processing circuitry 120 of the transceiver apparatus 110 provides the elements already described above in the context of figure 5, namely a RS FEC encoder 121 (further including an interleaver), a BCH encoder 123a, a MLC mapping block 123b and the PAM mapping block 125. Furthermore, the processing circuitry 120 of the transceiver apparatus 110 may implement a scrambler 124 and a selectable precoder 126.
- two coded bits and two uncoded bits as well as PAM4 are used (referred to herein as 2D MLC PAM4 with scheme 2x2).
- As output the BCH encoder 123a provides: 2040 bits (LSB). In order to obtain a LSB to MSB ratio of 1:1, 32 zero bits are added to the MSBs.
- As output the BCH encoder 123a provides: 3315 bits (LSB). In order to obtain a LSB to MSB ratio of 3:1 , 92 zero bits are added to the MSBs.
- As output the BCH encoder 123a provides: 3060 bits (LSB). In order to obtain a LSB to MSB ratio of 2:1, 312 zero bits are added to the MSBs.
- Figure 7 shows a table listing data rates provided by the transceiver apparatus 110 according to different embodiments (using the same "notation" as for the embodiments shown in figures 6a-c). As will be appreciated, from the bit rates listed in the table of figure 7 the transceiver apparatus 110 may provide uniformly distributed data rates.
- Figure 8 shows graphs illustrating the bit error rate as a function of the noise for different modulation schemes implemented by the transceiver apparatus 110 according to an embodiment.
- the rates for (b), (d), and (e) are almost uniformly distributed and corresponding noise regions are almost uniformly distributed too.
- Curve (c) demonstrates a possibility of fine rate adaptation.
- FIG. 9 is a flow diagram illustrating a method 900 of operating the transceiver apparatus 110 according to an embodiment.
- the method 900 comprises the steps of: encoding 901 an adjustable number of a plurality of data symbols with a multidimensional multi-level code, MLC, including an outer FEC code and an inner FEC code, wherein the outer FEC code is a Reed-Solomon code and the inner FEC code is a Bose, Chaudhuri, and Hocquenghem, BCH, code; modulating 903 the encoded data symbols with a pulse-amplitude modulation, PAM; and adjusting 905 the adjustable transmission rate by adjusting the adjustable number of the plurality of data symbols encoded by the multidimensional multi-level code.
- MLC multidimensional multi-level code
- PAM pulse-amplitude modulation
- the disclosed system, apparatus, and method may be implemented in other manners.
- the described apparatus embodiment is merely exemplary.
- the unit division is merely logical function division and may be other division in actual implementation.
- a plurality of units or components may be combined or integrated into another system, or some features may be ignored or not performed.
- the displayed or discussed mutual couplings or direct couplings or communication connections may be implemented by using some interfaces.
- the indirect couplings or communication connections between the apparatuses or units may be implemented in electronic, mechanical, or other forms.
- the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
- functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each of the units may exist alone physically, or two or more units are integrated into one unit.
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CN202180098718.7A CN117397186A (en) | 2021-05-28 | 2021-05-28 | Apparatus and method for transmission rate adjustment |
EP21751664.0A EP4335052A1 (en) | 2021-05-28 | 2021-05-28 | Devices and methods for transmission rate adjustment |
PCT/RU2021/000227 WO2022250563A1 (en) | 2021-05-28 | 2021-05-28 | Devices and methods for transmission rate adjustment |
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US20140169499A1 (en) * | 2012-09-11 | 2014-06-19 | Inphi Corporation | Optical communication interface utilizing n-dimensional double square quadrature amplitude modulation |
WO2014127169A1 (en) * | 2013-02-15 | 2014-08-21 | Cortina Systems, Inc. | Apparatus and method for communicating data over a communication channel |
US9363039B1 (en) | 2012-11-07 | 2016-06-07 | Aquantia Corp. | Flexible data transmission scheme adaptive to communication channel quality |
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- 2021-05-28 CN CN202180098718.7A patent/CN117397186A/en active Pending
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US20140169499A1 (en) * | 2012-09-11 | 2014-06-19 | Inphi Corporation | Optical communication interface utilizing n-dimensional double square quadrature amplitude modulation |
US9363039B1 (en) | 2012-11-07 | 2016-06-07 | Aquantia Corp. | Flexible data transmission scheme adaptive to communication channel quality |
WO2014127169A1 (en) * | 2013-02-15 | 2014-08-21 | Cortina Systems, Inc. | Apparatus and method for communicating data over a communication channel |
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DONGFENG YUAN ET AL: "Performance analysis of RS-BCH concatenated codes in Rayleigh fading channel", COMMUNICATIONS, 1999. APCC/OECC '99. FIFTH ASIA-PACIFIC CONFERENCE ON ... AND FOURTH OPTOELECTRONICS AND COMMUNICATIONS CONFERENCE, IEEE, 18 October 1999 (1999-10-18), pages 677 - 679vol.1, XP032163929, ISBN: 978-7-5635-0402-2, DOI: 10.1109/APCC.1999.824990 * |
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