WO2022043882A1

WO2022043882A1 - Integrated active antenna array and digital beam forming

Info

Publication number: WO2022043882A1
Application number: PCT/IB2021/057776
Authority: WO
Inventors: Peleg Aviely
Original assignee: Ramon Chips Ltd.
Priority date: 2020-08-26
Filing date: 2021-08-25
Publication date: 2022-03-03

Abstract

An active antenna system (20) is configured for operating in conjunction with an array (24) of antenna elements (28). The active antenna system includes multiple processing modules (48), a main processing block (80) and a heat dissipation module (72). Each of the multiple processing modules includes analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing signals communicated by a respective subset of the antenna elements. The main processing block is configured to connect to the processing modules via digital interfaces and to perform DBF for at least part of the array. The heat dissipation module is configured to evacuate heat from the processing modules.

Description

INTEGRATED ACTIVE ANTENNA ARRAY AND DIGITAL BEAM FORMING

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Patent Application 63/070,533, filed August 26, 2020, whose disclosure is incorporated herein by reference.

FIELD OF THE INVENTION

The present invention relates generally to wireless communication systems, and particularly to active antenna arrays and digital beam forming.

BACKGROUND OF THE INVENTION

Active antennas are antennas that comprise active components such as Power Amplifiers (PAs) for transmission and Low-Noise Amplifiers (LNAs) for reception. Active antennas are used in a wide variety of systems, such as radars and satellite communication systems.

SUMMARY OF THE INVENTION

An embodiment of the present invention that is described herein provides an active antenna system for operating in conjunction with an array of antenna elements. The active antenna system includes multiple processing modules, a main processing block and a heat dissipation module. Each of the multiple processing modules includes analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing signals communicated by a respective subset of the antenna elements. The main processing block is configured to connect to the processing modules via digital interfaces and to perform DBF for at least part of the array. The heat dissipation module is configured to evacuate heat from the processing modules.

In some embodiments, each processing module is planar and has: (i) a first side including one or more Radio Frequency (RF) interconnects for connecting to the subset of the antenna elements, (ii) a second side including at least one digital interface for connecting to the main processing block, and (iii) a third side including one or more heat-dissipation interfaces for connecting to the heat dissipation module. In an embodiment, in each processing module, the second side is opposite to the third side. In an example embodiment, in each processing module, the first side is perpendicular to the second and third sides.

In a disclosed embodiment, each processing module includes one or more heat pipes for evacuating heat from active components to the heat-dissipation module. In an embodiment, the heat dissipation module is configured to evacuate the heat in vacuum conditions. In an example embodiment, the processing modules and the heat dissipation module are configured to evacuate the heat from the processing modules using only heat conduction. In an embodiment, the heat dissipation module is configured to conduct the heat to a thermal radiator.

In some embodiments, each processing module is configured to receive RF signals from the antenna elements in the respective subset, and to process the received RF signals so as to output one or more digital signals, and the main processing block is configured to combine corresponding digital signals from the processing modules, so as to produce one or more beam-formed received signals. In some embodiments, the main processing block is configured to distribute at least one digital signal to the processing modules, and each processing module is configured to process the at least one digital signal so as to transmit at least one beam-formed RF signal to the antenna elements.

There is additionally provided, in accordance with an embodiment of the present invention, a method for producing an active antenna system for operating in conjunction with an array of antenna elements. The method includes producing multiple processing modules, each processing module including analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing signals communicated by a respective subset of the antenna elements. The processing modules are connected via digital interfaces to a main processing block that performs DBF for at least part of the array. The processing modules are coupled to a heat dissipation module, which is configured to evacuate heat from the processing modules.

There is further provided, in accordance with an embodiment of the present invention, a method for communication using an active antenna system operating in conjunction with an array of antenna elements. The method includes processing signals communicated via the antenna elements using multiple processing modules, each processing module including analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing the signals communicated by a respective subset of the antenna elements. DBF is performed for at least part of the array using a main processing block that is connected to the processing modules via digital interfaces. Heat is evacuated from the processing modules to a heat dissipation module.

The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which: BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 is a schematic, pictorial illustration of an integrated active antenna system, in accordance with an embodiment of the present invention;

Fig. 2 is an exploded view of the active antenna system of Fig. 1, in accordance with an embodiment of the present invention;

Fig. 3 is a block diagram that schematically illustrates reception (RX) processing and Digital Beam Forming (DBF) in the active antenna system of Fig. 1, in accordance with an embodiment of the present invention;

Fig. 4 is a block diagram that schematically illustrates partial RX processing and DBF in a processing module of the active antenna system of Fig. 1, in accordance with an embodiment of the present invention;

Fig. 5 is a block diagram that schematically illustrates full RX processing and DBF in the active antenna system of Fig. 1, in accordance with an embodiment of the present invention;

Fig. 6 is a schematic, pictorial illustration of an active antenna system used for signal reception, in accordance with an embodiment of the present invention;

Fig. 7 is a schematic, pictorial illustration of an active antenna system used for signal transmission, in accordance with an embodiment of the present invention;

Fig. 8 is a schematic, pictorial illustration of a scheme for dissipating heat from the active antenna system of Fig. 1, in accordance with an embodiment of the present invention; and

Fig. 9 is a cross-section view of an antenna array in the active antenna system of Fig. 1, in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS

OVERVIEW

Embodiments of the present invention that are described herein provide improved active antenna systems and associated methods. The disclosed antenna systems are particularly suitable for use in satellites, but are in no way limited to such use-cases and may be used in terrestrial applications as well. The disclosed antenna systems can be used for transmission, for reception, or both.

In some embodiments, an active antenna system is configured to connect to an array of antenna elements. In the disclosed embodiments the array is two-dimensional, but the disclosed techniques are generally applicable to any other array geometry. The antenna elements may comprise any suitable type of radiating elements, e.g., horns, printed patches and the like.

In some embodiments, the active antenna system comprises (i) multiple processing modules, (ii) a main processing block and (iii) a heat dissipation module.

Each processing module is coupled to a respective subset of the antenna elements (e.g., to a respective row when the array is two-dimensional). Each processing module comprises analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for performing AFE and DBF functions for the respective subset of the antenna elements.

The main processing block is configured to connect to the processing modules via digital interfaces, and to perform DBF for at least part of the array. The heat dissipation module is configured to evacuate heat from the processing modules.

In an example implementation, the processing modules are planar, and are stacked next to one another. Each planar processing module has (i) a first side comprising one or more Radio Frequency (RF) interconnects for connecting to the antenna elements, (ii) a second side comprising at least one digital interface for connecting to the main processing block, and (iii) a third side comprising one or more heat-dissipation interfaces for connecting to the heat dissipation module.

In other words, in this implementation the processing modules are arranged to form a box-shaped stack. One face of the box-shaped stack faces the antenna array and comprises the RF interconnects between each processing module and its respective subset of antenna elements. Another face of the box comprises the digital interfaces of the processing modules, and faces the main processing block. A third face of the box, which faces the heat dissipation module, comprises the heat-dissipation interfaces of the processing modules.

It is noted that the above mechanical arrangement (box-shaped with RF interconnects on one side, digital interfaces on another side, and heat-dissipation interfaces on a third side) is not mandatory. For example, in alternative embodiments the various interfaces (RF interconnects to the antenna elements, digital interfaces to the main processing block, and heat-dissipation interfaces) may be disposed on fewer sides. Further alternatively, interfaces of different types may be disposed on the same side.

Typically, heat evacuation from the processing modules to the heat dissipation module is performed using heat conduction only, e.g., using heat pipes or other suitable mechanism. As such, the disclosed heat dissipation solution is suitable for operation in vacuum conditions, e.g., in space. Several example implementations of the disclosed active antenna systems are described herein.

SYSTEM DESCRIPTION

Fig. 1 is a schematic, pictorial illustration of an integrated active antenna system 20, in accordance with an embodiment of the present invention. Antenna system 20 is designed to operate on board a satellite as part of a satellite communication system. In particular, system 20 is designed for minimal Radio Frequency (RF) signal losses, modular mechanical and electrical construction, and efficient heat dissipation, as will be described below.

System 20 comprises a main enclosure 22 and is configured to connect to an antenna assembly 40. Antenna assembly 40 comprises an array 24 of antenna elements 28, in the present example a two-dimensional (2D) array of square antenna elements. Also seen in this external view are a power input connector 32 for supplying electrical power to antenna system 20, and a digital connector 36 for transferring digital signals (received and/or transmitted signals) between antenna system 20 and a main system processor (not shown).

Fig. 2 is an exploded view of active antenna system 20 of Fig. 1, in accordance with an embodiment of the present invention. Enclosure 22 is omitted in this view for clarity. Antenna assembly 40 is seen at the bottom of the figure. Array 24 of antenna elements 28 is located at the bottom of assembly 40, hidden from view in this figure. In the present example, although not necessarily, antenna elements 28 are arranged in a 2D rectangular array. Each antenna element 28 is coupled to a respective coaxial connector 44, seen at the top of assembly 40.

Antenna assembly 40 connects to a plurality of processing modules 48. Processing modules 48 are typically fabricated on respective Printed Circuit Boards (PCBs). In the present example, each processing module 48 is planar. Each processing module 48 is configured to receive RF signals from a respective row of antenna elements 28 via a row of coaxial connectors 44 (in assembly 40) and mating coaxial connectors 52 (in modules 48). Each processing module 48 comprises multiple amplifiers 64, RF devices 60 and digital processors 56 for processing the received signals. Using these components, each processing module 48 receives, amplifies and digitizes the received signals. Each processing module 48 then performs partial (module-level) Digital Beam Forming (DBF) on the signals received from the respective row of antenna elements 28.

The resulting beam-formed digital signals produced by modules 48 are provided to a main processing block 80 via respective digital connectors 102 (in processing modules 48) and mating digital connectors 92 (in main processing block 80). Main processing block 80 combines the digital signals using digital processors 96, so as to apply full (system-level) DBF to the entire array 24 of antenna elements 28. Partial (module-level) and full (system-level) DBF operations are explained in detail further below.

In the embodiment of Fig. 1, system 20 receives electrical power via power connector 32 in main processing block 80 (connector 32 is also seen in Fig. 1). Main processing block 80 comprises multiple power connectors 88 that provide power to modules 48 via respective mating power connectors 100.

In the present example, system 20 further comprises a heat dissipation module 72, which is configured to evacuate heat from processing modules 48. Each processing module 48 comprises heat-dissipation interfaces 68 that conduct heat to heat-dissipation module 72. Heat dissipation module 72 in turn comprises a thermal outlet 76 for conducting heat outside of system 20, e.g., to a thermal radiator. Such a configuration is shown in Fig. 8 below and is suitable, for example, for evacuating heat in a vacuum environment, such as on board a satellite.

In this implementation, processing modules 48 are planar, and are stacked next to one another. Each planar processing module has (i) a first side comprising one or more Radio Frequency (RF) interconnects (connectors 52) for connecting to antenna elements 28, (ii) a second side comprising at least one digital interface (connectors 102) for connecting to main processing block 80, and (iii) a third side comprising one or more heat-dissipation interfaces (interfaces 68) for connecting to heat dissipation module 72.

Thus, in the implementation of Fig. 1 processing modules 48 are arranged to form a box-shaped stack. One face of the box-shaped stack faces antenna array 24 and comprises the RF interconnects between each processing module 48 and its respective subset of antenna elements 28. Another face of the box comprises the digital interfaces of processing modules 48 and faces main processing block 80. A third face of the box, which faces heat dissipation module 72, comprises heat-dissipation interfaces 68 of processing modules 48.

The electrical, mechanical and thermal configurations of system 20, as shown in Fig. 1, are example configurations that are chosen purely for the sake of conceptual clarity. In alternative embodiments, any other suitable configuration can be used.

RECEPTION PROCESSING AND DIGITAL BEAM FORMING

Fig. 3 is a block diagram that schematically illustrates reception (RX) processing and Digital Beam Forming (DBF) in system 20, in accordance with an embodiment of the present invention. Note that Fig. 3 aims to explain the algorithmic aspects and the signal-processing operations being performed. The figure does not reflect partitioning into partial (module-level) DBF and full (system -level) DBF, and does not reflect the “division-of-labor” between processing modules 48 and main processing block 80. These aspects are addressed further below with reference to Figs. 4 and 5.

In the present example, system 20 receives RF signals from N antenna elements 28. N respective Low-Noise Amplifiers (LNAs) 110 amplify the received signals. N respective Analog-to-Digital Converters (ADCs) 114 sample (digitize) the amplified signals. N respective Fast Fourier Transform (FFT) modules 118 transform the digitized signals from the time domain to the frequency domain.

A bank of M beam-forming modules 122 derive M directional reception beams from the N frequency-domain signals produced by FFT module 118. Each reception beam is a digital signal, which comprises a weighted superposition of the signals received by the N antenna elements 28. The weighting essentially applies a directional antenna pattern that is steered at a desired direction. In addition to steering, the weighting can also control the shape of the directional antenna pattern, e.g., trade-off between side-lobe attenuation and main-lobe beam width. Each beam can be steered at any direction, independently of other beams.

A given beam-forming module 122 derives its beam by multiplying the N received signals by N respective weights (also referred to as coefficients), and summing the weighted signals. All these operations are performed digitally. For this purpose, each beam-forming module 122 stores one or more sets of weights 126 in a suitable memory. Each set of weights comprises N weights - a respective weight associated with each antenna element. Digital multipliers 130 are used for multiplying the signals by the weights. Adders 136 are used for summing the weighted signals. The sum of the N weighted signals (still in the frequency domain) is provided as output of the beam-forming module.

Each beam-forming module 122 is coupled to a respective Inverse FFT (IFFT) module 140, which transforms the sum into the time domain. Each IFFT module 140 thus produces a time-domain beam-formed digital signal 144, also referred to simply as a “beam” for brevity. Signals 144 are typically provided to a digital receiver for further processing.

Fig. 4 is a block diagram that schematically illustrates partial RX processing and DBF in a given processing module 48 of system 20, in accordance with an embodiment of the present invention. As described above, system 20 comprises multiple processing modules 48, with each processing module 48 handling the signals received by a respective partial subset (e.g., row) of antenna elements 28. In the present example, each row consists of K antenna elements, i.e., the number of processing modules is N/K. As seen in Fig. 4, each processing module 48 comprises K LNAs 110, K ADCs 114 and K FFT modules 118. The functionalities of these elements is as described above with reference to Fig. 3. Each processing module 48 further comprises M partial beam-forming modules 148. Unlike beam-forming modules 122 of Fig. 3, a given partial beam-forming module 148 of Fig. 4 handles only K antenna elements of a given beam. Each partial beamforming module 148 outputs a partially beam-formed signal 152, which comprises a weighted sum of the (frequency-domain) signals received by a subset of K antenna elements.

Fig. 5 is a block diagram that schematically illustrates full RX processing and DBF in system 20, in accordance with an embodiment of the present invention. The top of the figure shows N/K processing modules 48, each assigned to a respective row of K antenna elements. Each processing module 48 outputs M partially beam-formed signals 152 corresponding to M requested reception beams.

Signals 152 are provided to main processing block 80, which is shown in the middle of the figure. Main processing block 80 comprises M adders 156. The i^th adder (i=l ...M) adder corresponds to the i^th beam (i=l ...M), and comprises N/K inputs. The inputs of the i^th adder receive the partially beam-formed signals 152 of the i^th beam from the N/M processing modules 48. Thus, the output of the i^th adder 156 is a digital signal, which comprises the fully beam-formed i^th beam in the frequency domain. The M outputs of the M adders 156 are provided to a main processor 160. Main processor 160 comprises M IFFT modules 164 that transform the M beams into the time domain. The M time-domain signals are typically provided to a digital receiver for further processing.

ADDITIONAL EMBODIMENTS AND VARIATIONS

Fig. 6 is a schematic, pictorial illustration of an active antenna system 168 used for signal reception, in accordance with an embodiment of the present invention. The electrical and mechanical configuration of system 168 are similar to those of system 20 described above.

In the present example, system 168 comprises a total of one hundred antenna elements 28, arranged in a square 10-by-10 array. The system thus comprises ten processing modules 48, each handling the signals of ten antenna elements. As seen in the figure, each processing module comprises ten LNAs 110 and ten ADCs 114, coupled to a digital processor 96. Cooling of LNAs 110 is performed using heat pipes 176, which evacuate heat from the LNAs to heat-dissipation module 72. On the left-hand side of the figure, main processing block 80 comprises digital processors 96 and connectors 172 for communicating with a main processor.

Fig. 7 is a schematic, pictorial illustration of an active antenna system 178 used for signal transmission, in accordance with an alternative embodiment of the present invention. Unlike the system configurations described above, for transmission each processing module 48 comprises, inter alia, a respective Digital -to- Analog Converter (DAC) 184 and a respective Solid State Power Amplifier (SSPA) 180 coupled to each antenna element 28. Cooling of SSPAs 180 is performed using heat pipes 182, which evacuate heat from the SSPAs to heatdissipation module 72.

Fig. 8 is a schematic, pictorial illustration of a scheme for dissipating heat from active antenna system 20 of Fig. 1, in accordance with an embodiment of the present invention. In this configuration, a thermal conductor 188 is coupled to thermal outlet 76 of system 20. Thermal conductor 188 conducts heat from system 20 to a thermal radiator 192, which in turn dissipates the heat by radiation. The configuration of Fig. 8 is particularly suitable for operation in a vacuum environment (e.g., in space). In such an environment, radiation is typically the only usable heat dissipation mechanism, since conduction and convection are usually not possible.

Fig. 9 is a cross-section view of antenna assembly 40 of system 20, in accordance with an embodiment of the present invention. In the present example, the antenna elements comprise horns 192 having respective apertures 196. Each horn 192 is coupled to a respective coaxial connector 44 for connecting to processing module 48. In some embodiments horns 192 may comprise suitable polarizers. It is noted that implementation using horns is merely one non-limiting example implementation. Alternatively, any other suitable type of antenna elements can be used. For example, the antenna elements may comprise metallic patches printed on a circuit board, resulting in a flat planar antenna array.

The electrical, mechanical and thermal configurations of system 20 and its various components, as shown in Figs. 1-9, are example configurations that are depicted purely for the sake of conceptual clarity. In alternative embodiments, any other suitable configurations can be used.

In various embodiments, system 20 and its elements may be implemented using any suitable hardware, such as using discrete components, one or more Application-Specific Integrated Circuits (ASICs), one or more Radio Frequency Integrated Circuits (RFICs) and/or one or more Field-Programmable Gate Arrays (FPGAs). In some embodiments, some of the elements of system 20, e.g., some elements of main processing block 80 and/or main processor 160, may be implemented using one or more programmable processors that are programmed in software to carry out the functions described herein. The software may be downloaded to the processor in electronic form, over a network, for example, or it may, alternatively or additionally, be provided and/or stored on non-transitory tangible media, such as magnetic, optical, or electronic memory.

It will be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art. Documents incorporated by reference in the present patent application are to be considered an integral part of the application except that to the extent any terms are defined in these incorporated documents in a manner that conflicts with the definitions made explicitly or implicitly in the present specification, only the definitions in the present specification should be considered.

Claims

1. An active antenna system for operating in conjunction with an array of antenna elements, the active antenna system comprising: multiple processing modules, each processing module comprising analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing signals communicated by a respective subset of the antenna elements; a main processing block, which is configured to connect to the processing modules via digital interfaces and to perform DBF for at least part of the array; and a heat dissipation module, which is configured to evacuate heat from the processing modules.

2. The active antenna system according to claim 1, wherein each processing module is planar and has:

(i) a first side comprising one or more Radio Frequency (RF) interconnects for connecting to the subset of the antenna elements;

(ii) a second side comprising at least one digital interface for connecting to the main processing block; and

(iii) a third side comprising one or more heat-dissipation interfaces for connecting to the heat dissipation module.

3. The active antenna system according to claim 2, wherein, in each processing module, the second side is opposite to the third side.

4. The active antenna system according to claim 3, wherein, in each processing module, the first side is perpendicular to the second and third sides.

5. The active antenna system according to any of claims 1-4, wherein each processing module comprises one or more heat pipes for evacuating heat from active components to the heat-dissipation module.

6. The active antenna system according to any of claims 1-4, wherein the heat dissipation module is configured to evacuate the heat in vacuum conditions.

7. The active antenna system according to any of claims 1-4, wherein the processing modules and the heat dissipation module are configured to evacuate the heat from the processing modules using only heat conduction.

8. The active antenna system according to any of claims 1-4, wherein the heat dissipation module is configured to conduct the heat to a thermal radiator.

9. The active antenna system according to any of claims 1-4, wherein each processing module is configured to receive RF signals from the antenna elements in the respective subset, and to process the received RF signals so as to output one or more digital signals; and wherein the main processing block is configured to combine corresponding digital signals from the processing modules, so as to produce one or more beam-formed received signals.

10. The active antenna system according to any of claims 1-4, wherein the main processing block is configured to distribute at least one digital signal to the processing modules; and wherein each processing module is configured to process the at least one digital signal so as to transmit at least one beam-formed RF signal to the antenna elements.

11. A method for producing an active antenna system for operating in conjunction with an array of antenna elements, the method comprising: producing multiple processing modules, each processing module comprising analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing signals communicated by a respective subset of the antenna elements; connecting the processing modules, via digital interfaces, to a main processing block that performs DBF for at least part of the array; and coupling the processing modules to a heat dissipation module, which is configured to evacuate heat from the processing modules.

12. The method according to claim 11, wherein each processing module is planar and has:

13. The method according to claim 12, wherein, in each processing module, the second side is opposite to the third side.

14. The method according to claim 13, wherein, in each processing module, the first side is perpendicular to the second and third sides.

15. The method according to any of claims 11-14, wherein each processing module comprises one or more heat pipes for evacuating heat from active components to the heatdissipation module.

16. The method according to any of claims 11-14, wherein the heat dissipation module is configured to evacuate the heat in vacuum conditions.

17. The method according to any of claims 11-14, wherein the processing modules and the heat dissipation module are configured to evacuate the heat from the processing modules using only heat conduction.

18. The method according to any of claims 11-14, wherein the heat dissipation module is configured to conduct the heat to a thermal radiator.

19. A method for communication using an active antenna system operating in conjunction with an array of antenna elements, the method comprising: processing signals communicated via the antenna elements using multiple processing modules, each processing module comprising analog front-end (AFE) circuitry and digital beam-forming (DBF) circuitry for processing the signals communicated by a respective subset of the antenna elements; performing DBF for at least part of the array using a main processing block that is connected to the processing modules via digital interfaces; and evacuating heat from the processing modules to a heat dissipation module.