WO2022021098A1

WO2022021098A1 - Encoding and decoding method and apparatus

Info

Publication number: WO2022021098A1
Application number: PCT/CN2020/105310
Authority: WO
Inventors: 史强
Original assignee: 华为技术有限公司
Priority date: 2020-07-28
Filing date: 2020-07-28
Publication date: 2022-02-03
Also published as: CN115812305A

Abstract

Embodiments of the present application disclose an encoding and decoding method and apparatus, relating to the field of communications. The present invention is capable of effectively recovering entire lost packets, while also reducing resource consumption and calculation delay. The specific solution comprises: obtaining a code stream; according to a number M of original packets, a number R of redundant packets R, and a packet length L during encoding of the code stream, determining a number N of lost original packets; eliminating P redundant packets to obtain an elimination result; according to the packet reception order and the packet identification of the code stream, constructing a standard Cauchy matrix having R rows and M columns; selecting, from the standard Cauchy matrix, corresponding elements at overlapping positions of corresponding columns of P lost original packets and corresponding rows of P redundant packets to obtain a P-order decoding matrix; left multiplying the inverse matrix of the P-order decoding matrix by the elimination result to obtain the P lost original packets.

Description

A method and device for encoding and decoding

technical field

The embodiments of the present application relate to the field of communications, and in particular, to an encoding and decoding method and apparatus.

Background technique

With the rapid development of communication technology, video conference systems have been widely used. The video conference system is a network-based multimedia communication system, which can support multi-person video conference, video communication, multi-person voice, screen sharing, dynamic manuscript speech, text exchange, text message, electronic whiteboard, multi-person desktop sharing, file transfer and other functions to provide convenient communication channels for enterprises.

In practical applications, network quality (such as network packet loss) is the main factor affecting the video conference experience. For example, network packet loss will directly lead to screen blur, freeze, freeze and other phenomena, seriously affecting user experience and conference quality. Anti-packet loss optimization technology in the video transmission encoding and decoding process is a necessary measure for video conference systems.

The traditional forward error correction (FEC) technology only identifies and modifies the bits of data errors, and has limited recovery capability for sudden long-term continuous packet loss. The new FEC technology provides an end-to-end chip solution for the whole packet loss recovery, specifically: the sender constructs an encoding matrix based on the original packet (the original data packet to be sent, also known as the original packet) according to the encoding and decoding algorithm Generate redundant packets, send both original packets and redundant packets; the receiving end decodes and recovers the lost original packets based on the codec algorithm according to the actual received data packets.

However, the new FEC technology has the following defects: the encoding matrix constructed by the current sender is complex, which increases the burden of the encoding and decoding scheme; the receiver can only select the decoding matrix after sorting the original packets and redundant packets out of sequence, and the resource overhead and The calculation delay is very large.

SUMMARY OF THE INVENTION

The embodiments of the present application provide an encoding and decoding method and apparatus, which can reduce resource overhead and calculation delay on the premise of effectively recovering lost packets of the entire packet.

In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:

In a first aspect, a decoding method is provided, the method can be applied to a decoding device, and the method can include: acquiring a code stream, the code stream including X original packets and Q redundant packets; The number M, the number R of redundant packets and the packet length L, analyze the code stream to obtain X original packets and Q redundant packets, and determine the number N of lost original packets, where N equals M minus X; Q is less than or Equal to R; eliminate the P redundant packets in the Q redundant packets to obtain the elimination result; wherein, the P redundant packets are redundant packets that satisfy the conditions; P is the smaller value of N and Q; According to the packet receiving order and packet identification in the code stream, construct a standard Cauchy matrix with R rows and M columns; select the columns corresponding to the P lost original packets and the rows corresponding to the P redundant packets in the standard Cauchy matrix. The elements corresponding to the overlapping positions are obtained to obtain the P-order decoding matrix; the inverse matrix of the P-order decoding matrix is left multiplied by the original elimination result to obtain P lost original packets.

Through the decoding steps provided by the embodiments of the present application, since the decoding matrix is a standard Cauchy matrix, the construction is simple, and the burden of encoding and decoding is reduced. In addition, since the decoding matrix is a standard Cauchy matrix, the decoding end can directly determine the elements to construct the decoding matrix according to the receiving order of the data packets in the code stream and the packet identification. resource overhead and computational delay.

Wherein, the P lost original packets are part or all of the N lost original packets. When Q is less than N, the maximum error correction capability of the codec system is Q, and P is equal to Q. At this time, the P lost original packets are any P of the N lost original packets.

In a possible implementation manner, the above-mentioned elimination results include elimination results of P redundant packets. The elimination result of a redundant packet includes the elimination result of the elements contained in the redundant packet, and the elimination result of an element is the part calculated by subtracting the element encoding from the P original packets to be restored. Wherein, the P original packets are part or all of the successfully received original packets in the code stream received by the decoding end.

In another possible implementation manner, the number M of original packets, the number R of redundant packets, and the packet length L are encoding parameters, and the encoding parameters can be configured in the encoding end device and/or the decoding end device according to actual requirements. Alternatively, the encoding parameters may also be input by the user to the encoding end device and/or the decoding end device in the encoding and decoding system in real time. Alternatively, the encoding parameters may also be input by the user into the encoding end device, and sent by the encoding end device to the decoding end device.

In another possible implementation manner, a standard Cauchy matrix with R rows and M columns is constructed according to the packet receiving order and packet identifiers in the code stream, which may specifically include:

According to the packet identifier indxf of the f-th received original packet in the received packet sequence of the received code stream, the packet identifier indxg of the g-th received redundant packet in the received packet sequence of the received code stream, and the standard Cauchy matrix elements Set X and Y, determine the element in the fth row and the gth column of the standard Cauchy matrix

Among them, X includes x _i , Y includes y _j , i is greater than or equal to 1, and less than or equal to R, j is greater than or equal to 1, and less than or equal to M; x _i and y _j are independent elements; f is greater than or equal to is equal to 1 and less than or equal to R, and g is greater than or equal to 1 and less than or equal to M.

Among them, x _i and y _j in the standard Cauchy matrix elements of R row and M column are strongly related to the order of the original packet and the redundant packet during encoding, and the encoding sequence can be reflected by the packet identifier. Therefore, according to The packet identifier determines the value of the elements in the decoding matrix. According to the receiving order of the packets of the received code stream, the position of the elements in the decoding matrix can be determined. Therefore, the R used to select the decoding matrix can be determined without rearranging out of order. A standard Cauchy matrix with rows and columns can greatly reduce resource overhead.

In a possible implementation manner, the above standard Cauchy matrix may be the Cauchy matrix of Galois Field.

In a possible implementation manner, the above-mentioned standard Cauchy matrix may be a Cauchy matrix in the Galois field, and the decoding method provided by the present application may further include: performing an upper triangular matrix, a diagonal matrix and a lower triangular matrix on the P-order decoding matrix. Triangular matrix (lower triangular matrix, diagonal matrix, upper triangular matrix, LDU) is decomposed to obtain upper triangular matrix, diagonal matrix and lower triangular matrix; respectively obtain the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the lower triangular matrix The inverse matrix of , the product of the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the inverse matrix of the lower triangular matrix is used as the inverse matrix of the P-order decoding matrix.

It has been verified that after decomposing the matrix LDU in the Galois field, inverting the matrix and then calculating the product, the results are consistent with the results of the mathematical inversion algorithm. By decomposing and inverting the LDU, the complexity of the inversion process can be reduced and the decoding efficiency can be improved. .

In a possible implementation manner, acquiring the inverse matrix of the lower triangular matrix may specifically include: determining the inverse element of each element in the lower triangular matrix, and calculating the inverse element of each element in the lower triangular matrix according to the element in the lower triangular matrix. The positions in the triangular matrix are arranged to form the inverse of the lower triangular matrix. Among them, the inverse element of the diagonal element in the lower triangular matrix and the first element below the diagonal element is itself; for the other elements in the lower triangular matrix except the diagonal element and the first element below the diagonal element The inverse element is obtained according to the following formula:

Among them, L _o,s ^-1 is the inverse element of the element L _o,s in the o-th row and the s-th column in the lower triangular matrix; L _o,s ⁱ is the diagonal element in the lower triangular matrix where L _o,s is located. The inverse element of i elements, L _o,s ^i′ is the inverse element of the i-th element on the right side of L _o,s in the lower triangular matrix; A is the distance between L _o,s and the diagonal elements in the column direction or row direction. number of elements.

In a possible implementation manner, obtaining the inverse matrix of the upper triangular matrix may specifically include: determining the inverse element of each element in the upper triangular matrix; The positions in the triangular matrix are arranged to form the inverse of the upper triangular matrix. Among them, the inverse element of the diagonal element in the upper triangular matrix and the first element above the diagonal element is itself; the inverse of other elements except the diagonal element and the first element above the diagonal element in the upper triangular matrix The elements are obtained according to the following formula:

Among them, L _p,q ^-1 is the inverse element of the element L _p,q in the p-th row and the q-th column in the upper triangular matrix; L _{p, q} ⁱ is the upper triangular matrix where L _{p, q} is located in the diagonal element of the column. The inverse element of i elements, L _{p, q} ^i' is the inverse element of the i-th element on the left side of L _{p, q} in the upper triangular matrix; B is the distance between L _{p, q} and the diagonal elements in the column direction or row direction. number of elements.

With reference to the first aspect or any of the above possible implementation manners, in another possible implementation manner, X and Y do not have an intersection. X and Y are used as a set of elements to construct the above standard Cauchy matrix, and they are independent of each other and have no intersection, which improves the independence of each element in the above standard Cauchy matrix, and makes the encoding and decoding performance better.

With reference to the first aspect or any of the above possible implementation manners, in another possible implementation manner, Y is {0, 1, ..., M-2, M-1}, and X is {M, M+ 1, ..., M+R-2, M+R-1}. This implementation provides specific values of the element set for constructing the above standard Cauchy matrix, which improves the feasibility of the solution.

In a second aspect, an encoding method is provided. The method is applied to an encoding device. The method may include: acquiring the number M of original packets, the number R of redundant packets, and the packet length L; acquiring M original packets; The standard Cauchy matrix of columns, as an encoding matrix, the elements in the i-th row and the j-th column of the encoding matrix are

x _i and y _j are independent elements, x _i belongs to the set X including R elements, y _j belongs to the set Y including M elements, i is greater than or equal to 1, and less than or equal to R, j is greater than or equal to 1 , and less than or equal to M. Multiply the M original packets by the encoding matrix to the left to obtain R redundant packets; send M original packets and R redundant packets.

In a possible implementation manner, the above encoding matrix is a Galois Field Cauchy matrix, and x _i +y _j is less than 2 ⁸ (that is, less than 256, or equivalently: less than or equal to 255). It has been verified that after decomposing the matrix LDU in the Galois field, inverting the matrix and then calculating the product, the results are consistent with the results of the mathematical inversion algorithm. By decomposing the LDU and then inverting, the complexity of the inversion process can be reduced to improve decoding. efficient.

In another possible implementation, X and Y do not intersect. X and Y are used as a set of elements to construct the above standard Cauchy matrix, and they are independent of each other and have no intersection, which improves the independence of each element in the above standard Cauchy matrix, and makes the encoding and decoding performance better.

In another possible implementation, Y is {0, 1, ..., M-2, M-1}, and X is {M, M+1, ..., M+R-2, M+R -1}. This implementation provides specific values of the element set for constructing the above standard Cauchy matrix, which improves the feasibility of the solution.

In a third aspect, a decoding apparatus is provided, and the apparatus may include: an acquisition unit, a determination unit, a cancellation unit, a construction unit, and a processing unit. in:

an acquisition unit, configured to acquire a code stream, where the code stream includes X original packets and Q redundant packets.

The determining unit is used to analyze the code stream to obtain X original packets and Q redundant packets according to the original packet number M, the redundant packet number R and the packet length L during encoding of the code stream obtained by the acquisition unit, and determine The number N of lost original packets, N is equal to M minus the X; Q is less than or equal to R.

The elimination unit is used to eliminate the P redundant packets in the Q redundant packets to obtain the elimination result. Wherein, the P redundant packets are redundant packets satisfying the condition; P is the smaller value of N and Q.

The construction unit is used to construct a standard Cauchy matrix with R rows and M columns according to the packet receiving sequence and packet identifiers in the code stream. Wherein, the packet identifier is used to indicate the packet sequence when the data packet is encoded.

The selection unit is used to select the columns corresponding to the P lost original packets and the elements corresponding to the overlapping positions of the rows corresponding to the P redundant packets in the standard Cauchy matrix to obtain a P-order decoding matrix.

The processing unit is used for left-multiplying the original elimination result by the inverse matrix of the P-order decoding matrix to obtain P lost original packets.

It should be noted that the decoding apparatus provided in the third aspect is used to execute the decoding method provided in the first aspect or any possible implementation manner of the first aspect, and for the specific implementation, refer to the foregoing first aspect or the first aspect. any possible implementation.

In a fourth aspect, an encoding apparatus is provided, and the encoding apparatus may include: an acquisition unit, a construction unit, an encoding unit, and a sending unit. in:

The acquiring unit is used to acquire the number M of original packets, the number R of redundant packets and the packet length L; and acquire M original packets.

Build cells for building a standard Cauchy matrix with R rows and M columns. The element in the i-th row and the j-th column of the encoding matrix is

x _i and y _j are independent elements, x _i belongs to the set X including R elements, y _j belongs to the set Y including M elements, i is greater than or equal to 1, and less than or equal to R, j is greater than or equal to 1 , and less than or equal to M.

The coding unit is used to left-multiply the M original packets by the coding matrix to obtain R redundant packets.

The sending unit is used for sending M original packets and R redundant packets.

It should be noted that the encoding device provided in the fourth aspect is used to execute the encoding method provided by the second aspect or any possible implementation manner of the second aspect, and for specific implementation, refer to the second aspect or the second aspect. any possible implementation.

In a fifth aspect, the present application provides a decoding apparatus, which can implement the functions in the method examples described in the first aspect above, and the functions can be implemented by hardware or by executing corresponding software in hardware. The hardware or software includes one or more modules corresponding to the above functions. The decoding device may exist in the form of a chip product.

In a possible implementation, the decoding apparatus may include a processor and a transmission interface. Among them, the transmission interface is used to receive and send data. The processor is configured to invoke software instructions stored in the memory to cause the decoding apparatus to perform the functions in the method examples described in the first aspect above.

In a sixth aspect, the present application provides an encoding device, which can implement the functions in the method examples described in the second aspect above, and the functions can be implemented by hardware or by executing corresponding software in hardware. The hardware or software includes one or more modules corresponding to the above functions. The encoding device may exist in the form of a chip product.

In a possible implementation, the encoding apparatus may include a processor and a transmission interface. Among them, the transmission interface is used to receive and send data. The processor is configured to invoke software instructions stored in the memory to cause the encoding apparatus to perform the functions of the method examples described in the second aspect above.

In a seventh aspect, a computer-readable storage medium is provided, and instructions are stored in the computer-readable storage medium, and when the instructions are executed on a computer or a processor, the computer or the processor is made to execute the above-mentioned first aspect or second. The decoding method or the encoding method provided by the aspect or any of its possible implementation manners.

In an eighth aspect, a computer program product is provided, the computer program product comprising instructions that, when executed on a computer or processor, cause the computer or processor to perform the above-mentioned first aspect or the second aspect or any possibility thereof The decoding method or encoding method provided by the implementation.

In a ninth aspect, a chip system is provided, the chip system includes a processor, and may also include a memory, for implementing the corresponding functions in the above method. The chip system can be composed of chips, and can also include chips and other discrete devices.

According to a tenth aspect, an encoding and decoding system is provided. The system includes the decoding device of the fifth aspect and the encoding device of the sixth aspect, respectively having the functions of the above aspects and any possible implementation manner.

It should be noted that various possible implementation manners of any one of the above aspects can be combined on the premise that the solutions are not contradictory.

Description of drawings

FIG. 1 is a schematic structural diagram of a communication system according to an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a communication device according to an embodiment of the present application;

3 is a schematic flowchart of an encoding and decoding method provided by an embodiment of the present application;

FIG. 4 is a schematic diagram of a curve of performance data varying with the number R of redundant packets according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a curve of performance data varying with the number of original packets M provided by an embodiment of the present application;

6 is a schematic diagram of a curve of performance data varying with packet length L according to an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a decoding apparatus provided by an embodiment of the present application;

FIG. 8 is a schematic structural diagram of a decoding device provided by an embodiment of the present application;

FIG. 9 is a schematic structural diagram of an encoding device provided by an embodiment of the present application;

FIG. 10 is a schematic structural diagram of an encoding device according to an embodiment of the present application.

detailed description

In the embodiments of the present application, in order to clearly describe the technical solutions of the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with basically the same functions and functions. Those skilled in the art can understand that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first", "second" and the like are not necessarily different. The technical features described in the "first" and second" have no sequence or order of magnitude.

In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or illustrations. Any embodiments or designs described in the embodiments of the present application as "exemplary" or "such as" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present the related concepts in a specific manner to facilitate understanding.

In the description of this application, unless otherwise stated, "/" indicates that the object associated with it is an "or" relationship, for example, A/B can indicate A or B; "and/or" in this application is only It is an association relationship that describes an associated object, which means that there can be three kinds of relationships, for example, A and/or B, which can be expressed as: A alone exists, A and B exist at the same time, and B exists alone, among which A, B Can be singular or plural. Also, in the description of the present application, unless stated otherwise, "plurality" means two or more than two. "At least one item(s) below" or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural item(s). For example, at least one item (a) of a, b, or c may represent: a, b, c, ab, ac, bc, or abc, where a, b, and c may be single or multiple .

In the embodiments of the present application, at least one may also be described as one or more, and the multiple may be two, three, four or more, which is not limited in this application.

Before describing the embodiments of the present application, the terms involved in the present application are explained.

The original packet (also referred to as the original packet) refers to the data packet to be transmitted in the codec system. The packet length L of the original packet is defined in the encoding parameter, and the data to be transmitted is constructed into multiple data packets of length L, which are the original packets.

A redundant packet refers to a reference data packet related to the original packet that is sent together with the original packet during encoding, and is used for reference decoding at the decoding end. At the encoding end, the redundant packet can be obtained by multiplying the original packet with the encoding matrix corresponding to the encoding and decoding algorithm. At the decoding end, the discarded original packet can be obtained by multiplying the redundant packet with the inverse matrix of the decoding matrix corresponding to the encoding and decoding algorithm.

When the current FEC technology recovers long-term continuous packet loss, the selected coding matrix is a non-standard matrix, which increases the burden of the coding and decoding scheme, and the decoding end can sort the original and redundant packets out of order according to the sending order. Selecting the decoding matrix and then decoding, the resource overhead and calculation delay are very large.

Based on this, the embodiments of the present application provide an encoding and decoding method, which uses a standard Cauchy matrix as the encoding matrix to reduce the burden of encoding and decoding; since the encoding matrix is a standard Cauchy matrix, the decoding end can The receiving order determines the decoding matrix for decoding, which eliminates the need to sort out-of-order original packets and redundant packets, reduces resource overhead, improves computing effect, and thus reduces computing delay.

The encoding and decoding methods provided in the embodiments of the present application may be applied to the communication system shown in FIG. 1 . As shown in FIG. 1 , the communication system may include an encoding end device 101 , a communication link 102 and a decoding end device 103 .

The encoding end device 101 is used to obtain and encode the code stream to be transmitted, obtain the encoded code stream (including original packets and redundant packets), and then send the encoded code stream to the decoding end device 103 through the communication link 102 . During the sending process, there may be packet loss and disorder. After receiving the code stream, the decoding end device 103 decodes and obtains the code stream. For the specific processing procedures of the encoding end device 101 and the decoding end device 103, reference may be made to the subsequent embodiments, which will not be described in detail here.

It should be noted that, in different application scenarios, the forms of each component in the communication system shown in FIG. 1 are different, and the embodiment of the present application does not limit the actual form of each component in the communication system shown in FIG. 1 .

For example, in a video conference scenario, the encoding end device 101 may be a switch connected to a video processing device (such as a conference terminal) at one end of the conference, and the decoding end device 103 may be a switch connected to the video processing device at the other end of the conference. The road 102 may be a wide area network (WAN).

The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

On the one hand, an embodiment of the present application provides a communication apparatus for executing the encoding method or the decoding method provided by the present application. The communication apparatus may be deployed in the encoding end device 101 or the decoding end device 103 shown in FIG. 1 . For example, the communication device may be a functional module or chip in the encoding end device 101 or the decoding end device 103 .

FIG. 2 shows a communication device 20 related to various embodiments of the present application. As shown in FIG. 2 , the communication apparatus 20 may include a processor 201 , a memory 202 and a transceiver 203 .

Below in conjunction with FIG. 2, each constituent component of the communication device 20 will be specifically introduced:

The memory 202 may be a volatile memory (volatile memory), such as random-access memory (RAM); or a non-volatile memory (non-volatile memory), such as a read-only memory (read-only memory). memory, ROM), flash memory (flash memory), hard disk drive (HDD) or solid-state drive (solid-state drive, SSD); or a combination of the above-mentioned types of memory, for storing the memory that can implement the method of the present application Program code, configuration files, or other content.

The processor 201 is the control center of the communication device 20 . For example, the processor 201 may be a central processing unit (CPU), may also be a specific integrated circuit (application specific integrated circuit, ASIC), or be configured to implement one or more integrated circuits of the embodiments of the present application Circuits, such as: one or more microprocessors (digital singnal processor, DSP), or, one or more field programmable gate array (field programmable gate array, FPGA).

The transceiver 203 is used to communicate with other devices. Transceiver 203 may be a communication port or otherwise.

In a possible implementation manner, when the communication device 20 is deployed in the decoding end device, the processor 201 executes the software program and/or module stored in the memory 202 by running or executing, and calling the data stored in the memory 302. The following functions:

Obtain a code stream, the code stream includes X original packets and Q redundant packets; according to the number of original packets M, the number of redundant packets R and the packet length L when the code stream is encoded, analyze the code stream to obtain X original packets and Q redundant packets, determine the number N of lost original packets, N is equal to M minus X; Q is less than or equal to R; the P redundant packets in the Q redundant packets are eliminated by eliminating the original packets. The original result; among them, the redundant packets that meet the conditions in the P redundant packets; P is the smaller value of Q and N; according to the packet receiving order and packet identification in the code stream, construct a standard Cauchy with R rows and M columns matrix; select the columns corresponding to the P lost original packets in the standard Cauchy matrix, and the elements corresponding to the overlapping positions of the rows corresponding to the P redundant packets participating in the elimination to obtain the P-order decoding matrix; leave the elimination result to the left Multiply the inverse matrix of the P-order decoding matrix to obtain P lost original packets. It should be understood that, in this embodiment of the present application, the code stream to be sent includes M original packets, and the M original packets correspond to R redundant packets.

In another possible implementation manner, when the communication apparatus 20 is deployed in the encoding end device, the processor 201 runs or executes the software programs and/or modules stored in the memory 202 and calls the data stored in the memory 302, Execute the following functions:

Obtain the number of original packets M, the number of redundant packets R and the packet length L; obtain M original packets; construct a standard Cauchy matrix with R rows and M columns as an encoding matrix; elements in the i-th row and the j-th column of the encoding matrix for

x _i and y _j are independent elements, x _i belongs to the set X including R elements, y _j belongs to the set Y including M elements, i is greater than or equal to 1, and less than or equal to R, j is greater than or equal to 1 , and less than or equal to M; multiply M original packets by the encoding matrix to obtain R redundant packets; send M original packets and R redundant packets.

On the other hand, an embodiment of the present application provides an encoding and decoding method, wherein the encoding end device executes the encoding method, and the decoding end device executes the decoding method. As shown in Figure 3, the encoding and decoding method provided by this application includes:

S301. The encoding end device obtains the number M of original packets, the number R of redundant packets, and the packet length L.

The number M of original packets, the number R of redundant packets, and the packet length L are encoding parameters, and the encoding parameters can be configured in the encoding end device and/or the decoding end device according to actual requirements. Alternatively, the coding parameters can also be input into the coding and decoding system by the user in real time. Alternatively, the encoding parameters may also be input by the user into the encoding end device, and sent by the encoding end device to the decoding end device.

S302. The encoding end device obtains M original packets.

Specifically, in S302, the encoding end device divides the data to be transmitted according to the packet length L according to the number of original packets M in the encoding parameters, and the data to be transmitted of each L length is regarded as an original packet, and selects the constructed data packets from the data packets. The M data packets are used as the original packets of this encoding operation, and the M original packets in S302 can be obtained.

Optionally, in practical applications, M data packets may be selected according to a preset rule, and the selection process is not limited in this embodiment of the present application. For example, the preset rule may be to select the original package in chronological order, or the preset rule may be to select the original package according to the urgency of the business. Of course, the preset rule can also be other, which can be configured according to actual needs, and is not limited.

For example, in S302, the encoding end device may select M data packets and construct them in the form of encoding blocks.

Exemplarily, the M original packets are respectively recorded as M ₁ to M _M , which can represent the following data matrix form, each row is an original packet, and its length is L, that is, L elements, and one element is data of a fixed size. For example, one element may be 8-bit (bit)-sized data.

Wherein, the original package M ₁ =[M ₁₁ M ₁₂ M ₁₃ ... M _1L ];

original package M ₂ = [M ₂₁ M ₂₂ M ₂₃ ... M _2L ];

...

Original package M _M = [M _M1 M _M2 M _M3 ... M _ML ].

The number of rows of the data matrix is the number of original packets M in the encoding parameter, also called the number of original packets. The encoding length is based on the maximum length L of the original packet, and the tail of the original packet less than L can be filled with 0 (padding0).

S303. The encoding end device constructs a standard Cauchy matrix with R rows and M columns as an encoding matrix.

Specifically, a standard Cauchy matrix with R rows and M columns can be constructed according to M and R in the encoding parameters obtained in S301.

Among them, the standard Cauchy matrix with R rows and M columns constructed in S303 is used by the encoding device to encode the original packets to generate redundant packets.

Exemplarily, a standard Cauchy matrix with m rows and n columns can be described as follows:

Among them, the x element (for example, x(i) in the above formula) and the y element (for example, y(i) in the above formula) in the standard Cauchy matrix are both elements in the mathematical domain to which they belong. The standard Cauchy matrix has the following characteristics: any sub-square matrix of the standard Cauchy matrix is a singular matrix, and there is an inverse matrix.

In a possible implementation, the standard Cauchy matrix with R rows and M columns constructed in S303 may be the Cauchy matrix of the Galois field, and the elements in the matrix are taken from the Galois field, and the x elements (for example, the above The x(i) and y elements in the formula (eg y(i) in the above formula) are both elements in the Galois field GF( ^2W ). The inversion operation of the standard Cauchy matrix on the Galois field can be completed within the complexity of O(n ² ).

Exemplarily, in S303, the encoding end device can construct an encoding matrix with R rows and M columns according to the following steps 1 and 2:

Step 1. The encoding end device constructs an element set for constructing a standard Cauchy matrix (ie, an encoding matrix).

The element set constructed in step 1 includes a set X and a set Y, the set X includes the x element in the Cauchy matrix, and the set Y includes the y element in the Cauchy matrix. The set X includes {x ₁ , x ₂ ,..., x _R-1 , x _R }, and the set Y includes {y ₁ , y ₂ ,..., y _M-1 , y _M }. Among them, x _i and y _j are mutually independent elements, i is greater than or equal to 1, and less than or equal to R, j is greater than or equal to 1, and less than or equal to M.

Exemplarily, when the standard Cauchy matrix with R rows and M columns constructed in S303 is the Cauchy matrix of the Galois field, the elements in the set X and the set Y are all elements in the Galois field GF(2 ⁸ ). . Among them, x _i and y _j are mutually independent elements on the Galois field, and x _i +y _j is less than 2 ⁸ .

It should be noted that the elements in the set X and the set Y may be configured according to actual requirements, which are not limited in this embodiment of the present application. Constraints of set X and set Y can also be configured according to actual requirements.

For example, set X and set Y may have no intersection.

For example, set Y may be {0, 1, ..., M-2, M-1}, and set X may be {M, M+1, ..., M+R-2, M+R-1}. That is, y ₁ =0, ..., y _M =M-1, x ₁ =M, ..., x _R =M+R-1.

Step 2: According to the element set constructed in step 1, the encoding end device constructs a standard Cauchy matrix with R rows and M columns as an encoding matrix.

Exemplarily, a standard Cauchy matrix (coding matrix) with R rows and M columns can be represented as the following matrix:

Among them, the elements of the i-th row and the j-th column in the encoding matrix are

x _i belongs to a set X of R elements, and y _j belongs to a set Y of M elements. The number of rows of the encoding matrix is the number R of redundant packets, the number of columns is the number M of the original packets, the column is in Byte, and the length of the column is the number M of the original packets in the encoding parameters. In this coding matrix construction method, elements are selected from the finite element set constructed in step 1, which can reduce unreasonable value selection and redundant computing resource overhead, and can construct the coding matrix more accurately. When the construction process is implemented by hardware, each value of M and R can be accurately represented in the circuit without additional logic overhead.

S304. The encoding end device multiplies the M original packets by the encoding matrix to obtain R redundant packets.

In S304, the encoding end device multiplies the M original packets obtained in S302 with the encoding matrix constructed in S303 to obtain R redundant packets.

For example, the process of S304 can be illustrated as:

Among them, the right side of the equal sign in the above formula is the redundant packet matrix, which contains R redundant packets, each row is a redundant packet, the length of each redundant packet is L, and the R redundant packets are recorded as M respectively. ' ₁ to MR' _R .

Wherein, redundant packet M' ₁ =[M' ₁₁ M' ₁₂ M' ₁₃ ... M' _1L ];

Redundant packet M' ₂ =[M' ₂₁ M' ₂₂ M' ₂₃ ... M' _2L ];

...

Redundant packets M' _R = [M' _R1 M' _R2 M' _R3 ... M' _RL ].

The generated redundant packet is the encoding result. According to the principle of matrix multiplication, each element in the redundant packet contains the element information of the original packet and the encoding matrix, which is the basis for successfully decoding and recovering the lost original packet.

For example, for the redundant packet M′ ₂ , according to the principle of matrix multiplication, its elements satisfy the following equation, where each element contains the element information of the original packet and the encoding matrix:

...

For example, for the redundant packet M′ ₆ , according to the principle of matrix multiplication, its elements satisfy the following equation, where each element contains the element information of the original packet and the encoding matrix:

...

For example, for the redundant packet M′ ₉ , according to the principle of matrix multiplication, its elements satisfy the following equation, where each element contains the element information of the original packet and the encoding matrix:

...

S305. The encoding end device sends M original packets and R redundant packets.

Specifically, in S305, the encoding end device uses the M original packets and the R redundant packets as transmission code streams, and sends them together to the communication link with the decoding end device.

Further, when the encoding end device sends M original packets and R redundant packets in S305, a packet identification is marked in each packet to indicate the packet sequence during encoding of this data packet, so that the decoding end can identify the packet according to the packet identification. Determine the decoding matrix.

For example, the packet identifier of the mth original packet may be m, and m is less than or equal to M; the packet identifier of the rth redundant packet may be r, and r is less than or equal to R.

Optionally, the packet identifier may further include indication information for indicating whether the data packet is an original packet or a redundant packet.

In a possible implementation manner, the encoding end device may send the M original packets and the R redundant packets in sequence according to the numbering sequence of the M original packets and the R redundant packets.

In another possible implementation manner, in order to improve transmission security or for other reasons, the encoding end device may send the M original packets and the R redundant packets out of sequence.

Further, after the encoding end device sends the M original packets and the R redundant packets in S305, due to the influence of the communication link, the transmission scene, or the transmission environment, there may be a situation that some of the M original packets are lost, and it is necessary to The decoding end decodes and recovers by using the method provided in this application.

S306. The decoding end device obtains a code stream, where the code stream includes X original packets and Q redundant packets.

The code stream obtained by the decoding end device in S306 is the code stream received from the communication link, which may be referred to as a received code stream. The received code stream is the transmitted code stream sent by the encoding end device in S305 after transmission. Due to the possibility of packet loss when the transmitted code stream is transmitted in the communication link, X is less than or equal to M, and Q is less than or equal to R.

Exemplarily, it is assumed that the M original packets and R redundant packets included in the transmission code stream sent by the encoding end device in S305 have lost the original packets M ₁ , M ₇ , and M ₈ during the transmission process. It should be noted that, for the loss of the transmission process of the redundant packet, this embodiment of the present application does not consider or repeat them.

S307. The decoding end device analyzes the code stream to obtain X original packets and Q redundant packets according to the number M of original packets, the number R of redundant packets and the packet length L during encoding of the code stream, and determines the lost original packets the number N.

Among them, the number of original packets M, the number of redundant packets R and the packet length L in the code stream encoding are decoding parameters.

In a possible implementation manner, the decoding parameters can be configured on the decoding end device according to actual needs, and are consistent with the encoding parameters of the encoding end. Correspondingly, in S307, the decoding end device can directly obtain the original packet of the configured code stream during encoding. The number M, the number R of redundant packets, and the packet length L.

In another possible implementation manner, through the interaction between the encoding end device and the decoding end device, the encoding end device sends its encoding parameters to the decoding end device as the decoding parameters of the decoding end device. Correspondingly, the decoding end device in S307 The device can receive the number M of original packets, the number R of redundant packets, and the packet length L when the code stream is encoded by the encoding end device.

Specifically, since the packet loss phenomenon may exist when the transmitted code stream is transmitted in the communication link, N is equal to M minus X. N is greater than or equal to 0.

Further, in S307, the decoding end device can parse the code stream (for example, the code stream can be identified as one data packet according to the size of the data packet), obtain X original packets and Q redundant packets contained in it, and subtract M from M. Go to X and get N. For example, the decoding end device can determine whether each data packet is an original packet or a redundant packet according to the mark of each data packet.

Exemplarily, based on the example in S306, it can be concluded that N is 3 in S307.

S308, the decoding end device performs cancellation on P redundant packets in the Q redundant packets to obtain a cancellation result.

Among them, P is the fault tolerance capability of the decoding end device, that is, the number of lost original packets that can be recovered, and P is the smaller value of Q and N. When Q is less than N, the decoding end device supports recovering at most Q original packets among the N lost original packets. In this case, the lost original packets to be recovered may be selected according to actual requirements, which is not limited in this embodiment of the present application.

The P elimination packets described in S308 are redundant packets satisfying the condition among the Q redundant packets. It should be noted that the conditions for selecting the P redundant packets may be configured according to actual requirements, which is not limited in this embodiment of the present application.

In a possible implementation manner, the first P redundant packets in the order of redundant packets among the Q redundant packets may be selected.

In another possible implementation manner, P redundant packets may be randomly selected from among the Q redundant packets.

Exemplarily, based on the examples in S306 and S307, it is assumed that 3 packets (M ₁ , M ₇ , M ₈ ) are lost during the transmission of the M original packets, the R redundant packets are transmitted, and the code stream received by the decoding end device The first three redundant packets in the order of the Q redundant packets are M′ ₂ , M′ ₆ , and M′ ₉ , and the redundant packets M′ ₂ , M′ ₆ , and M′ ₉ can be selected for elimination.

Further, the elimination result may include the elimination result of each redundant packet in the P redundant packets. The elimination result of a redundant packet is the elimination result of the elements contained in the redundant packet.

The elimination result of an element is the part calculated from the P lost original packets (original packets to be restored) when the element is coded by subtracting the element. Since each element in the redundant packet carries the information of each original packet, the purpose of eliminating an element is to eliminate the information of the lost original packet carried by the element and retain the received X information of the original package, so as to achieve the purpose of recovering the lost original package with the received original package subsequently.

Among them, the P lost original packets are lost original packets to be recovered. The P lost original packets may be selected from the N lost original packets according to actual requirements, which is not limited in this embodiment of the present application.

The specific implementation of S308 is described below based on the examples in S306 and S307.

Exemplarily, based on the examples in S307 and S308, it is assumed that the redundant packets M' ₂ , M' ₆ , and M' ₉ are eliminated, according to the elements of M' ₂ , M' ₆ , and M' ₉ in S304 The description of the satisfied equation, the equation is transformed to perform cancellation, the part related to the lost original packet is eliminated, and the part related to the received original packet is retained as the cancellation result. The elimination process of redundant packets M' ₂ , M' ₆ , and M' ₉ is shown in the following equation.

For the redundant packet M' ₂ , which includes elements M' ₂₁ . . . M' _2L , it is assumed that the elimination result of the redundant packet M' ₂ includes M″ ₂₁ . . . M″ _2L . in:

The elimination result M″ _{21 of M′ 21} _is :

The elimination result M″ _{22 of M′ 22} _is :

...

The elimination result M″ _{2L of M′ 2L} _is :

For the elimination package M′ ₆ , which includes the elements M′ ₆₁ . . . M′ _6L , the elimination result of the elimination package M′ ₆ includes M″ ₆₁ _. in:

The elimination result M″ _{61 of M′ 61} _is :

The elimination result M″ _{62 of M′ 62} _is :

...

The elimination result of M′ _6L M″ _6L is:

For the elimination package _M'9 , which includes the elements _{M'91...M'9L, the elimination result of the elimination package M'9 includes M"91} _... _M _" _9L . in:

The elimination result of M′ ₉₁ M″ ₉₁ is:

The elimination result M″ _{92 of M′ 92} _is :

...

The elimination result of M′ _9L M″ _9L is:

The elimination results of the elimination packages M′ ₂ , M′ ₆ , and M′ ₉ can be described as:

S309, the decoding end device constructs a standard Cauchy matrix with R rows and M columns according to the packet receiving sequence and packet identifiers in the code stream.

The standard Cauchy matrix with R rows and M columns constructed in S309 is used to select the decoding matrix. It should be noted that the standard Cauchy matrix with R rows and M columns constructed in S309 is the same in form as the standard Cauchy matrix with R rows and M columns constructed by the coding end device in S303, and the content is constructed according to actual needs. limited.

In a possible implementation manner, the standard Cauchy matrix with R rows and M columns constructed in S309 may be a Galois Field Cauchy matrix with R rows and M columns.

Specifically, in S309, the decoding end device constructs a standard Cauchy matrix with R rows and M columns according to the packet receiving sequence and the packet identifiers in the code stream. The package identifier indxf of the original package, the package identifier indxg of the redundant package received at the gth in the received packet sequence of the code stream, and the standard Cauchy matrix element sets X and Y, determine the fth in the standard Cauchy matrix. row g column element

Determining each element in the standard Cauchy matrix in this way can obtain a standard Cauchy matrix with R rows and M columns.

Wherein, the set X and the set Y are the same as the set X and the set Y described in the foregoing S303, and are not repeated here. f is greater than or equal to 1 and less than or equal to R, and g is greater than or equal to 1 and less than or equal to M.

Exemplarily, it is assumed that the packet identifier of the third received original packet in the received packet sequence of the received code stream is 5, and the packet identifier of the fourth received redundant packet in the received packet sequence of the received code stream is 2, Determine the element in row 3 and column 4 of this standard Cauchy matrix

Suppose the standard Cauchy matrix element set Y is {0, 1, ..., M-2, M-1}, and X is {M, M+1, ..., M+R-2, M+R-1} , therefore, x ₅ =M+4, y ₂ =1,

S310. The decoding end device selects the elements corresponding to the columns corresponding to the P lost original packets and the overlapping positions of the rows corresponding to the P redundant packets in the standard Cauchy matrix with R rows and M columns, to obtain a P-order decoding matrix.

The P lost original packets described in S310 are lost original packets to be recovered. The P lost original packets may be selected from the N lost original packets according to actual requirements, which is not limited in this embodiment of the present application. The P redundant packets are redundant packets to be eliminated.

Exemplarily, on the basis of the examples of S306 to S308, it is assumed that the standard Cauchy matrix with R rows and M columns constructed in S309 is in the form of the matrix shown in S309, and in the standard Cauchy matrix with R rows and M columns, P Columns (columns 1, 7, and ₈ ) corresponding to the lost original packets (original packets to be restored, such as M ₁ , M ₇ , and M 8 ), and P redundant packets (redundancy to be eliminated) The elements corresponding to the overlapping positions of the rows (the 2nd row, the 6th row, and the 9th row) corresponding to the packets M' ₂ , M' ₆ , M' ₉ ) are obtained, and the third-order decoding matrix is obtained as follows:

S311. The decoding end device multiplies the original elimination result by left-multiplying the inverse matrix of the P-order decoding matrix to obtain P lost original packets.

Exemplarily, based on the examples of S306 to S310, the operation process of the lost original packets M ₁ , M ₇ , and M ₈ in the encoding process may be:

The operation process of the lost original packets M ₁ , M ₇ , and M ₈ in the encoding process is reversed, and the lost original packets M ₁ , M ₇ , and M ₈ can be expressed as the inverse matrix of the third-order decoding matrix and the elimination The result of the matrix multiplication of the result, the specific expression is as follows:

In this way, the 3 lost original packages are recovered.

In the process of restoring the original packet in S311, the original packet can only be restored by obtaining the inverse matrix of the P-order decoding matrix. For the realization of obtaining the inverse matrix of the P-order decoding matrix, the standard Cauchy matrix is selected as the encoding and decoding matrix, because the Keuchy matrix is selected as the encoding and decoding matrix. The west matrix must have an inverse matrix, and the embodiments of the present application provide the following possible implementation manners.

A possible implementation manner is to obtain the inverse matrix of the P-order decoding matrix according to the inversion method of the mathematical operation for the P-order decoding matrix, and this process is not repeated in this embodiment of the present application.

Exemplarily, for a matrix of order 2

Inverse, swap the positions of a and d, put the negative numbers in front of b and c, and divide by the determinant (ad-bc), there is the following formula (1):

Exemplarily, for the inversion of a P-order upper (lower) triangular matrix (shown in equation (2)), an elementary transformation of the matrix can be used to obtain the inverse matrix shown in equation (3).

The elementary transformation is:

In another possible implementation, for the inversion of non-upper (lower) triangular matrices, if the direct elementary transformation is performed, the amount of computation is very large, and the intermediate transformation steps need to be recorded. When the codec matrix is the Galois field In the case of standard Cauchy matrix, a simplified inversion method can be as follows: First, the P-order decoding matrix can be decomposed into LDU, and decomposed into upper and lower triangular matrices and a diagonal matrix, and after finding the inverse matrices of L, D, and U respectively , the inverse matrix product of L, D, and U is used as the inverse matrix of P-order decoding.

Exemplarily, the software and hardware codes of the LDU decomposition part can refer to Stanford University. Professor Thomas' "Pivoting and Backward Stability of Fast Algorithms for Solving Cauchy Linear Equations", the algorithm idea of LDU decomposition is to use the displacement structure of the matrix to specify the appropriate A displacement operator is used to speed up the Gaussian elimination process, which is not repeated in this embodiment of the present application. Of course, other algorithms may also be referred to for LDU decomposition, which is not limited in this embodiment of the present application.

In a possible implementation manner, the process of finding the inverse matrices of L, D, and U may refer to the inversion method of mathematical operations, which is not limited in the embodiment of the present application.

Further, the process of inverting the matrix of the above formula (2) to obtain the matrix of formula (3) is demonstrated. For the inversion of the upper (lower) triangular matrix of the P-order, it can be expressed as:

The lower left triangular matrix of order P

The columns are split into P matrices as follows:

Multiply the split P matrices from right to left, the process is as follows (4):

Continue to multiply to the left, the process is as follows (5):

Convert the result on the right side of equation (5)

and the content of the right half of equation (3)

In contrast, the two only differ in the sign of the addition and subtraction operations, which are completely equivalent in the Galois field. The addition and subtraction of the Galois field are both binary XOR operations. Therefore, in the Galois field, the above demonstration process can be used as the inversion method of the lower triangular matrix, and the inverse matrix of the upper triangular matrix can be calculated based on the same idea.

Exemplarily, based on the above idea, an embodiment of the present application provides a method for obtaining an inverse matrix of a lower triangular matrix from the Galois field, which may specifically include: determining the inverse element of each element in the lower triangular matrix; The inverse elements of each element are arranged according to the positions of the elements in the lower triangular matrix to form the inverse matrix of the lower triangular matrix.

Among them, the diagonal element in the lower triangular matrix and the inverse element of the first element below the diagonal element are itself; the elements other than the diagonal element and the first element below the diagonal element in the lower triangular matrix are The inverse element is obtained according to the following formula:

Wherein, L _o,s ^-1 is the inverse element of the element L _o,s in the o-th row and the s-th column in the lower triangular matrix; L _o,s ⁱ is the diagonal element of the column where L _o,s is located in the lower triangular matrix The inverse element of the i-th element below, L _o,s ^i′ is the inverse element of the i-th element on the right side of L _o,s in the lower triangular matrix; A is L _o,s in the column direction or row direction and the diagonal element The number of elements in the interval.

Exemplarily, the inversion process of the lower triangular matrix is expressed by code, the elements on the rows and columns of the corresponding matrix are parsed from right to left, and the matrix is denoted as L, and the rows and columns are denoted as i and j respectively, and the diagonal The element and the first element below it remain unchanged. From the second element below the diagonal element, the multiplication and accumulation are performed in turn, and the following expression is derived:

L[i][i]==1; (that is, the diagonal elements remain unchanged);

L[i+1][i]==L[i+1][i]; (the first element below the diagonal element remains unchanged);

L[j][i]==L[j-1][i]*L[j][i+1]+L[j][i];

j==R(>=3); when i==R-2, when j==R, L[j][i]==L[j-1][i]*L[j][i+ 1]+L[j][i];

When i==R-3, when j==R-1, L[j][i]==L[j-1][i]*L[j][i+1]+L[j][ i].

Exemplarily, the pseudocode expression of the lower triangular matrix inversion process can be:

For example, based on the above pseudo-code expression, when i=2, j=4, j++=5, k=3, k++=4, L[3][2]*L[4][3]==>L [3][2]*L[5][3]+L[4][2]*L[5][4].

For example, for a lower triangular matrix

The inverse matrix of the lower triangular matrix is a matrix formed by the inverse elements of the elements in the lower triangular matrix: the inverse element of the diagonal element 1 of the lower triangular matrix is itself, which remains unchanged, and the first element g below the diagonal element The inverse elements of , a, d, and f are also themselves and remain unchanged. The inverse elements of the elements in the lower triangular matrix except the diagonal element and the first element below the diagonal element are as follows:

The element h is the element L _3,1 of the o=3 row and the s=1 column, which is separated from the diagonal element by 1 element in the column direction or row direction, and the first element below the diagonal element of the column where L _3,1 is located. The inverse element of the element is g, and the inverse element of the first element a on the right side of L _3,1 is a, that is, the inverse element H=ga+h of the element h.

The element b is the element L _4,2 in the o=4th row and the s=2nd column, which is separated by 1 element from the diagonal element in the column direction or row direction, and the first element below the diagonal element of the column where L _4,2 is located The inverse element of the element is a, and the inverse element of the first element d on the right side of L _4,2 is d, that is, the inverse element of element b is S=ad+b.

The element e is the element L _5,3 in the o=5th row and the s=3rd column, which is separated from the diagonal element by 1 element in the column direction or row direction, and the first element below the diagonal element of the column where L _5,3 is located. The inverse element of the element is d, and the inverse element of the first element f on the right side of L _5,3 is f, that is, the inverse element K=df+e of the element e.

The element i is the element L _4,1 of the o-th row and the s=1 column, which is separated from the diagonal element by 2 elements in the column direction or row direction, and the first element below the diagonal element of the column where L _4,1 is located. The inverse element of the element is g, the inverse element of the first element b to the right of L _4,1 is S, the inverse element of the second element below the diagonal element of the column where L _4,1 is located is H, L _4, The inverse element of the second element d to the right of ₁ is d, that is, the inverse element Z=gS+Hd+i of element i.

The element c is the element L _5,2 in the o=5th row and the s=2 column, which is separated from the diagonal element by 2 elements in the column direction or row direction, and the first element below the diagonal element of the column where L _5,2 is located The inverse element of the element is a, the inverse element of the first element e on the right side of L _5,2 is K, the inverse element of the second element below the diagonal element of the column where L _5,2 is located is S, L _5, The inverse element of the second element f to the right of ₂ is f, that is, the inverse element of element c Y=aK+Sf+c.

Element j is the element L _5,1 in the o=5th row and the s=1st column, which is separated from the diagonal element by 3 elements in the column direction or row direction, and the first element below the diagonal element in the column where L _5,1 is located The inverse element of the element is g, the inverse element of the first element c to the right of L _5,1 is Y, the inverse element of the second element below the diagonal element of the column where L _5,1 is located is H, L _5, The inverse element of the second element e on the right side of ₁ is K, the inverse element of the third element below the diagonal element of the column where L _5,1 is located is Z, and the inverse element of the third element f on the right side of L _5,1 The inverse element is f, that is, the inverse element P=gY+HK++Zf+j of element j.

Therefore, the inverse of this lower triangular matrix is expressed as:

Exemplarily, based on the above idea, an embodiment of the present application provides a method for obtaining an inverse matrix of an upper triangular matrix from the Galois field, which may specifically include: determining the inverse element of each element in the upper triangular matrix; The inverse elements of each element are arranged according to the positions of the elements in the upper triangular matrix to form the inverse matrix of the upper triangular matrix.

Among them, the inverse element of the diagonal element in the upper triangular matrix and the first element above the diagonal element is itself; the inverse of other elements except the diagonal element and the first element above the diagonal element in the upper triangular matrix The elements are obtained according to the following formula:

Wherein, L _p,q ^-1 is the inverse element of the element L _p,q in the p-th row and the q-th column in the upper triangular matrix; L _p,q ⁱ is the diagonal element of the column where L _p,q is located in the upper triangular matrix The inverse element of the i-th element above, L _{p, q} ^i' is the inverse element of the i-th element on the left side of L _{p, q} in the upper triangular matrix; B is L _{p, q} in the column direction or row direction and the diagonal element The number of elements in the interval.

Exemplarily, the inversion process of the upper triangular matrix is expressed by code, and the elements on the rows and columns of the corresponding matrix are parsed from right to left once, and the matrix is denoted as L, and the rows and columns are denoted as i and j respectively, and the diagonal The element and the first element above it remain unchanged. From the second element above the diagonal element, the multiplication and accumulation are performed in turn. The pseudocode expression of the inversion process of the upper triangular matrix can be as follows:

For example, for an upper triangular matrix

The inverse matrix of the upper triangular matrix is a matrix formed by the inverse elements of the elements in the upper triangular matrix: the inverse element of the diagonal element 1 of the upper triangular matrix is itself, which remains unchanged, and the first element g above the diagonal element The inverse elements of , a, d, and f are also themselves and remain unchanged. The inverse elements of the elements in the upper triangular matrix except the diagonal elements and the first element above the diagonal elements are as follows:

The element h is the element L _3,5 in the p=3 row and the q=5 column, which is separated from the diagonal element by 1 element in the column direction or row direction, and the first element above the diagonal element in the column where L _3,5 is located. The inverse element of the element is g, and the inverse element of the first element a to the left of L _3,5 is a, that is, the inverse element H=ga+h of the element h.

The element b is the element L _2,4 of the p=2th row and the q=4th column, which is separated from the diagonal element by 1 element in the column direction or row direction, and the first element above the diagonal element of the column where L _2,4 is located. The inverse element of the element is a, and the inverse element of the first element d to the left of L _2,4 is d, that is, the inverse element of element b is S=ad+b.

The element e is the element L _1,3 in the p=1th row and the s=3rd column, which is separated from the diagonal element by 1 element in the column direction or row direction, and the first element above the diagonal element of the column where L _1,3 is located. The inverse element of the element is d, and the inverse element of the first element f to the left of L _1,3 is f, that is, the inverse element K=df+e of the element e.

The element i is the element L _2,5 of the p=2th row and the q=5th column, which is separated from the diagonal element by 2 elements in the column direction or row direction, and the first element above the diagonal element of the column where L _2,5 is located The inverse element of the element is g, the inverse element of the first element b to the left of L _2,5 is S, and the inverse element of the second element above the diagonal element of the column where L 2, ₅ is located is H, L _2, The inverse element of the second element d to the left of ₅ is d, that is, the inverse element Z=gS+Hd+i of element i.

The element c is the element L _1,4 of the p=1th row and the q=4th column, which is separated from the diagonal element by 2 elements in the column direction or row direction, and the first element above the diagonal element of the column where L _1,4 is located. The inverse element of the element is a, the inverse element of the first element e to the left of L _1,4 is K, and the inverse element of the second element above the diagonal element of the column where L _1,4 is located is S, L _1, The inverse element of the second element f to the left of ₄ is f, that is, the inverse element of element c Y=aK+Sf+c.

Element j is the element L _1,5 in the p=1th row and the q=5th column, which is separated from the diagonal element by 3 elements in the column direction or row direction, and the first element above the diagonal element in the column where L _1,5 is located The inverse element of the element is g, the inverse element of the first element c to the left of L _1,5 is Y, the inverse element of the second element above the diagonal element of the column where L _1,5 is located is H, L _1, The inverse element of the 2nd element e to the left of ₅ is K, the inverse element of the 3rd element above the diagonal element of the column where L _1,5 is located is Z, and the inverse element of the 3rd element f to the left of L _1,5 The inverse element is f, that is, the inverse element P=gY+HK++Zf+j of element j.

Therefore, the inverse of this upper triangular matrix is expressed as:

It should be noted that, through the process of inversion of the upper and lower triangular matrices above, it can be seen that the complexity of the inversion algorithm is mainly concentrated in the position of the P element derived above, that is, the last row of the first column of the lower triangular matrix of L (lower left corner) and U The first row and last column (upper right corner) of the upper triangular matrix, and the computational complexity of the remaining elements decreases in turn. In this way, there is an obvious optimization effect comparing the resource overhead and calculation delay of the continuous multiplication of the P-order matrix.

It should be noted that, the execution order of the steps included in the encoding and decoding method provided by the embodiments of the present application may be configured according to actual requirements.

Through the encoding and decoding steps provided by the embodiments of the present application, since the decoding matrix is a standard Cauchy matrix, the construction is simple and the burden of encoding and decoding is reduced. In addition, since the decoding matrix is a standard Cauchy matrix, the decoding end can directly determine the elements to construct the decoding matrix according to the receiving order of the data packets in the code stream and the packet identification. resource overhead and computational delay.

Based on the solution provided by the present application, the performance of the FEC hardware accelerator using the solution of the present application is tested in three dimensions through experiments. The three parameters M, R, and L carried in the encoding parameters represent the number of original packets, and the redundancy The number of packets, the length of the code, and the double data rate (DDR) delay of the code is 200 nanoseconds (nano second, ns), and there is a 3% bus delay of 1000ns. The performance data at a clock frequency of 500 MHz is based on a typical scenario of M=78, R=22, and L=800. Figures 4 to 6 are respectively the performance diagrams of fixing two of the parameters and changing the other parameter.

FEC fixes the original number of packets M, the packet length L, and changes the number of redundant packets R. The curve of performance data changing with the number of redundant packets R is shown in Figure 4.

FEC fixes the number of redundant packets R, the packet length L, changes the original number of packets M, and the curve of the performance data changing with the original number of packets M is shown in Figure 5.

FEC fixes the number of original packets M, the number of redundant packets R, and changes the packet length L. The curve of the performance data changing with the packet length L is shown in Figure 6.

The foregoing mainly introduces the solutions provided by the embodiments of the present application from the perspective of the working principles of the encoding device and the decoding device. It can be understood that, in order to realize the above functions, the above-mentioned encoding device and decoding device include corresponding hardware structures and/or software modules for executing each function. The unit in the encoding device for performing the functions in the above method embodiments is referred to as an encoding device, and the unit in the decoding device for performing the functions in the above method embodiments is referred to as a decoding device. Those skilled in the art should easily realize that the present application can be implemented in hardware or a combination of hardware and computer software with the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein. Whether a function is performed by hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of this application.

In this embodiment of the present application, functional modules may be divided for the apparatus for executing the encoding and decoding method provided by the present application according to the foregoing method examples. For example, each functional module may be divided according to each function, or two or more functions may be integrated in in a processing module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software function modules. It should be noted that, the division of modules in the embodiments of the present application is schematic, and is only a logical function division, and there may be other division manners in actual implementation.

In the case where each functional module is divided according to each function, FIG. 7 shows a possible schematic structural diagram of a decoding apparatus 70 deployed in the decoding device involved in the above embodiment and executing the decoding method provided by the present application. The decoding device 70 may be a functional module or a chip. As shown in FIG. 7 , the decoding apparatus 70 may include: an acquisition unit 701 , a determination unit 702 , a cancellation unit 703 , a construction unit 704 , a selection unit 705 , and a processing unit 706 . Wherein, the obtaining unit 701 is used for executing the process S306 in FIG. 3; the determining unit 702 is used for executing the process S307 in FIG. 3; the eliminating unit 703 is used for executing the process S308 in FIG. 3; the constructing unit 704 is used for executing the process S308 in FIG. 3 The selection unit 705 is used for executing the process S310 in FIG. 3 ; the processing unit 706 is used for executing the process S311 in FIG. 3 . Wherein, all relevant contents of the steps involved in the above method embodiments can be cited in the functional descriptions of the corresponding functional modules, which will not be repeated here.

In the case of using an integrated unit, FIG. 8 shows a possible schematic structural diagram of the decoding device involved in the above embodiment. As shown in FIG. 8 , the decoding device 80 may include: a processing module 801 and a communication module 802 . The processing module 801 is used to control and manage the actions of the decoding device 80, and the communication module 802 is used to communicate with other devices. For example, the processing module 801 is configured to execute any one of the processes S306 to S311 in FIG. 3 . The decoding device 80 may further include a storage module 803 for storing program codes and data of the decoding device 80 .

The processing module 801 may be the processor 201 in the physical structure of the communication apparatus 20 shown in FIG. 2 , and may be a processor or a controller. For example, it may be a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various exemplary logical blocks, modules and circuits described in connection with this disclosure. The processing module 801 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication module 802 may be the transceiver 203 in the physical structure of the communication apparatus 20 shown in FIG. 2 , and the communication module 802 may be a communication port, or may be a transceiver, a transceiver circuit, or a communication interface. Alternatively, the above-mentioned communication interface may implement communication with other devices through the above-mentioned components with a transceiving function. The above-mentioned components with transceiving functions may be implemented by antennas and/or radio frequency devices. The storage module 803 may be the memory 202 in the physical structure of the communication device 20 shown in FIG. 2 .

When the processing module 801 is a processor, the communication module 802 is a transceiver, and the storage module 803 is a memory, the decoding device 80 involved in FIG. 8 in the embodiment of the present application may be the communication device 20 shown in FIG. 2 .

As described above, the decoding apparatus 70 or the decoding device 80 provided by the embodiments of the present application may be used to implement the corresponding functions in the methods implemented by the above embodiments of the present application. For the convenience of description, only the parts related to the embodiments of the present application are shown. , if the specific technical details are not disclosed, please refer to the embodiments of the present application.

In the case where each functional module is divided according to each function, FIG. 9 shows a possible schematic structural diagram of the encoding apparatus 90 deployed in the encoding device involved in the above embodiment and executing the encoding method provided by the present application. The encoding device 90 may be a functional module or a chip. As shown in FIG. 9 , the encoding apparatus 90 may include: an obtaining unit 901 , a constructing unit 902 , an encoding unit 903 , and a sending unit 904 . Wherein, the obtaining unit 901 is used for executing the process S301 or S302 in FIG. 3; the constructing unit 902 is used for executing the process S303 in FIG. 3; the encoding unit 903 is used for executing the process S304 in FIG. Process S305 in 3. Wherein, all relevant contents of the steps involved in the above method embodiments can be cited in the functional descriptions of the corresponding functional modules, which will not be repeated here.

In the case of using an integrated unit, FIG. 10 shows a possible schematic structural diagram of the encoding device involved in the above embodiment. As shown in FIG. 10 , the encoding device 100 may include: a processing module 1001 and a communication module 1002 . The processing module 1001 is used to control and manage the actions of the encoding device 100, and the communication module 1002 is used to communicate with other devices. For example, the processing module 1001 is configured to execute any one of the processes S301 to S304 in FIG. 3 , and the processing module 1001 executes the process S305 in FIG. 3 through the communication module 1002 . The encoding device 100 may further include a storage module 1003 for storing program codes and data of the encoding device 100 .

The processing module 1001 may be the processor 201 in the physical structure of the communication apparatus 20 shown in FIG. 2 , and may be a processor or a controller. For example, it may be a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various exemplary logical blocks, modules and circuits described in connection with this disclosure. The processing module 1001 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication module 1002 may be the transceiver 203 in the physical structure of the communication apparatus 20 shown in FIG. 2 , and the communication module 1002 may be a communication port, or may be a transceiver, a transceiver circuit, or a communication interface. Alternatively, the above-mentioned communication interface may implement communication with other devices through the above-mentioned components with a transceiving function. The above-mentioned components with transceiving functions may be implemented by antennas and/or radio frequency devices. The storage module 1003 may be the memory 202 in the physical structure of the communication device 20 shown in FIG. 2 .

When the processing module 1001 is a processor, the communication module 1002 is a transceiver, and the storage module 1003 is a memory, the encoding device 100 involved in FIG. 10 in the embodiment of the present application may be the communication apparatus 20 shown in FIG. 2 .

As mentioned above, the encoding apparatus 90 or the encoding device 100 provided by the embodiments of the present application may be used to implement the corresponding functions in the methods implemented by the above embodiments of the present application. For the convenience of description, only the parts related to the embodiments of the present application are shown. , if the specific technical details are not disclosed, please refer to the embodiments of the present application.

As another form of this embodiment, a computer-readable storage medium is provided, on which instructions are stored, and when the instructions are executed, the encoding and decoding methods in the foregoing method embodiments are executed.

As another form of this embodiment, a computer program product containing instructions is provided, when the computer program product runs on a computer, the computer executes the encoding and decoding methods in the above method embodiments when executed.

An embodiment of the present application further provides a chip system, where the chip system includes a processor for implementing the technical method of the embodiment of the present invention. In a possible design, the chip system further includes a memory for storing necessary program instructions and/or data in the embodiments of the present invention. In one possible design, the system-on-a-chip also includes memory for the processor to invoke the application code stored in the memory. The chip system may be composed of one or more chips, and may also include chips and other discrete devices, which are not specifically limited in this embodiment of the present application.

The steps of the methods or algorithms described in conjunction with the disclosure of the present application may be implemented in a hardware manner, or may be implemented in a manner in which a processor executes software instructions. Software instructions can be composed of corresponding software modules, and software modules can be stored in RAM, flash memory, ROM, erasable programmable read-only memory (erasable programmable read-only memory, EPROM), electrically erasable programmable read-only memory (electrically EPROM, EEPROM), registers, hard disk, removable hard disk, compact disk read only (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, such that the processor can read information from, and write information to, the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium may reside in an ASIC. Alternatively, the ASIC may be located in the core network interface device. Of course, the processor and the storage medium may also exist in the core network interface device as discrete components. Alternatively, the memory may be coupled to the processor, eg, the memory may exist independently and be connected to the processor through a bus. The memory can also be integrated with the processor. The memory may be used to store application code for executing the technical solutions provided by the embodiments of the present application, and the execution is controlled by the processor. The processor is configured to execute the application program code stored in the memory, thereby implementing the technical solutions provided by the embodiments of the present application.

From the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and brevity of the description, only the division of the above functional modules is used as an example for illustration. In practical applications, the above functions can be allocated as required. It is completed by different functional modules, that is, the internal structure of the device is divided into different functional modules, so as to complete all or part of the functions described above.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the device embodiments described above are only illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be Incorporation may either be integrated into another device, or some features may be omitted, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place, or may be distributed to multiple different places . Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.

If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application can be embodied in the form of software products in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, which are stored in a storage medium , including several instructions to make a device (may be a single chip microcomputer, a chip, etc.) or a processor (processor) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a removable hard disk, a ROM, a RAM, a magnetic disk, or an optical disk and other mediums that can store program codes.

The above are only specific embodiments of the present application, but the protection scope of the present application is not limited to this, and any changes or substitutions within the technical scope disclosed in the present application should be covered within the protection scope of the present application. . Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

A decoding method, characterized in that the method comprises:

Obtaining a code stream, the code stream includes X original packets and Q redundant packets;

According to the number M of original packets, the number R of redundant packets and the packet length L during encoding of the code stream, analyze the code stream to obtain the X original packets and the Q redundant packets, and determine the missing packets. The number N of the original packets, the N is equal to the M minus the X; the Q is less than or equal to the R;

Eliminate the P redundant packets in the Q redundant packets to obtain a cancellation result; wherein, the P redundant packets are redundant packets that meet the conditions; the P is the N and the the smaller value in Q;

According to the packet receiving sequence and the packet identification in the code stream, construct a standard Cauchy matrix with R rows and M columns; wherein, the packet identification is used to indicate the packet sequence during encoding;

In the standard Cauchy matrix, the columns corresponding to the P lost original packets and the elements corresponding to the overlapping positions of the rows corresponding to the P redundant packets are selected to obtain a P-order decoding matrix;

Left-multiplying the cancellation result by the inverse matrix of the P-order decoding matrix to obtain the P lost original packets.
The method according to claim 1, wherein, constructing a standard Cauchy matrix with R rows and M columns according to the packet receiving order and packet identifiers in the code stream, comprising:

According to the packet identifier indxf of the f-th received original packet in the received packet sequence of the code stream, the packet identifier indxg of the g-th received redundant packet in the received packet sequence of the code stream, and the standard Cauchy matrix elements Set X and Y, determine the element in the fth row and the gth column of the standard Cauchy matrix

wherein, the X includes x i , the Y includes y j , the i is greater than or equal to 1 and less than or equal to the R, the j is greater than or equal to 1 and less than or equal to the M; the xi and y j are mutually independent elements; the f is greater than or equal to 1 and less than or equal to the R, and the g is greater than or equal to 1 and less than or equal to the M.
The method according to claim 1 or 2, wherein the standard Cauchy matrix is a Cauchy matrix of Galois Field.
The method according to claim 3, wherein the method further comprises:

LDU decomposition is performed on the P-order decoding matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix;

respectively acquiring the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the inverse matrix of the lower triangular matrix;

The product of the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix, and the inverse matrix of the lower triangular matrix is used as the inverse matrix of the P-order decoding matrix.
The method according to claim 4, wherein obtaining the inverse matrix of the lower triangular matrix comprises:

determine the inverse element of each element in the lower triangular matrix;

Arranging the inverse elements of each element in the lower triangular matrix according to the positions of the elements in the lower triangular matrix to form the inverse matrix of the lower triangular matrix;

Wherein, the diagonal element in the lower triangular matrix and the inverse element of the first element below the diagonal element is itself;

The inverse elements of other elements in the lower triangular matrix except the diagonal element and the first element below the diagonal element are obtained according to the following formula:

Wherein, the L o,s -1 is the inverse element of the element L o,s in the o-th row and the s-th column in the lower triangular matrix; the L o,s i is the L o in the lower triangular matrix , the inverse element of the i-th element below the diagonal element of the column where s is located, the L o,s i′ is the inverse element of the i-th element on the right side of the L o,s in the lower triangular matrix; the A is the number of elements of the L o,s spaced from the diagonal elements in the column direction or row direction.
The method according to claim 4 or 5, wherein obtaining the inverse matrix of the upper triangular matrix comprises:

determine the inverse element of each element in the upper triangular matrix;

Arranging the inverse elements of each element in the upper triangular matrix according to the position of the elements in the upper triangular matrix to form the inverse matrix of the upper triangular matrix;

Wherein, the diagonal element in the upper triangular matrix and the inverse element of the first element above the diagonal element is itself;

The inverse elements of other elements in the upper triangular matrix except the diagonal element and the first element above the diagonal element are obtained according to the following formula:

Wherein, the L p,q −1 is the inverse element of the element L p,q in the p-th row and the q-th column in the upper triangular matrix; the L p,q i is the L p in the upper triangular matrix , the inverse element of the i-th element above the diagonal element of the column where q is located, and the L p,q i' is the inverse element of the i-th element on the left side of the L p,q in the upper triangular matrix; the B is the number of elements of the L p,q spaced from the diagonal elements in the column direction or the row direction.
The method according to any one of claims 3-6, wherein the X and the Y do not have an intersection.
The method according to claim 3, wherein the Y is {0, 1, ..., M-2, M-1}, and the X is {M, M+1, ..., M+ R-2, M+R-1}.
An encoding method, characterized in that the method comprises:

Obtain the number of original packets M, the number of redundant packets R and the packet length L;

Get M original packages;

A standard Cauchy matrix with R rows and M columns is constructed as an encoding matrix, and the elements in the i-th row and the j-th column of the encoding matrix are
The x i and the y j are mutually independent elements, the x i belongs to the set X including R elements, the y j belongs to the set Y including M elements, the i is greater than or equal to 1, and is less than or equal to said R, said j is greater than or equal to 1, and less than or equal to said M;

The M original packets are left-multiplied by the encoding matrix to obtain R redundant packets;

Send the M original packets and the R redundant packets.
The method according to claim 9, wherein the encoding matrix is a 2 8 Galois Field Cauchy matrix, and the x i +y j is less than 2 8 .
The method according to claim 9 or 10, wherein the X and the Y do not have an intersection.
The method according to any one of claims 9-11, wherein the Y is {0, 1, ..., M-2, M-1}, and the X is {M, M+1, ..., M+R-2, M+R-1}.
A decoding device, characterized in that the device comprises:

an acquisition unit, configured to acquire a code stream, the code stream includes X original packets and Q redundant packets;

A determination unit, configured to analyze the code stream to obtain the X original packets and the Q redundant packets according to the number M of original packets, the number R of redundant packets and the packet length L during encoding of the code stream packets, determine the number N of lost original packets, the N is equal to the M minus the X; the Q is less than or equal to the R;

The elimination unit is used to eliminate the P redundant packets in the Q redundant packets to obtain the elimination result; wherein, the P redundant packets are redundant packets that meet the conditions; the P is the smaller of the N and the Q;

A construction unit is used to construct a standard Cauchy matrix of R rows and M columns according to the packet reception sequence and the packet identification in the code stream; wherein, the packet identification is used to indicate the packet sequence during encoding;

A selection unit is used to select, in the standard Cauchy matrix, the columns corresponding to the P lost original packets, and the elements corresponding to the overlapping positions of the rows corresponding to the P redundant packets, to obtain a P-order decoding matrix;

A processing unit, configured to left-multiply the cancellation result by the inverse matrix of the P-order decoding matrix to obtain the P lost original packets.
The decoding device according to claim 13, wherein the construction unit is specifically used for:

According to the packet identifier indxf of the f-th received original packet in the received packet sequence of the code stream, the packet identifier indxg of the g-th received redundant packet in the received packet sequence of the code stream, and the standard Cauchy matrix elements Set X and Y, determine the element in the fth row and the gth column of the standard Cauchy matrix

wherein, the X includes x i , the Y includes y j , the i is greater than or equal to 1 and less than or equal to the R, the j is greater than or equal to 1 and less than or equal to the M; the xi and y j are mutually independent elements; the f is greater than or equal to 1 and less than or equal to the R, and the g is greater than or equal to 1 and less than or equal to the M.
The decoding device according to claim 13 or 14, wherein the standard Cauchy matrix is a Galois field Cauchy matrix.
The decoding device according to claim 15, wherein the decoding device further comprises an inversion unit for:

LDU decomposition is performed on the P-order decoding matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix;

respectively acquiring the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the inverse matrix of the lower triangular matrix;

The product of the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix, and the inverse matrix of the lower triangular matrix is used as the inverse matrix of the P-order decoding matrix.
The decoding apparatus according to claim 16, wherein the inversion unit is specifically used for:

determine the inverse element of each element in the lower triangular matrix;

Arranging the inverse elements of each element in the lower triangular matrix according to the positions of the elements in the lower triangular matrix to form the inverse matrix of the lower triangular matrix;

Wherein, the diagonal element in the lower triangular matrix and the inverse element of the first element below the diagonal element is itself;

The inverse elements of other elements in the lower triangular matrix except the diagonal element and the first element below the diagonal element are obtained according to the following formula:

Wherein, the L o,s −1 is the inverse element of the element L o,s in the o-th row and the s-th column in the lower triangular matrix; L o,s i is the L o ,s in the lower triangular matrix The inverse element of the i-th element below the diagonal element of the column, the L o,s i' is the inverse element of the i-th element on the right side of the L o,s in the lower triangular matrix; the A is The L o,s is the number of elements spaced from diagonal elements in the column direction or row direction.
The decoding device according to claim 16 or 17, wherein the inversion unit is specifically used for:

determine the inverse element of each element in the upper triangular matrix;

Arranging the inverse elements of each element in the upper triangular matrix according to the position of the elements in the upper triangular matrix to form the inverse matrix of the upper triangular matrix;

Wherein, the diagonal element in the upper triangular matrix and the inverse element of the first element above the diagonal element is itself;

The inverse elements of other elements in the upper triangular matrix except the diagonal element and the first element above the diagonal element are obtained according to the following formula:

Wherein, the L p,q −1 is the inverse element of the element L p,q in the p-th row and the q-th column in the upper triangular matrix; the L p,q i is the L p in the upper triangular matrix , the inverse element of the i-th element above the diagonal element of the column where q is located, and the L p,q i' is the inverse element of the i-th element on the left side of the L p,q in the upper triangular matrix; the B is the number of elements of the L p,q spaced from the diagonal elements in the column direction or the row direction.
The decoding apparatus according to any one of claims 15-18, wherein the X and the Y do not have an intersection.
The decoding apparatus according to claim 15, wherein the Y is {0, 1, ..., M-2, M-1}, and the X is {M, M+1, ..., M +R-2, M+R-1}.
An encoding device, characterized in that the encoding device comprises:

The acquisition unit is used to acquire the number M of original packets, the number R of redundant packets and the packet length L;

The obtaining unit is also used to obtain M original packages;

The construction unit is used to construct a standard Cauchy matrix with R rows and M columns as an encoding matrix, and the elements of the i-th row and the j-th column in the encoding matrix are
The x i and the y j are mutually independent elements, the x i belongs to the set X including R elements, the y j belongs to the set Y including M elements, the i is greater than or equal to 1, and is less than or equal to said R, said j is greater than or equal to 1, and less than or equal to said M;

an encoding unit, used for left-multiplying the M original packets by the encoding matrix to obtain R redundant packets;

A sending unit, configured to send the M original packets and the R redundant packets.
The encoding device according to claim 21, wherein the encoding matrix is a 2 8 Galois Field Cauchy matrix, and the x i +y j is less than 2 8 .
The encoding device according to claim 21 or 22, wherein the X and the Y do not have an intersection.
The encoding device according to any one of claims 21-23, wherein the Y is {0, 1, ..., M-2, M-1}, and the X is {M, M+1 , ..., M+R-2, M+R-1}.
A decoding device, characterized in that the decoding device comprises: a processor and a transmission interface;

The transmission interface is used for receiving and sending data;

The processor is configured to invoke software instructions stored in the memory to cause the decoding apparatus to perform the decoding method of any one of claims 1 to 8.
An encoding device, characterized in that the encoding device comprises: a processor and a transmission interface;

The transmission interface is used for receiving and sending data;

The processor is configured to invoke software instructions stored in the memory to cause the encoding apparatus to perform the encoding method of any one of claims 9 to 12.
A computer-readable storage medium having instructions stored in the computer-readable storage medium, when the instructions are executed on a computer or a processor, the computer or the processor causes the computer or the processor to perform as in claims 1 to 12 Any one of the decoding method or encoding method.
A computer program product, characterized by comprising instructions that, when executed on a computer or processor, cause the computer or the processor to perform the decoding of any one of claims 1 to 12 method or encoding method.