WO2021134692A1

WO2021134692A1 - Transducer and manufacturing method therefor

Info

Publication number: WO2021134692A1
Application number: PCT/CN2019/130931
Authority: WO
Inventors: 吴健兴; 但强; 吴伟昌; 黎家健
Original assignee: 瑞声声学科技(深圳)有限公司
Priority date: 2019-12-31
Filing date: 2019-12-31
Publication date: 2021-07-08

Abstract

The present invention relates to the field of piezoelectric transducers, and provides a transducer. The transducer comprises a first wafer (100) and a second wafer (200); the first wafer (100) and the second wafer (200) each comprise a substrate (110, 210), a first oxide layer (105, 205) fixed to one side of the substrate (110, 210), a metal layer (114, 214) fixed to the other side of the substrate (110, 210), and a silicon nitride layer (104, 204), a first electrode (103, 203), a piezoelectric layer (102, 202), and a second electrode (101, 201) which are sequentially deposited on the first oxide layer (105, 205); the substrate (110, 210) comprises a first silicon layer (111, 211), a second silicon layer (113, 213), and a second oxide layer (112, 212) sandwiched between the first silicon layer (111, 211) and the second silicon layer (113, 213); the metal layer (114) of the first wafer (100) and the metal layer (214) of the second wafer (200) are fixedly connected; the first wafer (100) is provided with a cavity (122) and gaps (121, 123); and the second wafer (200) is provided with a cavity (222), a first gap (221), and a second gap (223). Moreover, the present invention further provides a manufacturing method for the transducer. Compared with the prior art, by designing the two wafers, SPL is increased by two times, and the structural stability is improved.

Description

Transducer and manufacturing method thereof

Technical field

The invention relates to the technical field of piezoelectric transducers, in particular to a transducer and a manufacturing method thereof.

Background technique

The traditional electric acoustic transducer relies on the repulsive force between the wire and the magnet to move the diaphragm, thereby generating vibration in the air to produce sound. Different from traditional electro-acoustic transducers, piezoelectric acoustic transducers use the piezoelectric characteristics of the diaphragm to generate vibrating motion to emit sound. Therefore, piezoelectric acoustic transducers can be very small and directly interact with other substances other than air. However, most of the current designs have limitations in the sound pressure level (SPL) and also have defects in structural stability.

Summary of the invention

technical problem

The invention provides a transducer, which aims at the limitations of the SPL and the defects of structural stability in the prior art, improves the performance of the SPL and improves the structural stability.

The solution to the problem

Technical solutions

A transducer, the transducer comprising a first wafer and a second wafer, the first wafer and the second wafer both comprising a substrate, and a first oxide layer fixed on one side of the substrate , A metal layer fixed on the other side of the substrate, and a silicon nitride layer, a first electrode, a piezoelectric layer, and a second electrode deposited on the first oxide layer, the substrate including the first A silicon layer, a second silicon layer, and a second oxide layer sandwiched between the first silicon layer and the second silicon layer, the first oxide layer is formed on the first silicon layer, and the metal Layer formed on the second silicon layer; the metal layer of the first wafer and the metal layer of the second wafer are fixedly connected; the first wafer is provided with cavities and gaps, and the second wafer The circle is provided with a cavity, a first gap, and a second gap. The cavity of the first wafer and the cavity of the second wafer together form the cavity of the transducer, and the gap of the first wafer Communicating with the first gap of the second wafer, and communicating with the second gap of the second wafer with the cavity of the second wafer.

Preferably, the gaps of the first wafer are symmetrically arranged along the center of the first wafer.

Preferably, the first gap and the second gap of the second wafer are both symmetrically arranged along the center of the second wafer.

Preferably, the second wafer has protrusions formed in its cavity.

Preferably, the piezoelectric layer is composed of any atomic percentage of lead zirconium titanate, aluminum nitride, and barium titanate.

At the same time, the present invention also provides a manufacturing method of a transducer, the manufacturing method of the transducer includes:

Step S10: fabricating the first wafer, which specifically includes:

Step S101: sequentially deposit and fix the first silicon layer, the second oxide layer and the second silicon layer to form the substrate; Step S102: sequentially deposit the first oxide layer from the surface of the first silicon layer away from the second oxide layer Layer and silicon nitride layer to obtain the etched surface of the first wafer;

Step S103: coating a layer of photoresist on the etched surface;

Performing development processing on the photoresist, and retain the photoresist having the same size as the predetermined area of the silicon nitride layer;

Sequentially etching the silicon nitride layer and the first oxide layer according to the area reserved by the photoresist;

Removing the photoresist;

Step S104: deposit a second electrode on the surface of the silicon nitride layer to form a new etching surface;

Step S105: apply a layer of photoresist on the new etching surface; perform development processing on the photoresist, and retain the photoresist with the same size as the preset area of the second electrode; according to the photoresist Etching the second electrode on the reserved area; removing the photoresist;

Step S106: sequentially depositing the piezoelectric layer and the first electrode on the surface of the second electrode to form a new etching surface; coating a layer of photoresist on the new etching surface; Developing process, retaining the photoresist with the same size as the predetermined area of the first electrode; etching the first electrode and the piezoelectric layer according to the reserved area of the photoresist; removing the photoresist;

Step S107: Coat a layer of photoresist on the etched surface, develop the photoresist according to the preset first gap, and then treat the first silicon according to the result of the development of the photoresist. The layer is etched to the position of the first oxide layer to obtain the first gap; then the photoresist is removed;

Step S108: deposit a metal layer on the surface of the second silicon layer away from the first oxide layer;

Step S109: coating a layer of photoresist on the surface of the metal layer, developing the photoresist according to the preset metal layer, and then etching the metal layer according to the result of the development of the photoresist;

Step S110: etching the second silicon layer to form a cavity and a second gap;

Step S111: removing the photoresist to obtain a first wafer;

Step S20: Making a second wafer, which specifically includes:

Step S201: sequentially deposit and fix the first silicon layer, the second oxide layer and the second silicon layer to form the substrate;

Step S202: sequentially deposit a first oxide layer and a silicon nitride layer from the surface of the first silicon layer away from the second oxide layer to obtain an etched surface of the second wafer;

Step S203: coating a layer of photoresist on the etched surface;

Removing the photoresist;

Step S204: depositing a second electrode on the surface of the silicon nitride layer to form a new etching surface;

Step S205: Coat a layer of photoresist on the newly etched surface; perform development processing on the photoresist, and retain the photoresist with the same size as the preset area of the second electrode; according to the photoresist Etching the second electrode on the reserved area; removing the photoresist;

Step S206: sequentially depositing the piezoelectric layer and the first electrode on the surface of the second electrode to form a new etching surface; coating a layer of photoresist on the new etching surface; Developing process, retaining the photoresist with the same size as the predetermined area of the first electrode; etching the first electrode and the piezoelectric layer according to the reserved area of the photoresist; removing the photoresist;

Step S207: Coat a layer of photoresist on the etched surface, perform development processing on the photoresist according to the preset first gap and second gap, and then perform the development process on the photoresist according to the result of the development process of the photoresist. Etching the first silicon layer to the position of the first oxide layer to obtain the first gap and the second gap; then removing the photoresist;

Step S208: deposit a metal layer on the surface of the second silicon layer away from the first oxide layer;

Step S209: coating a layer of photoresist on the surface of the metal layer, developing the photoresist according to the preset metal layer, and then etching the metal layer according to the result of the development of the photoresist, Then remove the photoresist;

Step S210: Coat a layer of photoresist on the surface of the second silicon layer and the metal layer, develop the photoresist according to the preset positions of the third gaps, cavities, and protrusions, and then perform development processing on the photoresist according to the Etch the second silicon layer to the position of the protrusion as a result of the development process of the photoresist, and then remove the photoresist;

Step S211: Re-apply a layer of photoresist on the surface of the second silicon layer and the metal layer, develop the photoresist according to the preset positions of the third gap, cavity and protrusion, and then perform development processing on the photoresist according to the As a result of the development process of the photoresist, the second silicon layer is etched to the position of the second oxide layer to obtain third gaps, cavities and protrusions;

Step S212: removing the photoresist to obtain a first wafer;

Step S30: combining the first wafer and the second wafer to obtain a transducer, which specifically includes:

Step S310: fixedly connect the metal layer of the first wafer and the metal layer of the second wafer;

Step S320: Perform gaseous hydrofluoric acid etching of the oxide layer on the first oxide layer to obtain the transducer.

The beneficial effects of the invention

Beneficial effect

Compared with the prior art, the present invention provides a transducer that doubles the SPL through a two-wafer design, and at the same time increases the stability of the structure.

Brief description of the drawings

Description of the drawings

In order to explain the technical solutions in the embodiments of the present invention more clearly, the following will briefly introduce the drawings needed in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative work, other drawings can be obtained based on these drawings, among which:

FIG. 1 is a schematic diagram of a cross-sectional structure of a first wafer provided by Embodiment 1 of the present invention;

2 is a schematic diagram of a cross-sectional structure of a second wafer provided by Embodiment 1 of the present invention;

3 is a schematic cross-sectional structure diagram of the first wafer and the second wafer combined according to the first embodiment of the present invention;

4 (1-21) is a schematic diagram of step S10 in the manufacturing method of the transducer provided in the first embodiment of the present invention;

Figure 5 (12-26) is a schematic diagram of step S20 in the manufacturing method of the transducer provided by the first embodiment of the present invention;

6 is a schematic diagram of step S30 in the manufacturing method of the transducer provided in the first embodiment of the present invention;

FIG. 7 is a schematic diagram of a three-dimensional cross-sectional structure of a transducer provided by Embodiment 1 of the present invention.

Invention embodiment

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

Please refer to FIG. 1 and FIG. 2 together. The present invention provides a transducer. The transducer includes a first wafer 100 and a second wafer 200. FIG. 1 shows a schematic cross-sectional structure of the first wafer 100. 2 shows a schematic cross-sectional structure of a second wafer 200. The first wafer 100 includes a substrate 110, a first oxide layer 105 fixed on one side of the substrate 110, and a metal fixed on the other side of the substrate. Layer 114, and a silicon nitride layer 104, a first electrode 103, a piezoelectric layer 102, and a second electrode 101 that are sequentially deposited and formed on the first oxide layer 105; the substrate 110 includes a first silicon layer 111, The second silicon layer 113, the second oxide layer 112 sandwiched between the first silicon layer 111 and the second silicon layer 113, the substrate 110 is provided with a cavity 122, a first gap 121, and a second gap 123, the first gap 121 and the second gap 123 are symmetrically disposed along the center of the first wafer 100; the first gap 121 and the second gap 123 are correspondingly disposed on the upper and lower sides of the second oxide layer 112. side. The piezoelectric layer 102 is composed of any atomic percentage of lead zirconium titanate, aluminum nitride, and barium titanate.

The second wafer 200 includes a substrate 210, a first oxide layer 205 fixed on one side of the substrate 210, a metal layer fixed on the other side of the substrate, and sequentially on the first oxide layer 205 A silicon nitride layer 204, a first electrode 203, a piezoelectric layer 202, and a second electrode 201 are formed by deposition; the substrate 210 includes a first silicon layer 211, a second silicon layer 213, and is sandwiched between the first silicon layer 211 and the second oxide layer 212 between the second silicon layer 213, the substrate 210 is provided with a cavity 222, a first gap 221, a second gap 223, and a third gap 225. The two slits 223 and the third slit 225 are arranged symmetrically along the center of the first wafer 200; the first slit 221 and the second slit 223 are provided above the second oxide layer 212, and the third slit 225 Are located below the second oxide layer 212, the first gap 221 and the third gap 225 are correspondingly provided on the upper and lower sides of the second oxide layer 212, and convexities are formed in the cavity 222. From 215. The piezoelectric layer 202 is composed of any atomic percentage of lead zirconium titanate, aluminum nitride, and barium titanate.

3, the metal layer 113 of the first wafer 100 and the metal layer 213 of the second wafer 200 are fixedly connected, and the cavity 122 of the first wafer 100 and the cavity 222 of the second wafer 200 are combined into The cavity 12 of the transducer is unified. The gaseous hydrofluoric acid etching oxide layer of the first oxide layer 112 of the first wafer 100 and the gaseous hydrofluoric acid etching oxide layer of the first oxide layer 212 of the second wafer 200 are used. The first gap 121 of the first wafer communicates with the second gap 123, the first gap 221 of the second wafer communicates with the third gap 225, and the second gap 223 of the second wafer 200 communicates with the The cavity 222 is in communication. The present invention also provides a manufacturing method of a transducer. The manufacturing method of the transducer includes:

Please refer to Fig. 4, step S10: fabricating the first wafer, which specifically includes:

Step S101: Depositing and fixing the first silicon layer 111, the second oxide layer 112 and the second silicon layer 113 sequentially to form the substrate; as shown in FIG. 4(1), the first silicon layer 111 and the second silicon layer 113 is silicon on an insulating substrate (Silicon-On-Insulator, SOI), and the second oxide layer 112 is sandwiched between the first silicon layer 111 and the second silicon layer 113.

Please refer to FIG. 4(2), step S102: sequentially deposit a first oxide layer 105 and a silicon nitride layer 104 from the surface of the first silicon layer 111 away from the second oxide layer 112 to obtain an etching of the first wafer Surface treatment

Step S103: coating a layer of photoresist 1001 on the etched surface;

Please refer to FIG. 4(3), FIG. 4(4), and FIG. 4(5) together to perform development processing on the photoresist 1001 to retain the predetermined area size of the silicon nitride layer 104;

The silicon nitride layer 104 and the first oxide layer 105 are sequentially etched according to the area reserved by the photoresist 1001;

Remove the photoresist 1001;

Please refer to FIG. 4(6), FIG. 4(7), and FIG. 4(8) together, step S104: deposit a second electrode 103 on the surface of the silicon nitride layer 104;

Step S105: Coat a layer of photoresist 1002 on the etched surface, perform development processing on the photoresist 1002, and reserve the photoresist 1002 with the same size as the preset second electrode 103, according to the photolithography The area reserved by the glue is etched on the second electrode 103, the second electrode 103 is obtained by etching, and then the photoresist 1002 is removed.

Please refer to Fig. 4(9), Fig. 4(10), Fig. 4(11) and Fig. 4(2) together, Step S106: Depositing the piezoelectric layer 102 and the first electrode 101 on the surface of the second electrode 103 in sequence , Coating a layer of photoresist 1003 on the etched surface, and developing the photoresist 1003, leaving the photoresist 1003 with the same area size as the preset piezoelectric layer 102 and the first electrode 101, The first electrode 101 and the piezoelectric layer 102 are etched according to the area reserved by the photoresist, and the piezoelectric layer 102 and the first electrode 101 are obtained by etching, and then the photoresist 1003 is removed.

Please refer to Figure 4 (13), Figure 4 (14), Figure 4 (15) and Figure 4 (16), step S107: coating a layer of photoresist 1004 on the etching treatment surface, according to the preset first A gap 121 is used to develop the photoresist 1004, and then the first silicon layer 111 is etched to the position of the first oxide layer 112 according to the result of the development of the photoresist 1004 to obtain the first gap 121; Then remove the photoresist 1004;

Please refer to FIGS. 4(17), 4(18) and 4(19) together, step S108: deposit a metal layer 114 on the surface of the second silicon layer 113 away from the first oxide layer 112;

Step S109: Coat a layer of photoresist 1005 on the surface of the metal layer 114, perform development processing on the photoresist 1005 according to the preset area size of the metal layer 114, and then perform development processing on the photoresist 1005 As a result, the metal layer 114 is etched to obtain the metal layer 114 of the first wafer.

Please refer to FIGS. 4(20) and 4(21) together. In step S110, the second silicon layer 113 is etched according to the size of the metal layer 114 of the first wafer to obtain a second gap 123 and a void. Cavities 122.

In step S111, the photoresist 1005 is removed, and the first wafer 100 is obtained.

Please refer to FIG. 5, step S20: fabricating a second wafer. Steps S201 to S206 of step S20 are the same as the above steps S101 to S106, and will not be repeated here. The other steps of step S20 include:

Please refer to Figure 5 (12), Figure 5 (13), Figure 5 (14) and Figure 5 (15), the step S207: coating a layer of photoresist 2004 on the etching surface, according to the preset The first gap 221 and the second gap 223 are developed for the photoresist 2004, and then the first silicon layer 211 is etched to the position of the first oxide layer 212 according to the result of the development of the photoresist 2004 , The first gap 221 and the second gap 223 are obtained; then the photoresist 2004 is removed.

Please refer to FIG. 5 (16), FIG. 5 (17), FIG. 5 (18) and FIG. 5 (19), the step S208: the second silicon layer 214 is far away from the first oxide layer 212 A metal layer 214 is deposited on the surface.

Step S209: Coat a layer of photoresist 2005 on the surface of the metal layer 214, perform development processing on the photoresist 2005 according to the preset size of the metal layer 214, and then perform development processing on the photoresist 2005 As a result, the metal layer 214 is etched to obtain the metal layer 214, and then the photoresist 2005 is removed.

Please refer to Figure 5 (20), Figure 5 (21) and Figure 5 (22), the step S210: coating a layer of photoresist 2006 on the surface of the second silicon layer 213 and the metal layer 214, according to The predetermined positions of the third gap 225, the cavity 222, and the protrusion 215 are developed for the photoresist 2006, and then the second silicon layer 213 is etched to the surface according to the result of the development of the photoresist 2006 Removing the photoresist at the position of the protrusion 215;

Please refer to Figure 5 (23), Figure 5 (24) and Figure 5 (25), the step S211: re-coating a layer of photoresist 2007 on the surface of the second silicon layer 213 and the metal layer 214, according to the pre- The photoresist 2007 is developed at the positions of the third gaps 225, cavities 222, and protrusions 215, and then the second silicon layer 213 is etched to the entire surface according to the result of the development of the photoresist 2007. According to the position of the second oxide layer 212, the third gap 225, the cavity 222 and the protrusion 215 are obtained;

Referring to FIG. 5(26), the photoresist 2007 is removed, and the second wafer 200 is obtained.

The above steps S10 and S20 are not performed sequentially. Step S10 can be performed first, and then step S20; or step S20 can be performed first, and then step S10; or step S10 and step S20 can be performed at the same time. The execution sequence of S20 is not limited in the present invention.

Please refer to FIG. 6 and FIG. 3 in combination, the step S30 includes:

Step S310: the metal layer 114 of the first wafer 100 and the metal layer 214 of the second wafer 200 are fixedly connected; the cavity 122 of the first wafer 100 and the cavity 222 of the second wafer 200 are merged Into a unified cavity 12 of the transducer.

Step S320: Perform gaseous hydrofluoric acid etching of the oxide layer on the second oxide layer 112 of the first wafer 100 corresponding to the positions of the first slit 121, the second slit 123, and the cavity 122, so that The first gap 121 and the second gap 123 are connected, and the exposed part of the second oxide layer 112 is etched away; the second oxide layer 212 of the second wafer 200 corresponds to the first gap 221 , The positions of the second gap 223, the third gap 225 and the cavity 222 perform gaseous hydrofluoric acid etching of the oxide layer, so that the first gap 221 and the third gap 225 are connected, and the second gap 223 and the cavity 222 are connected, The exposed part of the second oxide layer 212 is etched away.

Please refer to FIG. 7, which is a schematic diagram of the finally obtained three-dimensional cross-sectional structure of the transducer.

By using two wafers of the first wafer 100 and the second wafer 200 to form the two vibration units of the transducer, the two vibration units can be strategically positioned on the first wafer 100 and the second wafer. Circle 200, a cavity 12 is formed between the first wafer 100 and the second wafer 200, and at the same time, the gap reserved by the base of the first wafer 100 and the second wafer 200 is used, so that the two vibration units can be used The gap and the cavity generate vibrating motion to produce sound.

In this structure, without using a polymer diaphragm, the SPL is increased by two times, and the SPL is increased by about 6dB. At the same time, the second wafer can amplify the amplitude of the first wafer. At the same time, the first wafer and the second wafer are fixedly connected through their respective metal layers, which increases the stability of the structure.

Therefore, compared with the prior art, the present invention provides a transducer that doubles the SPL through a two-wafer design, and at the same time increases the stability of the structure.

The above are only the embodiments of the present invention. It should be pointed out here that for those of ordinary skill in the art, improvements can be made without departing from the inventive concept of the present invention, but these all belong to the present invention. The scope of protection.

Claims

A transducer, characterized in that the transducer includes a first wafer and a second wafer, both of the first wafer and the second wafer include a substrate, and a second wafer fixed on one side of the substrate An oxide layer, a metal layer fixed on the other side of the substrate, and a silicon nitride layer, a first electrode, a piezoelectric layer, and a second electrode formed by sequentially depositing on the first oxide layer, the The substrate includes a first silicon layer, a second silicon layer, and a second oxide layer sandwiched between the first silicon layer and the second silicon layer, and the first oxide layer is formed on the first silicon layer , The metal layer is formed on the second silicon layer; the metal layer of the first wafer and the metal layer of the second wafer are fixedly connected; the first wafer is provided with a cavity and a gap, so The second wafer is provided with a cavity, a first gap and a second gap, the cavity of the first wafer and the cavity of the second wafer are enclosed to form a cavity of the transducer, and the first The gap of the wafer communicates with the first gap of the second wafer, and the second gap of the second wafer communicates with the cavity of the second wafer.
The transducer according to claim 1, wherein the gaps of the first wafer are symmetrically arranged along the center of the first wafer.
The transducer according to claim 1, wherein the first gap and the second gap of the second wafer are both symmetrically arranged along the center of the second wafer.
The transducer according to claim 1, wherein the second wafer has protrusions formed in its cavity.
The transducer of claim 1, wherein the piezoelectric layer is composed of any atomic percentage of lead zirconium titanate, aluminum nitride, and barium titanate.
A manufacturing method of a transducer, characterized in that the manufacturing method of the transducer includes:

Step S10: fabricating the first wafer, which specifically includes:

Step S101: sequentially depositing and fixing the first silicon layer, the second oxide layer and the second silicon layer to form the substrate;

Step S102: sequentially deposit a first oxide layer and a silicon nitride layer from the surface of the first silicon layer away from the second oxide layer to obtain an etched surface of the first wafer; Step S103: on the etched surface Apply a layer of photoresist;

Performing development processing on the photoresist, and retain the photoresist having the same size as the predetermined area of the silicon nitride layer;

Sequentially etching the silicon nitride layer and the first oxide layer according to the area reserved by the photoresist; removing the photoresist;

Step S104: deposit a second electrode on the surface of the silicon nitride layer to form a new etching surface;

Step S105: apply a layer of photoresist on the new etching surface; perform development processing on the photoresist, and retain the photoresist with the same size as the preset area of the second electrode; according to the photoresist Etching the second electrode on the reserved area; removing the photoresist;

Step S106: sequentially depositing the piezoelectric layer and the first electrode on the surface of the second electrode to form a new etching surface; coating a layer of photoresist on the new etching surface; Developing process, retaining the photoresist with the same size as the predetermined area of the first electrode; etching the first electrode and the piezoelectric layer according to the reserved area of the photoresist; removing the photoresist;

Step S107: Coat a layer of photoresist on the etched surface, develop the photoresist according to the preset first gap, and then treat the first silicon according to the result of the development of the photoresist. The layer is etched to the position of the first oxide layer to obtain the first gap; then the photoresist is removed;

Step S108: deposit a metal layer on the surface of the second silicon layer away from the first oxide layer;

Step S109: coating a layer of photoresist on the surface of the metal layer, developing the photoresist according to the preset metal layer, and then etching the metal layer according to the result of the development of the photoresist;

Step S110: etching the second silicon layer to form a cavity and a second gap;

Step S111: removing the photoresist to obtain a first wafer;

Step S20: fabricating a second wafer, which specifically includes:

Step S201: sequentially deposit and fix the first silicon layer, the second oxide layer and the second silicon layer to form the substrate;

Step S202: sequentially deposit a first oxide layer and a silicon nitride layer from the surface of the first silicon layer away from the second oxide layer to obtain an etched surface of the second wafer;

Step S203: coating a layer of photoresist on the etched surface;

Performing development processing on the photoresist, and retain the photoresist having the same size as the predetermined area of the silicon nitride layer;

Sequentially etching the silicon nitride layer and the first oxide layer according to the area reserved by the photoresist; removing the photoresist;

Step S204: depositing a second electrode on the surface of the silicon nitride layer to form a new etching surface;

Step S205: Coat a layer of photoresist on the newly etched surface; perform development processing on the photoresist, and retain the photoresist with the same size as the preset area of the second electrode; according to the photoresist Etching the second electrode on the reserved area; removing the photoresist;

Step S206: sequentially depositing the piezoelectric layer and the first electrode on the surface of the second electrode to form a new etching surface; coating a layer of photoresist on the new etching surface; Developing process, retaining the photoresist with the same size as the preset area of the first electrode; etching the first electrode and the piezoelectric layer according to the reserved area of the photoresist; removing the photoresist;

Step S207: Coat a layer of photoresist on the etched surface, perform development processing on the photoresist according to the preset first and second gaps, and then perform the development processing on the photoresist according to the result of the development of the photoresist Etching the first silicon layer to the position of the first oxide layer to obtain the first gap and the second gap; then removing the photoresist;

Step S208: deposit a metal layer on the surface of the second silicon layer away from the first oxide layer;

Step S209: coating a layer of photoresist on the surface of the metal layer, developing the photoresist according to the preset metal layer, and then etching the metal layer according to the result of the development of the photoresist, Then remove the photoresist;

Step S210: Coat a layer of photoresist on the surface of the second silicon layer and the metal layer, develop the photoresist according to the preset positions of the third gaps, cavities and protrusions, and then perform the development process according to the Etch the second silicon layer to the position of the protrusion as a result of the development process of the photoresist, and then remove the photoresist;

Step S211: Re-apply a layer of photoresist on the surface of the second silicon layer and the metal layer, develop the photoresist according to the preset positions of the third gap, cavity and protrusion, and then perform development processing on the photoresist according to the As a result of the development process of the photoresist, the second silicon layer is etched to the position of the second oxide layer to obtain third gaps, cavities and protrusions;

Step S212: removing the photoresist to obtain a first wafer;

Step S30: combining the first wafer and the second wafer to obtain a transducer, which specifically includes:

Step S310: fixedly connect the metal layer of the first wafer and the metal layer of the second wafer;

Step S320: Perform gaseous hydrofluoric acid etching of the oxide layer on the first oxide layer to obtain the transducer.