WO2021053235A1 - Method for controllable growth of elongated nanostructures - Google Patents

Method for controllable growth of elongated nanostructures Download PDF

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Publication number
WO2021053235A1
WO2021053235A1 PCT/EP2020/076318 EP2020076318W WO2021053235A1 WO 2021053235 A1 WO2021053235 A1 WO 2021053235A1 EP 2020076318 W EP2020076318 W EP 2020076318W WO 2021053235 A1 WO2021053235 A1 WO 2021053235A1
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growth
face
substrate
nanostructure
elongated
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PCT/EP2020/076318
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French (fr)
Inventor
Thomas Sand JESPERSEN
Jesper NYGÅRD
Damon CARRAD
Martin BJERGFELT
Lukas STAMPFER
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University Of Copenhagen
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    • C30B11/08Single-crystal growth by normal freezing or freezing under temperature gradient, e.g. Bridgman-Stockbarger method adding crystallising materials or reactants forming it in situ to the melt every component of the crystal composition being added during the crystallisation
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    • BPERFORMING OPERATIONS; TRANSPORTING
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Definitions

  • the present disclosure relates to a method for defining epitaxial growth sites for growth of elongated nanostructures and a method for manufacturing elongated nanostructures based thereon.
  • the present disclosure further relates to nanoscale devices, in particular devices based on forming an electrical connection to an elongated nanostructure.
  • the presently disclosed methods can be utilized for manufacturing of elongated nanostructures as a part of a conventional routine for device processing.
  • Nanowires is an example of elongated nanostructures and constitute a promising class of materials for the formation of active elements in electronic and optical devices in general and specifically for future conventional and quantum computation architecturesp.
  • Nanowires usually have diameters between 5-250 nm, can be many micrometers long, and may be grown from any known semiconductor (group V elements e.g. SI and Ge, lll-V elements e.g. InAs, GaAs, InSb, InAsSb, ll-VI compounds etc.).
  • group V elements e.g. SI and Ge, lll-V elements e.g. InAs, GaAs, InSb, InAsSb, ll-VI compounds etc.
  • VLS vapour-liquid-solid
  • the wires grow in a preferred crystal direction (usually the [111] or [0001] direction for Zinc Blende or Wurtzite crystal structures), defining an angle to the growth substrate depending of the crystal surface of the substrate.
  • elongated nanostructures are grown from (111) substrates where they grow as a "forest" of vertical crystal fibers. Due to the vertical growth orientation, wherein the nanowires do not contact the substrate surface along its length, a higher degree of strain relaxation can be achieved, and thus, the wires can be grown as perfect one-dimensional crystal wires with atomically abrupt and perfect surfaces.
  • Pending applications WO 2019/180267 and WO 2020/008076 by the same inventors provide opportunities for growing semiconductor/superconductor hybrids with arbitrary superconductors, by the employment of a shadow technique, e.g. by shadow masks manufactured by means of conventional lithographic processing.
  • the method disclosed in WO 2016/64787 also by the same inventors, relates to changing the growth direction of vertical nanowires by kinking the growth direction, wherein the gold catalyst particle is displaced onto a random facet of the vertical nanowire for further growth of a horizontal nanowire, i.e. a planar nanowire.
  • the disclosures of these patent applications may be combined with the concepts of the present disclosure.
  • the content of WO 2019/180267, WO 2020/008076 and WO 2016/64787 are hereby incorporated by reference in their entirety.
  • WO 2019/180267 relates to in-situ growth of nanostructures and deposition of material on the nanostructures utilizing shadow structures.
  • the shadow structures are (vertically) raised from the growth plane of the nanostructure such that the shadow structure can create a shadow mask on the nanostructure.
  • the nanostructures are grown on / from a specially designed growth substrate with shadow structures located on said growth substrate.
  • the shadow structure can be arranged to form a shadow mask on the nanostructure.
  • the shadow structure can form a shadow mask on the nanostructure, such that material from the deposition source is not deposited on one or more selected surface areas on the nanostructure defined by the resulting shadow mask from the shadow structure.
  • the present disclosure is closely related to WO 2019/180267 because the present invention also relates to in-situ growth of nanostructures and utilization of shadow structures.
  • the shadow structure is used in cooperation with deposition of catalyst particles such that the location of epitaxial growth sites can be controlled and precisely defined, even in situations where the growth surface defines an angle with the substrate.
  • the shadow structure can in this case be used to define epitaxial growth sites on a growth surface which is perpendicular to the substrate surface such that epitaxial nanostructures subsequently can be grown parallel to but (slightly) raised from the substrate surface.
  • planar processing methods can be utilized for VLS growth.
  • a substantially planar substrate can be provided, the planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle, typically of at least 60°, more preferably at least 70°, even more preferably at least 80°, but typically around 90°, to the planar substrate.
  • the angle is typically defined by the crystal orientation of the substrate surface and the crystal orientation of the surface of the first face.
  • the growth angle of subsequent nanostructure growth is also determined by the crystal orientation of the growth surface.
  • a first shadow structure and/or mask can be provided and be configured such that a shadow pattern can be created on the first face.
  • the shadow structure / shadow mask is typically vertically raised from the surface of the planar substrate such that the shadow structure / mask can create a shadow pattern on the first face during deposition. I.e. the first face is typically exposed and/or uncovered, i.e. not covered by a resist layer.
  • the shadow mask is preferably configured such that allows passage of catalyst particles through the blocking layer, e.g. permeating through the blocking layer or passaging through the blocking layer, e.g. through one or more openings in the blocking layer allowing passage of catalyst particles, such as one or more apertures. After passage through the apertures of the blocking layer of the shadow mask the catalyst particles still have to “travel” a distance from the blocking layer to the first face (cf. fig. 1e), which is also in contrast to traditional lithography.
  • the shadow mask can for example comprise at least one blocking layer accommodating at least one aperture, the aperture(s) allowing passage of catalyst particles through the blocking layer.
  • the shadow structure / mask With appropriate control of the size and the configuration of the shadow structure / mask, the blocking layer and/or the apertures, the location of the shadow structure / mask in relation to the planar substrate and the first face, (at least a part of) the shadow structure / mask can be arranged to form a shadow pattern on the first face.
  • a shadow pattern is formed on the first face, such that catalyst particles are only deposited on one or more selected growth site positions on the first face defined by the resulting shadow pattern from the shadow structure / mask.
  • nanostructures can be grown from the selected growth site positions, for example in a perpendicular orientation from the first face, and/or such that the nanostructure grow parallel to but vertically raised from the surface of the planar substrate.
  • the present disclosure therefore relates to a method for defining at least one epitaxial growth site on a growth substrate, i.e. a method for manufacturing an epitaxial growth site, comprising the steps of providing a substantially planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle of at least 60°, to the planar substrate; providing a first shadow mask comprising at least one blocking layer accommodating at least one aperture for passage of catalyst particles through the blocking layer; and depositing catalyst particles at an incident angle with respect to the planar substrate, the incident angle chosen such that one or more catalyst particles deposited through an aperture of the blocking layer defines an epitaxial growth site on the first face.
  • An elongated nanostructure may thereafter be manufactured by growth, preferably by a diffusive growth method, such as by vapour-liquid-solid (VLS) method, wherein the catalyst particle deposited onto the face of a structure preferably acts as a catalyst particle for epitaxial growth.
  • VLS vapour-liquid-solid
  • the at least one first structure maybe a crystalline structure provided by bottom-up approach, such as VLS growth or selective area growth, e.g. is at least one elongated crystalline nanostructure, such as a nanowire.
  • a crystalline structure provided by bottom-up approach, such as VLS growth or selective area growth, e.g. is at least one elongated crystalline nanostructure, such as a nanowire.
  • Such an elongated crystalline nanostructure typically comprising six plane side facets, and wherein the first face, whereon the crystal growth site is defined, is provided on one of said side facets.
  • the presently disclosed approach may be provided for accurately controlling kinking of nanowires, both the vertical positon of the kink and the subsequent growth direction of the kinked nanowire, see figs. 19-21.
  • the surfaces of the elongated nanostructures grown from the side facet(s) of the raised structure(s) are not in contact with the surface of the substrate and strain in the crystal structure of the elongated nanostructure can be very effectively relaxed.
  • the elongated nanostructures may be grown as perfect one-dimensional crystal wires with atomically abrupt and perfect surfaces.
  • the presently disclosed approach enables control of the growth direction of VLS nanowires and enables rational wafer-scale design of planar, perfect VLS nanowires, nanowire arrays and nanowire networks.
  • the presently disclosed approach effectively combines the perfect crystal structure, strain relaxation, possibility of axial heterostructures etc., characterizing VLS growth with the control and planar integrability of planar methods, such as selective area growth.
  • the present disclosure further relates to a method for manufacturing an elongated nanostructure by epitaxially growing, from an epitaxial growth site, defined by any of the methods outlined herein, and to an elongated nanostructure manufactured by the same.
  • the at least one elongated nanostructure is grown from the epitaxial growth site by bottom-up growth, such as VLS.
  • the present disclosure further relates to a nanoscale device, and a method for manufacturing the same, comprising at least one elongated nanostructure forming at least one electrical connection to a connector.
  • the connector may be formed prior to, during and/or after formation of the elongated nanostructure.
  • the connector may be formed by means of standard processing, and may be in the form of a secondary elongated nanostructure.
  • the presently disclosed approach also allows parallel fabrication of electronic devices directly on the growth substrate without manual manipulation of individual nanowires (on the wafer scale).
  • the present disclosure thereby presents a new method for positioning catalyst particles on specific crystal facets which forces VLS growth in the desired direction. These directions can be set by side-facets of nanowires grown in the same growth-step or can be defined by top-down processing as a part of the ex situ preparation of the growth substrates.
  • the particles are positioned onto perpendicular crystal directions by tilted evaporation through a shadow mask raised above the substrate.
  • An alternative approach can be provided by means of tilted lithography.
  • WO 2019/180267 discloses a shadow technique providing a superior method for growing semiconductor/superconductor hybrids with arbitrary superconductors.
  • the presently disclosed approach is the realization that the techniques disclosed in WO 2019/180267 can also be used for the fundamentally different task of defining the growth catalyst islands, and the realization that such an approach will solve some of the major problems in the technological exploitation of nanowires in technology.
  • WO 2020/008076 disclosed design of nanowire networks, including kinking the nanowire direction.
  • the presently disclosed approach enables rational engineering of the kink-directions as opposed to random networks.
  • the present invention may also be combined with concepts from WO 2020/008076 by using more refined substrate geometries rather than relying on kinking of all nanowires at a specific height in order to define the network/device plane.
  • the presently disclosed approach is further compatible with the all conventional device architectures, for instance field-effect transistors and the growth of hybrid semiconductor/superconductor structures for use in topological quantum information processing.
  • the parallelized planar growth can be combined with the superior superconducting shadow-technique disclosed in WO 2019/180267 and WO 2020/008076 used to define epitaxial superconducting hybrids. It is also compatible with axial hetero-structures, e.g. p/n junctions, and thus highly relevant for optical and optoelectronic devices for example in the growing field of nanowire (NW) lasers where group (lll-V) NWs provide the required ingredients for on-chip coherent light sources in the infrared telecommunication regime. Such light sources are crucial optical components, but are lacking so far in the CMOS processes due to the indirect bandgap of Si.
  • the end facets of the nanowire form the mirrors delimiting the Fabry-Perot resonator, and the NW itself acts as gain medium.
  • the charge carrier inversion can be achieved either by optical or electrical excitation.
  • any potential contact the nanowire has with a substrate changes the spatial distribution of the lasing modes. This can alter the threshold powers unfavorably for example by distorting the mode to not fit into a radially symmetric hetero-structure or leaking into the substrate. This highlights the advantage of the presently disclosed free standing nanowire-approach, while it still maintains the prospect of fabricating electrical contacts top down, needed for scalability.
  • the flexibility of growth directions and positions which can be achieved by the presently disclosed approach, can also be used for having nanowires grow into each other to form crosses, T-junctions and networks.
  • Such networks and branches can also be made by positioning catalyst particles on already grown nanowires.
  • the presently disclosed approach can also provide for integration of as-grown nanowires with silicon using for example Silicon-on-insulator commercial substrates, as exemplified in figs. 13-14. Also, such structures have the benefit of wires not being electrically connected to each other by the substrate, but the growth sites may be used as the actual contact region. Pre-growth defined electronic functionality of the substrate (gates, sensors etc. - see Fig. 7i,j) can further be integrated "under" the nanowire, making the nanowire-growth the last step in wafer-scale device fabrication. This capability distinguishes the presently disclosed approach from most other planar approaches.
  • the presently disclosed approach further enables the fabrication of nanowire electronics using standard parallel processing known from semiconductor technology. Normally each individual nanowire would require manual positioning, but the present invention is of immediate benefit for devices where multiple identical wires in parallel would enhance the performance. Also, the present invention allows the rational design of connected axially grown nanowires into arrays and networks. The present invention is also relevant for application of nanowires where the key property is the free-standing nanowire geometry; in particular sensor technologies requiring a large surface-to- volume ratio and optical applications where surfaces and interfaces produce unwanted recombination sites and loss of performance. For these applications the present invention preserves the free-standing (substrate free) geometry but also allows planar processing.
  • the VLS nanowires are of much higher crystal quality and not affected by faults and impurities of the substrate.
  • the present invention also allows axial heterostructures (barriers, quantum dots, pn-junctions) in contrast to SAG.
  • SAG structures have the potential to electrically leak/short to the substrate, VLS nanowires can be grown over an insulating oxide with the presently disclosed approach.
  • the free surfaces allow epitaxial contacting to normal and superconducting materials.
  • Figs. 1a-g show a method for formation of a structure having a vertical face, followed by the definition of a crystal growth site on said face, by deposition of a catalyst particle at an angle through an aperture in a shadow mask.
  • Fig. 2 corresponds to the shadow structures in figs. 1e-g after resist removal and annealing and shows a crystal growth site defined by a catalyst particle on a vertical face.
  • Fig. 3a shows a nanowire, epitaxially grown from a vertical face.
  • Fig. 3b shows a nanowire, epitaxially grown from a vertical face, supported by support structures.
  • Fig. 4 shows multiple parallel nanowires, epitaxially grown from a predefined pattern of epitaxial growth sites.
  • Fig. 5 shows an array of nanowires, having nanowires at different heights.
  • Fig. 6 shows an array of nanowires, having nanowires at multiple heights, grown from different vertical faces defining an angle.
  • Fig. 7 shows definition of an epitaxial growth site on a planar surface.
  • Fig. 8 shows epitaxial growth of a horizontal elongated nanostructure.
  • Fig. 9 shows definition of a crystal growth site for elongated nanostructures on a face of a vertical elongated nanostructure.
  • Fig. 10 shows growth of an elongated nanostructure from an epitaxial growth site of a vertical elongated nanostructure for the formation of a branched elongated nanostructure.
  • Fig. 11 shows a micrograph of a vertical elongated nanostructure with epitaxial growth sites defined on a face.
  • Fig. 12 shows a micrograph of a vertical elongated nanostructure with an epitaxial growth site defined on a face.
  • Fig. 13 shows SEM images of grooves etched in a (001) InP substrate
  • Figs. 14a-j show growth of nanowires on commercial silicon-on-insulator substrates and growth of a nanowire for contacting a second structure.
  • Fig. 15 shows top view SEM images of grooves etched with photoresist mask in an InAs (111 )B substrate.
  • Fig. 16 show a side view SEM image of a structure created by etching the surface of a growth substrate, the structure having a substantially vertical face.
  • Fig. 17 shows a top view SEM image of AU catalysts deposited on the edge of an etched trench according to the presently disclosed approach.
  • Fig. 18 shows a top view / side view SEM image of planar nanowires grown from AU catalysts deposited on the edge of an etched trench, similar to the AU catalysts seen in fig. 17.
  • Figs. 19a-g show an example of the formation of a horizontally extending elongated nanostructure in the form of a planar nanowire branched of a vertically extending elongated nanostructure (nanowire) at a precisely selected growth site of the vertical nanowire.
  • Figs. 20a-b illustrate application of the presently disclosed approach in controlling the kink height and merging neighboring stems with controllable planar nanowires.
  • Figs. 21a-b illustrate application of the presently disclosed approach for creating multiple planar nanowires at different heights from the same vertical nanowire.
  • Fig. 22 illustrates application of the presently disclosed approach for creating nanowire networks connected at different heights.
  • Figs. 23a-c illustrate that the presently disclosed approach can be used for creating shadow masks for deposition of for example superconducting material on a nanowire.
  • the blocking layer of the shadow mask may for example be deposited onto the substrate, such as by lithography techniques.
  • the blocking layer comprise a predefined pattern of apertures, through which the catalyst particles may reach the substrate.
  • the catalyst particles are preferably deposited at an incident angle, wherein the incident angle is chosen such that the catalyst particles, when deposited through the aperture(s), define epitaxial growth sites on the first face. Therefore, the incident angle and the predetermined pattern of apertures are chosen with respect to the first face, for example the size and position of the first face, such that catalyst particles define one or more epitaxial growth sites on the first face.
  • Gold is the normal catalyst particle for defining growth of elongated nanostructures, but many materials can be used, in particular metals such as silver and gallium.
  • a thin film is created on the receiving surface.
  • the area of the thin film is determined by the shadow mask, in particular the size of a corresponding aperture in the shadow mask and in part also the angle of evaporation.
  • the thickness of the thin film is at least partly determined by the duration of the evaporation and deposition of catalyst particles.
  • the substrate is heated, e.g. during the VLS process, the thin film melts and forms into a droplet, such as a substantial spherical droplet. I.e.
  • a number of catalyst particles is deposited at each growth site to form the thin film which after heating is formed to a droplet; a droplet which can be associated with a single catalyst particle even though it is formed from several catalyst particles during deposition.
  • the volume of the droplet / particle is determined by the thickness and the area of the thin film.
  • the radius of the droplet is typically in the range of 10 nm to 300 nm.
  • the shadow mask may comprise a distancing layer.
  • the distancing layer may be used in order to vertically raise the blocking layer from the substantially planar substrate. Therefore, the thickness of the distancing layer is sufficiently large, such that the first face is exposed and that an epitaxial growth site on the first face can be defined by deposition of catalyst particles at an angle through an aperture in the blocking layer.
  • the distancing layer may be provided in the form of an undercut resist layer, such as a typical release layer.
  • These methods may further be combined with manufacturing of a structure that is vertically raised from the substrate surface and comprise a face for epitaxial growth.
  • the structure may be formed by epitaxial growth of an area, such as in selective area growth, epitaxial growth of a vertical elongated nanostructure, such as by VLS and/or by a top-down approach, such as selective etching.
  • the face of the formed structure may form an angle to the substantially planar substrate, such as at least 60°.
  • An epitaxial growth site may thereafter be defined on a face of the formed structure using the methods disclosed herein.
  • the size of the catalyst particle at the growth site defines the cross-sectional area of the corresponding nanostructure growing at the growth site under the catalyst particle / droplet.
  • the secondary, or any further, epitaxial growth site(s) may be defined at a different location compared to the first epitaxial growth site(s), such as on a secondary face of the first structure and/or a secondary face, such as on a secondary structure.
  • the formation of multiple epitaxial growth sites may be used for the manufacturing of predefined arrays of elongated nanostructures, e.g. planar arrays.
  • the faces and the epitaxial growth sites may be defined such that growth of an elongated nanostructures from an epitaxial growth site leads to the formation of a connection, such as an electrical connection to a secondary surface or to a secondary elongated nanostructure epitaxially grown from a secondary epitaxial growth site.
  • the secondary growth site may further be positioned on a secondary face, wherein the secondary surface may be a surface of a secondary structure.
  • the secondary face may form a face angle with respect to the first face, of for example 90°, or for example 180°.
  • the epitaxial growth site may be defined on the first face such that it is positioned opposite of the secondary face.
  • An elongated nanostructure growing from a epitaxial growth site, positioned in such a way, may, upon growth, form a connection, for example an electrical connection, to the secondary surface.
  • a platform can form a shadow mask on the nanostructure, such that material from the deposition source is not deposited on one or more selected surface areas on the nanostructure defined by the resulting shadow mask from the platform.
  • junctions made using nanowires as both the nanostructure growth object and the shadow structure have been disclosed in WO 2017/153388 and in Gazibegovic Nature, 548, 434 (2017).
  • One purpose of the present disclosure is to improve the control of this patterned growth.
  • Another purpose is to reduce the need for post-processing of nanoscale devices.
  • At least part of the predefined pattern and/or at least a part of the substrate surface can be masked in resist, e.g. in a predefined resist pattern.
  • resist e.g. in a predefined resist pattern.
  • areas with and without under-etching can be more precisely defined, such for example a tilted facet can be formed next to a suspended bridge.
  • the predefined pattern may comprise a layout for at least one source and/or at least one drain and/or at least one electrostatic gate- electrode for at least one nanoscale device.
  • at least one electrically conducting layer can be deposited on top of the platform in order to define one or more sources and/or drains and/or gates for use in nanoscale electrical devices.
  • the vertical displacement of the platform from the substrate surface and the etching profile can ensure that the electrically conducting layer on the platform can be electrically isolated.
  • the platform can therefore realize an isolated metal wire or region which can be utilized as e.g. wires and connections in device architectures.
  • the raised platform which can be covered in any type of material (dielectric, normal metal, superconductor, etc.) and still be isolated allows access to for example source, drain, and gate electrodes from the outside world without the need for post-growth processing
  • Diffusive growth relies on diffusion of growth material elements on the surface; i.e. , there does not need to be a direct line of sight from between the growth source and the place where the crystal will grow below the shadow structure.
  • non-diffusive deposition typically takes place at low temperature ( ⁇ 100°C), where diffusion is negligible such that a vertically raised platform will function as a shadow structure during non-diffusive deposition.
  • Semiconductors are typically grown by diffusive growth whereas superconductors are typically deposited by means of non-diffusive deposition. I.e. a semiconductor layer can be defined below a shadow structure whereas a superconductor layer will be defined by the raised platform that forms a shadow for the deposition of the superconductor on the semiconductor.
  • At least a part of the presently disclosed methods are performed under vacuum, preferably ultra-high vacuum, for example in one or more vacuum chambers.
  • a major advantage of the presently disclosed approach is that the steps of growing at least one nanostructure and depositing the blocking layer - and optionally the support layer - can be performed without breaking the vacuum.
  • the presently disclosed approach can be said to be provided by means of a specially designed terraced growth substrate combined with positioned gold catalyst particles, a “kinked” nanowire growth sequence, and in situ angle-deposition of metal contacts.
  • the nanowire growth and metal deposition is the last process steps; i.e. thereafter the device, e.g. a logical element, chip or processor, is finished.
  • a route is therefore presented herein for growing hybrid nanostructures concurrent with actual device layouts without the drawbacks mentioned above - and the presently disclosed approach is furthermore applicable to substantially any type of crystal growth compatible material.
  • the devices that can be manufactured according to the presently disclosed approach are relevant for any use of nanowires in electrical devices, including superconductor hybrid structures for topological information processing, superconducting technologies, but also applications in sensor technologies and conventional electronics are relevant.
  • the nanostructure may be provided in a semiconducting material, e.g. a semiconducting material selected from the group of lll-V combinations, such as InAs, InP, InSb, GaAs, GaSb, AlSb and InGaAs, or group IV elements such as Si or Ge, or II- VI combinations such as ZnO, ZnSe and CdSe, or l-VII combinations.
  • the deposited first and/or support layer may naturally be a metal but may be many types of materials. Further, the deposited layer(s) may be provided in a material with superconducting properties below a critical temperature T c .
  • a preferred crystalline semiconductor nanostructure may be InAs, in particular because InAs nanostructures allow for high quality field effect Josephson junctions due to the highly transparent Schottky barrier- free SN interface.
  • the nanostructure may be crystalline, i.e. it is a single crystal or it is composed of several crystals, e.g. large single crystal elements, forming a crystalline structure.
  • the elongated crystalline nanostructure may be seen as a substantially one-dimensional crystalline structure. It has been demonstrated in InAs with an Al facet layer with Wurtzite(WZ)/FCC or Zinc Blende(ZB)/FCC crystal orientations, which can form uniform crystal morphologies and highly ordered and well defined epitaxial SE/M interfaces between the semiconductor (SE, e.g. InAs) and the metal (M, e.g. Al). However, the epitaxial match can be realized with other material combinations with similar structures and lattice spacings.
  • FCC metals this could for example be Au and Ag, and for semiconductors this is for example the other members of the ‘6.1 A family’: GaSb and AlSb.
  • high quality epitaxial growth of contacts to crystalline nanostructures can therefore be realized with many material combinations.
  • substantially the entirety of the at least one nanostructure can be covered with at least one final layer, a final layer such as an oxide coating, i.e. a suitable dielectric.
  • a final covering of the whole (or part of) structure can be seen as a coating provided for passivating and/or protecting the whole device.
  • the nanostructure can be grown and additional layers can be provided in a predefined pattern, i.e. post-processing can be avoided. It is then a major advantage to be able to protect the device, e.g. thereby passivating a semiconductor nanostructure in a suitable dielectric.
  • the growth of the nanostructures and the patterned deposition of one or more layers can be provided in a vacuum chamber, and the first and/or second deposition source can be a vapor deposition source (e-gun evaporation, thermal evaporation, laser- ablation, sputtering, Knudsen cell, etc).
  • the vacuum chamber and the deposition source(s) can then be configured to provide a directional beam flux from the deposition source(s) during deposition.
  • a crystal growth compatible material is a material that can be deposited on substrate suitable for crystal growth and which is compatible for subsequent use in a crystal growth process, e.g. a vacuum or ultra-high vacuum (UHV) process, such as MBE.
  • a vacuum or ultra-high vacuum (UHV) process such as MBE.
  • oxide materials can be used as crystal growth compatible material, commonly used examples are silicon oxide, aluminium oxide, hafnium oxide and silicon nitride.
  • the herein disclosed preprocessing of a growth substrate to create platforms / nanoscale layouts thereon can also include a step of defining a nanostructure pattern for defining a growth pattern for one or more planar crystalline nanostructures and/or for one or more crystalline nanostructures that can be provided by bottom-up growth, where the growth position of the nanostructure is defined by a catalyst particle deposited on a growth surface, the bottom-up growth thereby typically leading to substantial one-dimensional structures, such as nanowires.
  • Epitaxial match in the interface between two crystalline layers may not be entirely unusual if the crystal structures of the two crystalline layers are equal.
  • an epitaxial interface can be realised even when the crystal structure (and/or crystal phase) of the crystalline nanostructure is different from the crystal structure (and/or crystal phase) of the deposited layer, such as when the crystal structure (and/or crystal phase) of the elongated crystalline nanostructure and the crystal structure (and/or crystal phase) of the deposited layer(s) belong to different lattice systems and/or if the Bravais lattice of the elongated crystalline nanostructure is different from the Bravais lattice of the deposited layer(s).
  • the crystal structure of the elongated crystalline nanostructure is zincblende (ZB) then the crystal structure of the deposited layer(s) is not zincblende, i.e. the crystal structures are different.
  • the crystal structure of the elongated crystalline nanostructure is wurtzite then the crystal structure of the deposited layer(s) is not wurtzite, i.e. the crystal structures are different.
  • the crystal structure of the elongated crystalline nanostructure may be zincblende (ZB) or wurtzite (WZ) and the crystal structure of the facet layer belongs to the cubic crystal system, such as primitive cubic, BCC or FCC, as demonstrated previously with InAs nanowires (ZB or WZ) with an Al (FCC) epitaxially matched deposited layer(s).
  • ZB zincblende
  • WZ wurtzite
  • the crystal structure of the facet layer belongs to the cubic crystal system, such as primitive cubic, BCC or FCC, as demonstrated previously with InAs nanowires (ZB or WZ) with an Al (FCC) epitaxially matched deposited layer(s).
  • the elongated crystalline nanostructure may be homogeneous, i.e. formed from the same compound material in the longitudinal / axial direction and/or in the radial direction.
  • the elongated crystalline nanostructure may in itself be a heterogeneous structure, e.g. a heterostructured nanowire crystal.
  • the crystalline nanostructure may be a heterostructured nanowire crystal composed of different compounds in the axial and/or radial direction.
  • the deposited layer(s) is hence a metal selected from the group of Al, Ca, Ni, Cu, Kr, Sr, Rh, Pd, Ag, Ce, Yb, Ir, Pt, Au, Pb, Ac, Th, Li, Na, K, V, Cr, Fe, Rb, Nb, Mo, Cs, Ba, Eu, Ta and W. Some of these metals become superconducting below a critical temperature.
  • deposited layers of other materials may as well be provided where an epitaxial interface to the nanostructure can be realised, e.g. selected from the group of high temperature ceramic superconductors, such as copper oxide or cuprate superconductors, which often have a perovskite crystal structure.
  • high temperature ceramic superconductors such as copper oxide or cuprate superconductors, which often have a perovskite crystal structure.
  • Other possible superconductors are superconducting alloys such as NbN, NbTiN, NiGe, NbSn, and MgB 2 .
  • the cross-section of a nanowire may e.g. be square, hexagonal, or octagonal providing a total of four, six or eight side facets, respectively. Consequently, a deposited (facet) layer may be covering at least a part of 1, 2, 3, 4, 5, 6, 7, 8 or more of the side facets.
  • the thickness of the deposited layer(s) may be less than 300 nm, or less than 250 nm, or less than 200 nm, or less than 150 nm, or less than 100 nm, or less than 90 nm, or less than 80 nm, or less than 70 nm, or less than 60 nm, or less than 50 nm, or less than 45 nm, or less than 40 nm, or less than 35 nm, or less than 30 nm, or less than 25 nm, or less than 20 nm, or less than 19 nm, or less than 18 nm, or less than 17 nm, or less than 16 nm, or less than 15 nm, or less than 14 nm, or less than 13 nm, or less than 12 nm, or less than 11 nm, or less than 10 nm, or less than 9 nm, or less than 8 nm, or less than 7 nm, or less than 6 nm, or less than
  • the temperature of the substrate may play an important role with regard to the spacing between the islands. If the temperature is low enough, the spacing is so small that the islands will merge at a very thin thickness of the deposited layer(s). As discussed further below this may lead to surface driven grain growth.
  • a thickness of the deposited layer(s) below 15 nm may only be obtained if the temperature during growth / deposition of the facet layer is below -20°C, or below - 25°C, or even below -30°C. This is particular the case for Al and possibly Pb. However, for other materials thin layers can be obtained at room temperature.
  • the cross-sectional diameter of the nanostructure may be between 10 and 200 nm, such as between 10 and 20 nm, or between 20 and 30 nm, or between 30 and 40 nm, or between 40 and 50 nm, or between 50 and 60 nm, or between 60 and 70 nm, or between 70 and 80 nm, or between 80 and 90 nm, or between 90 and 100 nm, or between 100 and 110 nm, or between 110 and 120 nm, or between 120 and 140 nm, or between 140 and 160 nm, or between 160 and 180 nm, or between 180 and 200 nm.
  • the length of the nanostructure may be between 1 and 50 mhi, or between 1 and 2 mhi, or between 2 and 3 mhi, or between 3 and 4 mhi, or between 4 and 5 mhi, or between 5 and 6 mhi, or between 6 and 7 mhi, or between 7 and 8 mhi, or between 8 and 9 mhi, or between 9 and 10 mhi, or between 10 and 12 mhi, or between 12 and 14 mhi, or between 14 and 16 mhi, or between 16 and 18 mhi, or between 18 and 20 mhi, or between 20 and 50 mhi. This applies to both planar grown and bottom-up grown nanostructures.
  • FIGs. 1a-g and figs. 2-3 illustrate examples and the potential of the presently disclosed approach.
  • a planar (horizontal) growth substrate is provided in fig. 1a, for example in the form of a (11-2) InAs substrate.
  • the growth substrate has first been patterned by conventional processing, i.e. in fig. 1b a resist structure has been provided on the surface of the planar substrate.
  • the resist protects a part of the planar substrate surface to leave behind raised crystalline pillars, i.e. such that a structure is formed below the resist, i.e. a structure that is vertically raised from the “new” horizontal surface of the planar substrate.
  • the vertically raised structure comprises side facets in the form of at least one vertical face marked with the [111] arrow, indicating that with the (11-2) substrate, a vertical face will allow for [111] crystal growth.
  • the side facets are perpendicular to the growth substrate.
  • the side facets should be suitable for nanostructure growth, such as InAs (111), InAs (11-2), GaAs (111), Si (111).
  • Such pillars can also be grown bottom up either by VLS or by Selective-area-growth.
  • Fig. 1d illustrates an optional oxide deposition step. As seen from fig. 1d the oxide is deposited from a non-vertical angle such that the vertical raised structure shadows the vertical face and part of the substrate surface adjacent to the raised structure. I.e. an oxide covered substrate is obtained with a vertical face which is free from the oxide layer.
  • Additional resist structures can be formed such that a shadow mask is created as seen in the cross-sectional illustration in fig. 1e, in the cross-sectional perspective illustration in fig. 1f and in the SEM image in fig. 1 g, where a raised shadow layer has been fabricated; e.g. by conventional polymer-based lithographically patternable resist stacks.
  • the undercut profile illustrated in fig. 1g is a prior art SEM image of a resist profile with narrow linewidth in a top thinner PMMA layer and a large undercut in a thicker LOR bottom layer. The undercut comes from the difference in material in the two layers, i.e. the bottom layer can be selected such that the etching process creates the wanted undercut profile. I.e.
  • undercut profiles are standard in lithographic processing, but has hitherto been used to improve lift-off, i.e. it has not been used for tilted / angled evaporation / deposition as illustrated in fig. 1e and fig. 1f.
  • the shadow mask could be a movable separate stencil mask in close proximity and appropriately oriented and aligned.
  • the shadow mask comprises a plurality of apertures distributed in parallel with the vertical face that extends below the shadow mask. The diameter of each of these apertures is approx. 100 nm.
  • One aperture is seen in cross-section in the top of fig. 1e.
  • the configuration of the shadow mask including apertures, the structure vertically raised from the planar substrate surface including the vertical face and the deposition source and deposition angle ensure that during evaporation and deposition, typically of a metal such as gold, as illustrated in fig.
  • catalyst particles will be deposited on the oxide free vertical face, thereby defining crystal growth sites for subsequent growth of elongated nanostructures.
  • metal is evaporated at an angle to deposit a small amount on the desired side facet to act as a catalyst for subsequent nanostructure growth.
  • Fig. 2 shows an illustration that corresponds to the shadow structures in figs. 1e-g after resist removal and annealing and shows a crystal growth site (a catalyst particle) on a vertical face.
  • Fig. 3a shows an elongated nanostructure in the form of a nanowire that has been grown from one of the crystal growth sites defined on the vertical face, as illustrated in figs. 1-2.
  • the nanowire has been grown in the horizontal direction (111), i.e. perpendicular to the vertical face.
  • the nanowire has been grown very close to, but separated from, the insulating oxide layer on the planar substrate, i.e. in principle it is ready for direct electrical device fabrication as grown from the vertical face.
  • Fig. 3b shows the nanowire from fig. 3a, where electrical contacts has been created, the electrical contact also functioning as support structures.
  • the contacts can be created ex-situ or in-situ, in the latter case for example by means of a shadow mask.
  • Figs. 4-6 illustrate the potential of the presently disclosed approach.
  • the shadow mask contains five apertures resulting in five catalyst particles deposited on the vertical face thereby defining five crystal growth sites on the vertical face.
  • the shadow mask contains five apertures resulting in five catalyst particles deposited on the vertical face thereby defining five crystal growth sites on the vertical face.
  • thousands of crystal growth sites can be defined, but for illustrative purposes only a few are shown here.
  • fig. 4 five crystal growth sites have resulted in five nanowire grown perpendicular from the vertical face and thereby parallel to each and the planar substrate surface.
  • Fig. 5 shows ten nanowires grown from the vertical face, the ten nanowires forming two parallel layers with five nanowires in each layer, the layers of nanowires also being parallel to the planar substrate.
  • Fig. 6 shows five nanowires grown from a first vertical face, as in fig. 4, but with an additional nearby second vertical face located in a 90 degree angle to the first vertical face.
  • a single sixth nanowire has been grown from the second vertical face, the sixth nanowire also grown parallel to the planar substrate surface but perpendicular to the growth direction of the five other nanowires; the sixth nanowires thereby spanning all the other five nanowire such that contacts can be easily established.
  • the crystal growth site on the second vertical face can off course also be defined by means of an appropriate shadow mask.
  • the growth conditions of the presently disclosed approach are similar to the normal conditions for VLS growth.
  • the position of the catalyst, i.e. the growth site is defined by the design of the shadow mask, the defining angle(s), typically two angles, of evaporation (for example rotation and tilt of substrate).
  • the same shadow mask can also be used for defining multiple growth sites by multiple evaporations, and nanowires can be grown from different heights and different directions given suitable facets are defined, as exemplified in figs. 4-6.
  • Successive use of the growth site definition technique interleaved by nanostructure growth also allows to define growth of nanostructures on other nanostructures as a way to form networks, cf. fig. 10.
  • Figs. 7-8 corresponds substantially to a process illustrated in fig. 3b of pending application WO 2020/008076, where a nanowire was grown under a suspended part of a platform.
  • WO 2020/008076 the nanowire was kinked from the vertical growth direction to a horizontal growth direction in order to be able to grow under the suspended part of the platform.
  • fig. 7 a cross-sectional view shows a suspended platform defining a shadow mask.
  • a gold catalyst particle has been deposited on the lower planar substrate surface and in fig. 8 a vertical nanowire has been grown from the growth site defined by the catalyst particle.
  • Fig. 9 shows that a new catalyst particle can be deposited on a side facet of the vertical nanowire by means of the shadow mask of the suspended platform by angled deposition of gold.
  • Fig. 10 shows that the catalyst particle deposited on the side facet of the vertical nanowire defines a growth site for a new nanowire growing horizontally from the vertical nanowire. This new horizontal nanowire can then grow under the suspended platform in a controlled manner and subsequently merge with the support structure for the suspended platform.
  • Fig. 11 shows a micrograph of a vertical elongated nanostructure with epitaxial growth sites defined on a side facet, i.e. a realization of the illustration in fig. 9.
  • Fig. 12 is a close-up view of the epitaxial growth site in fig. 11.
  • Fig. 13 shows four perspective SEM images of grooves etched by HCI:H3P04 (5:1) with photoresist masks aligned / misaligned with respect to the [110] orientation of a (001) InP substrate by 0, 1, 2 and 3 degrees.
  • the scale bars correspond to 111 pm.
  • Fig. 14a illustrates a planar substrate where an insulating oxide layer is located beneath a silicon layer on top of a commercially available SOI substrates.
  • a shadow mask can provide for definition of a growth site as illustrated in fig. 14c and a nanowire can be grown from said growth site as illustrated in fig. 14d, which almost corresponds to figs. 2-3 with the notable difference that in fig.
  • the insulating layer is located below the raised structure such that nanowires grown from separate structures (as in fig. 6) are electrically isolated from each, whereas all nanowires in figs. 4-6 are electrically connected to each other in one end via the InAs substrate.
  • Figs. 14e-h show two examples of a nanowires growing horizontally between two separate raised structures resting on top of an insulating layer.
  • two raised structures have been created facing each other.
  • a growth site has been defined on one side facet and a nanowire can grow horizontally from the growth site towards the other raised structure and merge with a side facet.
  • the nanowire is the only connection between the two structures.
  • FIG. 14 A similar solution is illustrated in figs. 14g-h where growth sites have been defined on both opposing raised structures such that one nanowire is growing from each side facet and merge together in the middle.
  • the structures illustrated in fig. 14 have the benefit of the nanowires not being electrically connected to each-other by the substrate, and the growth sites may be used as the actual contact region.
  • the pre-growth defined electronic functionality of the substrate can also be integrated "under" the nanowire. This is exemplified in figs. 14i-j where conducting gates are buried / integrated in the insulting layer below the nanowire, thereby making the nanowire-growth the last step in wafer- scale device fabrication. This capability distinguishes the presently disclosed approach from most other planar approaches.
  • Fig. 15 shows top view SEM images of grooves etched (10:5:3) with photoresist masks in an InAs (111 )B substrate. Rectangular masks were rotated 360 degrees in steps of 15 degrees.
  • the anisotropic etchant can be used to expose different crystal planes by controlling the mask rotation with respect to the substrate thereby showing that exposing the desired crystal plane orientation for subsequent nanostructure growth can be controlled to a high precision.
  • Fig. 16 show a side view SEM image of a first structure created by etching the surface of a growth substrate, the structure having a substantially vertical face suitable for deposition of catalyst particles.
  • Fig. 16 is an exemplary realisation of fig. 1c, i.e. a growth substrate has first been patterned by conventional processing with a resist structure. Upon etching the resist protects a part of the planar substrate surface to leave behind a raised crystalline structure, such that a first structure is formed below the resist.
  • the structure is vertically raised from the “new” horizontal surface of the planar substrate.
  • the vertically raised structure comprises a side facet in the form of the vertical face that will allow for deposition of catalyst particle and subsequent nanostructure crystal growth therefrom.
  • Fig. 17 shows a top view SEM image of Au catalysts deposited on the edge of an etched trench according to the presently disclosed approach.
  • Fig. 16 is an exemplary realisation of the principle illustrated in fig. 1 and in particular in fig. 2, however without the step of oxide deposition (fig. 1d).
  • One of the Au catalysts in fig. 17 are encircled by a white circle, but five Au catalysts are visible in fig. 17, equidistantly aligned on the edge of the etched trench.
  • Fig. 18 shows a top view / side view SEM image of a planar nanowire grown from Au catalysts deposited on the edge of an etched trench, similar to the illustration in fig. 17.
  • Fig. 18 shows a top view / side view SEM image of a planar nanowire grown from Au catalysts deposited on the edge of an etched trench, similar to the illustration in fig. 17.
  • Fig. 17 shows a top view SEM image of Au catalysts deposited on the
  • nanowire 18 is not perfectly clear, but the white arrow in the bottom labelled “Nanowire” points to a nanowire that has been grown controllably along the 111 B direction of the substrate, i.e. grown substantially parallel to the substrate surface, i.e. a planar nanostructure grown in accordance with the presently disclosed approach.
  • the additional (and larger) growth elements in fig. 18 are due to the absence of oxide deposition. If a step of oxide deposition is introduced prior to nanowire deposition, these additional growth object can be avoided and only controllable grown nanowires remains.
  • Figs. 19a shows a standard substrate, e.g. an InAs 111 substrate or similar, and a catalyst gold particle defining a growth position on the substrate.
  • Fig. 19b shows the standard growth of an elongated crystalline nanostructure (by means of VLS) on the form of an InAs nanowire extending vertically from the horizontal substrate surface. Growth of the nanowire can be provided in a suitable growth reactor. Auxiliary nanowires may be grown adjacent the shown nanowire and can for example be used for shadow-patterning the final structure, as exemplified in fig. 23. A top view of the hexagonal nanowire is also shown in fig. 19b, i.e. the nanowire has six plane side facets.
  • a bottom thick resist layer of some suitable copolymer and a thinner top resist layer e.g. in the form of PMMA
  • the resist layers cover the nanowire(s) on the substrate. Similar to fig. 1e a shadow mask with a blocking layer and an aperture can be formed and upon etching the bottom copolymer resist layer creates an undercut profile as seen in fig. 19d, where L defines the distance from the aperture in the blocking layer to the vertical facet of the nanowire and H defines the distance from the substrate surface to the underside of the blocking layer.
  • Metal deposition by angled / tilted evaporation is illustrated in fig. 19e where a gold particles is deposited at a side facet of the nanowire at the height h, at least partly determined by the evaporation incident angle v.
  • the distance L is on the order of 0.1 pm to 10 pm, more typically 0.2 pm to 5 pm
  • the distance H is on the order of 0.1 pm to 6 pm, more typically 0.2 pm to 3 pm.
  • the distances H and L, the thickness of the blocking layer and the angle of evaporation of the catalyst particles determines the location of the catalyst particles of the first face, and thereby the growth positions for crystal growth can be determined very precisely even on vertical faces.
  • fig. 19f shows a SEM micrograph of such a shadow defined metal island in the form a gold catalyst particle.
  • This structure can be inserted in a suitable growth reactor again and a planar nanostructure can be grown from the catalyst particle on the side facet, such that a planar nanowire is branched of a vertical nanowire at a predefined and precisely controllable height and a predefined and precisely controllable growth direction, as illustrated in fig. 19g.
  • a gold catalyst particle is still present on top of the vertical nanowire such that the vertical crystal growth of the vertical nanowire can also be continued.
  • Figs. 20a-b illustrate application of the presently disclosed approach in controlling the kink height and merging neighbouring stems (e.g. vertical nanowires) with controllable planar nanowires.
  • Fig. 20a is similar to fig. 19e where three of such setups are arranged side by side.
  • the shadow mask of the middle figure has a configuration such that the catalyst particle is deposited at a larger height relative to the substrate.
  • the subsequent growth of three planar nanowires illustrated in fig. 20b result in planar nanowires at different heights.
  • the left planar nanowire does not merge to the right, i.e. not contact, with the middle stem, whereas the middle planar nanowire has been grown to merge and contact the right stem.
  • Figs. 21a-b illustrate application of the presently disclosed approach for creating multiple planar nanowires at different heights from the same vertical nanowire. Similar to the setup in fig. 19e, a shadow mask with two apertures is provided such that upon titled evaporation catalyst particles are deposited at the vertical nanowire at different heights, as seen in fig. 21a. Upon growth in a suitable growth reactor, two parallel planar nanowires are grown from the same vertical stem at different heights, as illustrated in fig. 21b.
  • Fig. 22 illustrates application of the presently disclosed approach for creating nanowire networks connected at different heights. Combining the approaches illustrated in figs. 19-21 a network of nanowires can be created that are controllably connected at different heights.
  • a vertical stem is connected to a short planar nanowire extending in the upper plane and a longer planar nanowire extending in the bottom, whereby this vertical stem functions as a via connecting the two planes, i.e. connecting the different planes of nanowires.
  • planar nanowire has merged with another planar nanowire, because they extend in the same plane.
  • Figs. 23a-c illustrate that the presently disclosed approach can be used for creating shadow masks for deposition of for example superconducting material on a side facet of a nanowire.
  • Fig. 23a-c show side views to the left and top views to the right.
  • three vertical nanostructures have been grown from a horizontal substrate, similar to fig. 19a.
  • Two of the vertical structures have smaller diameter but larger height than the third.
  • shadow mask, tilted evaporation and planar crystal growth as explained above, a planar nanowire has been grown from the thickest vertical structure, as illustrated in fig. 23b.
  • Metal deposition e.g.
  • superconductor deposition can then be provided from the side such that the two thin vertical structures function as shadow masks during metal deposition, whereby a superconducting island located between two Josephson junctions (JJ), can be created on a side facet of the planar nanowire.
  • JJ Josephson junctions
  • a method for defining at least one epitaxial growth site on a growth substrate comprising the steps of; a) providing a substantially planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle of at least 60° to the planar substrate; b) providing a first shadow mask comprising at least one blocking layer accommodating at least one aperture for passage of catalyst particles through the blocking layer; wherein the first shadow mask preferably is vertically raised from the substrate for distancing the blocking layer from the substrate; and c) depositing catalyst particles, such as by evaporation, such as by tilted evaporation, at an incident angle with respect to the planar substrate, the incident angle chosen such that a catalyst particle deposited through an aperture of the blocking layer defines an epitaxial growth site on the first face.
  • the face angle is at least 70°, or more preferably at least 80°, or at least 85°, or more preferably substantially 90°, most preferably 90°.
  • the blocking layer is, at least partly, positioned on top of a support layer, for distancing the blocking layer from the substrate.
  • the blocking layer comprises multiple apertures, preferably positioned according to a predefined pattern, for generating multiple epitaxial growth sites during deposition of the catalyst particles.
  • the method according to any of the previous items additionally comprising manufacturing, before a), at least one structure vertically raised from the substrate surface comprising a face for epitaxial growth, such as the first structure(s) with a first face(s), such as by a bottom-up approach (for example VLS growth, selective area growth) and/or a top-down approach (for example selective etching).
  • said at least one first structure is a crystalline structure provided by bottom-up approach, such as VLS growth or selective area growth.
  • said at least one first structure is at least one elongated crystalline nanostructure, such as a nanowire.
  • said at least one first structure is at least one elongated crystalline nanostructure, such as a nanowire, comprising a plurality of plane side facets, such as four, six or eight side facets, and wherein said first face is provided on one of said side facets.
  • said at least one first structure is at least one elongated crystalline nanostructure, wherein said first face is provided on at least a part of said at least one nanostructure extending vertically from the planar substrate. 12. The method according to any of the previous items, the method further comprising coating the substrate with an oxide prior to step b).
  • the epitaxial growth site(s) is suitable for epitaxial growth of an elongated nanostructure(s) by diffusive growth, such as by the vapour-liquid-solid method.
  • the first face has a configuration for growth of elongated nanostructures, such as a combination of material and crystal orientation, for example selected from the list including InAs (111), InAs (11-2), GaAs (111) and Si (111).
  • the blocking layer has a thickness of between 10 nm and 10 pm.
  • the support layer has a thickness of between 10 nm and 10 pm, more preferably between of 0.1 pm and 6 pm, most preferably between 0.2 pm and 3 pm.
  • the thickness of the first shadow mask is between 10 nm and 20 pm.
  • the blocking layer comprises or consists of a resist for lithographic patterning, such as photolithography, electron-beam lithography, nano imprint lithography and/or x-ray lithography.
  • the blocking layer is configured such that it is impermeable to the catalyst particle(s), such that it blocks the catalyst particle(s) from reaching the substrate.
  • the support layer comprises or consists of a material for isotropic etching, such as a lift-off resist.
  • step b) comprises manufacturing, at least partly, the first shadow mask.
  • step b) comprises
  • step b) comprises
  • step b) comprises patterning the blocking layer by clean room processing, such as by photolithography or by e- beam lithography
  • step b) comprises isotropic etching of the support layer.
  • the support layer is etched, preferably through the aperture(s) or through additional openings in the blocking layer, such that the first face is, at least partly, exposed.
  • the catalyst particle(s) is a metal particle, such as gold.
  • the catalyst particle(s) is substantially spherical, such as with a diameter of 10-1000 nm.
  • step c) is repeated at least once to create at least one secondary epitaxial growth site.
  • step c) is repeated by:
  • a method for manufacturing an elongated nanostructure according to any of the previous items the method further comprising epitaxially growing, from the epitaxial growth site, preferably by means of bottom-up growth, at least one elongated nanostructure.
  • the method further comprises manufacturing at least one support structure for the elongated nanostructure(s), preferably positioned with an even spacing along the length(s) of the elongated nanostructure(s), for providing structural rigidity to the elongated nanostructure(s).
  • a method of manufacturing a nanoscale device according to any of the previous items, the method further comprising forming at least one electrical connection between the elongated nanowire(s) and at least one connector.
  • connector(s) is at least one other elongated nanostructure, at least one vertical elongated nanostructure, raised structure(s) of the substrate, such as the first structure and/or the second structure, and/or additional vertically raised structure(s) of the substrate.
  • a nanoscale device manufactured according to any of items 45-56.

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Abstract

The present disclosure relates to a method for defining epitaxial growth sites for growth of elongated nanostructures and a method for manufacturing elongated nanostructures based thereon. The present disclosure further relates to nanoscale devices, in particular devices based on forming an electrical connection to an elongated nanostructure. The presently disclosed methods can be utilized for manufacturing of elongated nanostructures as a part of a conventional routine for device processing. A first embodiment relates to a method for defining at least one epitaxial growth site on a growth substrate, comprising the steps of: providing a substantially planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle, of at least 60°, to the planar substrate; providing a first shadow mask comprising at least one blocking layer accommodating at least one aperture for passage of catalyst particles through the blocking layer; and depositing catalyst particles at an incident angle with respect to the planar substrate, the incident angle chosen such that a catalyst particle deposited through an aperture of the blocking layer defines an epitaxial growth site on the first face.

Description

Method for controllable growth of elongated nanostructures
The present disclosure relates to a method for defining epitaxial growth sites for growth of elongated nanostructures and a method for manufacturing elongated nanostructures based thereon. The present disclosure further relates to nanoscale devices, in particular devices based on forming an electrical connection to an elongated nanostructure. The presently disclosed methods can be utilized for manufacturing of elongated nanostructures as a part of a conventional routine for device processing.
Background of invention
Semiconductor nanowires is an example of elongated nanostructures and constitute a promising class of materials for the formation of active elements in electronic and optical devices in general and specifically for future conventional and quantum computation architecturesp. Nanowires usually have diameters between 5-250 nm, can be many micrometers long, and may be grown from any known semiconductor (group V elements e.g. SI and Ge, lll-V elements e.g. InAs, GaAs, InSb, InAsSb, ll-VI compounds etc.). In the most conventional approach (vapour-liquid-solid (VLS) growth), nanowires are grown in a crystal growth reactor from metal catalyst particles, the size of which determine the diameter of the corresponding nanowires and the positions at which they grow.
Due to the thermodynamics of the growth process the wires grow in a preferred crystal direction (usually the [111] or [0001] direction for Zinc Blende or Wurtzite crystal structures), defining an angle to the growth substrate depending of the crystal surface of the substrate. Typically, elongated nanostructures are grown from (111) substrates where they grow as a "forest" of vertical crystal fibers. Due to the vertical growth orientation, wherein the nanowires do not contact the substrate surface along its length, a higher degree of strain relaxation can be achieved, and thus, the wires can be grown as perfect one-dimensional crystal wires with atomically abrupt and perfect surfaces.
Maintaining a minimum degree of disorder, such as crystal faults and surface roughness, is crucial for the performance of materials in electrical and optical devices. The level of perfection offered by bottom-up nanowires cannot be achieved by conventional top-down fabrication (such as by etching from a bulk crystal). The fact that surfaces are free during growth and only constrained by the catalyst particle is thus important for the uniformity and crystal quality. However, the incorporation of nanowires into devices has shown to be difficult as they are not compatible with conventional, industry standardized, processing methods. This has been a major road-block for the utilization of nanowires in technology.
Pending applications WO 2019/180267 and WO 2020/008076 by the same inventors provide opportunities for growing semiconductor/superconductor hybrids with arbitrary superconductors, by the employment of a shadow technique, e.g. by shadow masks manufactured by means of conventional lithographic processing. The method disclosed in WO 2016/64787, also by the same inventors, relates to changing the growth direction of vertical nanowires by kinking the growth direction, wherein the gold catalyst particle is displaced onto a random facet of the vertical nanowire for further growth of a horizontal nanowire, i.e. a planar nanowire. The disclosures of these patent applications may be combined with the concepts of the present disclosure. Hence, the content of WO 2019/180267, WO 2020/008076 and WO 2016/64787 are hereby incorporated by reference in their entirety.
Summary of invention
While growth of horizontal nanowires have been shown by for instance growth on the substrate, such as by selective area growth providing planar structures, this does not maintain the perfect crystal structure as in the case of free unconstrained growth and it is incompatible with axial hetero-structures incorporated along the nanowire. Furthermore, kinked nanowires, wherein the growth direction is changed by forcing the catalyst particle to leave the tip, have been demonstrated. However, the direction of the nanowire growth after kinking is normally random among the six side-facets making this approach inappropriate for large scale applications.
The present inventors have therefore realized that there is a significant need for control of the growth direction of elongated nanostructures during growth, in order to enable rational wafer-scale design of elongated nanostructures, nanostructure arrays and elongated nanostructure networks, and that this preferably should be combined with the advantageous characteristics of VLS growth, i.e. perfect crystal structures, strain relaxation and the possibility of axial heterostructures and furthermore, the control and planar integrability with planar processing methods such as selective area growth. WO 2019/180267 relates to in-situ growth of nanostructures and deposition of material on the nanostructures utilizing shadow structures. The shadow structures are (vertically) raised from the growth plane of the nanostructure such that the shadow structure can create a shadow mask on the nanostructure. I.e. the nanostructures are grown on / from a specially designed growth substrate with shadow structures located on said growth substrate. With appropriate control of the size and the configuration of the shadow structure and the location of the shadow structure in relation to the nanostructure, (at least a part of) the shadow structure can be arranged to form a shadow mask on the nanostructure. During deposition of material on the nanostructure, e.g. by means of a directional beam flux, for example from a deposition source, the location of the deposition source and/or the orientation of the beam flux, and/or the location and form of the shadow structure and the nanostructure, the shadow structure can form a shadow mask on the nanostructure, such that material from the deposition source is not deposited on one or more selected surface areas on the nanostructure defined by the resulting shadow mask from the shadow structure.
The present disclosure is closely related to WO 2019/180267 because the present invention also relates to in-situ growth of nanostructures and utilization of shadow structures. But in the present disclosure the shadow structure is used in cooperation with deposition of catalyst particles such that the location of epitaxial growth sites can be controlled and precisely defined, even in situations where the growth surface defines an angle with the substrate. I.e. the shadow structure can in this case be used to define epitaxial growth sites on a growth surface which is perpendicular to the substrate surface such that epitaxial nanostructures subsequently can be grown parallel to but (slightly) raised from the substrate surface. Thereby the advantages of planar processing methods can be utilized for VLS growth.
A substantially planar substrate can be provided, the planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle, typically of at least 60°, more preferably at least 70°, even more preferably at least 80°, but typically around 90°, to the planar substrate. The angle is typically defined by the crystal orientation of the substrate surface and the crystal orientation of the surface of the first face. The growth angle of subsequent nanostructure growth is also determined by the crystal orientation of the growth surface. A first shadow structure and/or mask can be provided and be configured such that a shadow pattern can be created on the first face. In contrast to resist layers used in traditional lithography, the shadow structure / shadow mask is typically vertically raised from the surface of the planar substrate such that the shadow structure / mask can create a shadow pattern on the first face during deposition. I.e. the first face is typically exposed and/or uncovered, i.e. not covered by a resist layer. The shadow mask is preferably configured such that allows passage of catalyst particles through the blocking layer, e.g. permeating through the blocking layer or passaging through the blocking layer, e.g. through one or more openings in the blocking layer allowing passage of catalyst particles, such as one or more apertures. After passage through the apertures of the blocking layer of the shadow mask the catalyst particles still have to “travel” a distance from the blocking layer to the first face (cf. fig. 1e), which is also in contrast to traditional lithography. The shadow mask can for example comprise at least one blocking layer accommodating at least one aperture, the aperture(s) allowing passage of catalyst particles through the blocking layer.
With appropriate control of the size and the configuration of the shadow structure / mask, the blocking layer and/or the apertures, the location of the shadow structure / mask in relation to the planar substrate and the first face, (at least a part of) the shadow structure / mask can be arranged to form a shadow pattern on the first face. During deposition of catalyst particles on the substrate, e.g. by means of a directional beam flux, for example from a deposition source, the location of the deposition source and/or the orientation of the beam flux, and/or the location and form of the shadow structure /mask and the first face, a shadow pattern is formed on the first face, such that catalyst particles are only deposited on one or more selected growth site positions on the first face defined by the resulting shadow pattern from the shadow structure / mask. Subsequently nanostructures can be grown from the selected growth site positions, for example in a perpendicular orientation from the first face, and/or such that the nanostructure grow parallel to but vertically raised from the surface of the planar substrate.
In a first aspect the present disclosure therefore relates to a method for defining at least one epitaxial growth site on a growth substrate, i.e. a method for manufacturing an epitaxial growth site, comprising the steps of providing a substantially planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle of at least 60°, to the planar substrate; providing a first shadow mask comprising at least one blocking layer accommodating at least one aperture for passage of catalyst particles through the blocking layer; and depositing catalyst particles at an incident angle with respect to the planar substrate, the incident angle chosen such that one or more catalyst particles deposited through an aperture of the blocking layer defines an epitaxial growth site on the first face.
An elongated nanostructure may thereafter be manufactured by growth, preferably by a diffusive growth method, such as by vapour-liquid-solid (VLS) method, wherein the catalyst particle deposited onto the face of a structure preferably acts as a catalyst particle for epitaxial growth.
However, even the at least one first structure maybe a crystalline structure provided by bottom-up approach, such as VLS growth or selective area growth, e.g. is at least one elongated crystalline nanostructure, such as a nanowire. Such an elongated crystalline nanostructure typically comprising six plane side facets, and wherein the first face, whereon the crystal growth site is defined, is provided on one of said side facets. Thereby the presently disclosed approach may be provided for accurately controlling kinking of nanowires, both the vertical positon of the kink and the subsequent growth direction of the kinked nanowire, see figs. 19-21.
Similarly to vertically grown elongated nanostructures, the surfaces of the elongated nanostructures grown from the side facet(s) of the raised structure(s) are not in contact with the surface of the substrate and strain in the crystal structure of the elongated nanostructure can be very effectively relaxed. As such, the elongated nanostructures may be grown as perfect one-dimensional crystal wires with atomically abrupt and perfect surfaces.
The presently disclosed approach enables control of the growth direction of VLS nanowires and enables rational wafer-scale design of planar, perfect VLS nanowires, nanowire arrays and nanowire networks. The presently disclosed approach effectively combines the perfect crystal structure, strain relaxation, possibility of axial heterostructures etc., characterizing VLS growth with the control and planar integrability of planar methods, such as selective area growth. The present disclosure further relates to a method for manufacturing an elongated nanostructure by epitaxially growing, from an epitaxial growth site, defined by any of the methods outlined herein, and to an elongated nanostructure manufactured by the same. Preferably, the at least one elongated nanostructure is grown from the epitaxial growth site by bottom-up growth, such as VLS.
The present disclosure further relates to a nanoscale device, and a method for manufacturing the same, comprising at least one elongated nanostructure forming at least one electrical connection to a connector. The connector may be formed prior to, during and/or after formation of the elongated nanostructure. The connector may be formed by means of standard processing, and may be in the form of a secondary elongated nanostructure.
The presently disclosed approach also allows parallel fabrication of electronic devices directly on the growth substrate without manual manipulation of individual nanowires (on the wafer scale). The present disclosure thereby presents a new method for positioning catalyst particles on specific crystal facets which forces VLS growth in the desired direction. These directions can be set by side-facets of nanowires grown in the same growth-step or can be defined by top-down processing as a part of the ex situ preparation of the growth substrates. The particles are positioned onto perpendicular crystal directions by tilted evaporation through a shadow mask raised above the substrate. An alternative approach can be provided by means of tilted lithography.
WO 2019/180267 discloses a shadow technique providing a superior method for growing semiconductor/superconductor hybrids with arbitrary superconductors. The presently disclosed approach is the realization that the techniques disclosed in WO 2019/180267 can also be used for the fundamentally different task of defining the growth catalyst islands, and the realization that such an approach will solve some of the major problems in the technological exploitation of nanowires in technology.
WO 2020/008076 disclosed design of nanowire networks, including kinking the nanowire direction. The presently disclosed approach enables rational engineering of the kink-directions as opposed to random networks. The present invention may also be combined with concepts from WO 2020/008076 by using more refined substrate geometries rather than relying on kinking of all nanowires at a specific height in order to define the network/device plane. The presently disclosed approach is further compatible with the all conventional device architectures, for instance field-effect transistors and the growth of hybrid semiconductor/superconductor structures for use in topological quantum information processing. As noted above, the parallelized planar growth can be combined with the superior superconducting shadow-technique disclosed in WO 2019/180267 and WO 2020/008076 used to define epitaxial superconducting hybrids. It is also compatible with axial hetero-structures, e.g. p/n junctions, and thus highly relevant for optical and optoelectronic devices for example in the growing field of nanowire (NW) lasers where group (lll-V) NWs provide the required ingredients for on-chip coherent light sources in the infrared telecommunication regime. Such light sources are crucial optical components, but are lacking so far in the CMOS processes due to the indirect bandgap of Si. The end facets of the nanowire form the mirrors delimiting the Fabry-Perot resonator, and the NW itself acts as gain medium. The charge carrier inversion can be achieved either by optical or electrical excitation. Given that the nanowire itself is the resonator, any potential contact the nanowire has with a substrate changes the spatial distribution of the lasing modes. This can alter the threshold powers unfavorably for example by distorting the mode to not fit into a radially symmetric hetero-structure or leaking into the substrate. This highlights the advantage of the presently disclosed free standing nanowire-approach, while it still maintains the prospect of fabricating electrical contacts top down, needed for scalability. Recent endeavors proved capability to couple such NW lasers to Si-waveguides patterned on SOI-wafers. Those experiments were however done on standard vertical NWs and were therefore not pumped electrically. The presently disclosed approach allows to retain the incoupling behavior and combine with the ease of creating top down electrical pumping contacts. Finally, the high surface-to-volume ratio of nanowires make them optimal for chemical sensors (field-effect sensors) and also here the rational design of growth sites, as disclosed herein, will be a significant improvement.
The flexibility of growth directions and positions which can be achieved by the presently disclosed approach, can also be used for having nanowires grow into each other to form crosses, T-junctions and networks. Such networks and branches can also be made by positioning catalyst particles on already grown nanowires.
The presently disclosed approach can also provide for integration of as-grown nanowires with silicon using for example Silicon-on-insulator commercial substrates, as exemplified in figs. 13-14. Also, such structures have the benefit of wires not being electrically connected to each other by the substrate, but the growth sites may be used as the actual contact region. Pre-growth defined electronic functionality of the substrate (gates, sensors etc. - see Fig. 7i,j) can further be integrated "under" the nanowire, making the nanowire-growth the last step in wafer-scale device fabrication. This capability distinguishes the presently disclosed approach from most other planar approaches.
The presently disclosed approach further enables the fabrication of nanowire electronics using standard parallel processing known from semiconductor technology. Normally each individual nanowire would require manual positioning, but the present invention is of immediate benefit for devices where multiple identical wires in parallel would enhance the performance. Also, the present invention allows the rational design of connected axially grown nanowires into arrays and networks. The present invention is also relevant for application of nanowires where the key property is the free-standing nanowire geometry; in particular sensor technologies requiring a large surface-to- volume ratio and optical applications where surfaces and interfaces produce unwanted recombination sites and loss of performance. For these applications the present invention preserves the free-standing (substrate free) geometry but also allows planar processing. Compared to SAG, the VLS nanowires are of much higher crystal quality and not affected by faults and impurities of the substrate. The present invention also allows axial heterostructures (barriers, quantum dots, pn-junctions) in contrast to SAG. Also, while SAG structures have the potential to electrically leak/short to the substrate, VLS nanowires can be grown over an insulating oxide with the presently disclosed approach. Compared to TASE, the free surfaces allow epitaxial contacting to normal and superconducting materials.
Description of drawings
Figs. 1a-g show a method for formation of a structure having a vertical face, followed by the definition of a crystal growth site on said face, by deposition of a catalyst particle at an angle through an aperture in a shadow mask.
Fig. 2 corresponds to the shadow structures in figs. 1e-g after resist removal and annealing and shows a crystal growth site defined by a catalyst particle on a vertical face.
Fig. 3a shows a nanowire, epitaxially grown from a vertical face. Fig. 3b shows a nanowire, epitaxially grown from a vertical face, supported by support structures.
Fig. 4 shows multiple parallel nanowires, epitaxially grown from a predefined pattern of epitaxial growth sites.
Fig. 5 shows an array of nanowires, having nanowires at different heights.
Fig. 6 shows an array of nanowires, having nanowires at multiple heights, grown from different vertical faces defining an angle.
Fig. 7 shows definition of an epitaxial growth site on a planar surface.
Fig. 8 shows epitaxial growth of a horizontal elongated nanostructure.
Fig. 9 shows definition of a crystal growth site for elongated nanostructures on a face of a vertical elongated nanostructure.
Fig. 10 shows growth of an elongated nanostructure from an epitaxial growth site of a vertical elongated nanostructure for the formation of a branched elongated nanostructure.
Fig. 11 shows a micrograph of a vertical elongated nanostructure with epitaxial growth sites defined on a face.
Fig. 12 shows a micrograph of a vertical elongated nanostructure with an epitaxial growth site defined on a face.
Fig. 13 shows SEM images of grooves etched in a (001) InP substrate
Figs. 14a-j show growth of nanowires on commercial silicon-on-insulator substrates and growth of a nanowire for contacting a second structure.
Fig. 15 shows top view SEM images of grooves etched with photoresist mask in an InAs (111 )B substrate.
Fig. 16 show a side view SEM image of a structure created by etching the surface of a growth substrate, the structure having a substantially vertical face.
Fig. 17 shows a top view SEM image of AU catalysts deposited on the edge of an etched trench according to the presently disclosed approach.
Fig. 18 shows a top view / side view SEM image of planar nanowires grown from AU catalysts deposited on the edge of an etched trench, similar to the AU catalysts seen in fig. 17.
Figs. 19a-g show an example of the formation of a horizontally extending elongated nanostructure in the form of a planar nanowire branched of a vertically extending elongated nanostructure (nanowire) at a precisely selected growth site of the vertical nanowire.
Figs. 20a-b illustrate application of the presently disclosed approach in controlling the kink height and merging neighboring stems with controllable planar nanowires. Figs. 21a-b illustrate application of the presently disclosed approach for creating multiple planar nanowires at different heights from the same vertical nanowire.
Fig. 22 illustrates application of the presently disclosed approach for creating nanowire networks connected at different heights.
Figs. 23a-c illustrate that the presently disclosed approach can be used for creating shadow masks for deposition of for example superconducting material on a nanowire.
Detailed description of the invention
The blocking layer of the shadow mask may for example be deposited onto the substrate, such as by lithography techniques. Preferably the blocking layer comprise a predefined pattern of apertures, through which the catalyst particles may reach the substrate. The catalyst particles are preferably deposited at an incident angle, wherein the incident angle is chosen such that the catalyst particles, when deposited through the aperture(s), define epitaxial growth sites on the first face. Therefore, the incident angle and the predetermined pattern of apertures are chosen with respect to the first face, for example the size and position of the first face, such that catalyst particles define one or more epitaxial growth sites on the first face.
Gold is the normal catalyst particle for defining growth of elongated nanostructures, but many materials can be used, in particular metals such as silver and gallium. During evaporation and deposition of catalyst particles a thin film is created on the receiving surface. The area of the thin film is determined by the shadow mask, in particular the size of a corresponding aperture in the shadow mask and in part also the angle of evaporation. The thickness of the thin film is at least partly determined by the duration of the evaporation and deposition of catalyst particles. When the substrate is heated, e.g. during the VLS process, the thin film melts and forms into a droplet, such as a substantial spherical droplet. I.e. during evaporation and deposition of catalyst particles, a number of catalyst particles is deposited at each growth site to form the thin film which after heating is formed to a droplet; a droplet which can be associated with a single catalyst particle even though it is formed from several catalyst particles during deposition. The volume of the droplet / particle is determined by the thickness and the area of the thin film. The radius of the droplet is typically in the range of 10 nm to 300 nm.
In addition to the blocking layer, the shadow mask may comprise a distancing layer. The distancing layer may be used in order to vertically raise the blocking layer from the substantially planar substrate. Therefore, the thickness of the distancing layer is sufficiently large, such that the first face is exposed and that an epitaxial growth site on the first face can be defined by deposition of catalyst particles at an angle through an aperture in the blocking layer. The distancing layer may be provided in the form of an undercut resist layer, such as a typical release layer.
These methods may further be combined with manufacturing of a structure that is vertically raised from the substrate surface and comprise a face for epitaxial growth.
The structure may be formed by epitaxial growth of an area, such as in selective area growth, epitaxial growth of a vertical elongated nanostructure, such as by VLS and/or by a top-down approach, such as selective etching. The face of the formed structure may form an angle to the substantially planar substrate, such as at least 60°. An epitaxial growth site may thereafter be defined on a face of the formed structure using the methods disclosed herein. The size of the catalyst particle at the growth site defines the cross-sectional area of the corresponding nanostructure growing at the growth site under the catalyst particle / droplet.
These approaches may further be repeated, for the generation of one or more secondary epitaxial growth sites. The secondary, or any further, epitaxial growth site(s) may be defined at a different location compared to the first epitaxial growth site(s), such as on a secondary face of the first structure and/or a secondary face, such as on a secondary structure. The formation of multiple epitaxial growth sites, may be used for the manufacturing of predefined arrays of elongated nanostructures, e.g. planar arrays.
The faces and the epitaxial growth sites may be defined such that growth of an elongated nanostructures from an epitaxial growth site leads to the formation of a connection, such as an electrical connection to a secondary surface or to a secondary elongated nanostructure epitaxially grown from a secondary epitaxial growth site.
The secondary growth site, may further be positioned on a secondary face, wherein the secondary surface may be a surface of a secondary structure. The secondary face may form a face angle with respect to the first face, of for example 90°, or for example 180°. The epitaxial growth site, may be defined on the first face such that it is positioned opposite of the secondary face. An elongated nanostructure growing from a epitaxial growth site, positioned in such a way, may, upon growth, form a connection, for example an electrical connection, to the secondary surface. During deposition of material on the nanostructure, e.g. by means of a directional beam flux, for example from a deposition source, the location of the deposition source and/or the orientation of the beam flux, and/or the location and form of the platform(s) and the nanostructure, a platform can form a shadow mask on the nanostructure, such that material from the deposition source is not deposited on one or more selected surface areas on the nanostructure defined by the resulting shadow mask from the platform.
Junctions made using nanowires as both the nanostructure growth object and the shadow structure have been disclosed in WO 2017/153388 and in Gazibegovic Nature, 548, 434 (2017). One purpose of the present disclosure is to improve the control of this patterned growth. Another purpose is to reduce the need for post-processing of nanoscale devices.
Prior to the step of selective etching at least part of the predefined pattern and/or at least a part of the substrate surface can be masked in resist, e.g. in a predefined resist pattern. Thereby areas with and without under-etching can be more precisely defined, such for example a tilted facet can be formed next to a suspended bridge.
Furthermore, the predefined pattern may comprise a layout for at least one source and/or at least one drain and/or at least one electrostatic gate- electrode for at least one nanoscale device. Hence, at least one electrically conducting layer can be deposited on top of the platform in order to define one or more sources and/or drains and/or gates for use in nanoscale electrical devices. The vertical displacement of the platform from the substrate surface and the etching profile can ensure that the electrically conducting layer on the platform can be electrically isolated. The platform can therefore realize an isolated metal wire or region which can be utilized as e.g. wires and connections in device architectures. The raised platform which can be covered in any type of material (dielectric, normal metal, superconductor, etc.) and still be isolated allows access to for example source, drain, and gate electrodes from the outside world without the need for post-growth processing
Diffusive growth relies on diffusion of growth material elements on the surface; i.e. , there does not need to be a direct line of sight from between the growth source and the place where the crystal will grow below the shadow structure. Conversely, non-diffusive deposition typically takes place at low temperature (< 100°C), where diffusion is negligible such that a vertically raised platform will function as a shadow structure during non-diffusive deposition. Semiconductors are typically grown by diffusive growth whereas superconductors are typically deposited by means of non-diffusive deposition. I.e. a semiconductor layer can be defined below a shadow structure whereas a superconductor layer will be defined by the raised platform that forms a shadow for the deposition of the superconductor on the semiconductor.
At least a part of the presently disclosed methods are performed under vacuum, preferably ultra-high vacuum, for example in one or more vacuum chambers. A major advantage of the presently disclosed approach is that the steps of growing at least one nanostructure and depositing the blocking layer - and optionally the support layer - can be performed without breaking the vacuum.
The presently disclosed approach, at least one embodiment thereof, can be said to be provided by means of a specially designed terraced growth substrate combined with positioned gold catalyst particles, a “kinked” nanowire growth sequence, and in situ angle-deposition of metal contacts. The nanowire growth and metal deposition is the last process steps; i.e. thereafter the device, e.g. a logical element, chip or processor, is finished. A route is therefore presented herein for growing hybrid nanostructures concurrent with actual device layouts without the drawbacks mentioned above - and the presently disclosed approach is furthermore applicable to substantially any type of crystal growth compatible material.
The devices that can be manufactured according to the presently disclosed approach are relevant for any use of nanowires in electrical devices, including superconductor hybrid structures for topological information processing, superconducting technologies, but also applications in sensor technologies and conventional electronics are relevant.
The nanostructure may be provided in a semiconducting material, e.g. a semiconducting material selected from the group of lll-V combinations, such as InAs, InP, InSb, GaAs, GaSb, AlSb and InGaAs, or group IV elements such as Si or Ge, or II- VI combinations such as ZnO, ZnSe and CdSe, or l-VII combinations. The deposited first and/or support layer may naturally be a metal but may be many types of materials. Further, the deposited layer(s) may be provided in a material with superconducting properties below a critical temperature Tc. A preferred crystalline semiconductor nanostructure may be InAs, in particular because InAs nanostructures allow for high quality field effect Josephson junctions due to the highly transparent Schottky barrier- free SN interface.
The nanostructure may be crystalline, i.e. it is a single crystal or it is composed of several crystals, e.g. large single crystal elements, forming a crystalline structure. In some embodiments the elongated crystalline nanostructure may be seen as a substantially one-dimensional crystalline structure. It has been demonstrated in InAs with an Al facet layer with Wurtzite(WZ)/FCC or Zinc Blende(ZB)/FCC crystal orientations, which can form uniform crystal morphologies and highly ordered and well defined epitaxial SE/M interfaces between the semiconductor (SE, e.g. InAs) and the metal (M, e.g. Al). However, the epitaxial match can be realized with other material combinations with similar structures and lattice spacings. For relevant FCC metals this could for example be Au and Ag, and for semiconductors this is for example the other members of the ‘6.1 A family’: GaSb and AlSb. Hence, high quality epitaxial growth of contacts to crystalline nanostructures can therefore be realized with many material combinations.
In a further process step substantially the entirety of the at least one nanostructure can be covered with at least one final layer, a final layer such as an oxide coating, i.e. a suitable dielectric. Such a final covering of the whole (or part of) structure can be seen as a coating provided for passivating and/or protecting the whole device. Normally post-processing would be needed to finalize the device, but in the approach disclosed herein the nanostructure can be grown and additional layers can be provided in a predefined pattern, i.e. post-processing can be avoided. It is then a major advantage to be able to protect the device, e.g. thereby passivating a semiconductor nanostructure in a suitable dielectric.
The growth of the nanostructures and the patterned deposition of one or more layers can be provided in a vacuum chamber, and the first and/or second deposition source can be a vapor deposition source (e-gun evaporation, thermal evaporation, laser- ablation, sputtering, Knudsen cell, etc). The vacuum chamber and the deposition source(s) can then be configured to provide a directional beam flux from the deposition source(s) during deposition.
A crystal growth compatible material is a material that can be deposited on substrate suitable for crystal growth and which is compatible for subsequent use in a crystal growth process, e.g. a vacuum or ultra-high vacuum (UHV) process, such as MBE. Several oxide materials can be used as crystal growth compatible material, commonly used examples are silicon oxide, aluminium oxide, hafnium oxide and silicon nitride.
The herein disclosed preprocessing of a growth substrate to create platforms / nanoscale layouts thereon can also include a step of defining a nanostructure pattern for defining a growth pattern for one or more planar crystalline nanostructures and/or for one or more crystalline nanostructures that can be provided by bottom-up growth, where the growth position of the nanostructure is defined by a catalyst particle deposited on a growth surface, the bottom-up growth thereby typically leading to substantial one-dimensional structures, such as nanowires.
Epitaxial match in the interface between two crystalline layers may not be entirely unusual if the crystal structures of the two crystalline layers are equal. However, it has been demonstrated that an epitaxial interface can be realised even when the crystal structure (and/or crystal phase) of the crystalline nanostructure is different from the crystal structure (and/or crystal phase) of the deposited layer, such as when the crystal structure (and/or crystal phase) of the elongated crystalline nanostructure and the crystal structure (and/or crystal phase) of the deposited layer(s) belong to different lattice systems and/or if the Bravais lattice of the elongated crystalline nanostructure is different from the Bravais lattice of the deposited layer(s). If for example the crystal structure of the elongated crystalline nanostructure is zincblende (ZB) then the crystal structure of the deposited layer(s) is not zincblende, i.e. the crystal structures are different. Correspondingly if for example the crystal structure of the elongated crystalline nanostructure is wurtzite then the crystal structure of the deposited layer(s) is not wurtzite, i.e. the crystal structures are different. E.g. the crystal structure of the elongated crystalline nanostructure may be zincblende (ZB) or wurtzite (WZ) and the crystal structure of the facet layer belongs to the cubic crystal system, such as primitive cubic, BCC or FCC, as demonstrated previously with InAs nanowires (ZB or WZ) with an Al (FCC) epitaxially matched deposited layer(s).
The elongated crystalline nanostructure may be homogeneous, i.e. formed from the same compound material in the longitudinal / axial direction and/or in the radial direction. However, the elongated crystalline nanostructure may in itself be a heterogeneous structure, e.g. a heterostructured nanowire crystal. E.g. the crystalline nanostructure may be a heterostructured nanowire crystal composed of different compounds in the axial and/or radial direction.
As previously stated it is unusual that an epitaxial interface is provided between layers having different crystal structures and this opens for epitaxial interfaces between semiconductors (which are often wurtzite or zincblende) and metals (which are often BCC or FCC). In one embodiment the deposited layer(s) is hence a metal selected from the group of Al, Ca, Ni, Cu, Kr, Sr, Rh, Pd, Ag, Ce, Yb, Ir, Pt, Au, Pb, Ac, Th, Li, Na, K, V, Cr, Fe, Rb, Nb, Mo, Cs, Ba, Eu, Ta and W. Some of these metals become superconducting below a critical temperature. However, deposited layers of other materials may as well be provided where an epitaxial interface to the nanostructure can be realised, e.g. selected from the group of high temperature ceramic superconductors, such as copper oxide or cuprate superconductors, which often have a perovskite crystal structure. Other possible superconductors are superconducting alloys such as NbN, NbTiN, NiGe, NbSn, and MgB2.
The cross-section of a nanowire may e.g. be square, hexagonal, or octagonal providing a total of four, six or eight side facets, respectively. Consequently, a deposited (facet) layer may be covering at least a part of 1, 2, 3, 4, 5, 6, 7, 8 or more of the side facets.
The thickness of the deposited layer(s) may be less than 300 nm, or less than 250 nm, or less than 200 nm, or less than 150 nm, or less than 100 nm, or less than 90 nm, or less than 80 nm, or less than 70 nm, or less than 60 nm, or less than 50 nm, or less than 45 nm, or less than 40 nm, or less than 35 nm, or less than 30 nm, or less than 25 nm, or less than 20 nm, or less than 19 nm, or less than 18 nm, or less than 17 nm, or less than 16 nm, or less than 15 nm, or less than 14 nm, or less than 13 nm, or less than 12 nm, or less than 11 nm, or less than 10 nm, or less than 9 nm, or less than 8 nm, or less than 7 nm, or less than 6 nm, or less than 5 nm.
At the initial stage of the growth of the deposited layer(s) islands may form at the nanostructure surface. During this growth the temperature of the substrate may play an important role with regard to the spacing between the islands. If the temperature is low enough, the spacing is so small that the islands will merge at a very thin thickness of the deposited layer(s). As discussed further below this may lead to surface driven grain growth. A thickness of the deposited layer(s) below 15 nm may only be obtained if the temperature during growth / deposition of the facet layer is below -20°C, or below - 25°C, or even below -30°C. This is particular the case for Al and possibly Pb. However, for other materials thin layers can be obtained at room temperature.
In the case of bottom-up grown elongated crystalline nanostructure, such as nanowires, the cross-sectional diameter of the nanostructure may be between 10 and 200 nm, such as between 10 and 20 nm, or between 20 and 30 nm, or between 30 and 40 nm, or between 40 and 50 nm, or between 50 and 60 nm, or between 60 and 70 nm, or between 70 and 80 nm, or between 80 and 90 nm, or between 90 and 100 nm, or between 100 and 110 nm, or between 110 and 120 nm, or between 120 and 140 nm, or between 140 and 160 nm, or between 160 and 180 nm, or between 180 and 200 nm.
The length of the nanostructure may be between 1 and 50 mhi, or between 1 and 2 mhi, or between 2 and 3 mhi, or between 3 and 4 mhi, or between 4 and 5 mhi, or between 5 and 6 mhi, or between 6 and 7 mhi, or between 7 and 8 mhi, or between 8 and 9 mhi, or between 9 and 10 mhi, or between 10 and 12 mhi, or between 12 and 14 mhi, or between 14 and 16 mhi, or between 16 and 18 mhi, or between 18 and 20 mhi, or between 20 and 50 mhi. This applies to both planar grown and bottom-up grown nanostructures.
Detailed description of drawings
The invention will in the following be described in greater detail with reference to the accompanying drawings. The drawings are exemplary and are intended to illustrate some of the features of the presently disclosed [invention], and are not to be construed as limiting to the presently disclosed invention.
Figs. 1a-g and figs. 2-3 illustrate examples and the potential of the presently disclosed approach. A planar (horizontal) growth substrate is provided in fig. 1a, for example in the form of a (11-2) InAs substrate. The growth substrate has first been patterned by conventional processing, i.e. in fig. 1b a resist structure has been provided on the surface of the planar substrate. Upon etching in fig. 1c the resist protects a part of the planar substrate surface to leave behind raised crystalline pillars, i.e. such that a structure is formed below the resist, i.e. a structure that is vertically raised from the “new” horizontal surface of the planar substrate. The vertically raised structure comprises side facets in the form of at least one vertical face marked with the [111] arrow, indicating that with the (11-2) substrate, a vertical face will allow for [111] crystal growth. Hence, in this case the side facets are perpendicular to the growth substrate. The side facets should be suitable for nanostructure growth, such as InAs (111), InAs (11-2), GaAs (111), Si (111). Such pillars can also be grown bottom up either by VLS or by Selective-area-growth.
Fig. 1d illustrates an optional oxide deposition step. As seen from fig. 1d the oxide is deposited from a non-vertical angle such that the vertical raised structure shadows the vertical face and part of the substrate surface adjacent to the raised structure. I.e. an oxide covered substrate is obtained with a vertical face which is free from the oxide layer.
Additional resist structures can be formed such that a shadow mask is created as seen in the cross-sectional illustration in fig. 1e, in the cross-sectional perspective illustration in fig. 1f and in the SEM image in fig. 1 g, where a raised shadow layer has been fabricated; e.g. by conventional polymer-based lithographically patternable resist stacks. Please note that the undercut profile illustrated in fig. 1g is a prior art SEM image of a resist profile with narrow linewidth in a top thinner PMMA layer and a large undercut in a thicker LOR bottom layer. The undercut comes from the difference in material in the two layers, i.e. the bottom layer can be selected such that the etching process creates the wanted undercut profile. I.e. undercut profiles are standard in lithographic processing, but has hitherto been used to improve lift-off, i.e. it has not been used for tilted / angled evaporation / deposition as illustrated in fig. 1e and fig. 1f.
Alternative shadow-masks based on growth-compatible materials can also be used. Alternatively the shadow mask could be a movable separate stencil mask in close proximity and appropriately oriented and aligned. As seen in fig. 1 f the shadow mask comprises a plurality of apertures distributed in parallel with the vertical face that extends below the shadow mask. The diameter of each of these apertures is approx. 100 nm. One aperture is seen in cross-section in the top of fig. 1e. The configuration of the shadow mask including apertures, the structure vertically raised from the planar substrate surface including the vertical face and the deposition source and deposition angle ensure that during evaporation and deposition, typically of a metal such as gold, as illustrated in fig. 1e, catalyst particles will be deposited on the oxide free vertical face, thereby defining crystal growth sites for subsequent growth of elongated nanostructures. I.e. metal is evaporated at an angle to deposit a small amount on the desired side facet to act as a catalyst for subsequent nanostructure growth. The key advantage is that with the controlled configuration of the side facet and the growth sites, the growth direction of the nanostructure can be defined precisely, for example along the substrate surface and thereby directly compatible with subsequent device processing, as illustrated in figs. 2-3.
Fig. 2 shows an illustration that corresponds to the shadow structures in figs. 1e-g after resist removal and annealing and shows a crystal growth site (a catalyst particle) on a vertical face.
Fig. 3a shows an elongated nanostructure in the form of a nanowire that has been grown from one of the crystal growth sites defined on the vertical face, as illustrated in figs. 1-2. As seen from fig. 3a the nanowire has been grown in the horizontal direction (111), i.e. perpendicular to the vertical face. The nanowire has been grown very close to, but separated from, the insulating oxide layer on the planar substrate, i.e. in principle it is ready for direct electrical device fabrication as grown from the vertical face.
Fig. 3b shows the nanowire from fig. 3a, where electrical contacts has been created, the electrical contact also functioning as support structures. The contacts can be created ex-situ or in-situ, in the latter case for example by means of a shadow mask.
Figs. 4-6 illustrate the potential of the presently disclosed approach. As seen in fig. 1f the shadow mask contains five apertures resulting in five catalyst particles deposited on the vertical face thereby defining five crystal growth sites on the vertical face. (In reality thousands of crystal growth sites can be defined, but for illustrative purposes only a few are shown here.) In fig. 4 five crystal growth sites have resulted in five nanowire grown perpendicular from the vertical face and thereby parallel to each and the planar substrate surface.
Fig. 5 shows ten nanowires grown from the vertical face, the ten nanowires forming two parallel layers with five nanowires in each layer, the layers of nanowires also being parallel to the planar substrate.
Fig. 6 shows five nanowires grown from a first vertical face, as in fig. 4, but with an additional nearby second vertical face located in a 90 degree angle to the first vertical face. A single sixth nanowire has been grown from the second vertical face, the sixth nanowire also grown parallel to the planar substrate surface but perpendicular to the growth direction of the five other nanowires; the sixth nanowires thereby spanning all the other five nanowire such that contacts can be easily established. The crystal growth site on the second vertical face can off course also be defined by means of an appropriate shadow mask.
The growth conditions of the presently disclosed approach are similar to the normal conditions for VLS growth. The position of the catalyst, i.e. the growth site, is defined by the design of the shadow mask, the defining angle(s), typically two angles, of evaporation (for example rotation and tilt of substrate). The same shadow mask can also be used for defining multiple growth sites by multiple evaporations, and nanowires can be grown from different heights and different directions given suitable facets are defined, as exemplified in figs. 4-6. Successive use of the growth site definition technique interleaved by nanostructure growth also allows to define growth of nanostructures on other nanostructures as a way to form networks, cf. fig. 10.
Figs. 7-8 corresponds substantially to a process illustrated in fig. 3b of pending application WO 2020/008076, where a nanowire was grown under a suspended part of a platform. A notable difference is that in WO 2020/008076 the nanowire was kinked from the vertical growth direction to a horizontal growth direction in order to be able to grow under the suspended part of the platform. In fig. 7 a cross-sectional view shows a suspended platform defining a shadow mask. A gold catalyst particle has been deposited on the lower planar substrate surface and in fig. 8 a vertical nanowire has been grown from the growth site defined by the catalyst particle.
Fig. 9 shows that a new catalyst particle can be deposited on a side facet of the vertical nanowire by means of the shadow mask of the suspended platform by angled deposition of gold.
Fig. 10 shows that the catalyst particle deposited on the side facet of the vertical nanowire defines a growth site for a new nanowire growing horizontally from the vertical nanowire. This new horizontal nanowire can then grow under the suspended platform in a controlled manner and subsequently merge with the support structure for the suspended platform. Fig. 11 shows a micrograph of a vertical elongated nanostructure with epitaxial growth sites defined on a side facet, i.e. a realization of the illustration in fig. 9.
Fig. 12 is a close-up view of the epitaxial growth site in fig. 11.
Fig. 13 shows four perspective SEM images of grooves etched by HCI:H3P04 (5:1) with photoresist masks aligned / misaligned with respect to the [110] orientation of a (001) InP substrate by 0, 1, 2 and 3 degrees. The scale bars correspond to 111 pm.
The SEM images originate from Wang et al. , “Wet Chemical Etching for V-grooves into InP Substrates”, Journal of the Electrochemical Society 145, 2931-2937 (1998) to demonstrate that grooves can be created in planar substrates with photoresist masks with very high precision.
As illustrated in fig. 14 the presently disclosed approach allows for integration of as- grown nanowires with silicon using e.g. Silicon-on-insulator commercial substrates. Fig. 14a illustrates a planar substrate where an insulating oxide layer is located beneath a silicon layer on top of a commercially available SOI substrates. With standard processing a raised structure can be created having a side facet with a [111] crystal orientation growth surface, as illustrated in fig. 14b. A shadow mask can provide for definition of a growth site as illustrated in fig. 14c and a nanowire can be grown from said growth site as illustrated in fig. 14d, which almost corresponds to figs. 2-3 with the notable difference that in fig. 14d the insulating layer is located below the raised structure such that nanowires grown from separate structures (as in fig. 6) are electrically isolated from each, whereas all nanowires in figs. 4-6 are electrically connected to each other in one end via the InAs substrate.
Figs. 14e-h show two examples of a nanowires growing horizontally between two separate raised structures resting on top of an insulating layer. In fig. 14e two raised structures have been created facing each other. A growth site has been defined on one side facet and a nanowire can grow horizontally from the growth site towards the other raised structure and merge with a side facet. As the two raised structures are located on an insulating layer, the nanowire is the only connection between the two structures.
A similar solution is illustrated in figs. 14g-h where growth sites have been defined on both opposing raised structures such that one nanowire is growing from each side facet and merge together in the middle. The structures illustrated in fig. 14 have the benefit of the nanowires not being electrically connected to each-other by the substrate, and the growth sites may be used as the actual contact region. The pre-growth defined electronic functionality of the substrate (gates, sensors, etc.) can also be integrated "under" the nanowire. This is exemplified in figs. 14i-j where conducting gates are buried / integrated in the insulting layer below the nanowire, thereby making the nanowire-growth the last step in wafer- scale device fabrication. This capability distinguishes the presently disclosed approach from most other planar approaches.
Fig. 15 shows top view SEM images of grooves etched
Figure imgf000023_0001
(10:5:3) with photoresist masks in an InAs (111 )B substrate. Rectangular masks were rotated 360 degrees in steps of 15 degrees. The anisotropic etchant can be used to expose different crystal planes by controlling the mask rotation with respect to the substrate thereby showing that exposing the desired crystal plane orientation for subsequent nanostructure growth can be controlled to a high precision.
Fig. 16 show a side view SEM image of a first structure created by etching the surface of a growth substrate, the structure having a substantially vertical face suitable for deposition of catalyst particles. Fig. 16 is an exemplary realisation of fig. 1c, i.e. a growth substrate has first been patterned by conventional processing with a resist structure. Upon etching the resist protects a part of the planar substrate surface to leave behind a raised crystalline structure, such that a first structure is formed below the resist. As seen from fig. 16 the structure is vertically raised from the “new” horizontal surface of the planar substrate. The vertically raised structure comprises a side facet in the form of the vertical face that will allow for deposition of catalyst particle and subsequent nanostructure crystal growth therefrom.
Fig. 17 shows a top view SEM image of Au catalysts deposited on the edge of an etched trench according to the presently disclosed approach. Fig. 16 is an exemplary realisation of the principle illustrated in fig. 1 and in particular in fig. 2, however without the step of oxide deposition (fig. 1d). One of the Au catalysts in fig. 17 are encircled by a white circle, but five Au catalysts are visible in fig. 17, equidistantly aligned on the edge of the etched trench. Fig. 18 shows a top view / side view SEM image of a planar nanowire grown from Au catalysts deposited on the edge of an etched trench, similar to the illustration in fig. 17. Fig. 18 is not perfectly clear, but the white arrow in the bottom labelled “Nanowire” points to a nanowire that has been grown controllably along the 111 B direction of the substrate, i.e. grown substantially parallel to the substrate surface, i.e. a planar nanostructure grown in accordance with the presently disclosed approach. The additional (and larger) growth elements in fig. 18 are due to the absence of oxide deposition. If a step of oxide deposition is introduced prior to nanowire deposition, these additional growth object can be avoided and only controllable grown nanowires remains.
Figs. 19a shows a standard substrate, e.g. an InAs 111 substrate or similar, and a catalyst gold particle defining a growth position on the substrate. Fig. 19b shows the standard growth of an elongated crystalline nanostructure (by means of VLS) on the form of an InAs nanowire extending vertically from the horizontal substrate surface. Growth of the nanowire can be provided in a suitable growth reactor. Auxiliary nanowires may be grown adjacent the shown nanowire and can for example be used for shadow-patterning the final structure, as exemplified in fig. 23. A top view of the hexagonal nanowire is also shown in fig. 19b, i.e. the nanowire has six plane side facets.
After removal from the growth reactor two layers of spin resists have been provided in fig. 19c, a bottom thick resist layer of some suitable copolymer and a thinner top resist layer, e.g. in the form of PMMA, the selection of materials ensuring that an undercut profile can be created in the bottom layer as seen in fig. 19d. The resist layers cover the nanowire(s) on the substrate. Similar to fig. 1e a shadow mask with a blocking layer and an aperture can be formed and upon etching the bottom copolymer resist layer creates an undercut profile as seen in fig. 19d, where L defines the distance from the aperture in the blocking layer to the vertical facet of the nanowire and H defines the distance from the substrate surface to the underside of the blocking layer. Metal deposition by angled / tilted evaporation is illustrated in fig. 19e where a gold particles is deposited at a side facet of the nanowire at the height h, at least partly determined by the evaporation incident angle v.
Generally speaking relative to the present disclosure the distance L, indicated on fig. 19c, is on the order of 0.1 pm to 10 pm, more typically 0.2 pm to 5 pm, whereas the distance H, as indicated on fig. 19c, is on the order of 0.1 pm to 6 pm, more typically 0.2 pm to 3 pm. Hence, the distances H and L, the thickness of the blocking layer and the angle of evaporation of the catalyst particles determines the location of the catalyst particles of the first face, and thereby the growth positions for crystal growth can be determined very precisely even on vertical faces.
In fig. 19f the resist layers have been removed and one is left with a vertical nanostructure with a catalyst particle on a side facet, as also seen in the inset top view on fig. 19f. Fig. 19f also shows a SEM micrograph of such a shadow defined metal island in the form a gold catalyst particle. This structure can be inserted in a suitable growth reactor again and a planar nanostructure can be grown from the catalyst particle on the side facet, such that a planar nanowire is branched of a vertical nanowire at a predefined and precisely controllable height and a predefined and precisely controllable growth direction, as illustrated in fig. 19g. A gold catalyst particle is still present on top of the vertical nanowire such that the vertical crystal growth of the vertical nanowire can also be continued.
Figs. 20a-b illustrate application of the presently disclosed approach in controlling the kink height and merging neighbouring stems (e.g. vertical nanowires) with controllable planar nanowires. Fig. 20a is similar to fig. 19e where three of such setups are arranged side by side. As seen from fig. 20a the shadow mask of the middle figure has a configuration such that the catalyst particle is deposited at a larger height relative to the substrate. The subsequent growth of three planar nanowires illustrated in fig. 20b result in planar nanowires at different heights. As seen in fig. 20b the left planar nanowire does not merge to the right, i.e. not contact, with the middle stem, whereas the middle planar nanowire has been grown to merge and contact the right stem.
Figs. 21a-b illustrate application of the presently disclosed approach for creating multiple planar nanowires at different heights from the same vertical nanowire. Similar to the setup in fig. 19e, a shadow mask with two apertures is provided such that upon titled evaporation catalyst particles are deposited at the vertical nanowire at different heights, as seen in fig. 21a. Upon growth in a suitable growth reactor, two parallel planar nanowires are grown from the same vertical stem at different heights, as illustrated in fig. 21b. Fig. 22 illustrates application of the presently disclosed approach for creating nanowire networks connected at different heights. Combining the approaches illustrated in figs. 19-21 a network of nanowires can be created that are controllably connected at different heights. In the left bottom corner two planar nanowires are crossing each other at different height, i.e. they extend in different planes. In the middle bottom a vertical stem is connected to a short planar nanowire extending in the upper plane and a longer planar nanowire extending in the bottom, whereby this vertical stem functions as a via connecting the two planes, i.e. connecting the different planes of nanowires.
To the right (bottom) in fig. 22 a planar nanowire has merged with another planar nanowire, because they extend in the same plane.
Figs. 23a-c illustrate that the presently disclosed approach can be used for creating shadow masks for deposition of for example superconducting material on a side facet of a nanowire. Fig. 23a-c show side views to the left and top views to the right. In fig. 23a three vertical nanostructures have been grown from a horizontal substrate, similar to fig. 19a. Two of the vertical structures have smaller diameter but larger height than the third. Upon resist spinning, shadow mask, tilted evaporation and planar crystal growth, as explained above, a planar nanowire has been grown from the thickest vertical structure, as illustrated in fig. 23b. Metal deposition, e.g. superconductor deposition, can then be provided from the side such that the two thin vertical structures function as shadow masks during metal deposition, whereby a superconducting island located between two Josephson junctions (JJ), can be created on a side facet of the planar nanowire. Using nanowires as shadow masks during deposition has previously been demonstrated, but with the presently disclosed approach this can be provided with very high precision and in a scalable manufacturing process.
Items
1. A method for defining at least one epitaxial growth site on a growth substrate; the method comprising the steps of; a) providing a substantially planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle of at least 60° to the planar substrate; b) providing a first shadow mask comprising at least one blocking layer accommodating at least one aperture for passage of catalyst particles through the blocking layer; wherein the first shadow mask preferably is vertically raised from the substrate for distancing the blocking layer from the substrate; and c) depositing catalyst particles, such as by evaporation, such as by tilted evaporation, at an incident angle with respect to the planar substrate, the incident angle chosen such that a catalyst particle deposited through an aperture of the blocking layer defines an epitaxial growth site on the first face.
2. The method according to any of the previous items, wherein the face angle is at least 70°, or more preferably at least 80°, or at least 85°, or more preferably substantially 90°, most preferably 90°.
2. The method according to any of the previous items, wherein the aperture(s) is distanced from the substrate surface and/or the first face.
3. The method according to any of the previous items, wherein the blocking layer is, at least partly, positioned on top of a support layer, for distancing the blocking layer from the substrate. 4. The method according to any of the previous items, wherein the blocking layer comprises multiple apertures, preferably positioned according to a predefined pattern, for generating multiple epitaxial growth sites during deposition of the catalyst particles. 5. The method according to any of the previous items, additionally comprising manufacturing, before a), at least one structure vertically raised from the substrate surface comprising a face for epitaxial growth, such as the first structure(s) with a first face(s), such as by a bottom-up approach (for example VLS growth, selective area growth) and/or a top-down approach (for example selective etching).
6. The method according to item 5, wherein the structure(s) vertically raised from the substrate is manufactured by clean room processing, such as by lithography, etching and/or epitaxy, such as selective area epitaxy.
7. The method according to any of items 5-6, wherein the structure(s) vertically raised from the substrate is manufactured by: • providing the substantially planar substrate for epitaxial crystal growth;
• depositing one or more layers of a masking material, in a predefined pattern on the surface of the substrate to create a predefined etch pattern of said masking material; and
• selectively etching the substrate surface around said etch pattern to provide at least one structure which is vertically raised from the etched substrate surface. and/or
• depositing at least one additional catalyst particle on a planar face, of the substantially planar substrate, for epitaxial growth of elongated nanostructures;
• growing at least one vertical elongated nanostructure, such as by diffusive growth, such as by the vapour-liquid-solid method. and/or
• depositing an amorphous dielectric mask;
• opening a seed window on an oxidized silicon substrate; and
• epitaxially growing in the seed windows exposed regions. The method according to any of the previous items, wherein said at least one first structure is a crystalline structure provided by bottom-up approach, such as VLS growth or selective area growth. The method according to any of the previous items, wherein said at least one first structure is at least one elongated crystalline nanostructure, such as a nanowire. The method according to any of the previous items, wherein said at least one first structure is at least one elongated crystalline nanostructure, such as a nanowire, comprising a plurality of plane side facets, such as four, six or eight side facets, and wherein said first face is provided on one of said side facets. The method according to any of the previous items, wherein said at least one first structure is at least one elongated crystalline nanostructure, wherein said first face is provided on at least a part of said at least one nanostructure extending vertically from the planar substrate. 12. The method according to any of the previous items, the method further comprising coating the substrate with an oxide prior to step b).
13. The method according to item 12, wherein the oxide is deposited onto at least a part of the substrate, wherein the oxide deposition angle is selected such that the first face of the first structure(s) is not covered by the oxide, while a substantial part of the adjacent surfaces are covered by the oxide.
14. The method according to item 13, wherein the oxide deposition angle and the catalyst particle deposition angle are substantially supplementary angles, with respect to the planar substrate.
15. The method according to any of the previous items, wherein the epitaxial growth site(s) is suitable for epitaxial growth of an elongated nanostructure(s) by diffusive growth, such as by the vapour-liquid-solid method.
16. The method according to any of the previous items, wherein the first face has a configuration for growth of elongated nanostructures, such as a combination of material and crystal orientation, for example selected from the list including InAs (111), InAs (11-2), GaAs (111) and Si (111).
17. The method according to any of the previous items, wherein the blocking layer has a thickness of between 10 nm and 10 pm.
18. The method according to any of the previous items, wherein the support layer has a thickness of between 10 nm and 10 pm, more preferably between of 0.1 pm and 6 pm, most preferably between 0.2 pm and 3 pm.
19. The method according to any of the previous items, wherein the thickness of the first shadow mask is between 10 nm and 20 pm.
20. The method according to any of the previous items, wherein the area of each aperture is between 1018 and 106 m2.
21. The method according to any of the previous items, wherein the aperture(s) have a substantially rounded shape. 22. The method according to any of the previous items, wherein the combined area of the apertures are between 0-10% of the area of the planar projection of the substrate.
23. The method according to any of the previous items, wherein the blocking layer comprises or consists of a resist for lithographic patterning, such as photolithography, electron-beam lithography, nano imprint lithography and/or x-ray lithography.
24. The method according to any of the previous items, wherein the blocking layer is configured such that it is impermeable to the catalyst particle(s), such that it blocks the catalyst particle(s) from reaching the substrate.
25. The method according to any of the previous items, wherein the support layer comprises or consists of a material for isotropic etching, such as a lift-off resist.
26. The method according to any of the previous items, wherein the thickness of the support layer is larger than the height of the first face.
27. The method according to any of the previous items, wherein step b) comprises manufacturing, at least partly, the first shadow mask.
28. The method according to item 27, wherein step b) comprises
• depositing the blocking layer, such as by spin coating.
29. The method according to item 27, wherein step b) comprises
• depositing the support layer, such as by spin coating; and
• depositing the blocking layer, such as by spin coating.
30. The method according to any of items 27-29, wherein step b) comprises patterning the blocking layer by clean room processing, such as by photolithography or by e- beam lithography The method according to any of items 27-30, wherein step b) comprises isotropic etching of the support layer. The method according to any of items 27-31, wherein the support layer is etched, preferably through the aperture(s) or through additional openings in the blocking layer, such that the first face is, at least partly, exposed. The method according to any of the previous items, wherein the catalyst particle(s) is a metal particle, such as gold. The method according to any of the previous items, wherein the catalyst particle(s) is substantially spherical, such as with a diameter of 10-1000 nm. The method according to any of the previous items, wherein step c) is repeated at least once to create at least one secondary epitaxial growth site. The method according to item 35, wherein the catalyst particle(s) is at least partly removed before repeating step c), such as with a second shadow mask, by reconfiguring the first shadow mask and/or depositing at a second angle. The method according to any of items 35-36, wherein step c) is repeated by:
• depositing at a different angle; and/or
• depositing after modifying the configuration of the first shadow mask, such as by repositioning, tilting, addition and/or removal of apertures and/or rotating; and/or
• depositing after replacing the first shadow mask with a second shadow mask. The method according to any of items 35-37, wherein the secondary epitaxial growth site(s) is positioned on:
• the first face; and/or
• a second face, the second face forming a second face angle, of at least 60°, to the planar substrate; and/or
• a planar face. 39. The method according to item 38, wherein the secondary face(s) is on the first structure.
40. The method according to item 38, wherein the secondary face(s) is on a secondary structure, different from the first structure, the secondary structure, vertically raised from the substrate.
41. The method according to any of items 39-40, wherein the secondary face(s) is parallel to and facing the first face.
42. A method for manufacturing an elongated nanostructure according to any of the previous items, the method further comprising epitaxially growing, from the epitaxial growth site, preferably by means of bottom-up growth, at least one elongated nanostructure.
43. The method according to item 42, the method further comprises manufacturing at least one support structure for the elongated nanostructure(s), preferably positioned with an even spacing along the length(s) of the elongated nanostructure(s), for providing structural rigidity to the elongated nanostructure(s).
44. An elongated nanostructure manufactured according to any of items 42-43.
45. A method of manufacturing a nanoscale device according to any of the previous items, the method further comprising forming at least one electrical connection between the elongated nanowire(s) and at least one connector.
46. The method according to item 45, wherein the connector is a conductive structure of the substrate.
47. The method according to any of items 45-46, wherein the connector(s) is at least one other elongated nanostructure, at least one vertical elongated nanostructure, raised structure(s) of the substrate, such as the first structure and/or the second structure, and/or additional vertically raised structure(s) of the substrate.
48. The method according to any items 45-47, wherein the electrical connection(s) are formed by epitaxially growing the elongated nanostructure(s) into the connector(s). 49. The method according to any of items 45-48, wherein the connector is grown epitaxially to form an electrical connection to the elongated nanostructure. 50. The method according to any of items 45-49, the method further comprising growing elongated nanostructures at multiple height levels.
51. The method according to any of items 45-50, wherein the substantially planar substrate is a silicon-on-insulator substrate.
52. The method according to any of items 45-51, wherein elongated nanostructures are grown towards each other such that they form an electrical contact.
53. The method according to any of items 45-52, wherein the elongated nanostructure is grown above a conducting layer, for gating the current through the elongated nanostructures.
54. The method according to any items 45-53, wherein elongated nanostructures, grown from the same face of the substrate, are electrically connected, such as by manufacturing and/or providing the face in a conductive material.
55. The method according to any of items 45-54, wherein elongated nanostructures that are grown from the same structure of the substrate are electrically connected, such as by manufacturing and/or providing the structure in a conductive material.
56. The method according to any of items 45-55, comprising growing elongated nanostructures such that electrical connections between vertical and/or elongated nanostructures at multiple heights are formed.
57. A nanoscale device, manufactured according to any of items 45-56.

Claims

Claims
1. A method for defining at least one epitaxial growth site on a growth substrate; the method comprising the steps of; a) providing a substantially planar substrate comprising at least one first structure with at least one first face for epitaxial growth, the first face forming a face angle of at least 60° to the planar substrate; b) providing a first shadow mask comprising at least one blocking layer accommodating at least one aperture for passage of catalyst particles through the blocking layer, wherein the first shadow mask is vertically raised from the substrate for distancing the blocking layer from the substrate and the first face; and c) depositing catalyst particles, by tilted evaporation, at an incident angle with respect to the planar substrate, the incident angle is chosen such that a catalyst particle deposited through an aperture of the blocking layer defines at least one epitaxial growth site on the first face.
2. The method according to any of the previous claims, wherein the face angle is at least 80°, or at least 85°, or more preferably substantially 90°, most preferably 90°.
3. The method according to any of the previous claims, wherein the aperture(s) is distanced from the substrate surface and/or the first face.
4. The method according to any of the previous claims, wherein the blocking layer is at least partly positioned on top of a support layer, for distancing the blocking layer from the substrate.
5. The method according to any of the previous claims, wherein the blocking layer comprises multiple apertures positioned according to a predefined pattern for generating multiple epitaxial growth sites during deposition of the catalyst particles.
6. The method according to any of the previous claims, comprising the step of manufacturing, before a), at least one structure vertically raised from the substrate surface comprising the first face for epitaxial growth.
7. The method according to any of the previous claims, wherein said at least one first structure is a crystalline structure provided by bottom-up approach, such as VLS growth or selective area growth.
8. The method according to any of the previous claims, wherein said at least one first structure is at least one elongated crystalline nanostructure, such as a nanowire.
9. The method according to any of the previous claims, wherein said at least one first structure is at least one elongated crystalline nanostructure, such as a nanowire, comprising a plurality of plane side facets, such as four, six or eight side facets, and wherein said first face is provided on one of said side facets.
10. The method according to any of the previous claims, wherein said at least one first structure is at least one elongated crystalline nanostructure, wherein said first face is provided on at least a part of said at least one nanostructure extending vertically from the planar substrate.
11. The method according to any of the previous claims, the method further comprising coating the substrate with oxide prior to step b), wherein the oxide is deposited onto at least a part of the substrate, wherein the oxide deposition angle is selected such that the first face of the first structure(s) is not covered by the oxide, while a substantial part of the adjacent surfaces are covered by the oxide.
12. The method according to any of the previous claims, wherein the blocking layer comprises or consists of a resist for lithographic patterning, such as photolithography, electron-beam lithography, nano imprint lithography and/or x-ray lithography.
13. The method according to any of the previous claims, wherein the blocking layer is configured such that it is impermeable to the catalyst particle(s), such that it blocks the catalyst particle(s) from reaching the substrate.
14. The method according to any of the previous claims, wherein the support layer comprises or consists of a material for isotropic etching, such as a lift-off resist.
15. The method according to any of the previous claims, wherein the epitaxial growth site(s) is suitable for epitaxial growth of an elongated nanostructure(s) by diffusive growth, such as by the vapour-liquid-solid method.
16. The method according to any of the previous claims, wherein step c) is repeated at least once to create at least one secondary epitaxial growth site.
17. The method according to claim 16, wherein step c) is repeated by:
• depositing at a different angle; and/or
• depositing after modifying the configuration of the first shadow mask, such as by repositioning, tilting, addition and/or removal of apertures and/or rotating; and/or
• depositing after replacing the first shadow mask with a second shadow mask.
18. The method according to any of claims 16-17, wherein the secondary epitaxial growth site(s) is positioned on:
• the first face; and/or
• a second face, the second face forming a second face angle, of at least 60°, to the planar substrate; and/or
• a planar face.
19. The method according to claim 18, wherein the secondary face(s) is on the first structure.
20. The method according to claim 18, wherein the secondary face(s) is on a secondary structure, different from the first structure, the secondary structure, vertically raised from the substrate.
21. A method for manufacturing at least one elongated nanostructure comprising the steps of:
• providing a growth substrate with at least one epitaxial growth site according to any of the preceding claims, and
• epitaxially growing, from the epitaxial growth site(s), by means of bottom-up growth, such as vapour-liquid-solid (VLS) growth, at least one elongated nanostructure.
22. The method according to claim 21 , the method further comprises the step of manufacturing at least one support structure for the elongated nanostructure(s), positioned with an even spacing along the length(s) of the elongated nanostructure(s), for providing structural rigidity to the elongated nanostructure(s).
23. The method according to any of claims 21-22, the method further comprising growing elongated nanostructures at multiple height levels from growth sites located at multiple height levels relative to the planar substrate.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090059982A1 (en) * 2006-04-28 2009-03-05 Kamins Theodore I Nanowire devices and systems, light-emitting nanowires, and methods of precisely positioning nanoparticles
US20090308844A1 (en) * 2006-03-23 2009-12-17 International Business Machines Corporation Monolithic high aspect ratio nano-size scanning probe microscope (spm) tip formed by nanowire growth
US7638431B2 (en) * 2006-09-29 2009-12-29 Hewlett-Packard Development Company, L.P. Composite nanostructure apparatus and method
WO2016064787A1 (en) 2014-10-20 2016-04-28 Keurig Green Mountain, Inc. Mixing chamber for beverage machine
WO2017153388A1 (en) 2016-03-07 2017-09-14 University Of Copenhagen A manufacturing method for a nanostructured device using a shadow mask
WO2019180267A1 (en) 2018-03-23 2019-09-26 University Of Copenhagen Method and substrate for patterned growth on nanoscale structures
WO2020008076A1 (en) 2018-07-06 2020-01-09 University Of Copenhagen Method for manufacture of nanostructure electrical devices

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090308844A1 (en) * 2006-03-23 2009-12-17 International Business Machines Corporation Monolithic high aspect ratio nano-size scanning probe microscope (spm) tip formed by nanowire growth
US20090059982A1 (en) * 2006-04-28 2009-03-05 Kamins Theodore I Nanowire devices and systems, light-emitting nanowires, and methods of precisely positioning nanoparticles
US7638431B2 (en) * 2006-09-29 2009-12-29 Hewlett-Packard Development Company, L.P. Composite nanostructure apparatus and method
WO2016064787A1 (en) 2014-10-20 2016-04-28 Keurig Green Mountain, Inc. Mixing chamber for beverage machine
WO2017153388A1 (en) 2016-03-07 2017-09-14 University Of Copenhagen A manufacturing method for a nanostructured device using a shadow mask
WO2019180267A1 (en) 2018-03-23 2019-09-26 University Of Copenhagen Method and substrate for patterned growth on nanoscale structures
WO2020008076A1 (en) 2018-07-06 2020-01-09 University Of Copenhagen Method for manufacture of nanostructure electrical devices

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
GAZIBEGOVIC NATURE, vol. 548, 2017, pages 434
SASA GAZIBEGOVIC ET AL: "Epitaxy of advanced nanowire quantum devices", NATURE, vol. 548, no. 7668, 24 August 2017 (2017-08-24), London, pages 434 - 438, XP055422526, ISSN: 0028-0836, DOI: 10.1038/nature23468 *
WANG ET AL.: "Wet Chemical Etching for V-grooves into InP Substrates", JOURNAL OF THE ELECTROCHEMICAL SOCIETY, vol. 145, 1998, pages 2931 - 2937

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