WO2021048671A1

WO2021048671A1 - A tamper-evident seal

Info

Publication number: WO2021048671A1
Application number: PCT/IB2020/057927
Authority: WO
Inventors: Paul Abner NORONHA; Darshan Dhruman GANDHI; Dattaprasad Narayan KAMAT; Murad NATHANI
Original assignee: Sepio Products Private Limited
Priority date: 2019-09-11
Filing date: 2020-08-25
Publication date: 2021-03-18
Also published as: EP4029003A1; EP4029003A4; CN114375469A

Abstract

The present invention relates to tamper-evident seals used in security systems and discloses a tamper-evident seal assembly (300) comprising a flag post (100) having a pair of conducting terminals (124) and configured to support an RFID/NFC chip (121); and a pedestal (200) having a conductive sticker (241). The flag post (100) is snap-lockably insertable into the pedestal (200). The conductive sticker (241) is configured to close the loop of the two terminals (124). The conductive sticker (241) is configured to be damaged permanently on any attempt to tamper the assembly (300), thereby breaking the tamper loop and hence facilitating electrical registration of tampering of the seal in said RFID/NFC chip.

Description

A TAMPER-EVIDENT SEAL

FIELD

The present disclosure relates generally to the field of security systems. More particularly, the present disclosure relates to tamper-evident seals.

BACKGROUND

The background information herein below relates to the present disclosure but is not necessarily prior art

Conventional NFC/RFID or dual frequency NFC+RF1D security tags use the technology of inductive coupling, which is a phenomenon in which energy is transferred through a shared magnetic field between an RFID tag and an RFID reader. The RFID reader uses magnetic induction to create a radio-wave field that the RFID tag detects. Therefore, when a tag is placed in close proximity to the reader, the field from the antenna coil of the reader couples with the antenna coil of the tag and induces a voltage in the tag, which is then rectified and used for powering the internal circuitry of the tag.

Existing passive RFID security tags/seals are capable of checking and recording the status of the tamper loop only in presence of a radio frequency (RF) field of the RFID reader. Such chips derive their power from the RF field to send a pulse around the tamper loop. If the pulse is successfully sent and received by the RF reader, a tamper check flag is set as non- tampered and seal is declared non-tampered. In the absence of such an RF field, a skilled counterfeiter can open and close the tag/seal without changing the status of the tamper check flag. Hence, under such a condition, when an RFID reader reads the tamper check flag, it will show non-tampered even though the seal/tag is tampered with, which is not desired.

There is, therefore, felt a need for developing a tamper-evident seal that discourages tampering.

OBJECTS

Some of the objects of the present disclosure, which at least one embodiment herein satisfies, are as follows: It is an object of the present disclosure to ameliorate one or more problems of the prior art or to at least provide a useful alternative;

An object of the present disclosure is to provide a tamper-evident seal.

Yet another object of the present disclosure is to provide a tamper-evident seal incorporating a NFC/RFID or NFC+RFID based security tag.

Yet another object of the present disclosure is to provide a tamper-evident seal incorporating a NFC/RFID or NFC+RFID based security tag, which updates the tamper check flag even in the absence of the field generated by an external electromagnetic reader.

Other objects and advantages of the present disclosure will be more apparent from the following description, which is not intended to limit the scope of the present disclosure.

SUMMARY

The present disclosure envisages a tamper-evident seal assembly comprising a flag post and a pedestal. The flag post has a frame configured to securely support a circuit. The circuit comprises a tamper detection chip, a pair of conducting elements having corresponding terminals. The terminals are exposed out of the frame. The pedestal is configured to lockingly receive a portion of the flag post for sealing the arrangement to be sealed. The pedestal encloses a conductive sticker configured to stick with the terminals of the conducting elements on locking of the flag post into the pedestal, thereby forming an electrical loop with the tamper detection chip. The conductive sticker is configured to get damaged when the tamper-evident seal assembly is tampered with, causing the tamper loop to open.

Preferably, the flag post and the pedestal have a snap-locking arrangement defined between them. In an embodiment, the frame of the flag post has a groove and the pedestal encloses a locking ring configured to snap-lockingly engage with the groove.

The circuit comprises an electrical energy storage device. Preferably, the tamper detection chip is configured to receive electrical energy from the electrical energy storage device.

The tamper detection chip comprises an electronic memory. Preferably, the tamper detection chip is configured to irreversibly update information stored within said electronic memory when said tamper loop is opened. The circuit comprises at least one antenna which is configured to transmit information stored within the electronic memory on being energized electromagnetically by an electromagnetic reader.

Preferably, the tamper detection chip is an RFID chip or an NFC chip.

In an embodiment, the frame consists of two panels which are ultrasonically welded together.

BRIEF DESCRIPTION OF ACCOMPANYING DRAWING

A tamper-evident seal assembly of the present disclosure will now be described with the help of the accompanying drawing, in which:

Figure 1 illustrates an isometric view of a tamper-evident seal assembly, in accordance with an embodiment of the present disclosure;

Figure 2 illustrates an exploded view of the tamper-evident seal assembly of Figure 1 ;

Figure 3 illustrates an isometric view of the seal assembly of Figure 1 ;

Figure 4 illustrates a circuit with a tamper detection chip, in accordance with an embodiment of the present disclosure;

Figure 5a illustrates an exploded view of a frame of the flag post according to an embodiment of the present disclosure;

Figure 5b illustrates an isometric view of the frame of Figure 5a;

Figure 6 illustrates an exploded view of a flag post, in accordance with an embodiment of the present disclosure;

Figures 7a, 7b, 7c illustrate steps of assembly of a housing with a locking ring of a pedestal, in accordance with an embodiment of the present disclosure;

Figure 8a illustrates the step of assembly of a housing and a jacket with a bottom cover, in accordance with an embodiment of the present disclosure;

Figure 8b illustrates an isometric view of the pedestal of Figure 8a;

Figure 9 shows a schematic view of the bottom cover with the sticker mount of the pedestal of the present disclosure; Figure 10a illustrates the step of assembly of a housing and a jacket of a pedestal in accordance with an embodiment of the present disclosure;

Figure 10b illustrates an isometric view of the assembly of the housing with the jacket of Figure 10a;

Figure 11 shows transparent view of the locking arrangement of the flag post with the pedestal of the seal assembly in accordance with an embodiment of the present disclosure.

Figure 12 illustrates an internal view of the pole of the flag post in contact with the sticker mount of the pedestal, in accordance with an embodiment of the present disclosure;

Figures 13a, 13b illustrates side views of the pole of the flag post in contact with the sticker mount of the pedestal; and

LIST OF REFERENCE NUMERALS USED IN DETAILED DESCRIPTION AND DRAWING

100 - flag post

110 -frame

111 - first panel of frame

112 - upper portion of frame

113 - recess

114 - second panel of frame

115 - pole

116 - shoulder of flag post

120 - circuit

121 - tamper detection chip

122 - antenna

123 - conducting elements

124 - terminals 130 - barrel

131 - groove

140 - insert mould

200 - pedestal

210 - pedestal housing

210a, 210b - first halves of pedestal housing

230 - locking ring

220 - cavity

240 - bottom cover

241 - conductive sticker

242 - sticker mount 250 -jacket

300 - tamper-evident seal assembly

DETAILED DESCRIPTION

Embodiments, of the present disclosure, will now be described with reference to the accompanying drawing.

Embodiments are provided so as to thoroughly and fully convey the scope of the present disclosure to the person skilled in the art. Numerous details are set forth, relating to specific components, and methods, to provide a complete understanding of embodiments of the present disclosure. It will be apparent to the person skilled in the art that the details provided in the embodiments should not be construed to limit the scope of the present disclosure. In some embodiments, well-known processes, well-known apparatus structures, and well-known techniques are not described in detail.

The terminology used, in the present disclosure, is only for the purpose of explaining a particular embodiment and such terminology shall not be considered to limit the scope of the present disclosure. As used in the present disclosure, the forms “a”, “an” and “the” may be intended to include the plural forms as well, unless the context clearly suggests otherwise. The terms “comprises”, “comprising”, “including” and “having” are open-ended transitional phrases and therefore specify the presence of stated features elements, units and/or components, but do not forbid the presence or addition of one or more other features, elements, components, and/or groups thereof. The particular order of steps disclosed in the method and process of the present disclosure is not to be construed as necessarily requiring their performance as described or illustrated. It is also to be understood that additional or alternative steps may be employed.

When an element is referred to as being “mounted on”, “engaged to”, “connected to” or “coupled to” another element, it may be directly on, engaged, connected or coupled to the other element.

The terms first, second, third, etc., should not be construed to limit the scope of the present disclosure as the aforementioned terms may be only used to distinguish one element, component, region, layer or section from another component, region, layer or section. Ter s such as first, second, third etc., when used herein do not imply a specific sequence or order unless clearly suggested by the present disclosure.

Terms such as “inner”, “outer”, “beneath”, “below”, “lower”, “above”, “upper” and the like, may be used in the present disclosure to describe relationships between different elements as depicted from the figures.

The tamper-evident seal assembly 300 of the present disclosure, as illustrated through Figures 1-13, prevents any loss of items stored in cargo containers or the like, as it gets damaged beyond repair in case tampered with.

The tamper-evident seal assembly 300 (hereinafter referred as “seal 300”) includes a flag post 100 and a pedestal 200, as shown in Figure 1. The pedestal 200 is configured to receive the flag post 100, as shown in Figure 2, and is further configured to prevent its removal by snap locking the flap post 100. Figure 3 shows the tamper-evident seal 300 in locked state, in accordance with preferred embodiment of the present invention.The flag post 100 is inserted through the aligned holes of the latches, e.g., to be sealed from one end and the pedestal 200 is held at the other end to receive the flag post 100.

The flag post 100 is configured to enclose a circuit 120, shown in Figure 4, wherein the circuit 120 includes comprises a tamper detection chip 121, at least one antenna 122, a pair of conducting elements 123 having corresponding terminals 124, a battery and a capacitor. The tamper detection chip 121 is electrically connected to the antenna 122. The tamper detection chip 121 includes a control unit, an electronic memory (memory), a tamper switch, a counter and a comparator. The memory includes an identification register, a tamper check flag register, and a pre-determined threshold tamper value. The identification register is configured to store a unique identification code associated with the tamper indicating seal. Preferably, the chip 121 is NFC or RFID or NFC+RFID based. The circuit 120 is preferably configured in the form of a sticker.

In an embodiment, the flag post 100 has a frame 110 which has a first panel 111 and a second panel 114, as shown in Figure 5a, wherein the first panel 111 has a recess 113 for accommodating the circuit 120. The upper portion 112 of the frame 110 accommodates the antenna 122. The frame 110 has a portion, i.e., a pole 115 extending operatively downwards. The recess 113 extends through the pole portion. The pole 115 is inserted in a barrel 130, as shown in Figure 6, wherein the barrel 130 is provided with a groove 131 provided at the free end of the barrel 130. The barrel 130 is further enclosed in an insert mould 140 to securely hold the two parts together. Conducting elements 123 extend through the pole 115 to make the pair of terminals 124 protrude and remain exposed out of the pole 115 of the flag post 100, as shown in Figures 2, 3b, 4a. A shoulder 116 is configured to rest on a surface of the arrangement to be sealed.

The pedestal 200 comprises a pedestal housing 210 having two halves 210a, 210b, as shown in Figures 7a, 7b. Both halves 210a, 210b are ultrasonically welded together sandwiching the circuit 120 in between. The housing 210 has an opening at the operative top for receiving the flag post 100. The housing 210 has a cavity 220 formed in its operative top half for housing a locking ring 230. The locking ring 230 is configured to engage with the groove 131 of the flag post 100 to ensure mechanical locking between the flag post 100 and the pedestal 200. The operative lower end of the pedestal housing 210 is open for receiving a bottom cover 240, as shown in Figures 8a, 8b which is ultrasonically welded at the bottom periphery of the housing 210. The bottom cover 240, shown in Figure 8, has a sticker mount 242 configured to allow sticking of a conductive sticker 241 made of frangible conductive film material. The conductive sticker 241 also has a layer of an adhesive material on its operative top surface. The housing 210 thus assembled with the locking ring 230 and the bottom cover 240, is inserted in a jacket 250, as shown in Figures 10a, 10b, which is open at its operative top and bottom ends.

According to an aspect of the present disclosure, the conductive sticker 241 stuck inside the housing 210 of the pedestal 200 is disposed at a height at which the pair of terminals 124 of the circuit 120 in the flag post 100 come in contact therewith, in a state of locking of the flag post 100 with the pedestal 200, as shown in Figure 11. On contacting the conductive sticker 241, the terminals 124 stick to the conductive sticker 241 due to the adhesive layer present thereon. The conductive sticker 241 forms a tamper loop with the tamper detection chip 121 and the conducting elements 123 extending upto the terminals 124 by electrically coupling the terminals 124, as shown in Figures 12, 13a, 13b. In an event of tampering of the tamper- evident seal assembly 300, the conductive sticker 241 gets damaged and the loop is opened irreversibly.

In an embodiment, the sticker mount 242 has two legs, wherein the legs are compressible due to the pressure exerted for locking of the flag post 100 into the pedestal 200, particularly for snapping of the groove 131 over the locking ring 230, thus preventing inadvertent damage to the conductive sticker 241 by compensating for any additional pressure exerted during the snap-locking action of the flag post 100 into the pedestal 200.

The working of the circuit 120 for tamper detection shall be explained hereforth. The default count value stored in the counter is O’. In an embodiment, when the tamper loop is closed, i.e. when the flag post 100 is locked with the pedestal 200, the battery drives a current through the tamper loop defined by the tamper detection chip 121, the conducting wires extending upto the terminals 124 and the conductive sticker 241, and supplies power to the control unit of the tamper detection chip. Upon receiving the power, the control unit is configured to generate a closed event signal, and further to transmit the closed event signal to the tamper switch. The tamper switch is configured to change state upon receiving the closed event signal. The change in state of the tamper switch drives the counter to increase the count value by one.

When the tamper loop is opened, i.e. when the flag post 100 is removed (unlocked) from the pedestal 200, there will be no current in the tamper loop. In case of any pre or post tampering attempt, it is not possible to bypass the counter. If the tamper-evident seal assembly 300 is tampered by opening the tamper loop, the counter immediately increments the count. If the tamper loop is successfully reattached, the counter still increments count. Thus, the tamper detection chip 121 updates the tamper check flag in the tamper check flag register even in the absence of the field generated by an external electromagnetic reader. When this condition is detected by an electromagnetic reader, the tamper-evident seal assembly 300 is declared as tampered.

In another embodiment, the flag post 100 is inserted into the pedestal 200 till the locking ring 230 engages on the locking groove provided over the bottom cover 240. This ensures contact of the conductive sticker 241 with the two ends. Once the sticker bonds to the end of the loop, any attempt to forcibly disengage the two parts 100, 200 will damage the tamper loop beyond repair.

The foregoing description of the embodiments has been provided for purposes of illustration and not intended to limit the scope of the present disclosure. Individual components of a particular embodiment are generally not limited to that particular embodiment, but, are interchangeable. Such variations are not to be regarded as a departure from the present disclosure, and all such modifications are considered to be within the scope of the present disclosure.

TECHNICAL ADVANCES AND ECONOMICAL SIGNIFICANCE

The present disclosure described herein above has several technical advantages including, but not limited to, the realization of a tamper-evident seal assembly that:

• discourages tampering, since, an attempt to forcibly open the seal will damage the tamper loop beyond repair; and

• which updates the tamper check flag even in the absence of the field generated by an external electromagnetic reader.

The foregoing disclosure has been described with reference to the accompanying embodiments which do not limit the scope and ambit of the disclosure. The description provided is purely by way of example and illustration.

The embodiments herein and the various features and advantageous details thereof are explained with reference to the non-limiting embodiments in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein.

The foregoing description of the specific embodiments so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.

The use of the expression “at least” or “at least one” suggests the use of one or more elements or ingredients or quantities, as the use may be in the embodiment of the disclosure to achieve one or more of the desired objects or results.

Any discussion of devices, articles or the like that has been included in this specification is solely for the purpose of providing a context for the disclosure. It is not to be taken as an admission that any or all of these matters form a part of the prior art base or were common general knowledge in the field relevant to the disclosure as it existed anywhere before the priority date of this application.

While considerable emphasis has been placed herein on the components and component parts of the preferred embodiments, it will be appreciated that many embodiments can be made and that many changes can be made in the preferred embodiments without departing from the principles of the disclosure. These and other changes in the preferred embodiment as well as other embodiments of the disclosure will be apparent to those skilled in the art from the disclosure herein, whereby it is to be distinctly understood that the foregoing descriptive matter is to be interpreted merely as illustrative of the disclosure and not as a limitation.

Claims

CLAIMS:

1. A tamper-evident seal assembly (300) comprising:

- a flag post (100) having a frame (110) configured to securely support a circuit (120), said circuit (120) comprising a tamper detection chip (121), a pair of conducting elements (123) having corresponding terminals (124), said terminals (124) being exposed out of said frame (110);

- a pedestal (200) configured to lockingly receive a portion (115) of said flag post (100) for sealing an arrangement to be sealed; said pedestal (200) enclosing a conductive sticker (241) configured to stick with the terminals (124) of the conducting elements (123) on locking of said flag post (100) into said pedestal (200), thereby forming an electrical tamper loop with the tamper detection chip (121), said conductive sticker (241) configured to get damaged when said tamper- evident seal assembly (300) is tampered with, causing said tamper loop to open.

2. The tamper-evident seal assembly (300) as claimed in claim 1, wherein said flag post (100) and said pedestal (200) have a snap- locking arrangement defined between them.

3. The tamper-evident seal assembly (300) as claimed in claim 2, wherein said frame (110) of said flag post (100) has a groove (131) and said pedestal (200) encloses a locking ring (230) configured to snap-lockingly engage with said groove (131).

4. The tamper-evident seal assembly (300) as claimed in claim 2, wherein the frame (110) consists of two panels (111, 114) which are ultrasonically welded together.

5. The tamper-evident seal assembly (300) as claimed in claim 1, wherein said circuit (120) comprises an electrical energy storage device.

6. The tamper-evident seal assembly (300) as claimed in claim 5, wherein said tamper detection chip (121) is configured to receive electrical energy from said electrical energy storage device.

7. The tamper-evident seal assembly (300) as claimed in claim 1, wherein said tamper detection chip (121) comprises an electronic memory.

8. The tamper-evident seal assembly (300) as claimed in claim 7, wherein said tamper detection chip (121) is configured to irreversibly update information stored within said electronic memory when said tamper loop is opened.

9. The tamper-evident seal assembly (300) as claimed in claim 1, wherein said antenna (122) is configured to transmit information stored within said electronic memory on being energized electromagnetically by an electromagnetic reader.

10. The tamper-evident seal assembly (300) as claimed in claim 1, wherein said circuit (120) comprises at least one antenna (122) which is configured to transmit information stored within said electronic memory on being energized electromagnetically by an electromagnetic reader.

11. The tamper-evident seal assembly (300) as claimed in claim 1, wherein tamper detection chip is an RFID chip or an NFC chip.