WO2020135354A1 - Method and device for measuring impedance of transmission channel - Google Patents

Abstract

A method and device (1100) for measuring impedance of a transmission channel (404). The method is applied to the device (1100) for the measuring impedance of the transmission channel (404). The measurement device (1100) comprises a step signal generator (401, 711, 1011, 1103). The measurement method comprises: transmitting to a test end of a transmission channel (404) a fast step signal generated by the step signal generator (401, 711, 1011, 1103), the transmission channel (404) being a physical entity portion, located between a signal transmission unit (301, 51, 71, 81, 91, 1001) and a signal receiving unit (302, 52, 72, 82, 92, 1002), and used to transmit a communication signal (S201); acquiring a superposed signal at the test end, the superposed signal representing superimposition of the fast step signal and a reflected signal of the fast step signal at a point in the transmission channel (404) where impedance is discontinuous (S202); and acquiring, according to a level amplitude of the fast step signal and a level amplitude of the superposed signal, an impedance value of the point in the transmission channel (404) where impedance is discontinuous (S203).

Description

Method and device for measuring transmission channel impedance

cross reference

The present invention requires the priority of a Chinese patent application filed on December 29, 2018 in the Chinese Patent Office with the application number 201811642333.9 and the invention titled "A method and device for measuring transmission channel impedance". The reference is incorporated in the present invention.

Technical field

The present invention relates to, but not limited to, circuit impedance detection technology, and in particular, to a method and device for measuring transmission channel impedance.

Background technique

The transmission channel is a device-level component that transmits communication signals between two signal transceiving modules. The device-level component may include any combination of relatively separate passive components. For example, the transmission channel may include: a printed circuit board (Printed Circuit Board). PCB) transmission channel, PCBA (Printed Circuit Board + Assembly) transmission channel, and multiple PCBA transmission channels, specifically, PCB transmission channels can include PCB Trace (line) and PCB Via (via ) Any combination, the transmission channel formed by PCBA can include any combination of components such as PCB Trace, PCB Via, PCB Connector and PCB Chip Package; the transmission channel is an important part of the high-speed digital channel system In order to ensure the normal transmission of the communication signal of the high-speed digital communication system, it is necessary to perform impedance measurement on part or all of the transmission channels in the high-speed digital channel system, so as to find the point where the impedance is discontinuous in part or all of the transmission channels in time, the part to be measured Or all transmission channels are called Chanel Under Test (CUT).

At present, when detecting the impedance of the CUT, a detection method is implemented by using time domain reflection technology (Time Domain Reflectorometry, TDR). As shown in FIG. 1, a hardware connection diagram of an impedance measurement system using a TDR instrument, the system 100 Including: TDR instrument 101, TDR accessory 102, high-bandwidth measurement cable 103 and high-bandwidth measurement fixture 104; wherein, TDR accessory 102 is used to generate a fast step signal and send it to the transmission channel to be tested Impedance is measured. The fast step signal refers to a step signal with a very short rise time. The transmission channel under test refers to the components including the PCB circuit of the backplane 105, PCB vias and PCB connectors, as well as the single board 106. The combination of components such as PCB circuit, PCB through hole, PCB connector and PCB chip package uses this system to complete the impedance measurement and impedance evaluation of the above-mentioned transmission channel to be tested.

Although the measurement method of the TDR instrument can accurately measure the impedance value of the transmission channel to be measured, the TDR instrument must be used, and the TDR instrument has the following problems when used: First, the communication signal transmitted by the current high-speed digital communication system The rising edge time can reach picoseconds, and the design cost and procurement cost of TDR instruments that meet the channel test requirements of high-speed digital channel systems have increased dramatically. Second, existing TDR instruments can handle more than tens of Impedance measurement is performed at the same time as the transmission channel is measured, but compared to more complex high-speed digital communication systems, such as carrier-grade communication equipment, there are at least thousands of channels to be tested in the system, which cannot meet the measurement needs; third, using TDR instruments For impedance measurement, special high-bandwidth measurement cables, high-bandwidth measurement probes or high-bandwidth measurement fixtures are required. The assembly and use of these high-speed components are more complicated. Fourth, the users of TDR instruments have higher requirements. Personnel need to have certain relevant technical knowledge and standardized operating capabilities to ensure the accuracy of the measurement data and the safety of the instrument.

The above problems limit the scope of use of the measurement method using TDR instruments. The measurement methods using TDR instruments are generally limited to the R&D and commissioning phase, fault location, or relatively independent passive component production measurement. Independent transmission channels or device-level components quickly complete the impedance test evaluation, whether it is in the product generation measurement stage or in the actual application stage of the product, if all are measured by TDR instruments, it is not operable, and the impedance test evaluation speed Slow; due to the limitations of the measurement method using the TDR instrument, the impedance measurement of the transmission channel in the production measurement stage and application stage of the product is more through the error measurement of the device chip interconnection or loopback situation or Eye diagram measurement to indirectly obtain the impedance characteristics of the transmission channel to be tested, however, impedance discontinuity is not the only cause of high bit error rate or incomplete eye diagram, the above error code test method or eye diagram test method cannot be directly Factors reflecting the discontinuous impedance of the transmission channel to be tested, such as broken PCB traces or large changes in line width, connector crimping or short circuit, chip package failure, etc. These factors are high-speed digital communications The problem that needs more attention in the transmission channel of the system is also the main reason for many failures.

As mentioned above, at present, the impedance measurement method using error code measurement or eye diagram measurement cannot directly reflect the impedance discontinuity factor of the transmission channel to be tested, while the impedance measurement method using the TDR instrument is used in the mass production stage of the product or The actual application environment of the product is difficult to execute, and the impedance test and evaluation cannot be completed quickly.

Summary of the invention

The technical solution of the present invention is implemented as follows:

An embodiment of the present invention provides a transmission channel impedance measurement method. The method is applied to a transmission channel impedance measurement device. The device includes a step signal generator. The method includes: applying the step signal generator The generated fast step signal is sent to the test end of the transmission channel, which is the physical entity part of the transmission communication signal between the signal sending unit and the signal receiving unit; the superimposed signal is obtained at the test end, and the superimposed signal Represents the superposition of the fast step signal and the point of discontinuity of impedance in the transmission channel on the reflected signal of the fast step signal; according to the level amplitude of the fast step signal and the superimposed signal The level amplitude obtains the impedance value at the point where the impedance is discontinuous in the transmission channel.

An embodiment of the present invention also provides a transmission channel impedance measurement device. The device includes a signal transceiving unit and a signal processing unit. The signal transceiving unit includes a step signal generator. The signal transceiving unit is used to The fast step signal generated by the step signal generator is sent to the test terminal of the transmission channel, and the transmission channel is a physical entity portion that transmits the communication signal between the signal sending unit and the signal receiving unit; and at the test terminal Acquiring a superimposed signal, the superimposed signal representing the superposition of the fast step signal and the point of discontinuous impedance in the transmission channel on the reflected signal of the fast step signal; the signal processing unit is used for The level amplitude of the fast step signal and the level amplitude of the superimposed signal obtain the impedance value of the point where the impedance is discontinuous in the transmission channel.

Embodiments of the present invention also provide a non-transitory computer-readable storage medium. The non-transitory computer-readable storage medium stores computer-executable instructions. The computer-executable instructions are used to perform the methods described in the above aspects. .

An embodiment of the present invention also provides a computer program product. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by a computer To enable the computer to execute the method described in the above aspects.

BRIEF DESCRIPTION

1 is a hardware connection diagram of an impedance measurement system using a TDR meter provided by an embodiment of the present invention;

2 is a flowchart 1 of a method for measuring transmission channel impedance according to an embodiment of the present invention;

3 is a hardware connection diagram of a digital communication system according to an embodiment of the present invention;

4 is a schematic diagram of a circuit for measuring impedance of a TDR system provided by an embodiment of the present invention;

5 is a hardware connection diagram of a signal transceiving unit using Serdes (Serializer-Deserializer, serializer-deserializer) technology according to an embodiment of the present invention;

6 is a second flowchart of a method for measuring transmission channel impedance according to an embodiment of the present invention;

7 is a schematic structural diagram 1 of a signal transceiving unit using Seders technology according to an embodiment of the present invention;

8 is a second schematic structural diagram of a signal transceiving unit using Seders technology according to an embodiment of the present invention;

9 is a schematic structural diagram 3 of a signal transceiving unit using Seders technology according to an embodiment of the present invention;

10 is a fourth schematic structural diagram of a signal transceiving unit using Seders technology according to an embodiment of the present invention;

11 is a schematic structural diagram of a transmission channel impedance measurement device according to an embodiment of the present invention.

detailed description

The present invention will be further described in detail below in conjunction with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not intended to limit the present invention.

Example one

An embodiment of the present invention provides a transmission channel impedance measurement method. The method is applied to a transmission channel impedance measurement device. The device includes a step signal generator. As shown in FIG. 2, the method may include:

S201: Send the fast step signal generated by the step signal generator to the test end of the transmission channel, where the transmission channel is a physical entity part that transmits the communication signal between the signal sending unit and the signal receiving unit.

In the embodiment of the present invention, the transmission channel impedance measuring device includes a signal transceiving unit, the signal transceiving unit includes a signal transmitting unit and a signal receiving unit, and the step signal generator in the signal transmitting unit or the signal receiving unit generates a fast step signal When using PCB as the carrier for electrical connection, it is even more necessary to use PCB as the carrier when transmitting communication signals between the signal sending unit and the signal receiving unit, that is, the transmission channel of the communication signal is connected by PCB lines, PCB vias, PCB It is composed of several components in the components such as the device and the PCB chip package. Among them, the signal sending unit serves as the sending end of the communication signal, and the signal receiving unit serves as the receiving end of the communication signal. The sending end and the receiving end can be located on the same integrated circuit chip In the example, the transmission channel between the sending end and the receiving end that can measure the impedance value is called the transmission channel under test. For example, the transmission channel between the signal sending unit and the signal receiving unit in an integrated circuit chip can be tested It is composed of PCB lines and PCB through holes in the PCB of an integrated circuit chip.

Exemplarily, as shown in FIG. 3, a hardware connection diagram of a digital communication system, the transmission channel of the digital communication system is composed of a signal sending unit 301 in an integrated circuit chip, a signal receiving unit 302 in an integrated circuit chip, and a backplane 303 It consists of three parts, in which the transmission channel of the signal sending unit 301 includes PCB chip package, PCB circuit, PCB through hole and PCB connector, the transmission channel of the backplane 303 includes PCB circuit, PCB through hole and PCB connector, and signal reception The transmission channel of the unit 302 includes a PCB chip package, a PCB circuit, a PCB via, and a PCB connector. The transmission channel to be tested may include any part of the transmission channel of the signal sending unit 301, the signal receiving unit 302, and the backplane 303.

Exemplarily, when the signal sending unit 301 is docked with the signal receiving unit 302, the transmission channel to be tested may include the above-mentioned three-part transmission channel. Example one, the signal sending unit 301 in an integrated circuit chip with an impedance measurement function is provided with Step signal generator, the output of the signal transmission unit 301 is connected to the test terminal of the transmission channel to be tested, and the step signal generator generates a fast step signal, which is sent to the test of the transmission channel to be tested through the output terminal of the signal transmission unit 301 End, and then measure the impedance of the transmission channel under test; where the fast step signal refers to a signal with a short rise time, for example, the rise time of the fast step signal can be 10 picoseconds; the transmission channel to be tested is the above The signal transmission unit 301 in the three-part transmission channel transmits the signal to the signal reception unit 302.

Exemplarily, when the signal sending unit 301 is docked with the signal receiving unit 302, the transmission channel to be tested may include the transmission channel of the integrated circuit chip and the transmission channel of the backplane 303. Example one, the signal transmission unit 301 with an impedance measurement function And the signal receiving unit 302, when connected through the backplane 303, the signal receiving unit 302 is provided with a step signal generator, the step signal generator generates a fast step signal, through the output terminal of the signal receiving unit 302, is sent to the waiting The test end of the transmission channel is measured, and then the impedance in the transmission channel to be measured is measured, wherein the transmission channel to be tested is a signal transmission unit 301 in a transmission channel composed of an integrated circuit chip and a backplane 303 to send a signal to the signal reception unit 302 Transmission channel.

In an exemplary embodiment, a signal transceiving unit in an integrated circuit chip with an impedance detection function may include a step signal generator, a waveform detector, a signal selector, a mode selection switch, and a function register, wherein the step signal The rise time of the fast step signal generated by the transmitter is equal to the preset duration. The preset duration of the integrated circuit chip can be set according to the resolution requirements. The resolution refers to the minimum point of the impedance discontinuity that can be measured by the integrated circuit chip Length; the input terminal of the signal selector is connected to the step signal generator and the processing module related to the communication signal, and the output terminal is connected to the mode selection switch indirectly or directly, which is used to select one of the communication signal and the fast step signal Output, when it is detected that the step signal generator generates a fast step signal, the function register controls the signal selector to output the fast step signal, otherwise, the signal selector outputs the communication signal, and the integrated circuit chip performs the normal communication signal transmission function; mode The selector switch can be a multiplexer with 2 out of 1. One end is connected to the waveform detector and the output end of the signal selector, and the other end is connected to the signal output pin of the integrated circuit chip. The signal output pin and the transmission channel to be tested are tested Terminal connection, the mode selection switch defaults to connect the signal transmission link between the output terminal of the signal selector and the test terminal of the transmission channel to be tested. At this time, the communication signal or fast step signal output by the signal selector is sent to the Test the test terminal of the transmission channel, when the function register leaves the test terminal of the transmission channel under test when the rising edge of the fast step signal is detected, control the mode selection switch to switch the signal between the waveform detector and the test terminal of the transmission channel under test The transmission link is connected, so that the waveform detector can collect the signal of the transmission channel to be tested from the test end of the transmission channel to be tested; the function register is used to store the control of the step signal generator, waveform detector, signal selector and mode selection switch Command, status or data.

In an exemplary embodiment, the integrated circuit chip may be a chip using Seders technology. Seders technology refers to a point-to-point serial communication technology, that is, multiple low-speed parallel signals are converted into high-speed serial signals at the transmitting end After passing through the transmission medium (optical cable or copper wire), at the receiving end, the high-speed serial signal is re-converted into a low-speed parallel signal. Correspondingly, the integrated circuit chip includes a signal transmission unit for converting multiple parallel signals into serial The signals are sent simultaneously, the signal receiving unit is used to convert the received serial signal into a parallel signal, and the signal transceiving unit includes the above-mentioned signal sending unit and the above-mentioned signal receiving unit.

S202: Obtain a superimposed signal at the test end. The superimposed signal represents the superposition of the fast step signal and the point where the impedance in the transmission channel is discontinuous to the reflected signal of the fast step signal.

In the embodiment of the present invention, when it is detected that the step signal generator generates the fast step signal, the function register controls the signal selector to output the fast step signal, and the control mode selection switch connects the output terminal of the signal selector to the transmission channel to be tested The signal transmission links between the test terminals are connected, at this time, the fast step signal is sent to the test terminal of the transmission channel under test, and the fast step signal is used as the incident signal of the transmission channel under test. The channel will be reflected when it encounters a point where the impedance is discontinuous, generating a reflected signal opposite to the incident signal method. The superimposed signal after the incident signal and the reflected signal are superimposed is transmitted to the test end of the transmission channel to be tested. The test terminal collects the superimposed signal. When the function register detects that the rising edge of the fast step signal leaves the test terminal of the transmission channel under test, it controls the mode selection switch to disconnect the output terminal of the signal selector from the transmission channel under test. The signal transmission link between the test terminals connects the signal transmission link between the waveform detector and the test terminal of the transmission channel to be tested, so that the waveform detector collects the superimposed signal from the test terminal of the transmission channel to be tested. The superimposed signal is The voltage waveform changes with time, and the superimposed signal is sampled at equal intervals, and the sampling time and level amplitude of each sampling point are recorded.

S203: Obtain the impedance value of the point where the impedance is discontinuous in the transmission channel according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal.

In the embodiment of the present invention, after the waveform detector obtains the sampled value of the superimposed signal, the function register controls the waveform detector to send the sampled value to the signal processing unit such as CPU, Field-Programmable Gate Array (FPGA), etc. The signal processing unit calculates the impedance value at the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampled value and the level amplitude of the incident signal; when the impedance value corresponding to any sampled value is greater than or equal to When the impedance threshold is preset, the point where the impedance discontinuity corresponding to the sampled value has a greater influence on the signal transmission. According to the sampling time of the sampled value and the transmission speed of the superimposed signal, the impedance discontinuity corresponding to the sampled value is obtained The distance between the point and the test end, so as to accurately locate the point of the impedance discontinuity corresponding to the sample value.

In an exemplary embodiment, in order to obtain the position of the impedance discontinuity, it is necessary to make the working clock of the signal transmitting unit and the signal receiving unit of the integrated circuit chip with the impedance detection function transmit the communication signal, and the step signal generator , Waveform detector, signal selector, mode selection switch and function register work clock to keep synchronized.

Exemplarily, as shown in FIG. 4, a circuit schematic diagram of measuring impedance of a TDR system includes: a step signal generator 401, a sampling oscilloscope 402, a measurement cable, and a measurement probe or measurement fixture The transmission line 403 of which the step signal generator 401 is used to generate fast step signals, and the sampling oscilloscope 402 is used to process signals and display signal waveform curves; the impedance measurement process of the TDR system is as follows: step signal generator 401 Generate a fast step signal, output an incident signal after the internal impedance of the step signal generator is divided, the incident signal is transmitted to the transmission channel 404 under test through the transmission line 403, the incident signal is encountered in the transmission channel 404 under test Any point where the impedance is not continuous will be reflected to generate a reflected signal. The reflected signal and the incident signal are superimposed to generate a superimposed signal. The sampling oscilloscope 402 collects the voltage waveform of the superimposed signal at the source end of the transmission line 403. The voltage of the superimposed signal V _measured is equal to The sum of the voltage V _{incident of the incident} signal and the voltage V _reflected of the reflected signal, and further, the process of the sampling oscilloscope 402 calculating the impedance Z _CUT of the transmission channel to be measured may be: the step signal generator generates a fast order with a level amplitude equal to V For the jump signal, when the internal impedance R _{source of the} step signal generator is equal to 50Ω and the impedance Z _{0 of the} transmission line 403 is equal to 50Ω, the incident signal voltage V _incident is: V _incident =1/2V, based on the expression of the measured voltage V _measured Formula: V _measured = V _incident + V _reflected , we can get the reflection coefficient ρ expressed as formula (1):

The voltage V _{reflected of the} reflected signal is expressed as formula (2):

The impedance Z _{CUT of} the transmission channel to be tested is expressed as formula (3):

The impedance characteristic curve of the transmission channel to be tested can be obtained in combination with the sampling time of the sampling oscilloscope 402 and displayed on the screen of the sampling oscilloscope 402.

It should be noted that the signal sending unit, the signal receiving unit, or the signal transceiving unit in the integrated circuit chip with impedance detection function includes a waveform detector, which can be calculated to be measured based on the above-mentioned circuit principle of measuring impedance of the TDR system The impedance of the transmission channel; where the measurement accuracy of the impedance depends on the vertical sampling accuracy of the waveform detector, taking a fast step signal with a level amplitude equal to 1V as an example, assuming a vertical sampling accuracy of 10mV, the signal output of the integrated circuit chip The impedance is 50Ω, and you can get 0.5V*(Z _CUT -50)/(Z _CUT +50)=10mV, then Z _CUT =52Ω, if the reflected signal is larger, then the impedance Z _{CUT of} the transmission channel to be tested is also greater .

It can be seen that in the embodiment of the present invention, the signal sending unit, the signal receiving unit or the signal transceiving unit including the step signal generator sends the fast step signal generated by the step signal generator to the test end of the transmission channel, The transmission channel is the physical entity that transmits the communication signal between the signal sending unit and the signal receiving unit, and then obtains the superimposed signal at the test end. The superimposed signal represents the fast step signal and the point-to-fast step of the impedance discontinuity in the transmission channel The superposition of the reflected signal of the signal, according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal, the impedance value of the point where the impedance in the transmission channel is discontinuous is obtained; based on the signal sending unit, the signal receiving unit or the signal The connection relationship between the transceiver unit and the transmission channel performs impedance detection on the transmission channel. The implementation of the technical solution is simple and easy, and the impedance test can be completed quickly.

Example 2

In order to be able to embody the purpose of the present invention more, on the basis of the above-mentioned embodiments, further exemplifications are made.

Embodiment 2 of the present invention provides a method for measuring the impedance of a transmission channel. The method is applied to a signal transceiving unit using Seders technology. The signal transceiving unit can be implemented on the basis of the signal transceiving unit 50 shown in FIG. 5, The signal transceiving unit 50 is mainly composed of a signal transmitting unit 51 and a signal receiving unit 52. The signal transmitting unit 51 may include: a first measurement module 510, a parallel conversion module 511, a forward feedback equalizer 512, a driver 513, a first signal selection 514 and a second signal selector 515, the first measurement unit 510 is composed of a first pattern generator 510-1 and a first pattern detector 510-2; the signal receiving unit 52 may include: a second measurement module 520, Serial-parallel module 521, decision feedback equalizer 522, receiver 523, eye diagram oscilloscope 524, third signal selector 525 and fourth signal selector 526, the second measurement module 520 is composed of the second pattern detector 520-1 And the second pattern generator 520-2;

Among them, the module functions and connection relationships of the signal sending unit 51 are as follows: the first measurement module 510 is used to perform bit error testing, the first pattern generator 510-1 is used to generate digital waveforms and digital signals, and the first pattern detector 510-2 is used to detect the bit error rate of the signal of the transmission channel, and the parallel conversion module 511 is used to convert multiple parallel signals into a serial signal, and the forward feedback equalizer 512 is used to filter the signal for preprocessing, the driver 513 is used to adjust the signal amplitude. The first signal selector 514 and the second signal selector 515 are used to select one of the two input signals, and the communication signal receiving end and the first pattern generator connected to the external device The output terminal of 510-1 is connected to the two input terminals of the first signal selector 514, the output terminal of the first signal selector 514 is connected to one input terminal of the second signal selector 515, and the other input of the second signal selector 515 Is connected to the output terminal of the serial-to-parallel conversion module 521, the output terminal of the second signal selector 515 is connected to the input terminal of the parallel-to-serial conversion module 511, and the output terminal of the parallel-to-serial conversion module 511 is connected to the input terminal of the forward feedback equalizer 512. The output terminal of the feedback equalizer 512 is connected to the input terminal of the driver 513, one output terminal of the driver 513 is connected to the signal output pin of the signal transmission unit 51, and the other output terminal of the driver 513 is connected to the first pattern detector 510-2, The signal output pin of the signal sending unit 51 and the signal receiving pin of the signal receiving unit 52 can be docked through an outer loopback link;

The module functions and connection relationships of the signal receiving unit 52 are as follows: the second measurement module 520 is used to perform bit error testing, the second pattern generator 520-1 is used to generate digital waveforms and digital signals, and the second pattern detector 520- 2 It is used to detect the bit error rate of the signal of the transmission channel. The serial parallel conversion module 521 is used to convert multiple parallel signals into a serial signal. The decision feedback equalizer 522 is used to eliminate inter-symbol interference in the signal. The receiver 523 is used In order to adjust the signal amplitude, the eye diagram oscilloscope 524 is used to display a series of accumulated digital signals. The third signal selector 525 and the fourth signal selector 526 are used to select one of the two input signals and output the signal. The signal receiving pin of the unit 52 is connected to the input terminal of the receiver 523, the output terminal of the receiver 523 is connected to one input terminal of the third signal selector 525, and the other input terminal of the third signal selector 525 is connected to the fourth signal selector At the output of 526, the output of the third signal selector 525 is connected to the input of the decision feedback equalizer 522, and the output of the decision feedback equalizer 522 is connected to the input of the serial-parallel module 521 and the input of the eye diagram oscilloscope 524, The output terminal of the serial-parallel module 521 is connected to a communication signal transmission terminal connected to an external device, an input terminal of the second pattern detector 520-2 and an input terminal of the second signal selector 515, and a second pattern generator 520 The output terminal of -1 is connected to one input terminal of the fourth signal selector 526, and the other input terminal of the fourth signal selector 526 is connected to the output terminal of the driver 513 connected to the signal output pin.

The signal transceiving unit further includes a step signal generator and a waveform detector. As shown in FIG. 6, a flowchart 2 of a method for measuring transmission channel impedance, the method may include:

S601: Send the fast step signal generated by the step signal generator to the test end of the transmission channel to be tested. The transmission channel to be tested is a physical entity that transmits a communication signal between the signal transmitting unit and the signal receiving unit in the signal transceiving unit. section.

In the embodiment of the present invention, the signal transceiving unit may include a step signal generator, a waveform detector, a function register, a signal selector, and a mode selection switch. Specifically, the signal transceiving unit may be connected based on the hardware shown in FIG. 7 Way to realize the impedance detection function, the signal transmission unit 71 included in the signal transceiving unit 70 is provided with a first step signal generator 711, a first waveform detector 712, a first function register 713, a fifth signal selector 714 and a first A mode selection switch 715, wherein the output of the first step signal generator 711 is connected to one input of the fifth signal selector 714, and the other input of the fifth signal selector 714 is connected to the forward feedback equalizer 512, The output end of the fifth signal selector 714 is connected to the input end of the driver 513, one end of the first mode selection switch 715 is connected to the output end of the driver 513 and the input end of the first waveform detector 712, respectively, and the other end of the first mode selection switch 715 One end is connected to the test end of the transmission channel to be tested.

Exemplarily, the signal transceiving unit 70 defaults to a normal working mode, that is, the fifth signal selector 714 outputs the serial signal processed by the forward feedback equalizer 512, and the first mode selection switch 715 connects the output terminal of the driver 513 to the test The switch between the test terminals of the transmission channel, so that the serial signal is sent to the transmission channel to be tested through the driver 513. When the impedance of the transmission channel to be measured needs to be measured, the signal transceiving unit 70 switches to the impedance detection mode, which is A function register 713 controls the first step signal generator 711 to generate a fast step signal, and at the same time, the first function register 713 controls the fifth signal selector 714 to output a fast step signal, thereby sending the fast step signal to the driver 513 to Test end of the transmission channel to be tested.

In the embodiment of the present invention, the signal transceiving unit may also implement the impedance detection function based on the hardware connection shown in FIG. 8, using the first pattern generator 510-1 in the signal transmitting unit 81 included in the signal transceiving unit 80 as A step signal generator, and a second waveform detector 812, a second function register 813, a sixth signal selector 814, and a second mode selection switch 815 are provided in the signal transmission unit 81, wherein the first pattern generator One output of 510-1 is connected to one input of the sixth signal selector 814, the other input of the sixth signal selector 814 is connected to the forward feedback equalizer 512, and the output of the sixth signal selector 814 is connected to the driver 513 The input end of the second mode selection switch 815 is connected to the output end of the driver 513 and the input end of the second waveform detector 812 respectively, and the other end of the second mode selection switch 815 is connected to the test end of the transmission channel to be tested.

Exemplarily, the signal transceiving unit 80 defaults to a normal working mode, that is, the first pattern generator 510-1 is used to output a bit error detection signal, and the sixth signal selector 814 outputs the serial processed by the forward feedback equalizer 512 Signal, the second mode selection switch 815 connects the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, thereby sending the serial signal to the transmission channel to be tested through the driver 513, when the impedance of the transmission channel to be tested is needed During the measurement, the signal transceiving unit 80 switches to the impedance detection mode, that is, the second function register 813 controls the first pattern generator 510-1 to generate a fast step signal, and sends the fast step signal through the step signal transmission path To an input terminal of the sixth signal selector 814, and at the same time, the second function register 813 controls the sixth signal selector 814 to output a fast step signal, thereby sending the fast step signal to the test terminal of the transmission channel to be tested through the driver 513 .

In the embodiment of the present invention, the signal transceiving unit may also implement the impedance detection function based on the hardware connection shown in FIG. 9, using the first pattern generator 510-1 in the signal transmitting unit 91 included in the signal transceiving unit 90 as A step signal generator, and a third function register 913, a seventh signal selector 914, and a third mode selection switch 915 are provided in the signal transmitting unit 91, and a third waveform detector 922 and a third waveform detector 922 are provided in the signal receiving unit 92. The fourth function register 923, wherein one output terminal of the first pattern generator 510-1 is connected to one input terminal of the seventh signal selector 914, and the other input terminal of the seventh signal selector 914 is connected to the forward feedback equalizer 512, the output terminal of the seventh signal selector 914 is connected to the input terminal of the driver 513, one end of the third mode selection switch 915 is respectively connected to the output terminal of the driver 513 and the input terminal of the third waveform detector 922, and the third mode selection switch 915 The other end of the is connected to the test end of the transmission channel to be tested.

Exemplarily, the signal transceiving unit 90 is in the normal working mode by default, that is, the first pattern generator 510-1 is used to output an error detection signal, and the seventh signal selector 914 outputs the serial processed by the forward feedback equalizer 512 Signal, the third mode selection switch 915 connects the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, thereby sending the serial signal to the transmission channel to be tested through the driver 513, when the impedance of the transmission channel to be tested is needed During the measurement, the signal transceiving unit 90 switches to the impedance detection mode, that is, the third function register 913 controls the first pattern generator 510-1 to generate a fast step signal, and sends the fast step signal through the step signal transmission path To an input terminal of the seventh signal selector 914, and at the same time, the third function register 913 controls the seventh signal selector 914 to output a fast step signal, thereby sending the fast step signal to the test terminal of the transmission channel to be tested through the driver 513 .

In the embodiment of the present invention, the signal transceiving unit may also implement an impedance detection function based on the hardware connection shown in FIG. 10, and a second step signal generator 1011 is provided in the signal transmitting unit 1001 included in the signal transceiving unit 1000 The fifth function register 1013, the eighth signal selector 1014, and the fourth mode selection switch 1015 are provided in the signal receiving unit 1002 with a fourth waveform detector 1022 and a sixth function register 1023, wherein the second step signal generator The output of 1011 is connected to one input of the eighth signal selector 1014, the other input of the eighth signal selector 1014 is connected to the forward feedback equalizer 512, and the output of the eighth signal selector 1014 is connected to the input of the driver 513 One end of the fourth mode selection switch 1015 is respectively connected to the output end of the driver 513 and the input end of the fourth waveform detector 1022, and the other end of the fourth mode selection switch 1015 is connected to the test end of the transmission channel to be tested.

Illustratively, the signal transceiving unit 1000 defaults to a normal working mode, that is, the eighth signal selector 1014 outputs the serial signal processed by the forward feedback equalizer 512, and the fourth mode selection switch 1015 connects the output terminal of the driver 513 to the test The switch between the test terminals of the transmission channel, so that the serial signal is sent to the transmission channel to be tested through the driver 513. When the impedance of the transmission channel to be measured needs to be measured, the signal transceiving unit 1000 switches to the impedance detection mode, which is The five function register 1013 controls the second step signal generator 1011 to generate a fast step signal, and at the same time, the fifth function register 1013 controls the eighth signal selector 1014 to output a fast step signal, thereby sending the fast step signal to the driver 513 to Test end of the transmission channel to be tested.

S602: A waveform detector is used to obtain a superimposed signal at the test terminal. The superimposed signal represents the superimposition of the fast step signal and the point where the impedance in the transmission channel is discontinuous with the reflected signal of the fast step signal.

Exemplarily, based on the hardware connection shown in FIG. 7, when the first function register 713 detects that the rising edge of the fast step signal leaves the test terminal of the transmission channel under test, the first function register 713 controls the first mode selection switch 715 action, disconnect the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, and connect the switch between the first waveform detector 712 and the test end of the transmission channel to be tested, so that the first waveform detector 712 Collect the superimposed signal from the test end of the transmission channel to be tested.

Exemplarily, based on the hardware connection shown in FIG. 8, the second function register 813 controls the second mode selection switch when it detects that the rising edge of the fast step signal leaves the test terminal of the transmission channel under test 815 action, disconnect the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, and connect the switch between the second waveform detector 812 and the test end of the transmission channel to be tested, so that the second waveform detector 812 Collect the superimposed signal from the test end of the transmission channel to be tested.

Exemplarily, based on the hardware connection shown in FIG. 9, the third function register 913 controls the third mode selection switch when it detects that the rising edge of the fast step signal leaves the test end of the transmission channel under test 915 action, disconnect the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, and connect the switch between the third waveform detector 922 and the test end of the transmission channel to be tested, and the fourth function register 923 controls The third waveform detector 922 collects the superimposed signal from the test end of the transmission channel to be tested.

Exemplarily, based on the hardware connection shown in FIG. 10, the fifth function register 1013 controls the fourth mode selection switch when it detects that the rising edge of the fast step signal leaves the test terminal of the transmission channel under test 1015 action, disconnect the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, and connect the switch between the fourth waveform detector 1022 and the test end of the transmission channel to be tested, and the sixth function register 1023 controls The fourth waveform detector 1022 collects the superimposed signal from the test end of the transmission channel to be tested.

S603: Obtain the impedance value of the point where the impedance is discontinuous in the transmission channel according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal.

Exemplarily, based on the hardware connection shown in FIG. 7, after the first waveform detector 712 obtains the sampled value of the superimposed signal, the first function register 713 can control the first waveform detector 712 to send the sampled value to the CPU, FPGA, etc. The signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampled value and the level amplitude of the incident signal.

Exemplarily, based on the hardware connection shown in FIG. 8, after the second waveform detector 812 obtains the sampled value of the superimposed signal, the second function register 813 can control the second waveform detector 812 to send the sampled value to the CPU, FPGA, etc. The signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampled value and the level amplitude of the incident signal.

Exemplarily, based on the hardware connection shown in FIG. 9, after the third waveform detector 922 obtains the sampled value of the superimposed signal, the fourth function register 923 can control the third waveform detector 922 to send the sampled value to the CPU, FPGA, etc. The signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampled value and the level amplitude of the incident signal.

Exemplarily, based on the hardware connection shown in FIG. 10, after the fourth waveform detector 1022 obtains the sampled value of the superimposed signal, the sixth function register 1023 can control the fourth waveform detector 1022 to send the sampled value to the CPU, FPGA, etc. The signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampled value and the level amplitude of the incident signal.

It can be seen that in the embodiment of the present invention, the signal transceiving unit including the step signal generator sends the fast step signal generated by the step signal generator to the test terminal of the transmission channel to be tested, and the transmission channel to be tested is a signal The signal sending unit in the transceiver unit sends the physical part of the communication signal to the signal receiving unit; the waveform detector is used to obtain the superimposed signal at the test end. The superimposed signal represents the fast step signal and the point where the impedance of the transmission channel is discontinuous. The superposition of the reflected signal of the jump signal; according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal, the impedance value of the point where the impedance is discontinuous in the transmission channel is obtained; thus, based on the signal transmission unit and the signal reception The connection relationship between the unit and the transmission channel performs impedance detection on the transmission channel. The implementation of the technical solution is simple and easy, and the impedance test can be completed quickly.

Example Three

In order to better embody the purpose of the present invention, on the basis of the foregoing method embodiments, further exemplifications are made.

Embodiment 3 of the present invention provides a transmission channel impedance measurement device. As shown in FIG. 11, the device 1100 includes a signal transceiving unit 1101 and a signal processing unit 1102. The signal transceiving unit 1101 includes a third step signal generator 1103 Wherein the signal transceiving unit 1101 is used to send the fast step signal generated by the third step signal generator 1103 to the test end of the transmission channel, and the transmission channel is the transmission communication between the signal transmitting unit and the signal receiving unit The physical entity part of the signal; and acquiring the superimposed signal at the test end, the superimposed signal represents the superimposition of the fast step signal and the reflected signal of the fast step signal by the point where the impedance in the transmission channel is discontinuous; the signal processing unit 1102 uses According to the level amplitude of the fast step signal and the level amplitude of the superimposed signal, the impedance value of the point where the impedance in the transmission channel is discontinuous is obtained.

In an exemplary embodiment, the rising edge time of the fast step signal is equal to the preset duration.

In an exemplary embodiment, the signal transceiving unit 1101 is specifically configured to disconnect the third step signal generator 1103 and the test terminal when it detects that the rising edge of the fast step signal leaves the test terminal of the transmission channel Signal transmission link.

In an exemplary embodiment, the signal transceiving unit 1101 is further used to obtain the transmission channel according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal. After the impedance value of the point where the impedance is discontinuous, when the impedance value is greater than or equal to the preset impedance threshold, the distance between the point where the impedance is discontinuous and the test terminal is obtained according to the sampling time of the superimposed signal.

In practical applications, the signal processing unit 1102 may be an application specific integrated circuit (ASIC, Application Integrated Circuit), a digital signal processor (DSP, Digital Signal Processor), a digital signal processing device (DSPD, Digital Signal Processing, Device) , Programmable logic device (PLD, Programmable Logic Device), field programmable gate array (FPGA, Field Programmable Gate Array), central processing unit (CPU, Central Processing Unit), controller, microcontroller, microprocessor At least one.

Example 4

Embodiment 4 of the present invention provides a non-transitory (non-volatile) computer storage medium that stores computer executable instructions that can execute the method in any of the above method embodiments.

Example 5

Embodiment 5 of the present invention provides a computer program product, the computer program product includes a computer program stored on a non-transitory computer-readable storage medium, the computer program includes program instructions, and when the program instructions are executed by a computer To make the computer execute the method in any of the above method embodiments.

Those skilled in the art should understand that the embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer usable storage media (including but not limited to disk storage and optical storage, etc.) containing computer usable program code.

The present invention is described with reference to flowcharts and/or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each flow and/or block in the flowchart and/or block diagram and a combination of the flow and/or block in the flowchart and/or block diagram may be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded processing machine, or other programmable data processing device to produce a machine that enables the generation of instructions executed by the processor of the computer or other programmable data processing device A device for realizing the functions specified in one block or multiple blocks of one flow or multiple flows of a flowchart and/or one block or multiple blocks of a block diagram.

These computer program instructions may also be stored in a computer readable memory that can guide a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, the instructions The device implements the functions specified in one block or multiple blocks of the flowchart one flow or multiple flows and/or block diagrams.

These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operating steps are performed on the computer or other programmable device to produce computer-implemented processing, which is executed on the computer or other programmable device The instructions provide steps for implementing the functions specified in one block or multiple blocks of the flowchart one flow or multiple flows and/or block diagrams.

The above are only the preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention.

Claims (8)

1. A transmission channel impedance measurement method, wherein the method is applied to a transmission channel impedance measurement device, the device includes a step signal generator, and the method includes:

   Sending the fast step signal generated by the step signal generator to the test end of the transmission channel, where the transmission channel is a physical entity part that transmits the communication signal between the signal sending unit and the signal receiving unit;

   Acquiring a superimposed signal at the test end, where the superimposed signal represents the superposition of the fast step signal and the point where the impedance in the transmission channel is discontinuous with the reflected signal of the fast step signal;

   According to the level amplitude of the fast step signal and the level amplitude of the superimposed signal, the impedance value of the point where the impedance is discontinuous in the transmission channel is obtained.
2. The method according to claim 1, wherein the rising edge time of the fast step signal is equal to a preset duration.
3. The method of claim 1, wherein the method further comprises:

   When it is detected that the rising edge of the fast step signal leaves the test terminal of the transmission channel, the signal transmission link between the step signal generator and the test terminal is disconnected.
4. The method according to claim 1, wherein at the point where the impedance discontinuity in the transmission channel is obtained at the level amplitude of the fast step signal and the level amplitude of the superimposed signal After the impedance value, the method further includes:

   When the impedance value is greater than or equal to a preset impedance threshold, the distance between the point where the impedance is discontinuous and the test terminal is obtained according to the sampling time of the superimposed signal.
5. A transmission channel impedance measuring device, wherein the device includes a signal transceiving unit and a signal processing unit, the signal transceiving unit includes a step signal generator; wherein,

   The signal transceiving unit is used to send the fast step signal generated by the step signal generator to the test end of the transmission channel, and the transmission channel is the physical transmission signal between the signal transmitting unit and the signal receiving unit. A physical part; and acquiring a superimposed signal at the test end, the superimposed signal representing the superimposed signal of the fast step signal and the impedance discontinuity in the transmission channel superimposed on the reflected signal of the fast step signal;

   The signal processing unit is configured to obtain the impedance value of the point where the impedance is discontinuous in the transmission channel according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal.
6. The apparatus according to claim 5, wherein the rising edge time of the fast step signal is equal to a preset duration.
7. The apparatus according to claim 5, wherein the signal transceiving unit is specifically configured to disconnect the step signal generator when it detects that the rising edge of the fast step signal leaves the test end of the transmission channel The signal transmission link with the test terminal.
8. The apparatus according to claim 6, wherein the signal transceiving unit is further configured to obtain the transmission based on the level amplitude of the fast step signal and the level amplitude of the superimposed signal After the impedance value of the point where the impedance is discontinuous in the channel, when the impedance value is greater than or equal to a preset impedance threshold, the distance between the point where the impedance is discontinuous and the test terminal is obtained according to the sampling time of the superimposed signal .

Images