WO2020062225A1

WO2020062225A1 - Mac device and time point estimation method

Info

Publication number: WO2020062225A1
Application number: PCT/CN2018/109060
Authority: WO
Inventors: 沈岚; 朱久运
Original assignee: 华为技术有限公司
Priority date: 2018-09-30
Filing date: 2018-09-30
Publication date: 2020-04-02
Also published as: CN112640355A; CN112640355B

Abstract

An MAC device and a time point estimation method. The MAC device comprises: an MAC core unit and a physical medium attachment (PMA) unit; wherein the PMA unit is configured to acquire a first time point of a first bit, and send the first time point to the MAC core unit; the first time point of the first bit is a time point at which the PMA unit sends the first bit; the MAC core unit is configured to receive a target bit to be sent, and estimate, according to the first time point and the number of bits between the target bit and the first bit, a second time point at which the PMA unit sends the target bit. The solution above helps to improve the accuracy of the estimated second time point.

Description

MAC device and time point estimation method

Technical field

The present application relates to the field of electronic communication technology, and in particular, to a MAC device and a time point estimation method.

Background technique

In a wireless network communication system, message exchanges between network elements are mostly implemented through interface chips. Generally, the interface chip includes a media access control circuit (MAC) and a serializer / deserializer (serdes). The MAC circuit further includes a MAC core unit and a physical coding sublayer. A coding sublayer (PCS) unit and a physical medium connection sublayer (PMA) unit.

In the interface chip, the MAC core unit often needs to estimate the point in time when the PMA unit sends a specific bit to the serdes. For example, based on the Institute of Electrical and Electronics Engineers (Institute of Electrical and Electronics) IEEE 1588 protocol, the MAC core unit Need to estimate the time when the PMA unit sends the start bit of the 1588 message to serdes, and add a timestamp based on the time point to the 1588 message. For example, based on the y1731 protocol, the MAC core unit needs to estimate the PMA unit to serdes. When the start bit of the y1731 message is sent, the time stamp needs to be filled in the corresponding field segment of the y1731 message according to the y1731 protocol.

However, as the fifth generation (5 ^th generation, 5G) advent of mobile communications, the conventional estimation methods can not meet the accuracy requirements of the MAC core unit 5G communication estimated time point, therefore, the estimated MAC core unit The accuracy of the time point needs to be further improved.

Summary of the Invention

The embodiments of the present application provide a MAC device and a time point estimation method to improve the accuracy of the estimated time point.

In a first aspect, an embodiment of the present application provides a media access control MAC device, including: a MAC core unit and a physical medium connection sublayer PMA unit; wherein the PMA unit is configured to obtain a first time point of a first bit, After that, the first time point is sent to the MAC core unit; wherein the first time point of the first bit is the time point when the PMA unit sends the first bit; the MAC core unit is used to receive the target bit to be sent , Based on the first time point and the number of bits between the target bit and the first bit, estimate the second time point at which the PMA unit sends the target bit; wherein the first bit and the target bit are PMA The bits in a data stream that a unit sends continuously.

With the above solution, the obtained first time point when the PMA unit sends the first bit is a more accurate time point. And based on this, since the PMA unit in the MAC device can continuously send out data streams, between the second time point at which the PMA unit sends the target bit and the first time point at which the first bit is sent The time interval can be obtained by more accurately estimating the number of bits between the target bit and the first bit. Therefore, based on the number of bits between the target bit and the first bit, and the first point in time when the PMA sends the first bit, the MAC core unit can more accurately estimate the The second time point is conducive to improving the accuracy of the time point estimated by the MAC core unit.

In a possible implementation manner, the PMA unit is directly connected to the MAC core unit; the PMA unit may directly send the first time point to the MAC core unit through the connection with the MAC core unit.

Because part of the MAC core unit and the PMA unit are transmitted unidirectionally, there is no path for the PMA unit to transmit to the MAC core unit. With the above solution, by adding a direct connection between the PMA unit and the MAC core unit, a path is provided for the PMA unit to send the first point in time to the MAC core unit.

In another possible implementation manner, the PMA unit may send the first time point to the MAC core unit via the PCS unit.

In a possible implementation manner, the PMA unit is further configured to: receive a first signal and a data stream sent by the MAC core unit to the PMA unit through the PCS unit; wherein the first signal is used to instruct the PMA unit to receive from the PCS unit The first bit in the data stream.

Most PMA units do not recognize the function of the first bit from the data stream. With the above solution, the PMA unit can determine and determine the first bit in the received data stream according to the first signal, and then can obtain the first time point of the first bit.

In a possible implementation manner, the first bit may be a bit that meets a preset rule in a data stream sent by the MAC core unit to the PCS unit, where the preset rule includes an interval between any adjacent first bits. The preset number of bits.

By adopting the foregoing solution, the MAC core unit can update the first time point after sending a preset number of bits. Since there will also be a certain error between the clock of the MAC core unit and the clock of the PMA unit, updating the first time point at an interval can reduce the error accumulation between the clocks of the two units, thereby further increasing the time estimated by the MAC core unit. Point precision.

In a possible implementation manner, when the MAC core unit estimates the second time point when the PMA unit sends the target bit according to the first time point and the number of bits between the target bit and the first bit, Specifically used to estimate the second point in time according to the formula t2 = t1 + n * UI; where t1 is the first point in time; t2 is the second point in time; n is the bit spaced between the target bit and the first bit Number of bits; UI is the transmission time for sending 1-bit data by the PMA unit.

In a possible implementation manner, the MAC core unit is further configured to enable a first counter, where the first counter is used to count the number of bits that the MAC core unit continues to receive after receiving the first bit; At the first point in time and the number of bits between the target bit and the first bit, the first counter is stopped before the second point in time when the PMA unit sends the target bit; the value recorded by the first counter is then Is the number of bits spaced between the target bit and the first bit.

In a possible implementation manner, the MAC core unit is further configured to: count the number of received bits through the second counter; when the second counter accumulates 64 bits, restart the second counter and update the current value of the first counter. An additional 2 bits are added to the recorded value.

The PCS unit encodes the data stream received from the MAC core unit, and encodes every 64 bits. One encoding adds 2 bits to the data stream. By using the above scheme, the second counter adds 2 to the currently recorded value of the first counter every 64 bits, so that the counting result of the first counter includes the increased number of bits of the PCS unit code, thereby making the counting result more accurate. , Further improving the accuracy of the time point estimated by the MAC core unit.

In a possible implementation manner, the first signal may be a pulse signal.

In a possible implementation manner, the target bit may be a start bit of a 1588 packet; the MAC core unit may also be configured to add or update a timestamp in the 1588 packet according to a second time point obtained by estimation. .

In a second aspect, an embodiment of the present application provides a media access control MAC device, which includes: a MAC core unit and a physical medium connection sublayer PMA unit; wherein the PMA unit is configured to obtain a third time of a second bit And the third time point is sent to the MAC core unit; the third time point of the second bit is the time point when the PMA unit receives the second bit; the MAC core unit is used to receive the target bit, and Three time points, and the number of bits between the target bit and the second bit, estimate the fourth point in time when the PMA unit receives the target bit; where the target bit and the second bit are consecutively received by the PMA unit Bits in the data stream.

In a possible implementation manner, the PMA unit may send the third time point to the MAC core unit via the PCS unit.

In a possible implementation manner, the MAC core unit is further configured to: receive a second signal and a data stream sent by the PMA unit to the MAC core unit through the PCS unit; the second signal is used to instruct the MAC core unit to send the data from the PCS The second bit in the data stream received by the unit.

Some MAC core units cannot identify the function of the first bit from the data stream. With the above scheme, the MAC core unit can determine the second bit in the received data stream according to the second signal, so that the number of bits that continue to be received after receiving the second bit can be recorded.

In a possible implementation manner, the second bit may be a bit that satisfies a preset rule in a data stream sent by the PMA unit to the PCS unit, where the preset rule includes an interval between any adjacent second bit bits. Set the number of bits.

In a possible implementation manner, when the MAC core unit estimates the fourth time point when the PMA unit receives the target bit according to the third time point, the number of bits between the target bit and the second bit, It is specifically used to estimate the fourth time point according to the formula t4 = t3 + m * UI; where t3 is the third time point; t4 is the fourth time point; m is the interval between the target bit and the second bit Number of bits; UI is the transmission time for the PMA unit to receive 1-bit data.

In a possible implementation manner, the MAC core unit is further configured to: enable a third counter, and the third counter is used to count the number of bits that the MAC core unit continues to receive after receiving the second signal; At the time point and the number of bits between the target bit and the second bit, it is estimated that the third counter is stopped before the fourth time point when the PMA unit receives the target bit; the value recorded by the third counter is the target bit The number of bits spaced from the second bit.

In a possible implementation manner, the MAC core unit is further configured to: count the number of received bits by a fourth counter; when the fourth counter accumulates 64 bits, restart the fourth counter and reset the An additional 2 bits are added to the value currently recorded by the three counters.

The PCS unit decodes the data stream received from the PMA unit. Decoding is performed every 64 bits. A decoding will deduct 2 bits from the data stream. With the above scheme, the fourth counter adds 2 to the currently recorded value of the third counter every 64 bits, so that the counting result of the third counter includes the number of bits subtracted by the PCS unit code, thereby making the counting result more accurate. , Which can further improve the accuracy of the time point estimated by the MAC core unit.

In a possible implementation manner, the second signal is a pulse signal.

In a third aspect, an embodiment of the present application provides a time point estimation method, including: obtaining a first time point of a first bit; wherein the first time point of the first bit is a time point of transmitting the first bit; Receive the target bit to be transmitted, and estimate the second time point at which the target bit is sent according to the first time point and the number of bits between the target bit and the first bit; the first bit and the target bit Bits in a continuously transmitted data stream.

In a possible implementation manner, the second time point can be estimated according to the formula t2 = t1 + n * UI; where t1 is the first time point; t2 is the second time point; n is the target bit and the first bit The number of bits between bits; UI is the transmission time for sending 1-bit data.

In a possible implementation manner, a first counter may also be turned on. The first counter is configured to count the number of bits that are continuously received after the first bit is received, and according to the first time point and the target bit. The number of bits between the first bit and the first bit. Stop the first counter before the second time point when the target bit is estimated to be sent; the value recorded by the first counter can be used as the interval between the target bit and the first bit. The number of spaced bits.

In a possible implementation manner, the number of received bits can also be counted by the second counter; when the second counter accumulates 64 bits, the second counter is restarted and an additional value is added to the currently recorded value of the first counter. Add 2 bits.

In a possible implementation manner, the target bit may be a start bit of a 1588 packet; the MAC core unit may also add or update a time stamp in the 1588 packet according to the second time point obtained by the estimation.

In a fourth aspect, an embodiment of the present application provides another method for estimating a time point, including: acquiring a third time point of a second bit; wherein the third time point of the second bit is a time point of receiving the second bit Receive the target bit, and estimate the fourth point in time when the target bit is received according to the third point in time, and the number of bits between the target bit and the second bit; in which the target bit and the second bit Bits are bits in a continuously received data stream.

In a possible implementation manner, the fourth time point can be estimated according to the formula t4 = t3 + m * UI; where t3 is the third time point; t4 is the fourth time point; m is the target bit and the second bit The number of bits between bits; UI is the transmission time for receiving 1-bit data.

In a possible implementation manner, a third counter may also be turned on. The third counter is used to count the number of bits that are continuously received after the second bit is received; according to the third time point, and the target bit The number of bits between the second and second bits can be stopped before the fourth time point when the target bit is estimated to be received; the value recorded by the third counter can be used as the target bit and the second bit The number of bits spaced between bits.

In a possible implementation manner, the number of received bits can also be counted by a fourth counter; when the fourth counter accumulates 64 bits, the fourth counter is restarted and an additional value is added to the currently recorded value of the third counter. Add 2 bits.

In a fifth aspect, an embodiment of the present application further provides a chip, which includes a MAC device and a parallel / serializer serdes, and a PMA unit in the MAC device is connected to the serdes; wherein the MAC device is the first aspect as described above, or Any implementation manner of one aspect, or a MAC device provided by the second aspect, or any implementation manner of the second aspect.

According to a sixth aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes the chip provided by the fifth aspect.

In a seventh aspect, an embodiment of the present application further provides a program, which when executed on the device, will cause the device to implement the third aspect, or any implementation manner of the third aspect, or the fourth aspect, or Time point estimation method provided by any implementation manner of the fourth aspect

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a wireless network communication system architecture;

FIG. 2 is a schematic diagram of an interface chip structure;

3 is a schematic diagram of a data flow relationship between a MAC core unit and a PMA unit according to an embodiment of the present application;

4 is a schematic flowchart of a time point estimation method according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a first signal inside a MAC device according to an embodiment of the present application; FIG.

6 is a schematic flowchart of a possible time point estimation method according to an embodiment of the present application;

FIG. 7 is a schematic flowchart of a time point estimation method according to an embodiment of the present application.

detailed description

To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application.

In a wireless network communication system, the network elements in the system often need to estimate the transmission or reception time point of a specific bit. Generally, the estimation of the transmission or reception time point of a specific bit is performed by the interface chip in the network element. of.

The following uses the 1588 protocol as an example to introduce the application environment of the interface chip:

FIG. 1 is a schematic diagram of a wireless network communication system architecture. As shown in FIG. 1, the wireless communication system includes multiple base stations (such as base station 41 and base station 42), multiple network elements (NE) (such as NE31, NE32, NE33, NE34, NE35 and NE36), a global positioning system (GPS) signal receiver 1, and a radio network controller (RNC) 2 and the like.

The GPS signal receiver 1 in FIG. 1 is used to generate a time signal with nanosecond accuracy by using a GPS to tame a crystal oscillator. The time signal generated by the GPS signal receiver 1 is used for periodic time synchronization of the entire clock network. Among them, the clock network is a network composed of multiple network elements in FIG. 1 and can also be referred to as a precision timing protocol. PTP) system. The network elements in the PTP system can generally be divided into a boundary clock (BC) node, an ordinary clock (OC) node and a transparent clock (TC) node according to their position and function in the network.

Among them, the BC node, such as NE31 in FIG. 1, has multiple 1588 ports, one of which can be a slave port, and the other ports can be master ports. The BC node synchronizes the frequency and time of the clock with the upper-level device through the slave port (see GPS signal receiver 1 in Figure 1). After that, synchronization packets are sent to multiple lower-level devices (such as NE32 and NE33 in Figure 1) through multiple master ports. The synchronization message includes a timestamp, and the time pointed to by the timestamp is obtained by the BC node according to the time signal received by the slave port and the processing delay of the BC node itself.

An OC node, such as NE35 and NE36 in Figure 1, is usually the start or end device of the clock network. It has only one 1588 port, and this port can only be used as a slave port or a master port.

TC nodes, such as NE32, NE33, and NE34 in Figure 1, have multiple 1588 ports. The TC node forwards all received synchronization messages, measures the dwell time of the synchronization messages after passing through the TC nodes, and updates the time stamp in the synchronization messages.

Generally, when a BC node and a TC node send a 1588 message to a lower-level device, they need to add (or update) a timestamp to the 1588 message. The timestamp is used to instruct the BC node or TC node to send a 1588 message. At the time point, therefore, the BC node and the TC node generally need to configure an interface chip to add a time stamp to the 1588 message by estimating the transmission time point of the start bit of the 1588 message.

FIG. 2 is a schematic structural diagram of an interface chip. As shown in FIG. 2, the interface chip 200 includes: a MAC circuit 201 and a serdes 202, wherein the MAC circuit 201 further includes a MAC core unit 2011, a PCS unit 2012, and a PMA unit 2013.

In the interface chip 200, the MAC core unit 2011 is often used to estimate the time point when the PMA unit sends a specific bit to the serdes. Taking a 1588 message based on the IEEE1588 protocol as an example, the MAC core unit 2011 is often used to estimate the time point when the PMA unit 2013 sends the start bit to serdes202 when the start bit of the 1588 message is received, and then according to the time point Timestamp 1588 packets. After that, the MAC core unit 2011 sends the timestamped 1588 message to the PCS unit 2012. The PCS unit 2012 physically encodes and scrambles the 1588 message, and then sends the physically encoded 1588 message to the PMA unit 2013. The PMA unit 2013 is used for bit width conversion to match the transmitted bit width with the received bit width of serdes202, thereby sending a 1588 message to serdes202, and sending the 1588 message to other network elements via serdes202.

FIG. 3 exemplarily illustrates a data flow relationship between the MAC core unit 2011 and the PMA unit 2013. The MAC core unit 2011 in FIG. 3 can send 80-bit data to the PMA unit 2013 via the PCS unit 2012 within a unit time T. The PMA unit 2013 sent 40bit data to serdes202 within unit time T. In FIG. 3, after the MAC core unit 2011 sends 80-bit data to the PCS unit 2012 within the first unit time T1, it stops sending data to the PCS unit 2012 within the second bit time T2. In the third unit time T3, continue to send 80bit data to the PCS unit 2012, and in the fourth unit time, stop sending data to the PCS unit 2012. For the PMA unit 2013, it maintains the speed of sending 40bit data per unit time to continuously send data to serdes202.

At present, the MAC core unit 2011 mostly estimates the target bit (such as the start bit of a 1588 message) and the estimated delay of the target bit in the MAC circuit 201. The MAC circuit 201 estimates the target bit. The time sent to serdes202. For example, when the time point at which the MAC core unit 2011 receives the target bit is ta and the estimated delay is tdelay, the time point at which the estimated MAC circuit 201 sends the target bit to serdes 202 is ta + tdelay.

When the MAC core unit 2011 estimates the time delay of the target bit in the MAC circuit 201, it is generally estimated according to factors such as the logical architecture and transmission bandwidth of the PCS unit 2012 and the PMA unit 2013. However, the PCS unit 2012 and the PMA unit 2013 will have different logical architectures under different system designs. As a result, the algorithm for estimating the delay needs to be adjusted differently, and the versatility is poor. Moreover, the delay caused by the target bit passing through the asynchronous first-in-first-out (AFIFO) queue in the PMA unit 2013 is uncertain and cannot be accurately estimated, causing the PMA unit 2013 sent by the MAC core unit 2011 to be sent. The accuracy of the time point of the target bit cannot meet the requirements of 5G communication.

Based on this, an embodiment of the present application provides a MAC device to improve the accuracy of estimating the time point when the PMA unit 2013 sends the target bit. The device may be the MAC circuit 201 in the interface chip 200 in FIG. 2, or may be an independent chip, which is not limited in this application. The following uses the MAC circuit 201 in the interface chip 200 as an example for description. Therefore, the MAC device provided in the embodiment of the present application may also be represented by the MAC device 201.

In the MAC device 201 shown in FIG. 2, the PMA unit 2013 is configured to obtain a first time point of a first bit, and send the first time point to the MAC core unit. The first point in time of the first bit is the point in time when the PMA unit sends the first bit.

In the embodiment of the present application, the first bit may be a bit in a data stream sent by the MAC core unit 2011 to the PMA unit 2013 via the PCS unit 2012. In a possible implementation manner, the first bit may be any bit in a data stream sent by the MAC core unit 2011 to the PCS unit 2012. In another possible implementation manner, the first bit may also be It is a bit in the data stream sent by the MAC core unit 2011 to the PCS unit 2012 that meets a preset rule. For example, the MAC core unit 2011 determines a preset number of bits per interval to determine the currently sent bit as the first bit. As shown in FIG. 3, the MAC core unit 2011 determines the 60th bit data sent in T1 as the first bit bit1. The data stream sent by the MAC core unit 2011 to the PCS unit 2012 includes, but is not limited to, various types of messages and code streams. For the PCS unit 2012 and the PMA unit 2013, the specific content of the data stream can be distinguished without Process the received data stream directly.

After receiving the data stream from the PCS unit 2012, the PMA unit 2013 performs a process such as bit width conversion on the received data stream, and then continuously sends the processed data stream. The first bit is also included in the data stream continuously sent by the PMA unit.

In the embodiment of the present application, the PMA unit 2013 may obtain a first time point at which the first bit is transmitted through an internal clock circuit thereof. For example, the first time point at which the PMA unit 2013 collects and sends the first bit bit1 in FIG. 3 is t1.

In a possible implementation manner, after collecting the first time point, the PMA unit 2013 may send the first time point to the MAC core unit 2011 via the PCS unit 2012.

In another possible implementation manner, as shown in FIG. 2, the PMA unit 2013 and the MAC core unit 2011 are directly connected through a wire, and the PMA unit 2013 is directly connected to the MAC core unit 2011 with a first time point. Send to MAC core unit 2011. For most existing PCS units 2012, two-way transmission is not supported. This application provides a PMA unit 2013 with a first time point transmission to the MAC core unit 2011 by adding a wire between the PMA unit 2013 and the MAC core unit 2011. Path, and the structure is simple to implement, low in cost, and higher in transmission speed.

In the MAC device 201 shown in FIG. 2, the MAC core unit 2011 is configured to receive a target bit to be transmitted, and estimate based on the first time point and the number of bits between the target bit and the first bit. The second time point at which the PMA unit 2013 sends the target bit. Among them, after the data stream where the target bit is located is passed through the MAC core unit 2011 and the PCS unit 2012, the data stream where the target bit is located is sent by the PMA unit 2013. The above-mentioned first time point may be the first time point at which the MAC core unit last received and buffered from the PMA unit 2013.

As shown in FIG. 3, the 20th bit received by the MAC core unit 2011 within the third unit time T3 is the target bit bit0. Then, the MAC core unit 2011 may send the bit The first time point estimates the second time point at which the PMA unit 2013 sends bit0. In Figure 3, the interval between bit0 and bit1 is 40 bits. Since PMA unit 2013 sends data continuously, the MAC core unit 2011 can determine the time between sending bit0 and sending bit1 of PMA unit 2013 by calculating the time when 40 bits of data is sent by PMA unit 2013. The time interval between the two, combined with the first time point of sending bit 1 obtained in advance, can obtain the second time point of sending bit 0 by the PMA unit 2013.

In a possible implementation manner, the MAC core unit 2011 estimates the second time point at which the PMA unit 2013 sends the target bit according to the first point in time and the number of bits between the target bit and the first bit. , The second time point can be estimated according to the following formula 1:

t2 = t1 + n * UI (1)

Among them, t1 is the first time point; t2 is the second time point; n is the number of bits between the target bit and the first bit; UI is the transmission time for the PMA unit 2013 to send 1-bit data. In the embodiment of the present application, the UI may be obtained according to the bandwidth of the serdes 202. For example, when the bandwidth of the serdes 202 is 10.3125 Gbps, the value of the UI may be 1 / 10.3125 Gbps ≈ 97 ps.

For the 1588 message, after the MAC core unit 2011 obtains the second time point, it can add (or update) a timestamp to the 1588 message according to the second time point, and add (or update) the 1588 message with the timestamp. The PCS unit 2012 sends it to the PMA unit 2013, and the PMA unit 2013 sends a 1588 packet to serdes202.

With the above solution, the obtained first time point when the PMA unit 2013 sends the first bit is a more accurate time point. And based on this, since the PMA unit 2013 in the MAC device 201 can continuously send data streams, the PMA unit 2013 between the second time point at which the target bit is transmitted and the first time point at which the first bit is transmitted The time interval can be obtained by relatively accurately estimating the number of bits between the target bit and the first bit. Therefore, the MAC core unit 2011 can more accurately estimate the transmission target of the PMA unit 2013 based on the number of bits between the target bit and the first bit, and the first time point when the PMA unit 2013 sends the first bit. The second time point of the bit is conducive to improving the accuracy of the time point at which the estimated PMA unit 2013 sends the target bit. Generally, the error can be controlled within 1 ns, which can meet the needs of 5G communication.

In the embodiment of the present application, the first bit may not have a fixed feature. When most PMA units 2013 send data streams, they will fail to identify the first bit in the data stream, resulting in PMA unit 2013 being unable to obtain the first point in time of the first bit. Based on this, the PMA unit 2013 in the embodiment of the present application is further configured to receive the first signal and data stream sent by the MAC core unit 2011 to the PMA unit 2013 via the PCS unit 2012. The first signal is used to indicate a first bit in a data stream received by the PMA unit from the PCS unit. In the embodiment of the present application, the first signal may be a pulse signal.

In a possible implementation manner, the first signal is a parallel signal of the first bit in the data stream, and the two are synchronized in time. When the PMA unit receives the first bit from the PCS unit, it also receives the first signal. When receiving the first signal, the PMA unit can determine that the currently received bit is the first bit.

In a possible implementation manner, the PMA unit further processes the first signal of the data stream in parallel, and uses the time point when the first signal parallel processing is completed as the first time point.

With the above solution, when the MAC core unit 2011 sends the first bit, the first signal is sent in parallel, and the first signal is used as the parallel signal of the first bit. In the embodiment of the present application, the MAC core unit 2011 may send the first signal through out-of-band transmission, so that the transmission bandwidth of the data stream is not occupied. The first signal is always parallel to the first bit in the PCS unit 2012 and the PMA unit 2013. For example, when the first signal passes through the PCS unit 2012 and the PMA unit 2013, it will undergo the same processing process as the first bit. Therefore, the same transmission delay as that of the first bit will be generated, so as to keep parallel with the first bit. Therefore, when the PMA unit 2013 finishes processing the first signal, it also finishes sending the first bit, so the time point at which the first bit is sent can be determined according to the time point when the processing of the first signal is completed, that is, the first time point. For example, the PMA unit 2013 may use the processing result of the first signal as a trigger condition for obtaining a first time point. When the first signal is processed, the PMA unit 2013 obtains the current time point from the clock circuit as the first time point.

In the embodiment of the present application, the MAC core unit 2011 needs to estimate the second time point at which the PMA unit 2013 sends the target bit according to the number of bits between the target bit and the first bit. In a possible implementation manner, the MAC core unit 2011 is further configured to enable a first counter, where the first counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the first bit; The first counter is stopped before the second time point at which the PMA unit 2013 sends the target bit is estimated based on the first time point and the number of bits between the target bit and the first bit. At this time, the first counter records The value of can be used as the number of bits between the target bit and the first bit.

For example, in FIG. 3, after receiving the first bit bit1, the MAC core unit 2011 starts a first counter. The first counter starts to record the number of bits that the MAC core unit 2011 continues to send after sending the first bit bit1. After receiving the target bit bit0, the MAC core unit 2011 stops the first counter. At this time, the value recorded by the first counter is the bit number of 40 bits, which is the interval between bit0 and bit1.

In the MAC device 201, the PCS unit 2012 will encode the data stream sent by the MAC core unit 2011 based on the provisions of the IEEE 802.3 protocol. Usually, the encoding is performed every 64 bits. Each encoding will add 2 bits to the data stream. . For example, if the size of the data stream sent by the MAC core unit 2011 to the PCS unit 2012 is 128 bits, after being encoded by the PCS unit 2012, the size of the data stream sent by the PCS unit 2012 to the PMA unit 2013 becomes 132 bit. The encoding of the data stream by the PCS unit 2012 will change the size of the data stream, which is not conducive to improving the accuracy of the estimated second time point.

Based on this, in a possible implementation manner, the MAC core unit 2011 is further configured to: use a second counter to count the number of transmitted bits; when the second counter accumulates 64 bits, restart the second counter and restart the An additional 2 bits are added to the currently recorded value of a counter. The second counter after the restart may continue to count the number of bits sent by the MAC core unit 2011 from zero.

With the above scheme, the MAC core unit 2011 adds 2 to the currently recorded value of the first counter through the second counter every 64 bits, so that the counting result of the first counter includes an increase in the data stream due to the encoding of the PCS unit 2012. The number of bits, thereby making the counting result more accurate, and further improving the accuracy of the estimated second time point.

Based on the same technical concept, the embodiment of the present application further provides another MAC device, which can more accurately estimate the time point when the PMA unit receives the target bit. The structure of the MAC device for estimating the time point when the PMA unit receives the target bit provided in the embodiment of the present application is similar to that of the foregoing MAC device for estimating the time point when the PMA unit sends the target bit. Therefore, the embodiment of the present application The MAC device 201 shown in FIG. 2 will continue to be used as an example to describe the MAC device for estimating the time point when the PMA unit receives the target bit.

In the MAC device 201 shown in FIG. 2, the PMA unit 2013 is configured to obtain a third time point of the second bit and send the third time point to the MAC core unit 2011. The third point in time of the second bit is the point in time when the PMA unit receives the second bit.

In the embodiment of the present application, the PMA unit 2013 may continuously receive a data stream from the serdes 202, and the data stream may be in various forms such as a message and a code stream. The PMA unit 2013 performs processing such as bit width conversion on the received data stream and sends it to the PCS unit 2012. The PCS unit 2014 performs decoding and other processing on the received data stream and sends it to the MAC core unit 2011.

In the embodiment of the present application, the second bit may be any bit in the data stream sent by the PMA unit 2013 to the PCS unit 2012, or the data stream sent by the PMA unit 2013 to the PCS unit 2012 satisfies a preset rule. For example, the PMA unit 2013 presets the number of bits every interval to determine that the currently sent bit is the first bit.

Since the transmission direction at the third time point sent by the PMA unit 2013 in the embodiment of the present application is the same as the transmission direction of the data stream received in the MAC device 201, the PMA unit 2013 in the MAC device 201 can send the third time point via the PCS unit. Send to MAC core unit 2011.

The MAC core unit 2011 is configured to receive a target bit, and estimate a fourth time point at which the PMA unit 2013 receives the target bit according to the third time point and the number of bits between the target bit and the second bit. The target bit is a bit in the data stream received by the PMA unit 2012 and is sent to the MAC core unit 2011 via the PMA unit 2013 and the PCS unit 2012.

For example, the MAC core unit 2011 estimates the fourth time point according to the following formula 2:

t4 = t3 + m * UI (2)

Among them, t3 is the third time point; t4 is the fourth time point; m is the number of bits between the target bit and the second bit; UI is the transmission time for the PMA unit 2013 to receive 1-bit data. In the embodiment of the present application, the UI may be obtained according to the bandwidth of the serdes 202.

With the above scheme, since the PMA unit 2013 in the MAC device 201 can continuously receive the data stream from the serdes 202, the PMA unit 2013 is between the fourth time point when the target bit is received and the third time point when the second bit is received The time interval can be obtained by relatively accurately estimating the number of bits between the target bit and the second bit. Therefore, the MAC core unit 2011 can accurately estimate the number of bits received by the PMA unit 2013 based on the number of bits between the target bit and the second bit, and the third time point when the PMA unit 2013 receives the second bit. The fourth time point of the target bit.

In the embodiment of the present application, the second bit may not have a fixed feature. Therefore, most MAC core units 2011 do not have the function of identifying the second bit in the data stream when receiving the data stream. Based on this, the MAC core unit 2011 is also used to: receive the second signal and data stream sent by the PMA unit 2013 to the MAC core unit 2011 via the PCS unit 2012; the second signal is used to instruct the MAC core unit 2011 to receive data from the PCS unit 2012 The second bit in the stream. In a possible implementation manner, the second signal may be a pulse signal. In the embodiment of the present application, the second signal may also be a parallel signal of the second bit. The parallel relationship between the second signal and the second bit is similar to the parallel relationship between the first signal and the first bit. This embodiment of the present application will not repeat them.

In the embodiment of the present application, the MAC core unit 2011 needs to estimate the fourth time point when the PMA unit 2013 receives the target bit according to the number of bits between the fourth bit and the third bit. In a possible implementation manner, the MAC core unit 2011 is further configured to enable a third counter, and the third counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the second bit; At the third point in time and the number of bits between the target bit and the second bit, it is estimated that before the fourth point in time when the PMA unit 2013 sends the target bit, the third counter is stopped; the value recorded by the third counter can be The number of bits used as the interval between the target bit and the second bit.

In a possible implementation manner, the MAC core unit 2011 may determine whether the second bit is received according to the second signal. After receiving the second signal, the MAC core unit 2011 starts a third counter and starts counting the number of bits that continue to be received after receiving the second bit.

In the MAC device 201, the PCS unit 2012 has a decoding function. Decoding is performed once every 64 bits. One decoding will deduct 2 bits from the data stream received by the PCS unit 2012. In order to improve the accuracy of the fourth time point estimated by the MAC core unit 2011, in a possible implementation manner, the MAC core unit 2011 is further configured to: count the number of received bits through a fourth counter; and in the fourth counter, When 64 bits are accumulated, the fourth counter is restarted and an additional 2 bits are added to the currently recorded value of the third counter.

With the above scheme, the MAC core unit 2011 adds 2 to the currently recorded value of the first counter through the fourth counter every 64 bits, so that the counting result of the first counter includes the PMA unit 2013 due to the decoding of the PCS unit 2012. The number of bits subtracted from the received data stream makes the counting result more accurate, thereby improving the accuracy of the fourth time point obtained by the estimation.

Based on the same technical concept, the embodiment of the present application further provides a time point estimation method, which can estimate a time point at which a target bit is transmitted. It should be understood that the point-in-time estimation method provided in the embodiment of the present application may be implemented by software. For example, a processor inside a device that sends a target bit may call a program instruction stored in a memory to execute the method provided in the embodiment of the present application. Point-in-time estimation method. In addition, what is provided in the embodiment of the present application may also be implemented by a combination of hardware and software, for example, a MAC device shown in FIG. 2. For ease of understanding, the embodiment of the present application uses the MAC device shown in FIG. 2 as an example to introduce the time point estimation method provided in the embodiment of the present application. FIG. 4 is a schematic flowchart of a time point estimation method according to an embodiment of the present application. As shown in FIG. 4, the method mainly includes the following steps:

S401: The PMA unit 2013 obtains a first time point of a first bit.

The first time point of the first bit is the time point when the PMA unit 2013 sends the first bit.

S402: The PMA unit sends the first time point to the MAC core unit 2011.

S403: The MAC core unit 2011 receives the target bit to be transmitted, and estimates the second time point at which the PMA unit 2013 sends the target bit according to the first time point and the number of bits between the target bit and the first bit. .

In a possible implementation manner, when the MAC core unit 2011 sends the data stream including the first bit to the PMA unit 2013 via the PCS unit 2012, the MAC core unit 2011 may also send a first signal to the PMA unit 2013 via the PCS unit 2012; The signal is a parallel signal of the first bit; when the PMA unit 2013 processes the data stream, the first signal and the first bit are processed in parallel, and the time when the first bit and the parallel processing complete the first signal is taken as the The first point in time. The first signal may be a pulse signal.

FIG. 5 uses a 1588 message as an example, which is a schematic diagram of a first signal inside a MAC device according to an embodiment of the present application, where a start bit of a 1588 message is a target bit. As shown in FIG. 5, the MAC core unit 2011 sends the first signal and the first bit bit1 to the PMA unit 2013 in parallel, where the first signal is transmitted out of band and does not occupy the transmission bandwidth of the data stream where bit1 is located. The PMA unit 2013 processes and sends bit1, and obtains the time point when the processing of the first signal is completed as the first time point t1. After that, the PMA unit 2013 sends the first time point t1 to the MAC core unit 2011. When the MAC core unit 2011 receives the target bit, it estimates the second time point t2 according to the first time point t1, the number of bits spaced between the target bit and bit1. After that, the MAC core unit 2011 adds (or updates) a timestamp to the 1588 message according to the second time point t2, and sends the 1588 message with the timestamp added (or updated) to the PMA unit 2013 via the PCS unit 2012. After the PMA unit 2013 receives and processes the 1588 message, it sends the processed 1588 message.

In a possible implementation manner, the MAC core unit 2011 may estimate the second time point according to the formula t2 = t1 + n * UI, where t1 is the first time point; t2 is the second time point; n is the target bit The number of bits spaced from the first bit; UI is the transmission time for the PMA unit 2013 to send 1-bit data.

In a possible implementation manner, the MAC core unit 2011 may also enable a first counter. The first counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the first bit; the MAC core The unit 2011 stops the first counter before estimating the second time point at which the PMA unit 2013 sends the target bit based on the first time point and the number of bits between the target bit and the first bit. At this time, the first counter The value recorded by the counter can be used as the number of bits between the target bit and the first bit.

Taking a 1588 message as an example, FIG. 6 is a schematic flowchart of a possible time point estimation method provided by an embodiment of the present application. As shown in FIG. 6, it mainly includes the following steps:

S601: The MAC core unit 2011 sends a first signal to the PMA unit 2013 via the PCS unit 2012, and starts a first counter.

S602: The PMA unit 2013 completes processing of the first signal, and obtains the time point when the processing completes the first signal as the first time point.

S603: The PMA unit 2013 sends the acquired first time point to the MAC core unit 2011.

S604: The MAC core unit 2011 receives and buffers the first time point.

S605: When receiving the start bit of the 1588 packet, the MAC core unit 2011 estimates the second time point according to the value currently recorded by the first counter and the first time point. A 1588 message is time stamped (or updated) according to the estimated second time point.

S606: The MAC core unit 2011 sends (adds or updates) a 1588 packet to the PMA unit 2013 via the PCS unit 2012.

S607: The MAC core unit 2011 determines whether the first time point needs to be updated. If yes, go back to S601; if not, go back to S605.

In the embodiment of the present application, the MAC core unit 2011 may determine a first bit from the received data stream according to a preset bit-bit interval. When a first bit that satisfies a preset rule is received, the MAC core unit 2011 may It can be considered that the first time point needs to be updated.

In a possible implementation manner, the MAC core unit 2011 may also count the number of bits transmitted by using a second counter; when the MAC core unit 2011 accumulates 64 bits, the second counter is restarted and the first counter An additional 2 bits are added to the value currently recorded by the counter.

Based on the same technical concept, an embodiment of the present application further provides a method for estimating a point in time, which can estimate a point in time when a target bit is received. It should be understood that the point-in-time estimation method provided in the embodiment of the present application may be implemented by software. For example, a processor inside a device receiving a target bit may call a program instruction stored in a memory to execute the method provided in the embodiment of the present application. Point-in-time estimation method. In addition, what is provided in the embodiment of the present application may also be implemented by a combination of hardware and software, for example, a MAC device shown in FIG. 2. For ease of understanding, the embodiment of the present application uses the MAC device shown in FIG. 2 as an example to introduce the time point estimation method provided in the embodiment of the present application. FIG. 7 is a schematic flowchart of a time point estimation method according to an embodiment of the present application. As shown in FIG. 7, the method mainly includes the following steps:

S701: The PMA unit 2013 obtains a third time point of the second bit, and sends the third time point to the MAC core unit 2011.

The third point in time of the second bit is the point in time when the second bit is received by the PMA unit 2013. In the embodiment of the present application, the second bit is a bit in a data stream continuously received by the PMA unit 2013. As shown in FIG. 7, the PMA unit sends the data where the second bit is located to the MAC core unit 2011 through the PCS unit 2012.

S702: The MAC core unit 2011 receives the second bit from the PCS unit 2012, and receives the third time point sent by the PMA unit 2013. The MAC core unit 2011 may further buffer the third time point.

S703: The MAC core unit 2011 receives the target bit, and estimates the fourth time point at which the PMA unit 2013 receives the target bit according to the third time point and the number of bits between the target bit and the second bit.

As shown in Figure 7, the PMA unit will continue to send the received data to the MAC core unit through the PCS unit 2012. The MAC core unit 2011 receives the data stream sent by the PCS2012, and when receiving the target bit, it can execute S703.

In a possible implementation manner, the PMA unit 2013 may further generate a second signal; when the received second bit is processed, the second signal is processed in parallel; and the PCS unit 2012 sends the processing to the MAC core unit 2011 When the second bit is later, the second signal is sent in parallel to the MAC core unit 2011 via the PCS unit 2012; the MAC core unit 2011 receives the second signal and the second bit sent in parallel by the PCS unit 2012; The number of bits that continue to be received after the second bit. The second signal may be a pulse signal.

In a possible implementation manner, the second bit is a bit in the data stream sent by the PMA unit 2013 to the PCS unit 2012 that meets a preset rule; the preset rule includes a preset interval between any adjacent second bits The number of bits.

In a possible implementation manner, the MAC core unit 2011 can estimate the fourth time point according to the following formula: t4 = t3 + m * UI, where t3 is the third time point; t4 is the fourth time point; m is the target The number of bits between the bit and the second bit; UI is the transmission time for the PMA unit 2013 to receive 1-bit data.

In a possible implementation manner, the MAC core unit 2011 may further enable a third counter. The third counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the second signal; the MAC core unit 2011 The third counter can be stopped before the fourth time point at which the PMA unit 2013 sends the target bit is estimated based on the third time point and the number of bits between the target bit and the second bit. At this time, the third counter The recorded value can be used as the number of bits between the target bit and the second bit.

In a possible implementation manner, the MAC core unit 2011 may also count the number of received bits through a fourth counter; when the fourth counter accumulates 64 bits, restart the fourth counter and record the An additional 2 bits are added to the value.

Based on the same technical concept, an embodiment of the present application further provides a chip, which includes a MAC device provided by any one of the foregoing embodiments. In a possible implementation manner, the chip further includes serdes. serdes is connected to the PMA unit in the MAC device. It should be understood that there may be two separate circuit structures between the serdes and the MAC device, or they may be integrated into the same circuit structure. For example, serdes may also be integrated with the PMA unit in the same circuit structure. For example, the PCS unit, PMA The unit and the serdes unit may be integrated in the same circuit structure, etc., which are not limited in the embodiment of the present application.

Based on the same technical concept, an embodiment of the present application further provides an electronic device including the MAC device provided in any one of the foregoing embodiments, and capable of performing the time point estimation method shown in FIG. 4 and / or FIG. 7.

Based on the same technical concept, the embodiment of the present application further provides a program, which when executed on a certain device, will cause the device to implement the time point estimation method provided by any of the above embodiments.

As mentioned above, the above embodiments are only used to introduce the technical solution of the present application in detail, but the description of the above embodiments is only used to help understand the methods of the embodiments of the present application, and should not be construed as limiting the embodiments of the present application. Changes or substitutions that can be easily conceived by those skilled in the art should be covered within the protection scope of the embodiments of the present application.

Claims

A medium access control MAC device, comprising: a MAC core unit and a physical medium connection sublayer PMA unit;

The PMA unit is configured to obtain a first time point of a first bit, and send the first time point to the MAC core unit; the first time point of the first bit is sent by the PMA unit A time point of the first bit;

The MAC core unit is configured to receive a target bit to be transmitted, and estimate the PMA unit according to the first time point and a number of bits of an interval between the target bit and the first bit. The second time point at which the target bit is sent; the first bit and the target bit are bits in a data stream continuously sent by the PMA unit.
The MAC device according to claim 1, wherein the PMA unit is further configured to:

Receiving a first signal and a data stream sent by the MAC core unit to the PMA unit via a physical coding sublayer PCS unit; the first signal is used to instruct the PMA unit in a data stream received from the PCS unit The first bit.
The MAC device according to claim 2, wherein the first bit is a bit in a data stream sent by the MAC core unit to the PCS unit that satisfies a preset rule; the preset rule includes There is a preset number of bits between any adjacent first bits.
The MAC device according to any one of claims 1 to 3, wherein the MAC core unit is spaced according to the first time point, and between the target bit and the first bit. When estimating the second time point at which the PMA unit sends the target bit, is specifically used to:

The second time point is estimated according to the following formula:

t2 = t1 ＋ n * UI

Where t1 is the first point in time; t2 is the second point in time; n is the number of bits between the target bit and the first bit; UI is 1 sent by the PMA unit Transmission time of bit data.
The MAC device according to any one of claims 1 to 4, wherein the MAC core unit is further configured to:

Turning on a first counter, where the first counter is used to count the number of bits that the MAC core unit continues to receive after receiving the first bit;

Stopping, before estimating the second point in time at which the PMA unit sends the target bit, based on the first point in time and the number of bits between the target bit and the first bit; The first counter; the value recorded by the first counter is the number of bits between the target bit and the first bit.
The MAC device according to claim 5, wherein the MAC core unit is further configured to:

Counting the number of received bits through a second counter;

When the second counter accumulates 64 bits, restart the second counter and add an additional 2 bits to the value currently recorded by the first counter.
The MAC device according to claim 2, wherein the first signal is a pulse signal.
The MAC device according to any one of claims 1 to 7, wherein the target bit is a start bit of a 1588 packet;

The MAC core unit is further configured to:

Add or update the timestamp in the 1588 packet according to the second time point obtained by the estimation.
A medium access control MAC device, comprising: a MAC core unit and a physical medium connection sublayer PMA unit;

The PMA unit is configured to obtain a third time point of the second bit and send the third time point to the MAC core unit; the third time point of the second bit is the PMA unit A point in time when the second bit is received;

The MAC core unit is configured to receive a target bit, and estimate, based on the third time point, and a number of bits of an interval between the target bit and the second bit, The fourth time point of the target bit; the target bit and the second bit are bits in a data stream continuously received by the PMA unit.
The MAC device according to claim 9, wherein the MAC core unit is further configured to:

Receiving a second signal and a data stream sent by the PMA unit to the MAC core unit via a physical coding sub-layer PCS unit; the second signal is used to instruct the MAC core unit to receive a data stream from the PCS unit The second bit.
The MAC device according to claim 10, wherein the second bit is a bit in a data stream sent by the PMA unit to the PCS unit that satisfies a preset rule; the preset rule includes any There is a preset number of bits between adjacent second bits.
The MAC device according to any one of claims 9 to 11, wherein the MAC core unit is spaced according to the third time point, and between the target bit and the second bit. When estimating the fourth time point when the PMA unit receives the target bit, it is specifically used to:

The fourth time point is estimated according to the following formula:

t4 = t3 + m * UI

Where t3 is the third time point; t4 is the fourth time point; m is the number of bits between the target bit and the second bit; UI is 1 received by the PMA unit Transmission time of bit data.
The MAC device according to any one of claims 9 to 12, wherein the MAC core unit is further configured to:

Enabling a third counter, where the third counter is used to count the number of bits that the MAC core unit continues to receive after receiving the second bit;

Stopping before estimating the fourth time point at which the PMA unit receives the target bit according to the third time point and the number of bits between the target bit and the second bit The third counter; and the value recorded by the third counter is the number of bits between the target bit and the second bit.
The MAC device according to claim 13, wherein the MAC core unit is further configured to:

Counting the number of received bits through a fourth counter;

When the fourth counter accumulates 64 bits, restart the fourth counter and add an additional 2 bits to the value currently recorded by the third counter.
The MAC device according to claim 10, wherein the second signal is a pulse signal.
A point-in-time estimation method, including:

Obtaining a first time point of a first bit; the first time point of the first bit is a time point of sending the first bit;

Receiving a target bit to be sent, and estimating a second time point at which the target bit is sent according to the first point in time and the number of bits between the target bit and the first bit; The first bit and the target bit are bits in a continuously transmitted data stream.
The method according to claim 16, characterized in that, based on the first point in time and the number of bits between the target bit and the first bit, an estimated Second time point, including:

The second time point is estimated according to the following formula:

t2 = t1 + n * UI

Among them, t1 is the first time point; t2 is the second time point; n is the number of bits between the target bit and the first bit; UI is transmission for sending 1-bit data time.
The method according to claim 16 or 17, further comprising:

Turning on a first counter, which is used to count the number of bits that continue to be received after the first bit is received;

According to the first time point and the number of bits spaced between the target bit and the first bit, before estimating the second time point when the target bit is sent, the method further includes:

Stopping the first counter; the value recorded by the first counter is the number of bits between the target bit and the first bit.
The method of claim 18, further comprising:

Counting the number of received bits through a second counter;

When the second counter accumulates 64 bits, restart the second counter and add an additional 2 bits to the value currently recorded by the first counter.
The method according to any one of claims 16 to 19, wherein the target bit is a start bit of a 1588 packet;

The method further includes:

Add or update the timestamp in the 1588 packet according to the second time point obtained by the estimation.
A point-in-time estimation method, including:

Obtaining a third time point of the second bit; the third time point of the second bit is the time point of receiving the second bit;

Receiving a target bit, and estimating a fourth time point at which the target bit is received according to the third point in time, and the number of bits between the target bit and the second bit; The target bit and the second bit are bits in a continuously received data stream.
The method according to claim 21, wherein the target bit is estimated to be received according to the third point in time and the number of bits between the target bit and the second bit The fourth time point, including:

The fourth time point is estimated according to the following formula:

t4 = t3 + m * UI

Where t3 is the third time point; t4 is the fourth time point; m is the number of bits between the target bit and the second bit; UI is the received 1-bit data Transmission time.
The method according to claim 21 or 22, further comprising:

Turning on a third counter, which is used to count the number of bits that continue to be received after the second bit is received;

According to the third point in time and the number of bits spaced between the target bit and the second bit, estimating the fourth point in time before receiving the target bit further includes:

Stopping the third counter; the value recorded by the third counter is the number of bits between the target bit and the second bit.
The method of claim 23, further comprising:

Counting the number of received bits through a fourth counter;

When the fourth counter accumulates 64 bits, restart the fourth counter and add an additional 2 bits to the value currently recorded by the third counter.
A chip characterized by including, for example, a MAC device and a parallel / serializer serdes;

The PMA unit in the MAC device is connected to the serdes; the MAC device is the MAC device according to any one of claims 1 to 15.
An electronic device, comprising the chip according to claim 25.