WO2019095367A1

WO2019095367A1 - Led switch color temperature adjustment control chip and control method, and led illumination lamp

Info

Publication number: WO2019095367A1
Application number: PCT/CN2017/111871
Authority: WO
Inventors: 胡小波; 郑曰; 廖为明
Original assignee: 深圳市芯飞凌半导体有限公司
Priority date: 2017-11-20
Filing date: 2017-11-20
Publication date: 2019-05-23

Abstract

Disclosed are an LED switch color temperature adjustment control chip, an LED switch color temperature adjustment control method, and an LED illumination lamp. An LED switch color temperature adjustment control chip (208) comprises: a power source detection and control signal generation circuit (320), a logic state control circuit (330), a drive circuit (340) and an internal power supply circuit (300), wherein the logic state control circuit (330) comprises: a state information storage unit (308), a state temporary storage and switching unit (313), and a control unit (331). When it is detected that a time interval between the switching off and the switching on of a power source input switch is greater than a first predetermined time duration, a control chip (203) directly enters a logic state before the power source input switch is switched off. After switching to a preferred state by a user, every time a lamp is turned on, the state of the control chip (203) is the state before the last time that the lamp was turned off without requiring re-switching by means of the switch. The present invention has the advantage of being simple and convenient to operate, and the user experience is improved.

Description

\¥0 2019/095367 卩(:17€说17/111871

Background technique

I _I is also a color temperature scheme implemented by an existing control chip, which is very complicated, and requires an independent detection circuit to detect the input switch action. Complex circuits not only cause the cost of the drive power

_{[0003] It} is necessary to reduce the cost and volume of the drive power source, for example, for solutions such as bulbs and spotlights, volume and cost are critical. In addition, user convenience is also a problem to be considered.

[0004] The most common dual power switch color temperature scheme is shown in FIG. 1. In this scheme, the switch color temperature control chip 108 detects the state of the input switch 100 by detecting the input waveform 101. And controlling the state of the dual constant current power supply system 110 according to the state of the input switch 100. The dual constant current power supply system 110

Chip control, the pin and foot of the switch color temperature control chip in the scheme shown in FIG. ₁ are respectively connected to the power pins of two driving chips in the dual constant current power system, and are used for controlling the opening and closing of the driving chip. .

_[0005] The scheme shown in FIG. ₁ can only implement the switch color temperature function, that is, the state can only be maintained for a short period of time after power-off, because the state retention time is determined by the size of the capacitor ₁₀₇ . When the input switch ₁₀₀ is turned off, the switching regulator ₁₀₈ is powered by the color temperature control chip energy capacitor _107, the capacitor ₁₀₇ when the state of the energy bled off the switching regulator chip ₁₀₈ to maintain color temperature control disappears, returns to the initial state. In other words, using such a core

The status may not be what the user likes. Therefore, the user needs to switch back to his favorite through the switch \¥0 2019/095367 ?〇1^2017/111871 status, it may take several switching actions to switch to its favorite state, the operation is cumbersome, for use

Return to the default original state, the user needs to gradually switch to the like by the switch's open-close action

Film, including,

_{[0008] a} power detection and control signal generating circuit, configured to detect a power signal, generate and output a control signal according to the power signal;

_{[0009] a} logic state control circuit, configured to output logic state information according to the control signal, and when the time interval that the power input switch is turned off and closed is greater than the first predetermined duration, the control chip directly enters the power input switch before being disconnected Logic state

0 _{010] a} driving circuit that receives logic state information output by the logic state control circuit, and accordingly drives the output

0 _011] an internal power supply circuit for providing working power for each circuit inside the control chip;

_[0012] wherein the logic state control circuit comprises:

_{[0013] a} state information storage unit, configured to store logic state information after the internal logic state of the control chip is stable, and still retain data after power off;

_a state temporary storage and switching unit communicatively coupled to the state information storage unit, and selectively performing an operation of: acquiring logic state information from the state information storage unit or temporarily storing the logic information under the control of the control unit Transmitting status information to the status information storage unit; and switching to the next logic state and temporarily storing logic state information of the next logic state according to the currently temporarily stored logic state information and a predetermined logical order;

[0015] a control unit, configured to perform the following operations according to the control signal: \¥0 2019/095367 ?〇1^2017/111871

_[0016] controlling one of the state information storage unit and the state temporary storage and switching unit to output the stored or temporarily stored logic state information to the driving circuit;

_[0017] Control logic state between the state information and the temporary status storage unit and the switching unit and pass each other information

_[0018] controlling the state temporary storage and switching unit to switch to the next logic state and temporarily storing the logic state information of the next logic state.

Include: Two sets of ₁ ^) different color temperatures and ₁ ^) power supply connected to it, and ₁ ^) switch as described above

Between the switch and the rectifying circuit, the first control end and the second control end of the ₁ ^) switch color temperature control chip are connected to the power supply pin of the dual constant current power supply; or

The method includes the following steps:

_[0024] detecting a power signal, determining, according to the power signal, whether a time interval of opening, closing, and opening-closing of the power input switch is greater than a first predetermined duration, and generating and outputting a corresponding control signal according to the determination result;

_{[0025] 6.} Output logic state information according to the control signal, and when determining that the power input switch is closed and the off-close time interval is greater than the first predetermined time length, the control chip directly enters before the power input switch is turned off. Logic state

source.

Advantageous effects of the invention

Beneficial effect

_[0027] The present invention has the following beneficial effects: Since the _LED switch color temperature control chip of the present invention has a state information storage unit for storing logic state information after the internal logic state of the control chip is stabilized, it is powered off. After that, the data can still be maintained, that is, the state when the power is turned off last time can be memorized; and when the time interval between the power input switch being turned off and closed is greater than the first predetermined time period, the logic state control circuit causes the control chip to directly enter before the power input switch is turned off. The logic state, that is, after the user switches to the favorite state, the state of the power-on control chip is turned on before the last time the light is turned off, and there is no need to switch through the switch again. It has the advantages of simple operation and convenience, which improves the user experience. In addition, the _LED switch color temperature control chip of the present invention can reduce the volume of the driving power source and reduce the cost by integrating the power source detecting and control signal generating circuit, the logic state control circuit, the driving circuit, the internal power supply circuit and the like on one chip.

_[0028] Further, in the embodiment of the present invention, the internal power supply circuit includes a power supply _VDD and the output terminal of the power output terminal _VCC, _VDD power supply terminal dedicated to providing an output to the _VDD power supply and a switching state storage unit, purpose of this design When the power input switch is turned off, the current loss of the _VDD pin is minimized, so a smaller capacity _VDD capacitor can be kept for a long enough time.

_[0029] In the embodiment of the present invention, the _LED switch color temperature control chip also rewrites the information in the internal register to the state information storage unit after each startup and continuous operation for a period of time, and ensures the state information storage unit. The information in it will not be lost. At the same time, it is possible to avoid frequent reading and writing of the status information storage unit to extend its service life. In the design of the fourth control signal a third delay control signal _s60ms _\ _ at least a predetermined time interval, is to ensure that when the state of writing information to the system information storage unit stable logic state.

Brief description of the drawing

DRAWINGS

_[0030] The present invention will be further described below in conjunction with the accompanying drawings and embodiments, in which:

_[0031] FIG. 1 is a diagram of a conventional dual power LED color temperature control circuit of the switching regulator;

_[0032] FIG. 2 is a block diagram of a first embodiment of an LED color temperature control circuit of the switching regulator of the present invention, wherein double \¥0 2019/095367 ?〇1^2017/111871 constant current power supply;

Invention embodiment

Embodiments of the invention

_[0042] The present invention contemplates a brand new ₁ ^) color temperature adjustment scheme, as shown in FIG. ₂ , in the present invention ₁ ^) switching modulation

The output terminal waveform _{201 of} the switch ₂₀₀ is detected, and the state of the input switch ₂₀₀ is judged based on the waveform ₂₀₁ . Since the voltage at the output of the input switch ₂₀₀ is a high voltage of several hundred volts, the 0 pin and the input switch

Switch color temperature control chip ₂₀₈ ? ₁ and _{2 are} connected to the power supply pins of the two power control chips in the dual constant current power supply system ₂₀₉ for controlling the opening and closing of the power control chip. In some embodiments, ? ₁ and? 2 The internal pull-down circuit, when it is necessary to turn off one of the dual constant current power supply system ₂₀₉ , only need to pull the power supply pin of the corresponding power control chip through the internal pull-down circuit.

\¥0 2019/095367 ?〇1^2017/111871

, ie, for example, the current color temperature is white, switching to the next state only requires disconnecting the input switch _200, and

Related to loss) When the input switch _{200 is} reclosed, the control chip ₂₀₈ switches to the next state, thereby

The temperature control chip ₂₀₈ internally has a state information storage unit capable of retaining data after the power is turned off, and the state information storage unit is configured to record the current state of the control chip, and the state information storage unit capable of maintaining data after the power is turned off has a power failure. Save the characteristics of the information, and can maintain it for a long time, so it can be

The preference is different. If the input switch _{200 is} turned back to the initial state after a period of time, the color temperature of the initial state may not be the color temperature that the user likes, in order to adjust to the preferred color temperature.

_The power source detection and control signal generating circuit _{320 is} configured to detect a power source signal, generate and output a control signal according to the power source signal.

_{[0046] a} logic state control circuit ₃₃₀ for outputting logic state information according to the control signal, and when the power is input

The size of the loss. \¥0 2019/095367 ?〇1^2017/111871

[0047] a driving circuit 340, which receives logic state information output by the logic state control circuit, and accordingly drives the output

source.

_{[0049] As} shown in Figure _3, the logic state of the control circuit ₃₃₀ further comprising:

_{[0050] The} state information storage unit ₃₀₈ is configured to store logic state information after the internal logic state of the control chip is stabilized, and can still maintain data after the power is turned off.

_a state temporary storage and switching unit _313, which is communicably connected to the state information storage unit, and selectively performs an operation of acquiring logic state information or temporarily storing the logic state from the state information storage unit under the control of the control unit. The information is transferred to the status information storage unit; and according to the currently temporarily stored logic status information and the predetermined logical order, switching to the next logic state and temporarily storing the logic status information of the next logic state. and

_{[0052] The} control unit ₃₃₁ performs the following operations according to the control signal:

_{[0053] one of the} control state information storage unit and the state temporary storage and switching unit outputs the stored or temporarily stored logic state information to the driving circuit;

[0054] controlling the mutual transfer of logical state information between the state information storage unit and the state temporary storage and switching unit;

_{[0055] The} control state temporary storage and switching unit switches to the next logic state and temporarily stores the logic state information of the next logic state.

Storage circuit _/ structure implementation.

The drive circuit 340 and the power detection and control signal generating circuit 320. Compared with the embodiment shown in Figure 3, the figure

0: power-on detection circuit 301 and control signal generation circuit 322. Wherein the switch input signal detecting circuit 3 \¥0 2019/095367 ?〇1^2017/111871

The signal generating circuit ₃₂₂ generates a control signal from the latter and transmits it to the control circuit 331 in the logic state control circuit ₃₃₀ .

The hold time of the state information temporarily stored in the temporary storage and switching unit ₃₁₃ . Other circuits inside the chip, such as power detection and control signal generation circuits, status information storage units, drive circuits, etc., are provided by the power supply output terminal (: (: power supply as the working power supply.

_{[0059] It} should be noted that, in the embodiment of the present invention, the generation of the control signal may be implemented by a hardware circuit, or may be implemented by software or a combination of software and hardware.

_[0060] In an embodiment combining software and hardware in, the power generated by the detection circuit detects a signal from the signal circuit (e.g., a signal generating chip) installed in the control program determines that the input power OFF switch _200, the closure according to the power signal, and off Whether the time interval of opening and closing is greater than the first predetermined time length, and generating and outputting a corresponding control signal according to the judgment result. specifically:

_[0061] when it is determined that the power input switch is closed and the time interval of opening and closing is greater than the first predetermined length of time,

The state information and the simultaneous control state information storage unit transfer the stored logic state information to the temporary storage in the state temporary storage and switching unit.

_[0062] When it is determined that the power input switch is off, a second control signal is generated and outputted to control the state temporary storage and the switching unit switches to the next logic state and temporarily stores the logic state information of the next logic state.

_[0063] When it is determined the power input and the disconnect switch is closed - closing time interval is less than equal to a first predetermined duration, generates and outputs the third control signal _ ₇ for controlling the state storage unit, and a switching circuit to temporarily drive the output

And outputting a fourth control signal ₆ 〇 _for controlling the state temporary storage and switching unit to transfer the temporarily stored logic state information to the state information storage unit, wherein the fourth control signal _{60 is} delayed by the third control signal

\¥0 2019/095367 ?〇1^2017/111871 The status is stable. If an action of opening and closing the switch is detected before the state is stabilized (corresponding to the generation of the fourth control signal ₈₆ 〇 ₁₁₁₈ ), a new second control signal and a new third control signal are generated and output: _{/ \¥} _, The fourth control signal ₈₆ 〇 _{1118 is} generated and output until the state is stable.

The generation of the control signal is implemented by a hardware circuit.

_[0065] As shown in FIG. 5, the power detection and control signal generating circuit includes:

_{[0066] The} switch input signal detecting circuit ₃₀₃ has an input terminal connected to the chip (: foot, and is input according to the detection result

[0068] 0: the power-on detection circuit 301, the input end of which is connected to the 0: power output end of the internal power supply circuit 300,

_{[0069] A} control signal generating circuit comprising four circuits as follows:

_a first control signal generating circuit that detects the first output signal 〇_ according to the switch input signal detecting circuit ₃₀₃

3 ₀₁ output _\ ^ _0! detection result signal _{Vcc_por} generates a first control signal) _^ , for controlling the state information storage unit to output the stored logic state information to the driving circuit, and simultaneously controlling the state information storage unit to store the stored logic state The information is transferred to the state temporary storage and temporary storage in the switching unit;

_{[0071] a} second control signal generating circuit that generates a second control signal according to the second output signal 〇_ of the switch input signal detecting circuit ₃₀₃ , for controlling the state temporary storage and switching unit to switch to the next logic state and temporarily storing Logic state information of a logic state;

_a third control signal generating circuit that detects the first output signal 〇^_ according to the switch input signal detecting circuit ₃₀₃

Temporary logic state information; and

_a fourth control signal generating circuit that generates a fourth control signal _8601118 according to the first output signal 〇_ of the switch input signal detecting circuit ₃₀₃ for controlling the state temporary storage and switching unit to transmit the temporarily stored logic state information Stored in the status information storage unit, wherein the fourth control signal ₈₆ 〇 _{1118 is} delayed by the third control \¥0 2019/095367 ?〇1^2017/111871 Signal _\¥ _ at least one predetermined time interval.

[0074] As shown in FIG. 5, the first control signal generating circuit, the second control signal generating circuit, the third control signal generating circuit, and the fourth control signal generating circuit are provided by the first delay circuit 305 and the second delay circuit 306. a third delay circuit 307, an AND gate 319 and a 1 flip-flop 304; wherein

[0075]

Power-on detection circuit 302 and 0: the output end of the power-on detection circuit 301, the output end of which is connected to the first input terminal 3 of the flip-flop 304;

[0076] The input end of the first delay circuit 305 is connected to the first output signal 〇_[ terminal of the switch input signal detecting circuit 303, and the fourth control signal ₈₆ 〇! _{118 is} output for controlling the on/off of the first switch circuit 309. ;

The input terminal of the second delay circuit 306 is connected to the first output signal of the switch input signal detecting circuit 303. _[ terminal, the output is connected to the second input of the flip-flop 304

a first output of the flip flop 304

Output the first control signal: _/\¥ , the second output

Output the third control signal _\¥ _ ;

_{[0079] The} input of the third delay circuit ₃₀₇ is connected to a second output signal of the switch signal detection circuit 303 inputs 〇1 _1? Terminal which outputs second control signal to the state storage and a switching unit.

[0080] The control unit includes:

_{[0081] The} first switch circuit _{309 is} configured to connect the output of the state temporary storage and switching unit to the input end of the state information storage unit under the control of the fourth control signal _8601118 to temporarily store the state temporary storage and switching unit. The logic state information is transmitted to the state information storage unit;

_{[0082] The} second switch circuit _{310 is} configured to connect the input terminal of the state temporary storage and switching unit to the output end of the state information storage unit under the control of the first control signal to store the logic state information stored by the state information storage unit. Transfer to the status temporary storage and switching unit;

_a third switch circuit ₃₁₁ , configured to connect the output end of the state information storage unit and the input end of the drive circuit under the control of the first control signal to output the stored logic state information to the drive circuit;

\¥0 2019/095367 ?〇1^2017/111871 The output end and the input end of the drive circuit to output the temporarily stored logic state information to the drive circuit.

The image is used as an image of the _EEPROM memory unit _308' in order to avoid frequent reading and writing of the _EEPROM memory cells. The basic working principle is to power on for the first time (the so-called initial power-on refers to when the input switch is closed).

The information in the storage unit _308' is written into the internal register _313' , and all subsequent processing of the information is completed in the internal register, and the control chip ₂₀₈ does not perform any action on the _EEPROM storage unit, but only after powering up for a period of time. (after-steady state) information of the internal register rewritten to _EEPROM memory cells, This prevents frequent read and write to the _EEPROM memory cell.

The third switch circuit _{311 is} closed to input the state in the _EEPROM storage unit _308' to the drive circuit _3.

The switch circuit _{310 is} closed to write the state in the _EEPROM memory cell _308' to the internal register while the fourth switch circuit _{312 is} closed and the third switch circuit _{311 is} open, since the _EEPROM memory cell is now in the same state as the internal register. So, such a switch does not cause a change in the logic state.

The state is directly output from the internal register, that is, the fourth switch circuit _{312 is} closed and the third switch circuit _{311 is turned} off.

The power supply of the circuit consists of (: (: power supply). The purpose of this design is that when the input switch _{200 is} disconnected, the current loss of _\DD rn is the smallest, so a smaller capacity capacitor can be kept for a long enough time.

Will be lost because the time is too long, the control chip ₂₀₈ also specifically writes the status information in the internal register to the _EEPROM storage unit after each startup and continuous operation for a period of time, to ensure the _EEPROM storage

\¥02 _{019/095367 ?} 〇1^2 _017/111871 will re-close the internal logic state within a few seconds after switching off to switch to the next state, otherwise the state will remain in the previous state, so it is possible to use the process. It is not necessary to change the logic state of the control chip ₂₀₈ for a long period of time. If the information in the _EEPROM storage unit is not regularly updated, the stored information may be easily lost. In order to achieve the above functions, the control chip passes each time the input switch _{200 is} closed, and the chip works for a period of time and then passes one.

The write signal _{8601118 is} used to write the information in the internal register _313' into the _EEPROM storage unit _308' .

[ ₀₀₈₉ ] At the initial power-on, the internal signal of the ₁ ^) switch color temperature control chip ₂₀₈ is as shown in FIG. ₆ . The waveform ₄₀₀ of the voltage is the output waveform of the input switch ₂₀₀ detected by the control chip _208. When the waveform is low, the input switch ₂₀₀ is in an off state, and when the waveform appears like a square wave, the input switch ₂₀₀ is present.

The rise is slower. 0: The input of the power-on detection circuit ₃₀₁ is (: (:, for detecting 0: voltage), and when 0: the voltage reaches a preset reference voltage, a pulse signal (^ 〇 _{3 ·} (waveform ₄₀₃ ) is output.

When the reference voltage is greater than the preset reference voltage, the output signal ( ₁ ( _{1_} ^ (waveform ₄₀₄ ) changes from high level to low level.

The timing of the circuit ₃₁₁ and the fourth switching circuit _{312 is} as shown in FIG. ₆ . The timing shown in Figure ₆ is the associated waveform of control chip ₂₀₈ upon initial power up. As can be seen from Fig. ₆ , the first time the power is turned on, the _\¥ signal is at the high point level, and is used to control the switch ₃₁₁ to input information in the memory unit of the _£1?1 ^^ into the driving circuit, when the continuous working time exceeds a certain time. , _{8301 ^} pulse signal (waveform ₄₀₅₎ ₁ ^ of flip-flop ₃₀₄ is reset, the drive circuit converts the input signal into an output signal ₃₁₄ of the internal register _313.

. As can be seen from Figure 7, _8301118 (waveform 503) and ₈₆ 〇 ₁₁₁₈ (waveform 504) are respectively (waveform 5 \¥0 2019/095367 ?〇1^2017/111871

Pulse, which is used for the carry signal of internal register 313.

[0091] For example, in an embodiment of the invention,

[0099] In another embodiment of the invention,

[0103] In actual operation, the delay time is not a certain value. The above example is only an approximate range. For example, the approximate range of "about 30 milliseconds" may be 30 ± 5 milliseconds, and the approximate value of "about 30 milliseconds" The range can be 60 ± 10 milliseconds, and the approximate range of "about, 16 milliseconds" can be 16 ± 3 milliseconds.

Ground.

_[0105] In the embodiment shown in FIG. ₂ , the _LED power supply is a dual constant current power supply, and the _CLK pin of the _LED switch color temperature control chip is connected between the switch ₂₀₁ and the rectifier circuit, and the _LED switch color temperature control chip is A control terminal _P1 and a second control terminal _{P2 are} connected to the power supply pins of the dual constant current power supply.

_[0106] The _LED switch color temperature control chip proposed by the present invention can be applied to the state shown in FIGS. ₈ and ₉ in addition to the state in which the constant current control chip can be used in the dual constant current power supply system.

_[0107] As shown in FIG. ₈ , in the second embodiment of the _LED switch color temperature control circuit of the present invention, the _LH ) power supply is an isolated flyback switching power supply, that is, the _LED switch color temperature control chip of the present invention can be used for In the isolated flyback switching power supply, the switches for controlling the two color _LEDs of different color temperatures are used to realize the control without color temperature, wherein the flyback switching power supply represented by ₁₆ is used. _8, _LED chip color temperature control switching regulator connected to the output _CLK3 was isolated flyback switching power supply, _LED control terminal of the first switching regulator chip color temperature control of a second control terminal _P ₁ and _P2, respectively The first _LED group and a second group of _LED connector.

_[0108] As shown in FIG. _9, the color temperature of _{the LED} switching regulator control circuit of a third embodiment of the present invention embodiment, _LH) power supply is a buck type switching power supply. That is, the _LED switch color temperature control chip of the present invention can be used in a buck switching power supply, and is used for controlling two sets of _LED switches of different color temperatures to realize control without color temperature, wherein ₁₇ represents a buck switching power supply. As shown in FIG. ₉ , the _CLK pin of the _LED switch color temperature control chip is connected to the output end of the buck switching power supply, and the first control terminal _P1 and the second control terminal _{P2 of the} _LED switch color temperature control chip are respectively associated with the first _LED _LED group and the second group is connected.

_[0109] FIG. ₁₀ is a flowchart _LED color temperature control method of the switching regulator of the present invention. As shown in FIG. ₁₀ , the method for controlling the color temperature of the _LED switch of the present invention comprises the following steps:

_[0110] Step _A , the power detection and control signal generating circuit detects the power signal, and determines whether the time interval of opening, closing, and opening-closing of the power input switch is greater than the first predetermined time according to the power signal, and generating according to the judgment result The corresponding control signal is output.

_[0111] Step _B , the logic state control circuit outputs logic state information according to the control signal, and when it is determined that the power input switch is closed and the off-close time interval is greater than the first predetermined duration, the control chip directly enters the power input switch before being disconnected. The logical state.

_[0112] Step _C : The driving circuit outputs a driving signal according to the received logic state information to turn on or off the power supply of the corresponding L _ED . \¥0 2019/095367 ?〇1^2017/111871

1^) A specific implementation of the switch color temperature control method. As shown in FIG. ₁₁ , the ₁ ^) switch color temperature control method includes:

_[0114] In step _{0, the} power detection and control signal generating circuit detects the power signal, and determines whether the time interval of opening, closing, and closing of the power input switch is greater than the first predetermined time length according to the power signal.

_[0115] In the eight step _01, the input switch is turned off according to the power determined in the next step. Wherein, when the power switch is off input, proceeds to step eight _1, is not disconnected returns to step _80.

_[0116] At step ₈₀₂ _{, the} next execution step is determined based on whether the power input switch is closed. Wherein, when the power input switch is closed, step ₀₃ further determines eight disconnected - the closed interval is greater than a first predetermined length, it is not closed returns to step _80.

_[0117] In the eight step _03, when it is judged OFF - closing interval is greater than a first predetermined duration, eight step _2, otherwise step ₃ eight.

_[0118] In step ₁ , when it is determined that the power input switch is turned off, generating and outputting a second control signal;

_[0119] In step 八_2, when it is determined that the power input switch is closed and the off-close time interval is greater than the first predetermined time length, the first control signal is generated and output: _{/ ¥;}

_[0120] In step VIII _, when it is determined that the power input switch is closed and the off-close time interval is less than or equal to the first pre-

The system logic state is stable when the information is written in the unit;

_[0121] Step ₁ eight, eight step _2, step ₃ after eight circuits controlled by the logic state of the step, step ₆₂

, step 63.

And temporarily store the logic state information of the next logic state,

_[0123] At step _{62, the} state information storage unit is controlled to output the stored logic state information to the drive circuit according to the first control signal ₇ , and the control state information storage unit transfers the stored logic state information to the state temporary storage and switching unit. Temporary storage.

Temporary logic state information; and according to the fourth control signal ₆ 〇 control state temporary storage and switching unit will be \¥0 2019/095367 ?〇1^2017/111871 The temporary logic status information is transferred to the status information storage unit for storage.

_{[0125] After} step ₆₂ and step ₆₃ , the step (:, the driver circuit outputs according to the received logic state information)

The state when the light is turned off once, that is, after the user switches to the favorite state, the state of the light-off control chip is the last state each time, and there is no need to switch through the switch again.

The unit can save status information even when there is no power. The control chip first inputs the information in the _EEPROM storage unit into the driving circuit when the power is first turned on, thereby ensuring that the state of the control chip is the state when the light is turned off last time, and inputting the information in the _EEPROM storage unit into the internal register. The input signal of the drive circuit is then switched from the output of the _EEPROM memory cell to the output signal of the internal register.

The information in the internal register is rewritten to the _EEPROM memory unit every time the light is turned on.

_The above embodiments are merely illustrative of the technical concept and the features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the contents of the present invention and to implement the present invention without limiting the scope of the present invention. Equivalent changes and modifications made within the scope of the claims of the present invention should fall within the scope of the appended claims.

Claims

\¥0 2019/095367 卩(:17€说17/111871

a power detection and control signal generating circuit for detecting a power signal, generating and outputting a control signal according to the power signal;

a logic state control circuit, configured to output logic state information according to the control signal, and cause the control chip to directly enter a logic before the power input switch is turned off when a time interval in which the power input switch is turned off-closed is greater than a first predetermined duration a driving circuit that receives logic state information output by the logic state control circuit, and thereby outputs a driving signal to turn on or off a corresponding power supply of ₁ ^);

An internal power supply circuit is configured to provide a working power supply for each circuit inside the control chip; wherein the logic state control circuit includes:

a state information storage unit, configured to store logic state information after the internal logic state of the control chip is stable, and still retain data after power failure;

a state temporary storage and switching unit communicatively coupled to the state information storage unit, and selectively performing an operation of: acquiring logical state information from the state information storage unit or transmitting the temporarily stored logical state information under control of the control unit And the state information storage unit; and switching to the next logic state and temporarily storing the logic state information of the next logic state according to the currently temporarily stored logic state information and the predetermined logic order; and a control unit, configured to The control signal performs the following operations: controlling one of the state information storage unit and the state temporary storage and switching unit to output the stored or temporarily stored logic state information to the driving circuit;

Controlling the mutual transfer of logical state information between the state information storage unit and the state temporary storage and switching unit; and

Controlling the state temporary storage and switching unit to switch to the next logic state and temporarily storing the logic state information of the next logic state.

The generating and outputting the control signal according to the power signal includes: _{\¥0 2019/095367 ?} 〇 ₁ ^ _2017/111871 According to the power signal, it is determined whether the time interval of opening, closing, and opening-closing of the power input switch is greater than the first predetermined duration, and is generated and output according to the judgment result. Corresponding control signal;

When it is determined that the power input switch is off, generating and outputting a second control signal ( ) for controlling the state temporary storage and switching unit to switch to the next logic state and temporarily storing the logic state information of the next logic state;

When it is determined that the power input switch is closed and the off-close time interval is greater than the first predetermined time length, generating and outputting a first control signal) for controlling the state information storage unit to output the stored logic state information to the driving circuit And simultaneously controlling the state information storage unit to transfer the stored logic state information to the temporary storage in the state temporary storage and switching unit;

When it is determined that the power input switch is closed and the off-close time interval is less than or equal to the first predetermined time length, generating and outputting a third control signal _) for controlling the state temporary storage and switching unit to output the temporarily stored to the driving circuit And generating and outputting a fourth control signal ( _8601118 ) for controlling the state temporary storage and switching unit to transfer the temporarily stored logic state information to the state information storage unit, wherein the fourth control The signal ( _8601118 ) is delayed by the third control signal (_) for at least a predetermined time interval.

[Claim 3]

among them,

The 0: the power output is used to provide 0: power to the power detection and control signal generating circuit, the state information storage unit, and the driving circuit;

[Claim 4]

\¥0 2019/095367 ?〇1^2017/111871 The power detection and control signal generation circuit includes:

(1_ _81);

a power-on detection circuit ( ₃₀₁ ) having an input terminal connected to the 供电: power supply output end of the internal power supply circuit ( ₃₀₀ ), and outputting 〇 according to the detection result: a detection result signal

_〇]·)

a first control signal generating circuit, configured to detect a circuit according to the switch input signal ( ₃₀₃₎

The state information storage unit outputs the stored logic state information to the driving circuit, and simultaneously controls the state information storage unit to transfer the stored logic state information to the state temporary storage and temporary storage in the switching unit;

a second control signal generating circuit, configured to detect a circuit according to the switch input signal ( ₃₀₃₎

The state temporary storage and switching unit switches to the next logic state and temporarily stores the logic state information of the next logic state;

a third control signal generating circuit, configured to detect a circuit according to the switch input signal ( ₃₀₃₎

Generating a third control signal _) to control the state temporary storage and switching unit to output the temporarily stored logic state information to the driving circuit;

a fourth control signal generating circuit, configured to generate a fourth control signal ( _8601118 ) according to the first output signal (<:11^_£) of the switch input signal detecting circuit ( ₃₀₃ ) for controlling the state temporary storage And the switching unit transmits the temporarily stored logic state information to the status information _{\¥02019/095367 ?} 〇 ₁ ^ _{2017/111871 is} stored in the storage unit, wherein the fourth control signal ( _8601118 ) is delayed by the third control signal _) for at least a predetermined time interval.

The first control signal generating circuit, the second control signal generating circuit, the third control signal generating circuit and the fourth control signal generating circuit are composed of a first delay circuit ( ₃₀₅ ), a second delay circuit (306), and a third Delay circuit (307), AND gate (320) and 1 «trigger (304);

among them,

(: the output end of the power-on detection circuit (301), the output end of which is connected to the first input end ( ) of the flip-flop (304);

An input end of the first delay circuit ( ₃₀₅ ) is connected to the switch input signal detecting circuit

Used to control the on/off of the first switching circuit (309);

An input end of the second delay circuit ( ₃₀₆ ) is connected to a first output signal (〇^_) end of the switch input signal detecting circuit ( ₃₀₃ ), and an output end is connected to the ₁ ^ trigger ( ₃ ₀₄ ) Second input ( _II )

a first output of the flip flop (304) (

An input end of the third delay circuit ( ₃₀₇ ) is connected to a second output signal (< _{:11^_} ) end of the switch input signal detecting circuit ( ₃₀₃ ), and outputs a second control signal ( ) to the state temporary storage And switching units. _{\¥02019/095367 ?} 〇 ₁ ^ _2017/111871

The control unit includes:

a first switching circuit ( ₃₀₉ ), configured to connect an output end of the state temporary storage and switching unit to an input end of the state information storage unit under the control of the fourth control signal ( ₆₀₁₁₁ ) to The state temporary storage and the logical state information temporarily stored by the switching unit are transmitted to the state information storage unit;

a second switch circuit ( ₃₁₀ ), configured to connect an input end of the state temporary storage and switching unit to an output end of the state information storage unit under the control of the first control signal) to The logic state information stored by the storage unit is transferred to the state temporary storage and switching unit;

a third switch circuit ( ₃₁₁ ) for connecting an output end of the state information storage unit and an input end of the drive circuit under control of the first control signal to output the stored logic state to the drive circuit information;

a fourth switching circuit ( ₃₁₂ ), configured to connect an output end of the state temporary storage and switching unit and an input end of the driving circuit under the control of the third control signal ( _) to output to the driving circuit Staging logic status information.

[Claim 7]

The state temporary storage and switching unit is an internal register.

[Claim 8] A ₁ ^) lighting fixture, comprising: two groups of different color temperatures ₁ ^) and

\¥0 2019/095367 ?〇1^2017/111871 The first control end ₁ ) and the second control end ₂ ) are connected to the power supply pin of the dual constant current power supply; or

The first control end ₁ ) and the second control end ₂ ) of the color temperature control chip are respectively associated with the first

[Claim 9]

The method includes the following steps: detecting a power signal, determining, according to the power signal, whether a time interval of opening, closing, and opening-closing of the power input switch is greater than a first predetermined duration, and generating and outputting according to the determination result control signal;

_6. Outputting logic state information according to the control signal, and when determining that the power input switch is closed and the off-close time interval is greater than the first predetermined duration, the control chip directly enters a logic state before the power input switch is turned off;

Power supply.

[Claim 10]

Steps include:

Eight _1, when the switch is turned off is determined that the power input, generates and outputs a second control signal (); eight _2, when the switch is closed and the power input is determined that the open closure interval is greater than a first predetermined duration, generates and outputs a first control signal) ;

Eight ₃ , when it is determined that the power input switch is closed and the time interval of the opening and closing is less than or equal to \¥02019/095367 ?〇1^2017/111871 The first predetermined duration, generating and outputting a third control signal (_) and a fourth control signal (860 ₁₁₁₈ ), wherein the fourth control signal ( ₈ 60 ₁₁₁₈ ) is delayed Third control signal

At least one predetermined time interval;

And, step 6 includes:

_61. Control, according to the second control signal ( ), the state temporary storage and switching unit to switch to a next logic state and temporarily store logic state information of the next logic state;

_62. When the time interval is greater than the first predetermined duration, controlling the state information storage unit to output the stored logic state information to the driving circuit according to the first control signal, and simultaneously controlling the state information storage unit to store The logic state information is transferred to the state temporary storage and temporary storage in the switching unit;

_63. When the time interval is less than or equal to the first predetermined duration, controlling the state temporary storage and switching unit to output the temporarily stored logic state information according to the third control signal_); and according to the fourth control signal ( ₆₀₁₁₁ ) controlling the state temporary storage and switching unit to transfer the temporarily stored logic state information to the state information storage unit for storage.