WO2019015325A1

WO2019015325A1 - Transimpedance amplifier gain screening test method and circuit

Info

Publication number: WO2019015325A1
Application number: PCT/CN2018/077380
Authority: WO
Inventors: 林少衡
Original assignee: 厦门优迅高速芯片有限公司
Priority date: 2017-07-17
Filing date: 2018-02-27
Publication date: 2019-01-24
Also published as: CN107345987A; CN107345987B

Abstract

Provided is a transimpedance amplifier gain screening test method, comprising a transimpedance amplifier test chip. The method comprises: the transimpedance amplifier test chip sending an AC current signal to a transimpedance amplifier to be tested, and obtaining a DC voltage signal, output after converting an AC voltage signal output to the trans-impedance amplifier test chip by the trans-impedance amplifier to be tested, the DC voltage signal being related only to the gain of a transimpedance amplifier; and the discreteness of the DC voltage signal output by the trans-impedance amplifier test chip being the discreteness of a gain of the trans-impedance amplifier to be tested. The above method further provides a transimpedance amplifier gain screening test circuit capable of automatically testing production, reducing production costs and effectively improving the competitiveness of products.

Description

Transimpedance amplifier gain screening test method and circuit

技术领域Technical field

The invention relates to the field of screening the gain of a transimpedance amplifier, and specifically relates to a method and a circuit for the gain screening test of the transimpedance amplifier.

背景技术Background technique

The function of the transimpedance amplifier is to convert and amplify the input current signal into a voltage signal, which is mainly used in the field of photoelectric conversion, especially in the front-end receiving circuit in modern high-speed optical communication applications. The transimpedance amplifier is the core receiver device.

In order to ensure the consistency of product quality and performance parameters of mass production, commercial transimpedance amplifier integrated circuit products need to be screened and tested for all products before leaving the factory, and screen out defective products that do not meet the specifications. Unlike testing in the lab, this high-volume testing of integrated circuit products requires a simple, low-cost, high-efficiency, automated, and highly reliable test solution. The cross-resistance parameters of commercial high-speed transimpedance amplifier products are a very important indicator, so it is very important to ensure the consistency of their values. The detection method applied in the laboratory is to first package the transimpedance amplifier and the photodiode into a light receiving sub-module, and then perform accurate measurement through the optical port output network analyzer. The high-speed network analyzer with optical port used in the detection method is very expensive, which leads to high test cost of the detection method; and the network analyzer has a complicated test scheme, which improves the detection difficulty, reduces the detection efficiency, and is not conducive to mass production. If the product is put into mass production, the solution used in the laboratory is not suitable for automated testing of mass production.

发明内容Summary of the invention

SUMMARY OF THE INVENTION The object of the present invention is to overcome the above deficiencies in the prior art and to provide a method and circuit for transimpedance amplifier gain screening test. On the one hand, using a test chip, the test result can be obtained without too much external equipment, the test plan is simple and efficient, and the cost is low; on the other hand, automatic production can be realized, the production cost of the product can be reduced, and the market competitiveness of the product is effectively improved.

In order to solve the above technical problem, the present invention provides a transimpedance amplifier gain screening test method, including a transimpedance amplifier test chip; the transimpedance amplifier test chip sends an alternating current signal to the transimpedance amplifier to be tested, and the transimpedance amplifier to be tested Outputting an AC voltage signal to the transimpedance amplifier test chip; the AC voltage signal is linearly amplified and rectified in the transimpedance amplifier test chip, and converted into a DC voltage signal Vout output, the amplification gain is A, and the rectification conversion coefficient is k; The calculation formula of the DC voltage signal Vout is

Vout=I*Gain*A*K

Gain is the transimpedance amplifier gain, I is the amplitude of the AC current signal, the amplification gain A, and the rectification conversion coefficient K are preset constant values. The DC voltage signal Vout is only related to the transimpedance amplifier gain Gain; the transimpedance amplifier test chip The discreteness of the output DC voltage signal is the gain dispersion of the transimpedance amplifier to be tested.

The invention also provides a transimpedance amplifier gain screening test circuit, which adopts the transimpedance amplifier gain screening test method; the transimpedance amplifier test chip comprises a first input end, a second input end, an AC signal output end, a DC voltage output terminal; the transimpedance amplifier to be tested includes an AC signal input end, a first output end, and a second output end; the AC signal output end is connected to the AC signal input end; the first output end is connected to the first input end, and the second output end is connected to the first input end, the second output end Connect to the second input.

In a preferred embodiment, the AC signal output end sends an AC current signal to the AC signal input end, and the transimpedance amplifier to be tested outputs an AC voltage signal from the first output end and the second output end to the first input end respectively. And the second input.

In a preferred embodiment, the transimpedance amplifier test chip comprises an alternating current signal forming module and a direct current voltage signal forming module;

The alternating current signal forming module comprises a reference voltage, a fixed value resistor and a switch; the current value is obtained by dividing the reference voltage value by the fixed value of the resistance value; and the switch is switched according to the preset frequency to form an alternating current signal;

The DC voltage signal forming module comprises an AC/DC converting device and a voltage amplifying device; the AC/DC converting device converts the AC voltage signal received by the first input end and the second input end into a DC voltage signal to form a conversion coefficient; and the voltage amplifying device amplifies the conversion coefficient .

In a preferred embodiment, the AC current signal forming module includes an operational amplifier I3, a PMOS transistor M0, a PMOS transistor M1, an NMOS transistor M2, a fixed value resistor R0, and a clock signal Clock; and an inverting input terminal of the operational amplifier I3. The reference voltage is set; the output terminal of the operational amplifier I3 is connected to the gate of the PMOS transistor M0 and the gate of the PMOS transistor M1; the non-inverting input terminal of the operational amplifier I3 is connected to the drain of the PMOS transistor M0 at one end of the fixed value resistor R0, and is fixed. The other end of the resistor R0 is grounded; the source of the PMOS transistor M0 is connected to the source of the PMOS transistor M1 to the power supply Vdd; the drain of the PMOS transistor M1 is connected to the drain of the PMOS transistor M2, and the gate of the PMOS transistor M2 is controlled by the clock signal Clock. The source of the PMOS transistor M2 is the output of the AC signal.

In a preferred embodiment, the operational amplifier I3, the PMOS transistor M0, and the fixed value resistor R0 constitute a feedback circuit; the constant value resistor R0 has the same voltage as the reference voltage due to the clamp circuit of the feedback circuit; the PMOS transistor M0 and the PMOS The tube M1 forms a current mirror, and the current I1 flowing through the PMOS transistor M1 and the PMOS transistor M2 is equal to the current I0; the current I1 flows from the drain of the PMOS transistor M1 to the drain of the PMOS transistor M2; when the clock signal Clock is asserted high, the PMOS The tube M2 is turned on, the I1 flows out of the source of the PMOS transistor M2, and the AC signal output terminal outputs I1; when the clock signal Clock is low, the PMOS transistor M2 is not turned on, and the AC signal output terminal has no output.

In a preferred embodiment, the AC/DC conversion device includes a differential amplifier, a diode D0, a diode D1, and a capacitor C0. The first input terminal and the second input terminal are two input terminals of the differential amplifier. The two output terminals of the amplifier are a first differential output terminal and a second differential output terminal and are respectively connected to the anode of the diode D0 and the anode of the diode D1; the cathode of the diode D0, the anode of the diode D1 is connected to the anode of the capacitor C0, and the cathode of the capacitor C0 is negative. Grounding, diode D0, diode D1 and capacitor C0 form a full-wave rectifier circuit;

The voltage amplifying device includes an NMOS transistor M3, an NMOS transistor M4, and a resistor R1; a gate of the NMOS transistor M3, a drain of the NMOS transistor M3, and a gate of the NMOS transistor M4 are connected to a positive pole of the capacitor C0, and a source of the NMOS transistor M3. The source of the NMOS transistor M4 is grounded. The drain of the NMOS transistor M4 is connected to one end of the resistor R1 and the DC voltage output terminal, and the other end of the resistor R1 is connected to the power source.

In a preferred embodiment, the differential AC voltage signal is input from the first input terminal and the second input terminal to the differential amplifier, and then outputted by the first differential output terminal and the second differential output terminal; when the first differential output terminal outputs When the swing is positive, the diode D0 is turned on, the current flows, and the differential AC voltage signal charges the capacitor C0; when the first differential output outputs a negative swing, the diode D0 is turned off, the capacitor C0 is not charged; when the second differential output is When the output swings, the diode D1 is turned on, the current flows, and the differential AC voltage signal charges the capacitor C0; when the second differential output outputs a negative swing, the diode D1 is turned off, and the capacitor C0 is not charged;

When the first differential output is positive swing, the second differential output is negative swing; when the first differential output is negative swing, the second differential output is positive swing; the differential AC voltage signal is passed through the diode D0, diode D1 continuously charges capacitor C0 to form a stable DC current signal;

In a preferred embodiment, the NMOS transistor M3 and the NMOS transistor M4 form a proportional current mirror; the current I2 flowing through the NMOS transistor M3 is amplified by a proportional current mirror and the resistor R1, and the DC voltage output terminal outputs a DC voltage signal.

Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

The technical solution is applied in the batch automatic production test of the transimpedance amplifier chip, and the transimpedance amplifier test chip is connected with the transimpedance amplifier to be tested to detect the gain dispersion of the transimpedance amplifier to be tested. It is only necessary to judge the discreteness of the DC voltage signal outputted by the transimpedance amplifier test chip to determine the gain dispersion of the transimpedance amplifier to be tested, so as to realize the fast and stable test screening of the transimpedance amplifier transimpedance gain. The detection circuit can also be fabricated into a dedicated test chip. The detection method and circuit can obtain test results without excessive external equipment and expensive auxiliary equipment, the test scheme is simple and efficient, the detection cost is greatly reduced, the automatic production is realized, and the market competitiveness of the product is effectively improved.

附图说明DRAWINGS

1 is a schematic block diagram of a method for gain screening test of a transimpedance amplifier in a preferred embodiment of the present invention;

2 is a circuit diagram of an alternating current signal forming module in a transimpedance amplifier gain screening test circuit in a preferred embodiment of the present invention;

3 is a circuit diagram of a DC voltage signal forming module in a transimpedance amplifier gain screening test circuit in a preferred embodiment of the present invention.

具体实施方式Detailed ways

The invention is further described below in conjunction with the drawings and specific embodiments.

A transimpedance amplifier gain screening test method, referring to FIG. 1, includes a transimpedance amplifier test chip (TIATEST); the transimpedance amplifier test chip sends an alternating current signal to the transimpedance amplifier (TIA) to be tested, and the cross resistance is to be tested. The amplifier outputs an AC voltage signal to the transimpedance amplifier test chip; the AC voltage signal is linearly amplified and rectified in the transimpedance amplifier test chip, and converted into a DC voltage signal Vout output, the amplification gain is A, and the rectification conversion coefficient is k The calculation formula of the DC voltage signal Vout is

Vout=I*Gain*A*K

According to the above method of transimpedance amplifier gain screening test, a circuit for transimpedance amplifier gain screening test can be designed;

The transimpedance amplifier test chip and the transimpedance amplifier to be tested are connected through various interfaces, specifically: the transimpedance amplifier test chip includes a first input terminal INP, a second input terminal INN, an AC signal output terminal Iout, and a DC voltage output terminal; The transimpedance amplifier includes an AC signal input terminal Iin, a first output terminal Voutp, and a second output terminal Voutn; the AC signal output terminal Iout is connected to the AC signal input terminal Iin; the first output terminal Voutp is connected to the first input terminal INP, and the second output terminal is connected. Voutn is connected to the second input INN.

The AC signal output terminal Iout sends an AC current signal to the AC signal input terminal Lin, and the transimpedance amplifier to be tested outputs an AC voltage signal from the first output terminal Voutp and the second output terminal Voutn to the first input terminal INP and the second input terminal INN, respectively. .

The transimpedance amplifier test chip has a plurality of functional modules therein, including an alternating current signal forming module and a direct current voltage signal forming module;

The alternating current signal forming module comprises a reference voltage, a fixed value resistor and a switch; the transimpedance amplifier test chip internally provides a reference voltage, and the reference voltage value is divided by the fixed value of the resistance value to obtain a current value; the switch is switched according to a preset frequency to form an alternating current Current signal

The DC voltage signal forming module comprises an AC/DC converting device and a voltage amplifying device; the AC/DC converting device converts the AC voltage signal received by the first input terminal INP and the second input terminal INN into a DC voltage signal Vout to form a conversion coefficient; the voltage amplifying device Amplify the conversion factor.

In more detail, referring to FIG. 2, the alternating current signal forming module includes an operational amplifier I3, a PMOS transistor M0, a PMOS transistor M1, an NMOS transistor M2, a fixed value resistor R0, and a clock signal Clock; and an inverting input terminal of the operational amplifier I3 sets a reference voltage. The output terminal of the operational amplifier I3 is connected to the gate of the PMOS transistor M0 and the gate of the PMOS transistor M1; the non-inverting input terminal of the operational amplifier I3 is connected to the drain of the PMOS transistor M0 at one end of the fixed-value resistor R0, and the fixed-value resistor R0 The other end is grounded; the source of the PMOS transistor M0 and the source of the PMOS transistor M1 are connected to the power supply Vdd; the drain of the PMOS transistor M1 is connected to the drain of the PMOS transistor M2, and the gate of the PMOS transistor M2 is controlled by the clock signal Clock, the PMOS transistor M2 The source is extremely high at the output of the AC signal.

Specifically, the operational amplifier I3, the PMOS transistor M0, and the fixed-value resistor R0 constitute a feedback circuit; the fixed-value resistor R0 has the same voltage as the reference voltage due to the clamp circuit of the feedback circuit; the PMOS transistor M0 and the PMOS transistor M1 form a current mirror, and the flow The current I1 through the PMOS transistor M1 and the PMOS transistor M2 is equal to the current I0; the current I1 flows from the drain of the PMOS transistor M1 to the drain of the PMOS transistor M2; when the clock signal Clock is asserted high, the PMOS transistor M2 is turned on, and the I1 flows out. The source of the PMOS transistor M2 and the output of the AC signal output I1; when the clock signal Clock is low, the PMOS transistor M2 is not turned on, and the output of the AC signal has no output. This produces an alternating current signal that determines the clock frequency. The magnitude of the alternating current signal is obtained by dividing the reference voltage value by the value of the fixed value resistor R0.

The AC signal output terminal Iout outputs an AC current signal to the cross-resistance amplifier to be converted into an AC voltage signal, and then outputs to the transimpedance amplifier test chip, and converts the DC voltage forming module into a DC voltage signal Vout through the transimpedance amplifier test chip. .

First, to convert the AC voltage signal into the DC voltage signal Vout, an AC/DC converter is required.

Referring to FIG. 3, the AC-DC conversion device includes a differential amplifier I4, a diode D0, a diode D1, and a capacitor C0. The first input terminal INP and the second input terminal INN are two input terminals of the differential amplifier, and two of the differential amplifiers. The output terminal is a first differential output terminal OUTP and a second differential output terminal OUTN and is respectively connected to the anode of the diode D0 and the anode of the diode D1; the cathode of the diode D0, the anode of the diode D1 is connected to the anode of the capacitor C0, and the cathode of the capacitor C0 is grounded. Diode D0, diode D1 and capacitor C0 form a full-wave rectification circuit;

Secondly, after the AC voltage signal is converted into the DC voltage signal Vout, it needs to be amplified again to form the final DC voltage signal Vout output.

Referring to FIG. 3, the voltage amplifying device includes an NMOS transistor M3, an NMOS transistor M4, and a resistor R1; a gate of the NMOS transistor M3, a drain of the NMOS transistor M3, and a gate of the NMOS transistor M4 are connected to the anode of the capacitor C0, and the anode of the NMOS transistor M3 The source and the source of the NMOS transistor M4 are both grounded. The drain of the NMOS transistor M4 is connected to one end of the resistor R1 and the DC voltage output terminal, and the other end of the resistor R1 is connected to the power source.

Specifically, the differential AC voltage signal is input from the first input terminal INP and the second input terminal INN to the differential amplifier, and then outputted by the first differential output terminal OUTP and the second differential output terminal OUTN; when the first differential output terminal OUTP is output When the swing is positive, the diode D0 is turned on, the current flows, and the differential AC voltage signal charges the capacitor C0; when the first differential output terminal OUTP outputs a negative swing, the diode D0 is turned off, the capacitor C0 is not charged; when the second differential output When the OUTN output is swinging, the diode D1 is turned on, the current flows, and the differential AC voltage signal charges the capacitor C0; when the second differential output terminal OUTN outputs a negative swing, the diode D1 is turned off, and the capacitor C0 is not charged;

Moreover, when the first differential output terminal OUTP is a positive swing, the second differential output terminal OUTN is a negative swing; when the first differential output terminal OUTP is a negative swing, the second differential output terminal OUTN is a positive swing;

Therefore, the differential AC voltage signal continuously charges the capacitor C0 through the diode D0 and the diode D1 to form a stable DC current signal;

The NMOS transistor M3 and the NMOS transistor M4 form a proportional current mirror; after the AC voltage signal is converted into a DC current signal, the current I2 flowing through the NMOS transistor M3 is amplified by a proportional current mirror and operated by a resistor R1, and the DC voltage output terminal outputs a DC voltage signal.

In summary, the calculation of the DC voltage output signal Vout is:

Vout=I*Gain*A*K

I=Vbg/Rset

Among them, Vbg is the reference voltage set inside the transimpedance amplifier test chip, Rset is the resistance value of the fixed value resistor R0, the amplification gain A, the rectification conversion coefficient K, the reference voltage Vbg, and the fixed value resistor R0 resistance value Rset are presets. The constant value, so the gain dispersion of the transimpedance amplifier to be tested is only related to the DC voltage signal Vout output from the DC voltage signal output. The discreteness of the DC voltage signal Vout is the dispersion of the transimpedance amplifier to be tested.

The above description is only a preferred embodiment of the present invention, but the design concept of the present invention is not limited thereto, and any person skilled in the art can use the concept to carry out the present invention within the technical scope disclosed by the present invention. Non-substantial changes are all violations of the scope of protection of the invention.

Claims

A transimpedance amplifier gain screening test method, comprising: a transimpedance amplifier test chip; the transimpedance amplifier test chip sends an alternating current signal to the transimpedance amplifier to be tested, and the transimpedance amplifier to be tested outputs an AC voltage signal to the cross The resistance amplifier test chip; the AC voltage signal is linearly amplified and rectified in the transimpedance amplifier test chip, and converted into a DC voltage signal Vout output, the amplification gain is A, the rectification conversion coefficient is k; and the calculation of the DC voltage signal Vout Formula is

Vout=I*Gain*A*K

Gain is the transimpedance amplifier gain, I is the amplitude of the AC current signal, the amplification gain A, and the rectification conversion coefficient K are preset constant values. The DC voltage signal Vout is only related to the transimpedance amplifier gain Gain; the transimpedance amplifier test chip The discreteness of the output DC voltage signal is the gain dispersion of the transimpedance amplifier to be tested.
A circuit for transimpedance amplifier gain screening test, characterized in that the transimpedance amplifier gain screening test method according to claim 1 is adopted; the transimpedance amplifier test chip comprises a first input terminal, a second input terminal, and an alternating current Signal output end, DC voltage output end; the transimpedance amplifier to be tested includes an AC signal input end, a first output end, and a second output end; the AC signal output end is connected to the AC signal input end; the first output end is connected to the first input end, The second output is coupled to the second input.
The transimpedance amplifier gain screening test circuit according to claim 2, wherein the AC signal output end sends an AC current signal to the AC signal input end, and the transimpedance amplifier to be tested is respectively from the first output end and the second The output terminal outputs an AC voltage signal to the first input end and the second input end.
The transimpedance amplifier gain screening test circuit according to claim 3, wherein the transimpedance amplifier test chip comprises an alternating current signal forming module and a direct current voltage signal forming module;

The alternating current signal forming module comprises a reference voltage, a fixed value resistor and a switch; the current value is obtained by dividing the reference voltage value by the fixed value of the resistance value; and the switch is switched according to the preset frequency to form an alternating current signal;

The DC voltage signal forming module comprises an AC/DC converting device and a voltage amplifying device; the AC/DC converting device converts the AC voltage signal received by the first input end and the second input end into a DC voltage signal to form a conversion coefficient; and the voltage amplifying device amplifies the conversion coefficient .
The transimpedance amplifier gain screening test circuit according to claim 4, wherein the alternating current signal forming module comprises an operational amplifier I3, a PMOS transistor M0, a PMOS transistor M1, an NMOS transistor M2, a fixed value resistor R0, and a clock. Signal Clock; the inverting input terminal of the operational amplifier I3 sets a reference voltage; the output terminal of the operational amplifier I3 is connected to the gate of the PMOS transistor M0 and the gate of the PMOS transistor M1; the non-inverting input terminal of the operational amplifier I3 and the drain of the PMOS transistor M0 One end of the pole connected fixed value resistor R0, the other end of the fixed value resistor R0 is grounded; the source of the PMOS transistor M0 is connected to the source of the PMOS transistor M1 to the power supply Vdd; the drain of the PMOS transistor M1 is connected to the drain of the PMOS transistor M2, PMOS The gate of the tube M2 is controlled by a clock signal Clock, and the source of the PMOS transistor M2 is the output of the alternating current signal.
The circuit of the transimpedance amplifier gain screening test according to claim 5, wherein the operational amplifier I3, the PMOS transistor M0, and the fixed value resistor R0 constitute a feedback circuit; and the fixed value resistor R0 is used for both ends of the clamp circuit of the feedback circuit. The voltage is the same as the reference voltage; the PMOS transistor M0 and the PMOS transistor M1 form a current mirror, and the current I1 flowing through the PMOS transistor M1 and the PMOS transistor M2 is equal to the current I0; the current I1 flows from the drain of the PMOS transistor M1 to the drain of the PMOS transistor M2. When the clock signal Clock is high, the PMOS transistor M2 is turned on, I1 flows out of the source of the PMOS transistor M2, and the AC signal output terminal outputs I1; when the clock signal Clock is low, the PMOS transistor M2 is not turned on, the AC signal There is no output at the output.
The transimpedance amplifier gain screening test circuit according to claim 4, wherein the AC/DC conversion device comprises a differential amplifier, a diode D0, a diode D1, and a capacitor C0; the first input end and the second input end It is the two input terminals of the differential amplifier. The two output terminals of the differential amplifier are the first differential output and the second differential output, and are respectively connected to the anode of the diode D0 and the anode of the diode D1; the cathode of the diode D0 and the diode D1. The negative electrode is connected to the positive pole of the capacitor C0, the negative pole of the capacitor C0 is grounded, and the diode D0, the diode D1 and the capacitor C0 form a full-wave rectifying circuit;

The voltage amplifying device includes an NMOS transistor M3, an NMOS transistor M4, and a resistor R1; a gate of the NMOS transistor M3, a drain of the NMOS transistor M3, and a gate of the NMOS transistor M4 are connected to a positive pole of the capacitor C0, and a source of the NMOS transistor M3. The source of the NMOS transistor M4 is grounded. The drain of the NMOS transistor M4 is connected to one end of the resistor R1 and the DC voltage output terminal, and the other end of the resistor R1 is connected to the power source.
The circuit of the transimpedance amplifier gain screening test according to claim 7, wherein the differential AC voltage signal is input from the first input end and the second input end to the differential amplifier, and then the first differential output end and the second differential Output output; when the output of the first differential output is positive swing, the diode D0 is turned on, the current flows, and the differential AC voltage signal charges the capacitor C0; when the first differential output outputs a negative swing, the diode D0 is turned off. The capacitor C0 is not charged; when the second differential output outputs a positive swing, the diode D1 is turned on, the current flows, and the differential AC voltage signal charges the capacitor C0; when the second differential output outputs a negative swing, the diode D1 is turned off. Capacitor C0 is not charged;

When the first differential output is positive swing, the second differential output is negative swing; when the first differential output is negative swing, the second differential output is positive swing; the differential AC voltage signal is passed through the diode D0, diode D1 continuously charges capacitor C0 to form a stable DC current signal;
The transimpedance amplifier gain screening test circuit according to claim 8, wherein the NMOS transistor M3 and the NMOS transistor M4 form a proportional current mirror; the current I2 flowing through the NMOS transistor M3 is amplified by a proportional current mirror and the resistor R1, The DC voltage output outputs a DC voltage signal.