WO2018233334A1 - Information processing method and apparatus, communication device, and communication system - Google Patents

Abstract

The application discloses an information processing method and apparatus, a communication device, and a communication system. The communication device is configured to obtain a starting position of an output bit sequence in a cache sequence W, and to determine the output bit sequence in the cache sequence W on the basis of the starting position, wherein a value of the starting position is one of (I), 0≤k<kmax and 0≤Pk<NCB, Pk is an integer, k is an integer, NCB is a length of the cache sequence W, kmax is an integer greater than or equal to 4, and there are two or more different adjacent intervals in (I). By reasonably determining a bit sequence for initial transmission or retransmission, decoding performance of a communication device at a receiving end is improved after receiving of the bit sequence by the communication device, thereby improving decoding success rates, and reducing the number of retransmission times.

Description

Information processing method, device, communication device and communication system

This application claims priority to Chinese Patent Application No. 201710465748.2, filed on June 19, 2017, with the application name "Information Processing Method, Apparatus, Communication Equipment, and Communication System", August 21, 2017 The priority of the Chinese Patent Application entitled "Information Processing Method, Apparatus, Communication Apparatus, and Communication System" is filed in the Chinese Patent Office, the entire disclosure of which is hereby incorporated by reference.

Technical field

Embodiments of the present invention relate to the field of communications, and in particular, to a method, an apparatus, a communication device, and a communication system for information processing.

Background technique

Hybrid Automatic Repeat Request (HARQ) technology is an important technology in wireless communication systems, which can improve the reliability of data links.

Low density parity check (LDPC) code is a kind of linear block coding with sparse check matrix, which has the characteristics of flexible structure and low decoding complexity. Because it uses a partially parallel iterative decoding algorithm, it has a higher throughput than the traditional Turbo code. The LDPC code is considered to be the next-generation error correction code of the communication system, and can be used to improve the reliability and power utilization of channel transmission; and can be widely applied to space communication, optical fiber communication, personal communication systems, ADSL, and magnetic recording equipment. At present, LDPC codes have been considered as one of channel coding methods in the fifth generation mobile communication.

In order to support various code length code rates, the communication device performs rate matching on the channel coding to adjust the code rate of the coding block, and obtains a bit sequence to be transmitted to match the decoding code rate. The communication device may also perform bit puncturing to improve the code rate of the LDPC code block generated by the coding when the rate is matched, or perform bit repetition to reduce the code rate for the LDPC code block generated by the coding when the rate is matched.

The communication device at the transmitting end selects the bit sequence to be transmitted in the rate matching step, and performs processing after interleaving, mapping, etc., and then sends the bit sequence to the receiving end communication device. The receiving end communication device combines the soft value of the bit sequence and the saved soft channel bit to obtain a coded block.

In the prior art, when the communication device adopts the existing rate matching method, the HARQ performance is poor.

Summary of the invention

Embodiments of the present invention provide a method, an apparatus, a communication device, and a communication system for information processing, which can improve HARQ performance.

In a first aspect, a method for information processing in a communication system is provided, comprising:

Obtaining a starting position k _{0 of the} output bit sequence in the buffer sequence W; wherein the buffer sequence W comprises a bit sequence D or a part of a bit sequence D, the bit sequence D being K _D bits in length,

An output bit sequence is determined from the cache sequence W based on the starting position k ₀ .

In a second aspect, a method for information processing in a communication system is provided, including:

Obtaining a starting position k _{0 of the} soft bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a soft value sequence of the bit sequence D or a part of the soft value sequence of the bit sequence D, the soft value of the bit sequence D The sequence length is K _D ;

The soft bit sequence is combined and saved in the cache sequence W starting based on the start position k ₀ .

In a possible implementation manner of the foregoing first aspect or the second aspect,

k ₀ takes the value p _k and p _k is

One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the length of the buffer sequence W, and k _max is an integer greater than or equal to 4;

Said

There are two or more different adjacent intervals in the middle.

In the above implementation manner, the soft sequence length of the bit sequence D is K _D , and the bit sequence D is a bit sequence obtained by encoding the bit sequence C of length K based on the low density parity check LDPC matrix, or The bit sequence D is obtained by truncating s ₀ bits in a bit sequence obtained by encoding a bit sequence C of length K based on a low density parity check LDPC matrix.

The output bit sequence determined by the above implementation may reduce the number of repeated bits and reduce the loss of decoding performance.

In a further aspect of the above first aspect or the second aspect, if k=0, then p ₀ =0, or p ₀ =l ₀ ·r, wherein l ₀ is a positive integer, r is The number of bits included in the unit bit segment in the buffer sequence W, r is an integer greater than zero.

For example, k _max = 2 ⁿ , n is an integer greater than or equal to 2.

In another possible implementation manner based on the first aspect or the second aspect or the foregoing implementation manner, k _max =4, if N _CB ≥K _D , and k>0, p _k ≥(p ₀ +K), or , p _k ≥(p ₀ -s ₀ +K);

If N _CB <K _D and k>0,

or

or,

or

among them,

Indicates rounding up,

Indicates rounding down.

Alternatively: if p ₀ <p ₁ <p ₂ <p ₃ , then (p ₁ -p ₀ )>(p ₂ -p ₁ ).

And in order to make the starting position an integer multiple of the unit bit segment, p _k = l _k · r, where l _k is a positive integer.

Optionally, the number of truncated bits s ₀ = n·r, where n is a positive integer.

In one possible design, r = z, z is the spreading factor of the LDPC matrix.

In yet another possible design, if the number of interleaved matrix rows is R _subblock , r can be R _subblock .

In a further possible implementation manner of any one of the foregoing implementation manners, the starting position k ₀ is determined based on a number rv _idx of a redundancy version starting position.

In a possible design, the starting position k ₀ can also be obtained according to the parameter of the redundancy version starting position number rv _idx .

For example, in adaptive retransmission, the redundancy version start location number rv _idx can be obtained by signaling.

For another example, for adaptive retransmission or non-adaptive retransmission, the number rv _{idx of the} redundancy version start position may be acquired based on the number order of the redundancy version start position and the number of transmissions i.

Wherein, the numbering order of the starting position of the redundancy version is read from the memory, or the numbering order of the starting position of the redundancy version is determined based on the initial transmission rate, or the redundancy version is The numbering order of the starting position is determined based on the length of the output bit sequence and the spreading factor z.

In a third aspect, a communication apparatus is provided that can include a module for performing any of the possible implementations of the first aspect of the method design described above. The module can be software and/or hardware.

In a possible design, the communication device provided by the third aspect comprises an obtaining unit for acquiring a starting position k _{0 of the} output bit sequence in the buffer sequence W, and a determining unit for determining from the starting position k ₀ An output bit sequence is determined in the buffer sequence W.

The apparatus may be used to perform the method described in any of the possible implementations of the first aspect above, with particular reference to the description of the above aspects.

In one possible design, the acquisition unit and the determination unit may be one or more processors.

Optionally, the communication device further includes a transceiver unit for inputting/outputting signals. For example, it is used to output a signal corresponding to a sequence of output bits.

The transceiver unit may be a transceiver or a transceiver, or may be an input/output circuit or a communication interface. For example, the communication device can be a terminal or a base station or a network device, and its transceiver unit can be a transceiver or a transceiver. The communication device can also be a chip, and its transceiver component can be an input/output circuit of the chip.

In a fourth aspect, a communication apparatus is provided that can include a module for performing any of the possible implementations of the second aspect of the method design described above. The module can be software and/or hardware.

In a possible design, the communication device provided by the fourth aspect includes, for example, an obtaining unit for acquiring a starting position of the soft bit sequence in the buffer sequence W; and a processing unit, configured to start based on the starting position k ₀ The soft bit sequence is combined and saved in the cache sequence W.

The apparatus may be used to perform the method described in any of the possible implementations of the second aspect above, with particular reference to the description of the above aspects.

In one possible design, the acquisition unit and processing unit may be one or more processors.

Optionally, the communication device may further include a transceiver unit, where the transceiver unit is used for input/output of signals. For example, for receiving a signal containing a soft bit sequence.

The transceiver unit may be a transceiver or a transceiver, or may be an input/output circuit or a communication interface. For example, the communication device can be a terminal or a base station or a network device, and its transceiver unit can be a transceiver or a transceiver. The communication device can also be a chip, and its transceiver component can be an input/output circuit of the chip.

In a fifth aspect, a communication device is provided that includes one or more processors.

In one possible design, one or more of the processors may implement the functionality of any of the first aspect and the first aspect. Optionally, the processor can implement other functions in addition to the functions described in the first aspect and any one of the first aspects.

In one possible design, one or more of the processors may implement the functionality of any of the second and second aspects. Optionally, the processor can implement other functions in addition to the functions described in any of the second aspect and the second aspect.

Optionally, the communication device provided by the fifth aspect may further include a transceiver and an antenna.

Optionally, the communication apparatus provided in the foregoing third to fifth aspects may further include a device for generating a transport block CRC, a device for code block splitting and CRC check, an encoder, an interleaver for interleaving, or A modulator or the like for modulation processing. In one possible design, the functionality of these devices can be implemented by one or more processors.

Optionally, the communication apparatus provided in the above third to fifth aspects may further include a demodulator for demodulation operation, a deinterleaver for deinterleaving, a decoder, and the like. The functionality of these devices can be implemented by one or more processors in one possible design.

According to a sixth aspect, an embodiment of the present invention provides a communication system, where the system includes the communication device of any one of the foregoing fifth aspect.

In still another aspect, an embodiment of the present invention provides a computer storage medium having stored thereon a program, and when executed, causes a computer to perform the method described in the above aspect.

Yet another aspect of the present application provides a computer program product comprising instructions which, when run on a computer, cause the computer to perform the methods described in the various aspects above.

The method, device, communication device and communication system of the information processing according to the embodiments of the present invention can improve HARQ performance.

DRAWINGS

1 is a schematic diagram of a base matrix of an LDPC code and a permutation matrix thereof;

2 is a structural diagram of a communication system according to an embodiment of the present invention;

FIG. 3 is a flowchart of an information processing method according to another embodiment of the present invention;

4-1 is a schematic diagram of a coding block according to another embodiment of the present invention;

Figure 4-2 is a schematic diagram of a possible starting position setting and retransmission method;

Figure 4-3 is a schematic diagram of another possible starting position setting and retransmission method;

4-4 is a schematic diagram of a starting position setting according to another embodiment of the present invention;

5-1 is a base diagram of an LDPC code according to an embodiment of the present invention;

Figure 5-2 is a performance simulation diagram based on Figure 5-1 of the present invention;

Figure 5-3 is a performance simulation diagram based on Figure 5-1 of the present invention;

Figure 5-4 is a performance simulation diagram based on Figure 5-1 of the present invention;

FIG. 6 is a flowchart of an information processing method according to another embodiment of the present invention;

FIG. 7 is a structural diagram of an information processing apparatus according to another embodiment of the present invention;

FIG. 8 is a base diagram of an LDPC code according to another embodiment of the present invention.

Detailed ways

To facilitate understanding, some of the terms related to this application are described below.

In the present application, the terms "network" and "system" are often used interchangeably, and "device" and "device" are often used interchangeably, but those skilled in the art can understand the meaning. The "communication device" may be a chip (such as a baseband chip, or a data signal processing chip, or a general purpose chip, etc.), a terminal, a base station, or other network device. A terminal is a device having a communication function, and may include a handheld device having a wireless communication function, an in-vehicle device, a wearable device, a computing device, or other processing device connected to a wireless modem. The terminals can be deployed on land, including indoors or outdoors, handheld or on-board; they can also be deployed on the water (such as ships, etc.); they can also be deployed in the air (such as airplanes, balloons, satellites, etc.). The terminal device may be a mobile phone, a tablet (Pad), a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, and industrial control ( Wireless terminal in industrial control, wireless terminal in self driving, wireless terminal in remote medical, wireless terminal in smart grid, transportation safety A wireless terminal, a wireless terminal in a smart city, a wireless terminal in a smart home, and the like. Terminals can be called different names in different networks, such as: user equipment, mobile stations, subscriber units, stations, cellular phones, personal digital assistants, wireless modems, wireless communication devices, handheld devices, laptops, cordless phones, Wireless local loop station, etc. For convenience of description, the present application is simply referred to as a terminal. A base station (BS), also referred to as a base station device, is a device deployed in a radio access network to provide wireless communication functions. The name of a base station may be different in different wireless access systems. For example, in a Universal Mobile Telecommunications System (UMTS) network, a base station is called a Node B, and a base station in an LTE network is called a base station. For an evolved Node B (eNB or eNodeB), a base station in a new radio (NR) network is called a transmission reception point (TRP) or a generation node B (gNB). Or other base stations may be used in other networks where multiple technologies are converged, or in other various evolved networks. The invention is not limited to this.

The technical solutions in the embodiments of the present invention will be described below with reference to the accompanying drawings in the embodiments of the present invention.

The LDPC code can usually be represented by a parity check matrix H. The parity check matrix H of the LDPC code can be obtained by a base graph and a shift value. The base map can usually include m*n matrix elements, which can be represented by a matrix of m rows and n columns. The value of the matrix element is 0 or 1, and the element with a value of 0 is sometimes called a zero element. , indicating that the element can be replaced by z*z's zero matrix. An element with a value of 1, sometimes referred to as a non-zero element, indicates that the element can be a cyclic permutation matrix of z*z (circulant permutation) Matrix) replacement. That is, each matrix element represents an all-zero matrix or a cyclic permutation matrix. It should be noted that in this paper, the line number and column number of the base map and the matrix are numbered from 0, just for the convenience of understanding. It can be understood that the line number and column number can also be numbered from 1, and the corresponding line number and column number are incremented by 1 based on the line number and column number shown in this article.

If the element value of the i-th row and the j-th column in the base map is 1, and the offset value is P _i,j , P _i,j is an integer greater than or equal to 0, the value of the j-th column of the i-th row is 1 The elements can be replaced by a cyclic permutation matrix of z*z corresponding to P _i,j , which can be obtained by cyclically shifting the unit matrix of z*z by P _{i, j} times to the right. It can be seen that each element with a value of 0 in the base map is replaced with an all-zero matrix of z*z, and each element with a value of 1 is replaced with a cyclic permutation matrix of z*z corresponding to its offset value, The parity check matrix of the LDPC code. z is a positive integer, which can also be called a lifting factor, which can be determined according to the code block size supported by the system and the size of the information data. It can be seen that the size of the parity check matrix H is (m*z)*(n*z).

Since P _i,j can be obtained based on the spreading factor z, for elements with a value of 1 at the same position, different spreading factors Z may have different P _i,j . In order to simplify the implementation, the system usually defines a base matrix of m*n. Each element in the base matrix corresponds to the position of each element in the base map. The zero elements in the base map are in the base matrix. The medium position is unchanged, and is represented by -1. The non-zero element with the value of the jth column in the i-th row and the j-th column in the base map is unchanged in the base matrix, and can be expressed as P _i,j , P _i,j is greater than or equal to A positive integer of 0. In the embodiment of the present application, the base matrix is sometimes referred to as an offset matrix of the base matrix.

FIG. 1 is a schematic diagram showing a base matrix of an LDPC code in a communication system and a permutation matrix when the spreading factor is 4. The base matrix of the LDPC code has m*n elements. As shown in FIG. 1, a base matrix of an LDPC code having a QC structure of m=13 and n=38 has a code rate of (n-m)/n=0.6579. If the spreading factor is z=4, all elements with a value of -1 in the matrix are expanded to be a 4x4 all-zero matrix, and other elements are expanded to a 4*4 permutation matrix. The permutation matrix can be obtained by a unit matrix I after a corresponding number of cyclic shifts, the number of displacements being equal to the value of the corresponding matrix element. As shown in FIG. 1 , the corresponding matrix after the expansion of the element with a value of 0 in the base matrix is 4*4, and the corresponding matrix after the expansion of the element with a value of 1 is the matrix obtained by one displacement of the unit matrix. , and so on, will not go into details here.

It can be understood that the base map or the base matrix given in the embodiment of the present invention is an example, for example, the base matrix in FIG. 1 or the base map in FIG. 5-1 is an example, and is not For the limit.

In a communication system, information data is transmitted between communication devices (for example, base stations or terminals), and since the wireless propagation environment is complex and variable, it is susceptible to interference and errors occur. In order to reliably transmit the information data, at the transmitting end, the communication device performs CRC check, channel coding, rate matching, interleaving, and the like on the information data, and maps the interleaved coded bits into modulation symbols and transmits them to the communication device at the receiving end. After receiving the modulation symbol, the receiving device recovers the information data by deinterleaving, de-rate matching, decoding, and CRC check. These processes can reduce transmission errors and improve the reliability of data transmission.

The communication system 200 illustrated in FIG. 2 can be widely used to provide various types of communication such as voice, data, and the like. The communication system can include a plurality of wireless communication devices. For the sake of clarity, FIG. 2 shows only communication device 20 and communication device 21. Control information or data information is received and transmitted between the communication device 20 and the communication device 21 as a sequence of information. In one possible design, the communication device 20 acts as a transmitting communication device, transmits a sequence of information in accordance with a transmission block (TB), and adds a CRC check to each of the transport blocks. If the size of the transport block after the addition of the check exceeds the maximum code block length, the transport block needs to be divided into code blocks (CBs), and the code block CRC check may be added in each code block, or each group of codes may be added. A block group CRC check is added to the block, and padding bits can also be added to each code block. The communication device 20 performs channel coding on each code block separately, for example, using LDPC coding to obtain a corresponding coded block. Wherein, each coding block includes information bits and check bits. If the information bits include padding bits, the padding bits are usually expressed as "null".

The coded block or the bit-reordered coded block is stored in a circular buffer of the communication device 20, and the communication device 20 sequentially obtains a plurality of output bits from the coded block in the circular buffer to obtain an output bit sequence, the output bit being a padded bit in the coded block The bits other than the output bit sequence are not including padding bits. After interleaving, mapping to a modulation symbol and then transmitting. When the communication device 20 retransmits, another output bit sequence is selected from the coded block in the cyclic buffer. If the output bit is sequentially acquired to reach the last bit of the circular buffer, the output bit is continuously selected from the first bit of the circular buffer.

The communication device 21 demodulates the received modulation symbols, and after deinterleaving, stores the soft values of the received output bit sequence in corresponding positions in the soft buffer. If a retransmission occurs, the communication device 21 combines the soft values of the output bit sequence of each retransmission in the soft information buffer, where the combination means that if the positions of the two received output bits are the same, it will be twice. The soft values of the received output bits are combined. The location in the soft information buffer of the communication device 21 and the location of the coded block in the cyclic buffer in the communication device 20 are in one-to-one correspondence. That is, if the position of the output bit in the coded block in the cyclic buffer in the communication device 20 is the p-th bit, the position of its soft value in the soft information buffer in the communication device 21 is also the p-th bit.

The communication device 21 decodes all soft values in the soft information buffer to obtain a code block of the information sequence. Since the communication device 21 can acquire the transport block size, the number of code blocks in which one transport block is divided and the length of each code block can be determined. If the code block includes a CRC bit segment, the communication device 31 can also use the CRC bit segment pair code. The block is checked. The communication device 21 cascades the code blocks into one transport block, further calibrates and cascades the transport blocks to finally obtain a sequence of information. It can be seen that the communication device 21 performs the inverse of the information processing method of the communication device 20.

It should be noted that the process of receiving and transmitting the information sequence between the communication device 20 and the communication device 21 is merely an exemplary description. The division of these modules is merely illustrative, and some modules may be designed according to the system. The requirements are optional. It is possible that the functions of some modules can be combined and executed in one module without limitation. And these modules may be implemented by one or more processors, and the invention is not limited thereto.

In various embodiments of the invention, "interleaving" refers to changing the position of one or more bit segments in a bit sequence, each bit segment comprising one or more bits.

It should be noted that, in various embodiments of the present invention, the communication device 20 may be a network device in a communication system, such as a base station, and the corresponding communication device 21 may be a terminal. The communication device 20 may also be a terminal in a communication system, and accordingly, the communication device 21 may be a network device in a communication system, such as a base station or the like. The communication device 20 and the communication device 21 may also be chips, and each module of the above processing may be implemented by one or more processors.

FIG. 3 is a schematic flowchart diagram of an information processing method according to an embodiment of the present invention. The method is applicable to a communication system, where the communication system includes a communication device 20 and a communication device 21. The method can be implemented by the communication device 20, including:

301: Acquire a starting position k _{0 of the} output bit sequence in the buffer sequence W.

The communication device 20 performs LDPC encoding processing on the bit sequence C of length K. The bit sequence C may be a bit sequence of control or data information to be transmitted by the communication device 20, or the bit sequence is obtained by at least a code block division process. The bit sequence C of length K may also include a cyclic check bit, and may also include padding bits.

The communication device 20 determines the LDPC matrix used for encoding based on the length K of the bit sequence C. For example, the spreading factor z can be determined according to K, and then the base matrix of the corresponding code rate is extended according to z to obtain an LDPC matrix. The bit sequence C is encoded using the LDPC matrix to obtain an encoded coded block.

If truncation is not performed, the bit sequence D may be an encoded bit sequence; if the encoded bit sequence is subjected to a shortening operation, that is, truncating s ₀ bits from the bit sequence, for example, The s ₀ bits are deleted from the encoded bit sequence, and the bit sequence D may be a bit sequence obtained by truncating the s ₀ bits from the encoded bit sequence. Where s ₀ is a positive integer. For example, s ₀ =n·r, n is a positive integer, and r is the number of bits included in the unit bit segment in the buffer sequence W. The unit bit segment reflects the granularity set by the starting position in the buffer sequence W. For example, the buffer sequence W can set the starting position by an integral multiple of the spreading factor, that is, the number of bits included in the unit bit segment r=z. For another example, the bit sequence D needs to be interleaved before entering the buffer sequence W. If the number of columns of the interleave matrix is C _subblock , the number of rows of the interleave matrix is R _subblock , where R _subblock is satisfying K _D ≤ C _subblock · R _subblock The smallest integer, the number of bits r included in the unit bit segment may be R _subblock , that is, the starting position may be set in an integer multiple of R _subblock .

The bit sequence D has a length of K _D . The bit sequence D may include a plurality of bits in the bit sequence C, and may also include one or more parity bits, and the bits in the bit sequence C are sometimes referred to as information bits in the bit sequence D, or system bits ( Systematic bit). In the present invention, the bit sequence D is sometimes also referred to as a coded block.

The communication device 20 determines an output bit sequence based on the bit sequence D or a portion of the bit sequence D. The output bit sequence is processed after being modulated or the like. When the communication device supports retransmission, the output bit sequence for each transmission can be determined based on the bit sequence D or a portion of the bit sequence D.

In one possible design, the communication device 20 may determine an output bit sequence based on the buffer sequence W, wherein the length N _CB buffer sequence W comprises a bit sequence D or a portion of the bit sequence D.

In a possible implementation, the buffer sequence W may comprise all the bits of the bit sequence D. For example, the buffer sequence W may include a bit sequence D. For example, the buffer sequence W may also include a bit sequence D that has been subjected to at least interleaving processing. For example, the buffer sequence may also include a bit sequence D that has undergone at least padding processing, and for example, a buffer. The sequence may also include a bit sequence D that has been subjected to at least interleaving and padding processing.

In yet another possible implementation, the buffer sequence W may comprise partial bits of the bit sequence D. For example, the bit sequence D length exceeds the maximum length of the buffer sequence W, so the buffer sequence W can only include some of the bits in the bit sequence D. Similarly, the buffer sequence W may include partial bits of the bit sequence D. For example, the buffer sequence W may also include partial bits of the bit sequence D at least interleaved, and for example, the buffer sequence may also include at least padded bits. A partial bit of the sequence D, and for example, the buffer sequence may also include partial bits of the bit sequence D that have been subjected to at least interleaving and padding processing.

The cache sequence W can also be called a loop cache. In the initial transmission or retransmission, the communication device 20 determines the output bit sequence for initial transmission or retransmission in the bit sequence held in the circular buffer. For convenience of description, the i-th transmission indicates initial transmission or retransmission, i=0 indicates initial transmission, i>0 indicates retransmission, and i is an integer, for example, i=1 indicates the first retransmission, and i=2 indicates the second. Retransmissions and so on. The upper limit of the retransmission depends on the maximum number of retransmissions of the system, which may be a redundancy version (rv) of the bit sequence D for each initial or retransmitted output bit sequence.

k ₀ represents the starting position of the output bit sequence of each transmission in the circular buffer, and can also be said to be the starting position of the output bit sequence in the buffer sequence W. For the ith transmission, k ₀ may also be referred to as the starting position of the redundancy version rv of the ith retransmission. In order to distinguish different retransmissions, (i) may also be added after the corresponding parameter, for example, Let k ₀ (i), or rv(i), etc.

Where k ₀ is p _k and p _k is

One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, and k _max represents the maximum number of start positions that the output bit sequence can select in the buffer sequence W , k _max is an integer greater than or equal to 4.

302: Determine an output bit sequence from the cache sequence W based on the starting position k ₀ .

The communication device 20 can determine the output bit sequence from the cache sequence W based on the starting position k ₀ obtained in step 301.

For example, the communication device 20 sequentially acquires the E bits as an output bit sequence from the first sequence cache k ₀ bits.

For another example, after the communication device 20 transmits the initial transmission, that is, the output bit sequence of the 0th transmission, and receives a negative acknowledgement NACK from the communication device 21, the communication device 20 needs to determine the output bit sequence of the first retransmission. , which is a first redundancy version rv (1) start position k ₀ (1), so that the communication apparatus acquires the output bit sequence k ₀ (1) in the starting position of the cache sequence W, based on an output bit sequence The length E(1) and the starting position k ₀ (1) determine the output bit sequence of the first retransmission, that is, determine the redundancy version rv(1). The communication device 20 transmits the output bit sequence rv(1) to the communication device 21. If the communication device 20 receives the NACK from the communication device 21, the communication device 20 needs to determine the output bit sequence of the second retransmission, that is, the start position k _{0 of the} second redundancy version rv(2) (2) The output bit sequence of the second retransmission is determined based on the length E(2) of the output bit sequence and the start position k ₀ (2), that is, the redundancy version rv(2) is determined. By analogy, until the maximum number of retransmissions is reached or the retransmission timer expires, or the communication device 20 receives an acknowledgement ACK from the communication device 21, the communication device can end the retransmission. Of course, the communication device 20 can also perform multiple retransmissions without regard to NACK or ACK from the communication device 21.

When the receiving communication device 21 decodes, it needs to combine and decode the received initial soft-valued bits and the soft-valued bits of each redundant version. For the coding block using LDPC coding, in order to improve the decoding performance of the communication device at the receiving end, it is required to reduce the number of bits that are repeated or not transmitted between the redundancy versions.

Generally, there are various factors affecting the decoding performance of the LDPC code. For example, the decoding segment must include information bits. For example, the parity bits other than the information bits are required to be selected in the order in which the codes are generated to form a low code rate codeword. For example, when retransmission occurs, the higher the repetition bit ratio in the bits to be decoded, the worse the decoding performance.

Figure 4-1 shows an LDPC coded block that includes information bits and check bits. Assume that before the punching, the base matrix supports a maximum code rate of 8/9, and the lowest supported code rate is 1/3. Punching indicates that the coded bits corresponding to the punctured column are not transmitted, and the code rate can usually be increased.

As shown in Figure 4-2, there are four starting positions, p ₀ , p ₁ , p ₂ and p ₃ . The initial transmission obtains the output bit sequence from the 0th starting position p ₀ , which is the redundancy version. 0, the first retransmission obtains the output bit sequence from the second starting position p ₂ , that is, the redundancy version 1, the redundancy version 0 and the redundancy version 1 are not continuous, and there are a large number of skipped bits. Not transmitted. The communication device at the receiving end receives the two redundancy versions and performs combined decoding. However, the redundant bits skipped in FIG. 4-2 are not transmitted to the receiving communication device, so the redundant bits in the redundancy version 1 cannot be selected to constitute the codeword decoding, which greatly degrades the decoding performance.

As shown in Figure 4-3, the initial transmission obtains the output bit sequence from the 0th starting position p ₀ , that is, the redundancy version 0. The first retransmission acquires the output bit sequence from the first starting position p ₁ . That is, the redundancy version 1 is continuous between the redundancy version 0 and the redundancy version 1. However, for the case where the initial transmission code rate is low, there are many repeated bits, which may also result in loss of decoding performance.

In step 301, k ₀ can take the value p _k , and p _k is

One of them, that is, the value of k _max starting positions. k _max may be an integer greater than or equal to 4. For example, k _max = 2 ⁿ , n is an integer greater than or equal to 2.

Wherein, the subscript k of p _k may be the number rv _{idx of the} starting position of the redundancy version. among them,

It can be defined in a variety of ways. For example, the collection can be _{only included}

A collection of these elements can also be a subset of other collections. The collection

The elements in the elements may be arranged in a specific order or may not be arranged in a specific order, and the present application is not particularly limited.

In a possible implementation manner, different from the foregoing manner shown in FIG. 4-2 or FIG. 4-3, as shown in FIG. 4-4, k _max values are used.

It can be set in a non-uniformly spaced manner.

There are at least two or more different adjacent intervals in the middle. Hypothesis

The value of each starting position is arranged in ascending order of the subscript, that is, p ₀ is the minimum value.

Is the maximum value,

The adjacent interval S is the absolute value of the difference between two adjacent starting positions |p _k -p _k-1 |, 0 < k < k _max .

Wherein, the minimum starting position p ₀ =0, or, p ₀ = l ₀ · r, l ₀ is a positive integer, for example, l ₀ can be 2, that is, if the output bit sequence is determined from p ₀ , it needs to be The 2r bits are skipped. If r=z, that is, the coded information bits corresponding to the first two columns of the base matrix are skipped, and these two columns can usually be built-in punctured bit columns. If the buffer sequence W does not include the coded information bits corresponding to the first two columns of the base matrix, then p ₀ =0. It should be noted that the examples are merely examples and are not limited thereto.

When the starting position is set in evenly spaced mode, each |p _k -p _k-1 | is equal, that is,

The middle adjacent intervals are equal.

When setting the starting position in non-uniform interval mode,

There are at least two or more different adjacent intervals in the middle, for example, one of the starting positions p _k such that |p _k -p _k-1 |>|p _k+1 -p _k |.

Taking k _max = 4 as an example, in a possible design, if N _CB ≥ K _D and k > 0, the bit sequence D is the encoded bit sequence, then p _k ≥ (p ₀ + K). In this design, the buffer sequence W includes all bits of the bit sequence D or bits other than the coded bits corresponding to the built-in punctured bit string, and requires that the code word rate formed by the bits between p ₁ and p ₀ be at least less than or Equal to 1, p ₀ <(p ₀ +K)≤p ₁ <p ₂ <p ₃ , such that the adjacent interval |p ₁ -p ₀ | is greater than or equal to K.

In another possible design, if N _CB ≥ K _D and k>0, the bit sequence D is obtained by truncating the bit sequence after truncating s ₀ bits, then p _k ≥(p ₀ -s ₀ + K). In this design, the buffer sequence W includes all the bits of the bit sequence D, and the s ₀ bit can be used as the offset of the start position set when not truncated, p ₀ <(p ₀ -s ₀ +K) ≤ p ₁ <p ₂ <p ₃ .

In the above design, if a retransmission occurs, an appropriate starting position can be selected among p ₁ and p ₂ according to the initial transmission rate, and the determined output bit sequence is such that the receiving end receives the merged repeated bits less.

As shown in Figure 4-4, the example shows the non-uniform setting of the starting position of the LDPC code block shown in Figure 4-1. The minimum supported bit rate is 1/3, that is, the information bits occupy 1/3 of the total length. ₂ is located near the 2/3 code rate, that is, in the middle of the sequence, p ₃ is located near the 0.5 code rate, p ₁ is located near the 0.8 code rate, and K = 1056 is taken as an example, the code rate is 1/3, and the code block is The maximum length is 3168 bits, where p ₂ =1584, p ₃ = 2122, p ₁ =1320, p ₀ =0. It can be seen that (p ₁ -p ₀ )>(p ₂ -p ₁ ) and the adjacent intervals are three.

In yet another possible design, if N _CB <K _D and k>0, the buffer sequence W includes a portion of the bits of the bit sequence D, and p _k may correspond to the buffer sequence W including the respective start positions in the bit sequence D. Scale it equally.

If the bit sequence D is a coded bit sequence,

That is, satisfy

Thus the adjacent interval |p ₁ -p ₀ | is greater than or equal to

of.

If the bit sequence D is obtained by truncating the encoded bit sequence by s ₀ bits, then

Thus the adjacent interval |p ₁ -p ₀ | is greater than or equal to

of.

It should be noted that the adjacent interval |p ₁ -p ₀ | can also be rounded down to

Further, for the above design, (p ₁ -p ₀ )>(p ₂ -p ₁ ),

There are at least two or more different adjacent intervals in the middle.

Based on the above design, when k>0, p _k can also satisfy the above requirements, and also needs to be at an integer multiple of the unit bit segment, that is, p _k = l _k · r, where l _k is positive Integer. For example, if N _CB ≥ K _D and k>0,

For another example, if N _CB <K _D and k>0,

It should be noted that this is merely an example, and these formulas may be appropriately modified. For example, the rounding up is changed to rounding down so that the position of p _k is an integer multiple of the unit bit segment. Embodiments of the invention are not limited thereto.

for

In the value p _k , the k _{0 in} step 301 can be obtained in a variety of ways.

In yet another possible implementation, the order of the starting positions acquired at each transmission may be defined, and the order of the values of the subscript k of p _k at each transmission may also be defined. This sequence may be indicated to the communication device at the receiving end, or may be stored in the communication device at both ends of the transmitting and receiving.

Wherein, the subscript k of p _k may be the number rv _idx of the starting position of the redundancy version, and the number of the starting position of the redundancy version of the i th transmission may be represented as rv _idx (i), the starting position k ₀ (i ) can be determined based on the number rv _idx (i mod k _max ) of the starting position of the redundancy version.

A fixed-order starting position obtaining method may be used. In an embodiment, the value order of the rv _idx may be defined, and the number of values in the value order may be k _max or the maximum number of retransmissions R _max . For example, when k _max = 8, the order of the values of rv _idx is 0, 3, 6, 2, 5, 7, 4, 1. Then, in the initial transmission, the output bit sequence is determined from the p _0th bit, the first transmission k ₀ (1)=p ₃ , the output bit sequence is determined from the p ₃ bit, and the second transmission k ₀ (2)= p ₆ , the output bit sequence is determined from the p _6th bit, and so on. When the k _maxth transmission is performed, the output bit sequence is determined again from the p _0th bit. That is, for the ith transmission, k = rv _idx (i mod k _max ), k ₀ (i) = p _k . For another example, k _max = 4, the maximum number of retransmissions R _max =, 4, the order of the value of rv _idx is {0, 2, 3, 1}, and the initial output bit is determined from the p ₀ bit. The sequence, the first transmission k ₀ (1) = p ₂ , determines the output bit sequence from the p ₃ bit, and transmits k ₀ (2) = p _{3 for} the second time. For the ith transmission, k = rv _idx (i mod R _max ), k ₀ (i) = p _k .

Further, the order of the value of rv _idx may also be determined according to the size of the initial transmission code rate, or may be determined based on the length E of the output bit sequence and the spreading factor z of each transmission. In a non-adaptive retransmission scenario, the lengths of the output bit sequences of the initial transmission and the retransmission are equal, for example based on

Determine the order of the values of rv _idx , for example, you can set one or more thresholds, according to

The relationship with these thresholds determines the order of the values of rv _idx .

For example, with k _max = 8, an LDPC matrix of 66*82 is used, wherein the number of information bit columns is 16. For the coding block, the correspondence between the order of the values of rv _idx and the initial code rate can be seen in Table 1, for example, R _{0 .} ≥0.8, rv _idx takes the order of {0, 2, 4, 6}.

Table 1

Initial code rate R 0	Rv idx order of values
R 0 ≥0.8	0,2,4,6
0.53 ≤ R 0 <0.8	0,3,6,2
R 0 <0.53	0,4,2,6

For example, with k _max = 8, an LDPC matrix of 66*82 is used, wherein the number of information bit columns is 16. For the coding block, the correspondence between the order of the values of rv _idx and the initial code rate can be seen in Table 2, for example.

The order of rv _idx is {0,3,6,2}.

Table 2

This method is suitable for non-adaptive retransmissions, and the information of the starting position does not need to be indicated to the receiving communication device before each transmission.

The starting position k ₀ (i) of the output bit sequence in the encoded block may also be obtained based on the rv _idx indicated by the transmitting communication device. This method is suitable for adaptive retransmission.

In a further possible implementation, the starting position k ₀ may also be obtained according to the parameter f(rv _idx ) of the redundancy version starting position number rv _idx . E.g,

If p ₀ = l ₀ · r,

If p ₀ =0,

Where r can be the expansion factor z or R _subblock , taking k _max = 4 as an example, rv _idx =0, 1, 2, 3, f(0) = 0, f(1) = 1.67, f(2) = 2 , f(3)=3. It should be noted that here is

Round up, you can also

Round down.

Figure 5-1 shows an LDPC code base map with a size of 46 rows and 68 columns. With p ₀ =0,

For example, where r=z, where the corresponding bits of the two columns of the built-in punctured bitstream are not into the circular buffer, in one possible implementation, N _CB = 66 z, taking k _max = 4 as an example, rv _idx =0 , f(0) = 0, rv _idx = 1, f(1) = 1.67, and the starting positions are 0 and 28z. Rv _idx = 2, f(2) = 2, correspondingly the starting position is 33z, rv _idx = 3, f(3) = 3, correspondingly the starting position is 50z, in this way, {p ₀ , p ₁ , p ₂ , p ₃ } may be {0, 28z, 33z, 55z}. In another possible implementation manner, for rv _idx =1, f(1) may have other values, as shown in Table 3, which are different values of f(1) and corresponding values. The starting position k ₀ takes the value p ₁ :

table 3

f(1)	p 1
1.85	31z
1.80	30z
1.75	29z
1.67	28z
1.60	27z
1.55	26z
1.50	25z
1.42	24z
1.35	23z

In Table 3, the value p ₁ is such that the interval between 23z ~ 31z between p ₁ and p _0, since the base shown in Figure 5-1 in FIG. 22 as corresponding to the information bits, and thus less than K encoded Or equal to 22z, p ₁ satisfies p ₁ ≥(p ₀ +K).

In yet another possible implementation, for rv _idx = 2 and rv _idx = 3, the starting position combinations p ₂ and p ₃ as shown in Table 4 can be defined:

Table 4

p 2	p 3
36z	51z
35z	51z
34z	51z
33z	51z

35z	50z
34z	50z
33z	50z
32z	50z
34z	49z
33z	49z
32z	49z
31z	49z
33z	48z
32z	48z
31z	48z
30z	48z

The interval between p ₂ and p _{3 is} between 15z and 18z, and the interval between p ₂ and p ₀ , p ₃ and p ₀ also satisfies p _k ≥(p ₀ +K).

Alternatively, the starting position {p ₀ , p ₁ , p ₂ , p ₃ } may be defined based on the combination of p _{1 in} Table 3 and p ₂ and p ₃ in Table 4, where p ₀ may be 0, or p ₀ =l ₀ ·z, l ₀ is a positive integer. These combinations also satisfy (p ₁ -p ₀ )>(p ₂ -p ₁ ).

For example: {p ₀ , p ₁ , p ₂ , p ₃ } can be {0, 31z, 33z, 50z}, or {0, 23z, 36z, 51z}, etc., can be taken according to p ₁ in Table 3. The values and the combination of the values of p ₂ and p ₃ in Table 4 give a combination of various starting positions. It should be noted that the examples are merely examples and are not limited thereto.

In another possible implementation, if the circular buffer is limited, for the base map shown in Figure 5-1, N _CB <66z, in this scenario, each starting position may be relative to the above table. 3 or each of the starting positions in Table 4 is scaled proportionally, for example, the scaling can be performed after the scaling is still an integer multiple of z.

For another example, scaling can be performed, but it is not necessarily required to take an integer multiple of z.

among them

It can be p ₁ or p ₂ or p ₃ in Table 3 above, and Operation (·) is a rounding operation, which can be up, down, rounded or other rounding methods.

Figure 5-2 to Figure 5-4 show the LDPC code encoding based on the base map shown in Figure 5-1. Based on the performance simulation curve of the above embodiment, three different starting positions are set under the AWGN channel. The method was simulated and tested under three different initial pass rates of 0.93, 8/9 and 5/6. For the first retransmission, the BLER curve was used under different starting position setting methods. In the figure, the abscissa indicates the EsN0 of the current channel signal-to-noise ratio, and the ordinate indicates the block error rate (BLER). The closer the curve is to the left, the lower the signal, the lower the signal-to-noise ratio. Block error rate, better performance. Here, it is assumed that the lengths of the retransmissions and the initial transmissions are equal, all codewords are LDPC coded, and the lowest coding rate supported by the LDPC matrix is 1/3.

The triangular curve is a method for uniformly setting the starting position. The block curve is the method according to the embodiment of the present invention, and the parameter f(rv _idx ) of the redundancy version starting position number rv _idx is 0, 1.67, 2 and 3, respectively, after comparison. In all cases, the block curve is located on the left side of the triangular curve, indicating that the method of the embodiment of the present invention performs better than the method of uniformly setting the starting position.

Figure 8 is a further LDPC code base diagram, the size of which is 42 rows and 52 columns, the row number is marked in the leftmost column, the column number is marked in the top row, and only the non-zero elements are shown in each row and column, represented by "1" The blank part is zero element. With p ₀ =0,

For example, where r=z, where the corresponding bits of the two columns of the built-in punctured bitstream are not into the circular buffer, in one possible implementation, N _CB = 50z, taking k _max = 4 as an example, rv _idx =0 , f(0)=0, rv _idx =1, f(1)=1.10, and the starting positions are 0 and 14z. Rv _idx = 2, f(2) = 2, correspondingly the starting position is 25z, rv _idx = 3, f(3) = 3, correspondingly the starting position is 38z, in this way, {p ₀ , p ₁ , p ₂ , p ₃ } may be {0, 14z, 25z, 38z}. In another possible implementation manner, for rv _idx =1, f(1) may have other values, as shown in Table 5, which are different possible values of f(1) and corresponding thereto. The starting position k ₀ takes the value p ₁ :

table 5

f(1)	p 1
1.10	14z
1.15	15z
1.25	16z
1.32	17z
1.40	18z
1.48	19z
1.56	20z
1.64	21z
1.72	22z
1.80	23z

In Table 5, the value p ₁ is such that the spacing between 14z ~ 23z between p ₁ and p _0, since the group shown in FIG. 8 as corresponding to the information bits 10, and thus encoded is less than or equal K 10z, p ₁ satisfies p ₁ ≥ (p ₀ + K).

In yet another possible implementation, for rv _idx = 2 and rv _idx = 3, the starting position combinations p ₂ and p ₃ as in Table 6 can be defined:

Table 6

p 2	p 3
28z	39z
27z	39z
26z	39z
25z	39z
27z	38z
26z	38z
25z	38z
24z	38z
26z	37z
25z	37z
24z	37z

23z	37z
25z	36z
24z	36z
23z	36z
22z	36z

The interval between p ₂ and p _{3 is} between 11z and 14z, and the interval between p ₂ and p ₀ , p ₃ and p ₀ also satisfies p _k ≥(p ₀ +K).

Alternatively, the starting position {p ₀ , p ₁ , p ₂ , p ₃ } may be defined based on the combination of p _{1 in} Table 5 and p ₂ and p ₃ in Table 6, where p ₀ may be 0, or p ₀ =l ₀ ·z, l ₀ is a positive integer. These combinations also satisfy (p ₁ -p ₀ )>(p ₂ -p ₁ ).

For example: {p ₀ , p ₁ , p ₂ , p ₃ } can be {0, 14z, 25z, 38z}, can also be {0, 18z, 28z, 39z}, etc., can be taken according to p ₁ in Table 5. The values and the combination of the values of p ₂ and p ₃ in Table 6 give a combination of various starting positions. It should be noted that the examples are merely examples and are not limited thereto.

In another possible implementation, if the circular buffer is limited, for the base map shown in FIG. 8, N _CB <50z, in this scenario, each starting position may be relative to the above table 5 or The starting positions in Table 6 are scaled proportionally. For example, the scaling can be performed after the scaling is still an integer multiple of z.

For another example, scaling can be performed, but it is not necessarily required to take an integer multiple of z.

among them

It may be p ₁ or p ₆ or p ₃ in Table 5 above, and Operation (·) is a rounding operation, which may be up, down, rounding or other rounding method.

In another possible implementation manner, the starting position of the bit sequence in the coding block may also be obtained according to the interval between the starting positions of the adjacent two redundant versions, as exemplified by {0, 28z, 33z, 50z}, for example, the starting position can also be obtained according to the interval between the starting positions of two adjacent redundant versions: p ₀ = _{0, 0,} 28z, 5z, 17z, 16z, where k ₀ (1) = p ₀ + 28z = 28z, k ₀ (2) = k ₀ (1) + 5z = 33z, and so on.

Optionally, after the foregoing information processing method, the communication device may further process the output bit sequence such that the output bit sequence is used in transmitting or receiving, for example, interleaving the output bit sequence, and mapping to Processing of modulation symbols, etc. For the processing, reference may be made to the corresponding processing method in the prior art, and details are not described herein again.

FIG. 6 is a flowchart of an information processing method according to an embodiment of the present invention. The method is applicable to a communication system, where the communication system includes a communication device 20 and a communication device 21. The method can be implemented by the communication device 21, including:

601: Acquire a starting position k _{0 of the} soft bit sequence in the buffer sequence W.

602: Combine and save the soft bit sequence in the cache sequence W based on the starting position k ₀ .

The buffer sequence W includes a soft value sequence of the bit sequence D or a part of the soft value sequence of the bit sequence D. The soft sequence sequence length of the bit sequence D is K _D bits, and the bit sequence D is a length K. The bit sequence C is based on a bit sequence obtained by encoding a low density parity check LDPC matrix, or the bit sequence D is truncated from a bit sequence obtained by encoding a bit sequence C of length K based on a low density parity check LDPC matrix. s ₀ bits are obtained.

k ₀ takes the value p _k and p _k is

One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the size of the buffer sequence W, and k _max is an integer greater than or equal to 4;

Said

There are two or more different adjacent intervals in the middle.

The communication device 20 transmits the output bit sequence obtained in the foregoing embodiments to the communication device 21. It can be understood that the output bit sequence in the above embodiment is a rate-matched output bit sequence, and the communication device 20 can rate the The matched output bit sequence is subjected to interleaving modulation or the like to transmit a transmission signal corresponding to the output bit sequence, and the communication device 21 receives the output signal and demodulates and deinterleaves to obtain a soft bit corresponding to the output bit sequence. The sequence, that is, one bit in the output bit sequence corresponds to a soft channel bit in the soft bit sequence. The locations where the soft value bits are stored in the soft information buffer of the communication device 21 correspond one-to-one with the locations of the coded blocks in the circular buffer in the communication device 20, and the size of the soft information buffer is the same as the size of the coded block in the circular buffer. , can be N _CB .

For example, the output bit transmitted by the communication device 20 is 1, and after the channel transmission, the communication device 21 obtains its corresponding soft value bit to be 1.45. If the position of the output bit in the coding block is the fifth bit, the soft in the communication device 21 The 5th soft value bit in the message buffer is 1.45. It should be noted that the description herein is merely an example, and the embodiment of the present invention is not limited thereto. If the output bit sequence acquired by the communication device 20 includes n output bits, the communication device 31 can acquire n corresponding soft value bits. If the communication device 31 receives the soft value bits of the same location twice, the two soft values are combined, for example, the soft value bit received during the first transmission is 1.45, and the softness received during the second transmission. The value bit is 0.5, which is 1.95 after the combination. It should be noted that the examples are merely examples and are not limited thereto.

It can be seen that the starting position k ₀ and the obtaining manner thereof have the features corresponding to the foregoing embodiments. For details, refer to the foregoing embodiments, and details are not described herein again. It should be noted that, for the communication device 20, the buffer sequence W is a coding block in the circular buffer, and in the communication device 21, the buffer sequence W is a soft value sequence in the soft information buffer; on the side of the communication device 20 The output bit sequence is determined from the coded block in the circular buffer, and on the communication device 21 side, the received soft bit sequence is saved in the soft information buffer.

FIG. 7 is a schematic structural diagram of a communication device 700. The device 700 can be used to implement the method described in the foregoing method embodiments. For details, refer to the description in the foregoing method embodiments. The communication device 700 can be a chip, a base station, a terminal, or other network device. The communication device 700 can also be the communication device 20 or the communication device 21 of FIG.

The communication device 700 includes one or more processors 701. The processor 701 can be a general purpose processor or a dedicated processor or the like. For example, it can be a baseband processor, or a central processing unit. The baseband processor can be used to process communication protocols and communication data, and the central processor can be used to control communication devices (eg, base stations, terminals, or chips, etc.), execute software programs, and process data of the software programs.

In one possible design, the communication device 700 includes one or more of the processors 701, and the one or more processors 701 can implement the methods of the various embodiments shown in FIG. Optionally, the processor 701 can implement other functions in addition to the methods of the embodiments shown in FIG. 3.

The communication device 700 obtains a starting position k _{0 of the} output bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a bit sequence D or a part of the bit sequence D; based on the starting position k ₀ from the The output bit sequence is determined in the buffer sequence W.

In one possible design, one or more of the processors 701 can implement the methods of the various embodiments shown in FIG.

The communication device 700 obtains a starting position k _{0 of the} soft bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a soft value sequence of the bit sequence D or a part of a soft value sequence of the bit sequence D, the bit The soft sequence length of sequence D is K _D ;

The soft bit sequence is combined and saved in the cache sequence W starting based on the start position k ₀ .

In the above possible design, the bit sequence D has a length of K _D bits, wherein the bit sequence D is a bit sequence of a bit sequence C of length K based on a low density parity check LDPC matrix, or The bit sequence D is obtained by truncating s ₀ bits in a bit sequence obtained by encoding a bit sequence C of length K based on a low density parity check LDPC matrix, where s ₀ is an integer greater than zero.

k ₀ takes the value p _k and p _k is

One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the size of the buffer sequence W, and k _max is an integer greater than or equal to 4;

Said

There are two or more different adjacent intervals in the middle. .

In an alternative design, the processor 701 can also include instructions 703 that can be executed on the processor such that the communication device 700 performs the methods described in the above method embodiments.

In yet another possible design, the communication device 700 can also include circuitry that can implement the functions of the foregoing method embodiments. Optionally, the communication device 700 can include one or more memories 702 on which instructions 704 are stored, the instructions can be executed on the processor, such that the communication device 700 performs the above method embodiment. The method described in . Optionally, data may also be stored in the memory. Instructions and/or data can also be stored in the optional processor. The processor and the memory may be provided separately or integrated. Alternatively, one or more memories 702 may store initial location, redundancy version related parameters, and the like.

In yet another design, one or more processors 701 can be used to implement the functions of the various modules shown in FIG. 2. For example, the functions of the various modules in the communication device 20 or the communication device 21.

Optionally, the communication device 700 may further include a transceiver 705 and an antenna 706. The processor 701 may be referred to as a processing unit that controls a communication device (terminal or base station). The transceiver 705 can be referred to as a transceiver unit, a transceiver, a transceiver circuit, or a transceiver, etc., for implementing the transceiver function of the communication device through the antenna 706.

Optionally, the communication device 700 may further comprise a device for generating a transport block CRC, a device for code block splitting and CRC check, an encoder, an interleaver for interleaving, or a modulation for modulation processing. And so on. The functionality of these devices can be implemented by one or more processors 701.

Optionally, the communication device 700 may further include a demodulator for demodulation operation, a deinterleaver for deinterleaving, a decoder, and the like. The functionality of these devices can be implemented by one or more processors 701.

It is also understood by those skilled in the art that the various illustrative logical blocks and steps listed in the embodiments of the present invention can be implemented by electronic hardware, computer software, or a combination of both. Whether such functionality is implemented by hardware or software depends on the design requirements of the particular application and the overall system. A person skilled in the art can implement the described functions using various methods for each specific application, but such implementation should not be construed as being beyond the scope of the embodiments of the present invention.

The various illustrative logic units and circuits described in the embodiments of the invention may be implemented by a general purpose processor, a digital signal processor, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device. Discrete gate or transistor logic, discrete hardware components, or any combination of the above are designed to implement or operate the functions described. A general purpose processor may be a microprocessor. Alternatively, the general purpose processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented by a combination of computing devices, such as a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a digital signal processor core, or any other similar configuration. achieve.

The steps of the method or algorithm described in the embodiments of the present invention may be directly embedded in hardware, instructions executed by a processor, or a combination of the two. The memory can be RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium in the art. Illustratively, the memory can be coupled to the processor such that the processor can read information from the memory and can write information to the memory. Alternatively, the memory can also be integrated into the processor. The processor and the memory may be disposed in an ASIC, and the ASIC may be disposed in the UE. Alternatively, the processor and memory may also be located in different components in the UE.

Through the description of the above embodiments, those skilled in the art can clearly understand that the present invention can be implemented in hardware, firmware implementation, or a combination thereof. When implemented using a software program, it may be implemented in whole or in part in the form of a computer program product comprising one or more computer instructions (which may also be referred to as a program or code). When the computer instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present invention are generated in whole or in part. When implemented using a software program, the functions described above may also be stored in or transmitted as one or more instructions or code on a computer readable medium. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium. Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another. A storage medium may be any available media that can be accessed by a computer. By way of example and not limitation, computer readable media may comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage media or other magnetic storage device, or can be used for carrying or storing in the form of an instruction or data structure. The desired program code and any other medium that can be accessed by the computer. Also. Any connection may suitably be a computer readable medium. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable , fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, wireless, and microwave are included in the definition of the medium to which they belong. As used in the present invention, a disk and a disc include a compact disc (CD), a laser disc, a compact disc, a digital versatile disc (DVD), a floppy disk, and a Blu-ray disc, wherein the disc is usually magnetically copied, and the disc is The laser is used to optically replicate the data. Combinations of the above should also be included within the scope of the computer readable media.

In summary, the above description is only a preferred embodiment of the technical solution of the present invention, and is not intended to limit the scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims (30)

1. A method for processing information in a communication system, the method comprising:

   Obtaining a starting position k _{0 of the} output bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a bit sequence D or a part of a bit sequence D, the bit sequence D being K _D bits in length, wherein the bit The sequence D is a bit sequence of a bit sequence C of length K based on a low density parity check LDPC matrix, or the bit sequence D is coded from a bit sequence C of length K based on a low density parity check LDPC matrix. Obtained by truncating s ₀ bits in the bit sequence, where s ₀ is an integer greater than 0;

   Determining an output bit sequence from the cache sequence W based on the start position k ₀ ; wherein

   k ₀ takes the value p _k and p _k is

   

   One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the length of the buffer sequence W, and k _max is an integer greater than or equal to 4;

   Said

   

   There are two or more different adjacent intervals in the middle.
2. A method for processing information in a communication system, the method comprising:

   Obtaining a starting position k _{0 of the} soft bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a soft value sequence of the bit sequence D or a part of the soft value sequence of the bit sequence D, the soft value of the bit sequence D The sequence length is K _D , and the bit sequence D is a bit sequence of a bit sequence C of length K based on a low density parity check LDPC matrix, or the bit sequence D is based on a bit sequence C of length K. The bit sequence obtained by encoding the low density parity check LDPC matrix is truncated by s ₀ bits, where s ₀ is an integer greater than 0;

   Starting to save the soft bit sequence in the cache sequence W based on the starting position k ₀ ;

   k ₀ takes the value p _k and p _k is

   

   One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the size of the buffer sequence W, and k _max is an integer greater than or equal to 4;

   Said

   

   There are two or more different adjacent intervals in the middle.
3. The method according to claim 1 or 2, wherein if k=0, then p ₀ =0, or p ₀ = l ₀ · r, wherein l ₀ is a positive integer and r is the buffer sequence The number of bits included in the unit bit segment in W, r is an integer greater than zero.
4. The method according to any one of claims 1 to 3, characterized in that k _max = 4, if N _CB ≥ K _D , and k > 0, p _k ≥ (p ₀ + K), or, p _k ≥ (p ₀ -s ₀ +K).
5. The method according to any one of claims 1 to 3, characterized in that k _max = 4, if N _CB < K _D , and k > 0,

   

   or,

   
6. The method according to claim 4 or 5, wherein if p ₀ <p ₁ <p ₂ <p ₃ , then (p ₁ -p ₀ )>(p ₂ -p ₁ ).
7. The method according to any one of claims 1 to 6, wherein p _k = l _k · r, wherein l _k is a positive integer.
8. The method according to any one of claims 1 to 7, wherein s ₀ = n·r, where n is a positive integer.
9. The method according to any one of claims 3 to 8, characterized in that r = z, z is a spreading factor of the LDPC matrix.
10. The method according to any one of claims 1 to 9, wherein the obtaining a starting position k ₀ comprises:

    The starting position k _{0 is} obtained based on the redundancy version starting position number rv _idx .
11. The method according to claim 10, wherein the obtaining the starting position k ₀ based on the redundancy version starting position number rv _idx comprises:

    The starting position k _{0 is} obtained according to the parameter of the redundancy version starting position number rv _idx .
12. The method according to claim 10 or 11, wherein the redundancy version start position number rv _idx is obtained by signaling.
13. The method according to claim 10 or 11, wherein the redundancy version start position number rv _idx is acquired based on the number order of the redundancy version start position.
14. The method according to claim 13, wherein the number order of the redundancy version start position is read from the memory, or the number order of the redundancy version start position is based on the initial code rate. Determining, or the numbering order of the starting positions of the redundancy versions is determined based on the length E of the output bit sequence and the spreading factor z.
15. A communication device for performing the method of any one of claims 1 to 14.
16. A communication device, comprising: a processor, a memory, and instructions stored on the memory and operable on the processor, when the instructions are executed, causing the communication device to perform the claims The method of any one of 1 to 14.
17. A computer readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform the method of any one of claims 1 to 14.
18. A communication device, the communication device comprising:

    An obtaining unit, configured to obtain a starting position k _{0 of the} output bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a bit sequence D or a part of the bit sequence D, the bit sequence D being K _D bits in length, The bit sequence D is a bit sequence of a bit sequence C of length K based on a low density parity check LDPC matrix, or the bit sequence D is a bit sequence C of length K based on a low density parity. Obtaining a truncated s ₀ bit in a bit sequence obtained by encoding an LDPC matrix, where s ₀ is an integer greater than 0;

    a determining unit, configured to determine an output bit sequence from the cache sequence W based on the starting position k ₀ ; wherein

    k ₀ takes the value p _k and p _k is

    

    One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the length of the buffer sequence W, and k _max is an integer greater than or equal to 4;

    Said

    

    There are two or more different adjacent intervals in the middle.
19. A communication device, characterized in that the communication device comprises:

    An obtaining unit, configured to obtain a starting position k _{0 of the} soft bit sequence in the buffer sequence W, wherein the buffer sequence W comprises a soft value sequence of the bit sequence D or a part of a soft value sequence of the bit sequence D, the bit The sequence of the soft value sequence of the sequence D is K _D , and the bit sequence D is a bit sequence of the bit sequence C of length K based on the low density parity check LDPC matrix, or the bit sequence D is from the length K. The bit sequence C is obtained by truncating the s ₀ bit in the bit sequence obtained by encoding the low density parity check LDPC matrix, where s ₀ is an integer greater than 0;

    a determining unit, configured to start saving the soft bit sequence in the cache sequence W based on the starting position k ₀ ; wherein

    k ₀ takes the value p _k and p _k is

    

    One of them, 0 ≤ k < k _max , and 0 _≤ p _k < N _CB , p _k is an integer, k is an integer, N _CB is the size of the buffer sequence W, and k _max is an integer greater than or equal to 4;

    Said

    

    There are two or more different adjacent intervals in the middle.
20. The communication device according to claim 18 or 19, wherein if k = 0, then p ₀ =0, or p ₀ = l ₀ · r, wherein l ₀ is a positive integer and r is the buffer The number of bits included in the unit bit segment in the sequence W, r is an integer greater than zero.
21. Communication device according to any one of claims 18 to 20, characterized in that k _max = 4, if N _CB ≥ K _D , and k > 0, p _k ≥ (p ₀ + K), or, p _k ≥ (p ₀ -s ₀ +K).
22. Communication device according to any one of claims 18 to 20, characterized in that k _max = 4, if N _CB < K _D and k > 0,

    

    or,

    
23. The communication device according to claim 21 or 22, wherein (p ₁ - p ₀ ) &gt; (p ₂ - p ₁ ) if p ₀ &lt; p ₁ &lt; p ₂ &lt; p ₃ .
24. A communication apparatus according to any one of claims 18 to 23, wherein p _k = l _k · r, wherein l _k is a positive integer.
25. A communication apparatus according to any one of claims 20 to 24, wherein r = z, z is a spreading factor of said LDPC matrix.
26. The communication device according to any one of claims 18 to 25, wherein the obtaining a starting position k ₀ comprises:

    The starting position k _{0 is} obtained based on the redundancy version starting position number rv _idx .
27. The communication apparatus according to claim 26, wherein said redundancy version start position number rv _idx is obtained by signaling.
28. The communication apparatus according to claim 26, wherein said redundancy version start position number rv _idx is acquired based on a number order of a redundancy version start position.
29. The communication device according to claim 28, wherein the number order of the redundancy version start position is read from the memory, or the number order of the redundancy version start position is based on the initial code The rate determined, or the numbering order of the starting positions of the redundancy versions is determined based on the length E of the output bit sequence and the spreading factor z.
30. A communication system comprising the communication device of claim 18 and the communication device of claim 19.

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