WO2018201368A1

WO2018201368A1 - System and method for using broadcast signals

Info

Publication number: WO2018201368A1
Application number: PCT/CN2017/082985
Authority: WO
Inventors: Haigang HE; Peng Hao; Feng Bi; Huahua Xiao
Original assignee: Zte Corporation
Priority date: 2017-05-04
Filing date: 2017-05-04
Publication date: 2018-11-08

Abstract

A method includes generating a plurality of bits that are to be transmitted through a broadcast channel； and dividing the plurality of bits into a first portion and a second portion, wherein the first portion of the plurality of bits provides a first portion of system information associated with a node, and the second portion of the plurality of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.

Description

SYSTEM AND METHOD FOR USING BROADCAST SIGNALS

TECHNICAL FIELD

The disclosure relates generally to wireless communications and, more particularly, to systems and methods for using a broadcast channel.

BACKGROUND

In wireless communications, a base station (BS) typically sends one or more signals including system information (e.g., Master Information Block (MIB) , System Information Block (SIB) , etc. ) to a user equipment (UE) through a physical channel, such as a Physical Broadcast Channel (PBCH) , Physical Downlink Shared Channel (PDSCH) , etc., for example. In particular, a first broadcast signal carrying some major system information that is used by the BS to broadcast, for example, how a respective cell is configured is typically transmitted through the PBCH.

In the fourth generation (4G) Long Term Evolution (LTE) , and earlier standard networks, in order to allow such a first broadcast channel to be used in future applications, the first broadcast signal generally include a plurality of reserved bits (e.g., 10 bits) that do not include any system information. However, due to the limited number of physical channels that can be allocated simultaneously, these reserved bits constitute an undesirable waste of communication resources when transmitting signals through the physical channels.

SUMMARY OF THE INVENTION

The exemplary embodiments disclosed herein are directed to solving the issues relating to one or more of the problems presented in the prior art, as well as providing additional features that will become readily apparent by reference to the following detailed description when taken in conjunction with the accompany drawings. In accordance with various embodiments, exemplary systems, methods, devices and computer program products are disclosed herein. It is understood, however, that these embodiments are presented by way of example and not limitation, and it will be apparent to those of ordinary skill in the art who read the present disclosure that various modifications to the disclosed embodiments can be made while remaining within the scope of the invention.

In one embodiment, a method includes generating a plurality of bits that are to be transmitted through a broadcast channel； and dividing the plurality of bits into a first portion and a second portion, wherein the first portion of the plurality of bits provides a first portion of system information associated with a node, and the second portion of the plurality of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.

In a further embodiment, a method includes receiving a message transmitted through a broadcast channel； and estimating a plurality of bits that corresponds to the message, wherein the plurality of bits comprise a first portion and a second portion, the first portion of bits provides a first portion of system information associated with a node transmitting the message, and the second portion of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.

In another embodiment, an apparatus includes at least one processor and a memory coupled to the processor. The at least one processor is configured to generate a plurality of bits that are to be transmitted through a broadcast channel, and divide the plurality of bits into a first portion and a second portion. The first portion of the plurality of bits provides a first portion of system information associated with a node, and the second portion of the plurality of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.

In yet another embodiment, an apparatus includes a receiver configured to receive a message transmitted through a broadcast channel； and at least one processor and a memory coupled to the processor. The at least one processor is configured to estimate a plurality of bits that corresponds to the message. The plurality of bits comprise a first portion and a second portion, the first portion of bits provides a first portion of system information associated with a node transmitting the message, and the second portion of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.

BRIEF DESCRIPTION OF THE DRAWINGS

Various exemplary embodiments of the invention are described in detail below with reference to the following Figures. The drawings are provided for purposes of illustration only and merely depict exemplary embodiments of the invention to facilitate the reader's understanding of the invention. Therefore, the drawings should not be considered limiting of the breadth, scope, or applicability of the invention. It should be noted that for clarity and ease of illustration these drawings are not necessarily drawn to scale.

Figure 1 illustrates an exemplary cellular communication network in which techniques disclosed herein may be implemented, in accordance with one embodiment of the present disclosure.

Figure 2 illustrates a block diagram of an exemplary wireless communication system for transmitting and receiving wireless communication signals, in accordance with one embodiment of the present disclosure.

Figure 3 illustrates a flow chart of an exemplary method performed by a base station to transmit a broadcast signal, in accordance with one embodiment of the present disclosure.

Figure 4 illustrates an exemplary schematic diagram of a plurality of bits that provides system information of a base station being divided into a first portion and a second portion, in accordance with one embodiment of the present disclosure.

Figure 5 illustrates an exemplary schematic diagram of the second portion of the bits of Figure 4 that can be configured as one of plural options, in accordance with one embodiment of the present disclosure.

Figure 6 illustrates an exemplary schematic diagram of the first portion of the bits of Figure 4 including a fixed number of bits to indicate a chosen option, in accordance with one embodiment of the present disclosure.

Figure 7 illustrates an exemplary schematic diagram of the first broadcast signal transmitted using a respective frequency-time range when a respective option of Figure 4 is chosen, in accordance with one embodiment of the present disclosure.

Figure 8 illustrates an exemplary schematic diagram of a respective number sequence of a synchronization signal being determined when a respective option of Figure 4 is chosen, in accordance with one embodiment of the present disclosure.

Figure 9 illustrates a flow chart of an exemplary method performed by a user equipment to estimate respective bits of a broadcast signal, in accordance with one embodiment of the present disclosure.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

Various exemplary embodiments of the invention are described below with reference to the accompanying figures to enable a person of ordinary skill in the art to make and use the invention. As would be apparent to those of ordinary skill in the art, after reading the present disclosure, various changes or modifications to the examples described herein can be made without departing from the scope of the invention. Thus, the present invention is not limited to the exemplary embodiments and applications described and illustrated herein. Additionally, the specific order or hierarchy of steps in the methods disclosed herein are merely exemplary approaches. Based upon design preferences, the specific order or hierarchy of steps of the disclosed methods or processes can be re-arranged while remaining within the scope of the present invention. Thus, those of ordinary skill in the art will understand that the methods and techniques disclosed herein present various steps or acts in a sample order, and the invention is not limited to the specific order or hierarchy presented unless expressly stated otherwise.

Figure 1 illustrates an exemplary wireless communication network 100 in which techniques disclosed herein may be implemented, in accordance with an embodiment of the present disclosure. The exemplary communication network 100 includes a base station (BS) 102 and a user equipment (UE) device 104 that can communicate with each other via a communication link 110 (e.g., a wireless communication channel) , and a cluster of notional cells 126, 130, 132, 134, 136, 138 and 140 overlaying a geographical area 101. In Figure 1, the BS 102 and UE 104 are contained within the geographic boundary of cell 126. Each of the other cells 130, 132, 134, 136, 138 and 140 may include at least one base station operating at its allocated bandwidth to provide adequate radio coverage to its intended users. For example, the base station 102 may operate at an allocated channel transmission bandwidth to provide adequate coverage to the UE 104. The base station 102 and the UE 104 may communicate via a downlink radio frame 118, and an uplink radio frame 124 respectively. Each radio frame 118/124 may be further divided into sub-frames (slots, or mini-slots) 120/126 which may include data symbols 122/128. In the present disclosure, the base station (BS) 102 and user equipment (UE) 104 are described herein as non-limiting examples of “communication nodes, ” or “nodes, ” generally, which can practice the methods disclosed herein. Such communication nodes may be capable of wireless and/or wired communications, in accordance with various embodiments of the invention.

Figure 2 illustrates a block diagram of an exemplary wireless communication system 200 for transmitting and receiving wireless communication signals, e.g., OFDM/OFDMA signals, in accordance with some embodiments of the invention. The system 200 may include components and elements configured to support known or conventional operating features that need not be described in detail herein. In one exemplary embodiment, system 200 can be used to transmit and receive data symbols in a wireless communication environment such as the wireless communication environment 100 of Figure 1, as described above.

System 200 generally includes a base station 202 and a UE 204. The base station 202 includes a BS transceiver module 210, a BS antenna 212, a BS processor module 214, a BS memory module 216, and a network communication module 218, each module being coupled and interconnected with one another as necessary via a date communication bus 220. The UE 204 includes a UE transceiver module 230, a UE antenna 232, a UE memory module 234, and a UE processor module 236, each module being coupled and interconnected with one another as necessary via a date communication bus 240. The BS 202 communicates with the UE 204 via a communication channel 250, which can be any wireless channel or other medium known in the art suitable for transmission of data as described herein.

As would be understood by persons of ordinary skill in the art, system 200 may further include any number of modules other the modules shown in Figure 1. Those skilled in the art will understand that the various illustrative blocks, modules, circuits, and processing logic described in connection with the embodiments disclosed herein may be implemented in hardware, computer-readable software, firmware, or any practical combination thereof. To clearly illustrate this interchangeability and compatibility of hardware, firmware, and software, various illustrative components, blocks, modules, circuits, and steps are described generally in terms of their functionality. Whether such functionality is implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system. Those familiar with the concepts described herein may implement such functionality in a suitable manner for each particular application, but such implementation decisions should not be interpreted as limiting the scope of the present invention.

In accordance with some embodiments, UE transceiver 230 may be referred to herein as an "uplink" transceiver 230 that includes a RF transmitter and receiver circuitry that are each coupled to the antenna 232. A duplex switch (not shown) may alternatively couple the uplink transmitter or receiver to the uplink antenna in time duplex fashion. Similarly, in accordance with some embodiments, the BS transceiver 210 may be referred to herein as a "downlink" transceiver 210 that includes RF transmitter and receiver circuitry that are each coupled to the antenna 212. A downlink duplex switch may alternatively couple the downlink transmitter or receiver to the downlink antenna 212 in time duplex fashion. The operations of the two transceivers 210 and 230 are coordinated in time such that the uplink receiver is coupled to the uplink antenna 232 for reception of transmissions over the wireless transmission link 250 at the same time that the downlink transmitter is coupled to the downlink antenna 212. Preferably there is close time synchronization with only a minimal guard time between changes in duplex direction.

The UE transceiver 230 and the base station transceiver 210 are configured to communicate via the wireless data communication link 250, and cooperate with a suitably configured RF antenna arrangement 212/232 that can support a particular wireless communication protocol and modulation scheme. In some exemplary embodiments, the UE transceiver 230 and the BS transceiver 210 are configured to support industry standards such as the Long Term Evolution (LTE) and emerging 5G standards, and the like. It is understood, however, that the invention is not necessarily limited in application to a particular standard and associated protocols. Rather, the UE transceiver 230 and the BS transceiver 210 may be configured to support alternate, or additional, wireless data communication protocols, including future standards or variations thereof.

In accordance with various embodiments, the BS 202 may be an evolved node B (eNB) , a serving eNB, a target eNB, a femto station, or a pico station, for example. In some embodiments, the UE 204 may be embodied in various types of user devices such as a mobile phone, a smart phone, a personal digital assistant (PDA) , tablet, laptop computer, wearable computing device, etc. The processor modules 214 and 236 may be implemented, or realized, with a general purpose processor, a content addressable memory, a digital signal processor, an application specific integrated circuit, a field programmable gate array, any suitable programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. In this manner, a processor may be realized as a microprocessor, a controller, a microcontroller, a state machine, or the like. A processor may also be implemented as a combination of computing devices, e.g., a combination of a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a digital signal processor core, or any other such configuration.

Furthermore, the steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in firmware, in a software module executed by processor modules 214 and 236, respectively, or in any practical combination thereof. The memory modules 216 and 234 may be realized as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. In this regard, memory modules 216 and 234 may be coupled to the processor modules 210 and 230, respectively, such that the processors modules 210 and 230 can read information from, and write information to, memory modules 216 and 234, respectively. The memory modules 216 and 234 may also be integrated into their respective processor modules 210 and 230. In some embodiments, the memory modules 216 and 234 may each include a cache memory for storing temporary variables or other intermediate information during execution of instructions to be executed by processor modules 210 and 230, respectively. Memory modules 216 and 234 may also each include non-volatile memory for storing instructions to be executed by the processor modules 210 and 230, respectively.

The network communication module 218 generally represents the hardware, software, firmware, processing logic, and/or other components of the base station 202 that enable bi-directional communication between BS transceiver 210 and other network components and communication nodes configured to communication with the base station 202. For example, network communication module 218 may be configured to support internet or WiMAX traffic. In a typical deployment, without limitation, network communication module 218 provides an 802.3 Ethernet interface such that BS transceiver 210 can communicate with a conventional Ethernet based computer network. In this manner, the network communication module 218 may include a physical interface for connection to the computer network (e.g., Mobile Switching Center (MSC) ) .

Referring again to Figure 1, as mentioned above, the BS 102 repeatedly broadcasts system information associated with the BS 102 to one or more UEs (e.g., 104) so as to allow the UE 104 to access the network within the cell 126 where the BS 102 is located, and in general, to operate properly within the cell 126. Plural information such as, for example, downlink and uplink cell bandwidths, downlink and uplink configuration, configuration for random access, etc., can be included in the system information, which will be discussed in further detail below. Typically, the BS 102 broadcasts a first signal carrying some major system information, for example, how the cell 126 is configured, through PBCH (Physical Broadcast Channel) . For purposes of clarity of illustration, such a broadcasted first signal is herein referred to as “first broadcast signal. ” It is noted that the BS 102 may subsequently broadcast one or more signals carrying some other system information through respective channels (e.g., PDSCH (Physical Downlink Shared Channel) ) , which are herein referred to as “second broadcast signal, ” “third broadcast signal, ” and so on.

Referring again to Figure 2, in some embodiments, the major system information carried by the first broadcast signal may be transmitted by the BS 202 in a symbol format via the communication channel 250 (e.g., PBCH) . In accordance with some embodiments, an original form of the major system information may be presented as one or more sequences of digital bits and the one or more sequences of digital bits may be processed through plural steps (e.g., coding, scrambling, modulation, mapping steps, etc. ) , all of which can be processed by the BS processor module 214, to become the first broadcast signal. Similarly, when the UE 204 receives the first broadcast signal (in the symbol format) using the UE transceiver 230, in accordance with some embodiments, the UE processor module 236 may perform plural steps (de-mapping, demodulation, decoding steps, etc. ) to estimate the major system information such as, for example, bit locations, bit numbers, etc., of the bits of the major system information.

Figure 3 illustrates a flow chart of an exemplary method 300 performed by a BS (e.g., BS 102 of Figure 1, BS 202 of Figure 2, etc. ) to send a first broadcast signal to a UE (e.g., UE 104 of Figure 1, UE 204 of Figure 2, etc. ) , in accordance with various embodiments. As mentioned above, in some embodiments, the first broadcast signal may be transmitted via a broadcast channel, for example, PBCH. It is noted that the method 300 is merely an example, and is not intended to limit the present disclosure. Accordingly, it is understood that additional operations may be provided before, during, and after the method 300 of Figure 3 of Figure 3, and that some other operations may only be briefly described herein.

The method 300 starts with operation 302 in which a plurality of digital bits (hereinafter “bits” ) are generated, in accordance with various embodiments. As mentioned above, in some embodiments, such a plurality of bits may include (e.g., provide) major system information associated with the BS, which may be later processed as a first broadcast signal to be transmitted through a broadcast signal (e.g., PBCH) . Next, at operation 304, the plurality of bits are divided into a first portion and a second portion, which will be described in further detail with respect to Figure 4. Moreover, the first portion of the plurality of bits provides (e.g., carries) a first portion of the major system information, and the second portion of the plurality of bits provides (e.g., carries) at least one of a plurality of different options that each comprises part of a second portion of the major system information, which will be described in further detail below with respect to Figures 5-8. Next, at operation 306, the plurality of bits are processed (e.g., through coding, scrambling, modulation, and mapping steps) to become the first broadcast signal that is transmitted via the broadcast channel.

Figure 4 illustrates an exemplary schematic diagram of a plurality of bits 400 being divided into respective first portion 402 and second portion 404, in accordance with some embodiments. Such a plurality of bits 400 may include the major system information associated with the BS that allows one or more UEs to access the network within the cell where the BS is located. In some embodiments, the first portion 402 may include about 30 to 90 bits (hereinafter “L bits” ) ； and the second portion 404 may include about 10 bits (hereinafter “M bits” ) . Moreover, the first portion 402 can carry a first portion of the major system information, and the second portion 404 can carry at least one of plural options that each includes at least part of a second portion of the major system information. In other words, the part of the system information provided by the second portion of bits 404 is configurable, which will be discussed below.

In some embodiments, the first portion of the major system information may include one or more of the following information associated with the BS: configuration information for Downlink Control Information (DCI) , System Frame Number (SFN) information, configuration information for sub-carrier spacing (SCS) of minimum system information transmitted in a subsequent broadcast signal, configuration information for SCS of a Random Access Channel (RACH) , configuration information for a RACH, index information of a Synchronization Signal (SS) block, and Cyclic Prefix (CP) information, downlink channel bandwidth information, Physical Hybrid-ARQ Indicator Channel (PHICH) configuration information, configuration information for eNB transmit antenna, etc. It is noted that the minimum system information, as mentioned above, is typically referred to as “minimum SI” in the emerging New Radio (NR) standard, e.g., 5G standard, which includes content such as, for example, information to support cell selection, and/or information for acquiring other system information.

In some embodiments, the second portion of the major system information may include one or more of the following information associated with the BS: enable information for granting a respective random access network of the BS, validity information for stored system information or minimum system information of the BS, information for reminding the change of stored system information or minimum system information of the BS, information for indicating whether the UE needs to read minimum system information of the BS, and information for allocating a Reference Signal’s frequency/time location, port number, period, or a combination thereof.

In some embodiments, which of the first portion of the major system information (hereinafter “first portion SI” ) the first portion of the bits can provide may be pre-defined by a protocol, and such a protocol has been acknowledged by the BS and any of the UEs trying to access the network of the BS. In other words, respective bit location and bit length of each of the first portion SI are fixed (i.e., non-configurable) . On the other hand, in some embodiments, the BS may determine one or more of the above-listed second portion of the major system information (hereinafter “second portion SI” ) to be provided by the second portion of the bits. The BS may determine at least one of plural options that each can be constituted of a configurable combination of one or more of the second portion SI, which will be discussed in further detail with respect to Figure 5.

Figure 5 illustrates an exemplary schematic diagram of the second portion of bits 404 that can be configured as one of

plural options

502, 512, and 522, in accordance with some embodiments. In option 502, the second portion of bits 404 may include

information

504 and 506； in option 512, the second portion of bits 404 may include

information

514 and 516； and in option 522, the second portion of bits 404 may include

information

524 and 526, wherein each of the

information

504, 506, 514, 516, 524, and 526 can be one of the above-listed second portion SI. More specifically, in some embodiments, each

information

504, 506, 514, 516, 524, and 526 may include a respective number of bits (i.e., bit length) and each bit may be located in a particular location (i.e., bit location) .

Moreover, in some embodiments, when the BS chooses an option, the BS may use plural approaches to indicate which of the options the BS has chosen (i.e., which of the second portion SI is or are included in the second portion of the bits 404) , which will be discussed in further detail below with respect to Figures 6, 7, and 8, respectively. As such, when a UE receives the first broadcast signal, carrying the major system information in the bits 400, the UE can estimate the bits 400 accurately so as to retrieve correct major system information that the BS intends to send. An exemplary method performed by the UE to estimate the bits 400 will be discussed below with respect to Figure 9

Figure 6 illustrates a schematic diagram of the bits 400 including a fixed number of bits to indicate which of the option (e.g., 502, 512, or 522) the BS has chosen, in accordance with some embodiments. In some embodiments, the BS may use one or two bits as indicative bit 403 in the first portion 402 to indicate the chosen option. For example, when one bit is used for indicative bit 403, two options may be provided since indicative bit 403 is either 1 or 0, which, for example, corresponds to either option 502 or option 522. In some embodiments, such a mapping between the indicative bit 403 and option may be pre-defined by a protocol that is acknowledged by the BS and any of the UEs trying to access the network of the BS. As such, when the UE estimates the value of the indicative bit, the UE can determine which of the second portion SI is or are included in the second portion of the bits 404.

Figure 7 illustrates a schematic diagram of the first broadcast signal transmitted using a respective frequency-time range (e.g., 702, 704, etc. ) when a respective option (e.g., 502, 512, or 522) is chosen by the BS, in accordance with some embodiments. More specifically, when the BS chooses one of the options (e.g., 502, 512, or 522) to carry one or more second portion SI in the second portion 404 of the bits, the first broadcast signal’s frequency-time location on a resource grid 701 may change.

For example, in the illustrated embodiment of Figure 7, when the BS chooses option 502, the first broadcast signal may be located in 702 of the resource grid 701 (i.e., the first broadcast signal extending over a respective frequency-time range) ； and when the BS chooses option 522, the first broadcast signal may be located in 704 of the resource grid 701 (i.e., the first broadcast signal extending over another respective frequency-time range) . In some embodiments, a mapping between the frequency-time range of the first broadcast signal and option may be pre-defined by a protocol that is acknowledged by the BS and any of the UEs trying to access the network of the BS. As such, when the UE receives the first broadcast signal at the frequency- time range, the UE can determine which of the second portion SI is or are included in the second portion of the bits 404.

Figure 8 illustrates a schematic diagram of a respective number sequence (e.g., 802, 804, etc. ) of a synchronization signal being determined when a respective option (e.g., 502, 512, or 522) is chosen by the BS, in accordance with some embodiments. Such a synchronization signal can be a primary synchronization signal (PSS) , a secondary synchronization signal (SSS) , a demodulation reference signal (DM-RS) , or an index of a synchronization signal (SS) block that may be transmitted separately from the first broadcast signal, in accordance with some embodiments. Each of the synchronization signals has one or more respective number sequences, and when the BS chooses an option, a particular number sequence may be mapped to the chosen option.

For example, in the illustrated embodiment of Figure 8, the synchronization signal may have two

number sequences

802 and 804. When the BS chooses option 502, the number sequence of the synchronization signal is presented as 802； and when the BS chooses option 522, the number sequence of the synchronization signal is presented as 804. Similarly, such a mapping between the number sequence of the synchronization signal and option may be pre-defined by a protocol that is acknowledged by the BS and any of the UEs trying to access the network of the BS. As such, when the UE receives the synchronization signal, the UE can determine which of the second portion SI is or are included in the second portion of the bits 404.

In an alternative embodiment, the BS may use a cyclic shift technique to generate plural number sequences so as to map different respective options. This is particularly, but not exclusively, useful when the synchronization signal has only one number sequence. For example, when the synchronization signal has one number sequence: a1, a2, a3, a4, a5, and a6, by using the cyclic shift technique, another number sequence may be generated as: a4, a5, a6, a1, a2, and a3 (cyclic shifting by 3) . As such, the original and cyclic shifted number sequences can be mapped to different options, respectively.

In yet another alternative embodiment, the BS may use a weaving technique to map plural number sequences onto different respective options. For example, when the synchronization signal has two number sequences, the BS may map a first number sequence onto a first plurality of resource elements and a second number sequence onto a second plurality of resource elements so to map such a weaved sequence onto a first option； and map the first number sequence onto the second plurality of resource elements and the second number sequence onto the first plurality of resource elements so to map such a weaved sequence onto a second option.

Figure 9 illustrates a flow chart of an exemplary method 900 performed by the UE when the UE receives the first broadcast signal, in accordance with various embodiments. The method 900 starts with operation 902 in which the UE receives the first broadcast signal. Next, at operation 904, the UE estimates the plurality of bits (400 of Figure 4) correspond to the first broadcast signal. As mentioned above, in some embodiments, the UE may estimate the plurality of bits by performing de-mapping, demodulation, decoding steps, and other suitable steps, on the first broadcast signal. More specifically, since the second portion of the bits (404 of Figure 4) carries one of the options (502, 512, 522 of Figure 5) that each includes one or more of the second portion system information, the UE may further rely on the pre-defined mappings that are discussed with respect to Figures 6, 7, and 8, respectively, to estimate the second portion of the bits.

As mentioned above, the BS may transmit one or more subsequent broadcast signals (e.g., the second broadcast signal) . In some embodiments, such subsequent broadcast signals may be transmitted via a channel other than PBCH, for example, PDSCH. Each of the subsequent broadcast signals may carry a remaining portion of the system information or other system information that is not included in the first broadcast signal such as, for example, System Information Block 1 (SIB1) , System Information Block 2 (SIB2) , Public Land Mobile Network (PLMN) information, cell barring information, Channel State Information-Reference Signal (CSI-RS) information, and part of the above-mentioned second portion SI, etc.

In some embodiments, the information that the subsequent broadcast signal will carry may be determined in accordance with which of the options the BS selects (i.e., which of the second portion SI is or are included in the first broadcast signal) . For example, when the BS selects option 502 (i.e., transmitting

second portion SI

504 and 506, but not

second portion SI

514, 516, 524, or 526, in the first broadcast signal) , in an embodiment, the BS may not include any of the

second portion SI

514, 516, 524, and 526 in subsequent broadcast signals, and, in another embodiment, the BS may continue including

second portion SI

504 and 506 in each of the subsequent broadcast signals.

While various embodiments of the invention have been described above, it should be understood that they have been presented by way of example only, and not by way of limitation. Likewise, the various diagrams may depict an example architectural or configuration, which are provided to enable persons of ordinary skill in the art to understand exemplary features and functions of the invention. Such persons would understand, however, that the invention is not restricted to the illustrated example architectures or configurations, but can be implemented using a variety of alternative architectures and configurations. Additionally, as would be understood by persons of ordinary skill in the art, one or more features of one embodiment can be combined with one or more features of another embodiment described herein. Thus, the breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments.

It is also understood that any reference to an element herein using a designation such as "first, " "second, " and so forth does not generally limit the quantity or order of those elements. Rather, these designations can be used herein as a convenient means of distinguishing between two or more elements or instances of an element. Thus, a reference to first and second elements does not mean that only two elements can be employed, or that the first element must precede the second element in some manner.

Additionally, a person having ordinary skill in the art would understand that information and signals can be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits and symbols, for example, which may be referenced in the above description can be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

A person of ordinary skill in the art would further appreciate that any of the various illustrative logical blocks, modules, processors, means, circuits, methods and functions described in connection with the aspects disclosed herein can be implemented by electronic hardware (e.g., a digital implementation, an analog implementation, or a combination of the two) , firmware, various forms of program or design code incorporating instructions (which can be referred to herein, for convenience, as "software" or a "software module) , or any combination of these techniques. To clearly illustrate this interchangeability of hardware, firmware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware, firmware or software, or a combination of these techniques, depends upon the particular application and design constraints imposed on the overall system. Skilled artisans can implement the described functionality in various ways for each particular application, but such implementation decisions do not cause a departure from the scope of the present disclosure.

Furthermore, a person of ordinary skill in the art would understand that various illustrative logical blocks, modules, devices, components and circuits described herein can be implemented within or performed by an integrated circuit (IC) that can include a general purpose processor, a digital signal processor (DSP) , an application specific integrated circuit (ASIC) , a field programmable gate array (FPGA) or other programmable logic device, or any combination thereof. The logical blocks, modules, and circuits can further include antennas and/or transceivers to communicate with various components within the network or within the device. A general purpose processor can be a microprocessor, but in the alternative, the processor can be any conventional processor, controller, or state machine. A processor can also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other suitable configuration to perform the functions described herein.

If implemented in software, the functions can be stored as one or more instructions or code on a computer-readable medium. Thus, the steps of a method or algorithm disclosed herein can be implemented as software stored on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that can be enabled to transfer a computer program or code from one place to another. A storage media can be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer.

In this document, the term "module" as used herein, refers to software, firmware, hardware, and any combination of these elements for performing the associated functions described herein. Additionally, for purpose of discussion, the various modules are described as discrete modules； however, as would be apparent to one of ordinary skill in the art, two or more modules may be combined to form a single module that performs the associated functions according embodiments of the invention.

Additionally, memory or other storage, as well as communication components, may be employed in embodiments of the invention. It will be appreciated that, for clarity purposes, the above description has described embodiments of the invention with reference to different functional units and processors. However, it will be apparent that any suitable distribution of functionality between different functional units, processing logic elements or domains may be used without detracting from the invention. For example, functionality illustrated to be performed by separate processing logic elements, or controllers, may be performed by the same processing logic element, or controller. Hence, references to specific functional units are only references to a suitable means for providing the described functionality, rather than indicative of a strict logical or physical structure or organization.

Various modifications to the implementations described in this disclosure will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other implementations without departing from the scope of this disclosure. Thus, the disclosure is not intended to be limited to the implementations shown herein, but is to be accorded the widest scope consistent with the novel features and principles disclosed herein, as recited in the claims below.

Claims

A method, comprising:

generating a plurality of bits that are to be transmitted through a broadcast channel； and

dividing the plurality of bits into a first portion and a second portion,

wherein the first portion of the plurality of bits provides a first portion of system information associated with a node, and the second portion of the plurality of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.
The method of claim 1, wherein the broadcast channel comprises a Physical Broadcast Channel.
The method of claim 1, wherein the first portion of the system information comprises at least one of the following information: configuration information for Downlink Control Information, System Frame Number information, configuration information for sub-carrier spacing of minimum system information transmitted in a subsequent broadcast signal, configuration information for sub-carrier spacing of a Random Access Channel, configuration information for a RACH, index information of a Synchronization Signal block, and Cyclic Prefix information.
The method of claim 1, wherein the second portion of the system information comprises at least one of the following information: enable information for granting a random access network associated with the node, validity information for stored system information or minimum system information associated with the node, information for reminding the change of stored system information or minimum system information associated with the node, and information for allocating a Reference Signal’s frequency or time location, port number, period, or a combination thereof.
The method of claim 1, wherein the first portion of the plurality of bits comprises one or more bits indicative of which of the plurality of options is selected to be provided by the second portion of the plurality of bits.
The method of claim 1, further comprising:

using the plurality of bits to provide a broadcast signal to be transmitted through the broadcast channel, wherein the broadcast signal is associated with a time-frequency range that is determined based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits.
The method of claim 1, further comprising:

transmitting a synchronization signal, wherein the synchronization signal has a respective number sequence that is selected from a plurality of number sequences based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits.
A method, comprising:

receiving a message transmitted through a broadcast channel； and

estimating a plurality of bits that corresponds to the message,

wherein the plurality of bits comprise a first portion and a second portion, the first portion of bits provides a first portion of system information associated with a node transmitting the message, and the second portion of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.
The method of claim 8, wherein the broadcast channel comprises a Physical Broadcast Channel.
The method of claim 8, wherein the first portion of the system information comprises at least one of the following information: configuration information for Downlink Control Information, System Frame Number information, configuration information for sub-carrier spacing of minimum system information transmitted in a subsequent broadcast signal, configuration information for sub-carrier spacing of a Random Access Channel, configuration information for a RACH, index information of a Synchronization Signal block, and Cyclic Prefix information.
The method of claim 8, wherein the second portion of the system information comprises at least one of the following information: enable information for granting a random access network associated with the node, validity information for stored system information or minimum system information associated with the node, information for reminding the change of stored system information or minimum system information associated with the node, and information for allocating a Reference Signal’s frequency or time location, port number, period, or a combination thereof.
The method of claim 8, wherein when the first portion of the plurality of bits comprises one or more bits indicative of which of the plurality of options is selected to be provided by the second portion of the bits, the method further comprises:

using the one or more bits to estimate the second portion of the bits.
The method of claim 8, wherein when the message is associated with a time-frequency range that is determined based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits, the method further comprises:

using the time-frequency range to estimate the second portion of the bits.
The method of claim 8, further comprising:

receiving a synchronization signal, wherein the synchronization signal has a respective number sequence that is selected from a plurality of number sequences based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits； and

using the respective number sequence of the synchronization signal to estimate the second portion of the bits.
An apparatus, comprising:

at least one processor and a memory coupled to the processor, the at least one processor configured to:

generate a plurality of bits that are to be transmitted through a broadcast channel； and

divide the plurality of bits into a first portion and a second portion,

wherein the first portion of the plurality of bits provides a first portion of system information associated with a node, and the second portion of the plurality of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.
The apparatus of claim 15, wherein the broadcast channel comprises a Physical Broadcast Channel.
The apparatus of claim 15, wherein the first portion of the system information comprises at least one of the following information: configuration information for Downlink Control Information, System Frame Number information, configuration information for sub-carrier spacing of minimum system information transmitted in a subsequent broadcast signal, configuration information for sub-carrier spacing of a Random Access Channel, configuration information for a RACH, index information of a Synchronization Signal block, and Cyclic Prefix information.
The apparatus of claim 15, wherein the second portion of the system information comprises at least one of the following information: enable information for granting a random access network associated with the node, validity information for stored system information or minimum system information associated with the node, information for reminding the change of stored system information or minimum system information associated with the node, and information for allocating a Reference Signal’s frequency or time location, port number, period, or a combination thereof.
The apparatus of claim 15, wherein the first portion of the plurality of bits comprises one or more bits indicative of which of the plurality of options is selected to be provided by the second portion of the plurality of bits.
The apparatus of claim 15, further comprising a transmitter configured to:

transmit a broadcast signal through the broadcast channel, wherein the broadcast signal is associated with a time-frequency range that is determined based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits.
The apparatus of claim 15, further comprising a transmitter configured to:

transmit a synchronization signal, wherein the synchronization signal has a respective number sequence that is selected from a plurality of number sequences based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits.
An apparatus, comprising:

a receiver configured to receive a message transmitted through a broadcast channel； and

at least one processor and a memory coupled to the processor, the at least one processor configured to:

estimate a plurality of bits that corresponds to the message,

wherein the plurality of bits comprise a first portion and a second portion, the first portion of bits provides a first portion of system information associated with a node transmitting the message, and the second portion of bits provides at least one of a plurality of different options that each comprises part of a second portion of the system information associated with the node.
The apparatus of claim 22, wherein the broadcast channel comprises a Physical Broadcast Channel.
The apparatus of claim 22, wherein the first portion of the system information comprises at least one of the following information: configuration information for Downlink Control Information, System Frame Number information, configuration information for sub-carrier spacing of minimum system information transmitted in a subsequent broadcast signal, configuration information for sub-carrier spacing of a Random Access Channel, configuration information for a RACH, index information of a Synchronization Signal block, and Cyclic Prefix information.
The apparatus of claim 22, wherein the second portion of the system information comprises at least one of the following information: enable information for granting a random access network associated with the node, validity information for stored system information or minimum system information associated with the node, information for reminding the change of stored system information or minimum system information associated with the node, and information for allocating a Reference Signal’s frequency or time location, port number, period, or a combination thereof.
The apparatus of claim 22, wherein when the first portion of the plurality of bits comprises one or more bits indicative of which of the plurality of options is selected to be provided by the second portion of the bits, the at least one processor is further configured to:

use the one or more bits to estimate the second portion of the bits.
The apparatus of claim 22, wherein when the message is associated with a time-frequency range that is determined based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits, the at least one processer is further configured to:

use the time-frequency range to estimate the second portion of the bits.
The apparatus of claim 22, wherein the receiver is further configured to:

receive a synchronization signal, wherein the synchronization signal has a respective number sequence that is selected from a plurality of number sequences based on which of the plurality of options is selected to be provided by the second portion of the plurality of bits； and

the at least one process is further configured to:

use the respective number sequence of the synchronization signal to estimate the second portion of the bits.