WO2018093176A2 - Mimo antenna assembly of laminated structure - Google Patents

Mimo antenna assembly of laminated structure Download PDF

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Publication number
WO2018093176A2
WO2018093176A2 PCT/KR2017/013034 KR2017013034W WO2018093176A2 WO 2018093176 A2 WO2018093176 A2 WO 2018093176A2 KR 2017013034 W KR2017013034 W KR 2017013034W WO 2018093176 A2 WO2018093176 A2 WO 2018093176A2
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WO
WIPO (PCT)
Prior art keywords
printed circuit
circuit board
filter
calibration
pcb
Prior art date
Application number
PCT/KR2017/013034
Other languages
French (fr)
Korean (ko)
Other versions
WO2018093176A3 (en
Inventor
김덕용
정배묵
유창우
문영찬
박남신
박범식
윤민선
박민식
장성호
Original Assignee
주식회사 케이엠더블유
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020170028442A external-priority patent/KR101854309B1/en
Application filed by 주식회사 케이엠더블유 filed Critical 주식회사 케이엠더블유
Priority to CN202111063705.4A priority Critical patent/CN113872707B/en
Priority to CN201780070521.6A priority patent/CN109952715B/en
Priority to EP17872290.6A priority patent/EP3544204A4/en
Priority to EP21171645.1A priority patent/EP3883140A1/en
Priority to JP2019525742A priority patent/JP6793256B2/en
Publication of WO2018093176A2 publication Critical patent/WO2018093176A2/en
Publication of WO2018093176A3 publication Critical patent/WO2018093176A3/en
Priority to US16/412,426 priority patent/US11088731B2/en
Priority to US17/367,364 priority patent/US11831364B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00Antenna arrays or systems
    • H01Q21/06Arrays of individually energised antenna units similarly polarised and spaced apart
    • H01Q21/061Two dimensional planar arrays
    • H01Q21/065Patch antenna array
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00Antenna arrays or systems
    • H01Q21/0006Particular feeding systems
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q25/00Antennas or antenna systems providing at least two radiating patterns
    • H01Q25/001Crossed polarisation dual antennas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
    • H01Q3/267Phased-array testing or checking devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/02Arrangements for de-icing; Arrangements for drying-out ; Arrangements for cooling; Arrangements for preventing corrosion
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/42Housings not intimately mechanically associated with radiating elements, e.g. radome
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/71Coupling devices for rigid printing circuits or like structures
    • H01R12/72Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
    • H01R12/73Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures connecting to other rigid printed circuits or like structures

Definitions

  • the present invention relates to a multiple input multiple output (MIMO) antenna. More specifically, the present invention relates to a lightweight MIMO antenna assembly having a laminated structure and a calibration in a MIMO antenna operating in a time division duplex (TDD) scheme.
  • MIMO multiple input multiple output
  • TDD time division duplex
  • MIMO Multiple Input Multiple Output
  • the transmitter transmits different data through each transmit antenna, and the receiver transmits different data through appropriate signal processing. Spatial multiplexing technique to distinguish. Therefore, as the number of transmit / receive antennas is increased, channel capacity increases to allow more data to be transmitted and received. For example, if you increase the number of antennas to 10, you get about 10 times the channel capacity using the same frequency band compared to the current single antenna system.
  • 4G LTE-advanced uses up to 8 antennas.
  • products with 64 or 128 antennas are being developed in the pre-5G phase, and base station equipment with a much larger number of antennas is expected to be used in 5G.
  • This is called Massive MIMO technology.
  • Massive MIMO technology While the current cell operation is 2-Dimension, 3D-Beamforming is possible when Massive MIMO technology is introduced. Massive MIMO technology is also called Full Dimension MIMO (FD-MIMO).
  • Massive MIMO technology As the number of antenna elements increases, so does the number of transceivers and filters. Nevertheless, due to lease costs and space constraints, making RF components (antenna elements / filters / power amplifiers / transceivers) small, light and inexpensive will determine the success or failure of antennas employing Massive MIMO technology. Massive MIMO antennas require high power to increase coverage, and the power consumption and heat generated by these high powers are a negative factor in reducing weight and size.
  • the present invention has a main object to provide a MIMO antenna having a compact and lightweight laminated structure.
  • the present invention proposes an assembly method capable of minimizing the accumulation amount of assembly tolerances generated when assembling a plurality of filters and a structure capable of uniformly transmitting the clamping force necessary to secure the electrical characteristics of the filter.
  • the present invention provides a calibration technique that performs TX / RX calibration with one calibration hardware configuration in a MIMO antenna operating in a time division duplex (TDD) scheme and can perform calibration in real time while operating.
  • TDD time division duplex
  • a MIMO antenna system including an antenna assembly having a stacked structure.
  • a laminated antenna assembly is embedded between the radome and a housing having a heatsink formed on the rear surface thereof.
  • An antenna assembly having a stacked structure includes a first printed circuit board (PCB) on which a feeding network is formed; A plurality of antenna elements installed on an upper surface of the first printed circuit board facing the radome and connected to the power supply network; And a filter assembly disposed on a lower surface of the first printed circuit board and including a plurality of band pass filters connected to the feed network.
  • the antenna assembly of the stacked structure further includes a second printed circuit board disposed to face the housing, and further comprising a second printed circuit board having a plurality of transmit / receive circuits connected to the plurality of band pass filters.
  • a MIMO antenna assembly having a stacked structure includes a first printed circuit board (PCB) on which a feeding network is formed; A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network; And a filter assembly disposed on a lower surface of the first printed circuit board and including a plurality of band pass filters connected to the feed network.
  • the multilayer MIMO antenna assembly includes a second printed circuit board disposed under the first printed circuit board.
  • the second printed circuit board includes a plurality of transmission / reception circuits connected to the plurality of band pass filters, a digital circuit connected to the plurality of transmission / reception circuits to perform digital processing of baseband signals, and a calibration circuit in which a plurality of switches are connected in a tree structure. Formed.
  • a first printed circuit board having a feeding network and a plurality of through holes electrically connected to the feeding network; A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network; And a plurality of band pass filters adhered to the lower surface of the first printed circuit board.
  • Each bandpass filter has a first port having a conductive first pin extending from an interior cavity and protruding from an upper surface thereof, each bandpass filter having a protruding portion of the first pin printed on the first print. It is tightly coupled to the first printed circuit board while being inserted into the through hole formed in the circuit board.
  • Embodiments of the MIMO antenna assembly may further include one or more of the following features.
  • the first port includes an opening formed in the upper surface; An insulating bush inserted into the opening to close the opening; And the conductive pins penetrating through the insulating bush and protruding from the bush.
  • the plurality of band pass filters may include a plurality of fastening grooves fastened by the printed circuit board and bolts on the upper surface.
  • the plurality of band pass filters form a filter assembly assembled in a row on a push bar having insertion protrusions inserted into insertion holes formed in the first printed circuit board.
  • the plurality of band pass filters include a step portion for receiving the push bar, wherein the step portions are provided with insertion protrusions and fastening holes, and the push bars are inserted with insertion protrusions of respective band pass filters. Insertion grooves are formed, and a plurality of fastening grooves are fastened by fastening holes and bolts of each band pass filter.
  • the MIMO antenna assembly further includes a second printed circuit board having a plurality of transmit and receive circuits connected to the plurality of band pass filters.
  • a plurality of RF sockets connected to the plurality of transceiver circuits are mounted on an upper surface of the second printed circuit board, and each bandpass filter protrudes from a lower surface of the second printed circuit board.
  • a second port including a groove having a groove into which the groove is inserted and a conductive pin extending from the hollow inside and penetrating the groove formed in the protrusion, wherein each band pass filter has a conductive pin at the second port. It is coupled to the second printed circuit board while being inserted into a hole formed in the socket.
  • the second port of each bandpass filter includes an opening formed in the groove; An insulating bush inserted into the opening to close the opening; And the conductive pins penetrating through the insulating bush and protruding from the bush.
  • a plurality of structures are formed on an upper surface of the second printed circuit board, the contact pads being electrically connected to the transmission and reception circuits, and each bandpass filter is disposed in a cavity therein.
  • a second port having a conductive plunger electrically connected and protruding from the bottom surface, each bandpass filter coupled to the second printed circuit board with the plunger in contact with the contact pad; do.
  • the second port of each bandpass filter includes an opening formed in the lower surface; An insulating bush inserted into the opening to close the opening; A barrel barrel penetrating the insulating bush and protruding from the bush; The plunger having at least a portion inserted into the barrel of the cylinder; And a spring disposed in the barrel to support the plunger.
  • the plurality of bandpass filters may be assembled in a line to a push bar coupled with the second printed circuit board to form a filter assembly, and the push bar coupled with the second printed circuit board. Provides uniform pressure to each bandpass filter such that each bandpass filter is coupled to the second printed circuit board with a uniform force.
  • a lower surface of the plurality of band pass filters may include a fastening groove fastened by a bolt and a second printed circuit board having a plurality of transceiving circuits.
  • a first printed circuit board having a feeding network and a plurality of contact pads electrically connected to the feeding network; A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network; And a plurality of band pass filters adhered to the lower surface of the first printed circuit board.
  • Each bandpass filter has a first port having a conductive first plunger extending from an interior cavity and protruding from an upper surface thereof, wherein each bandpass filter includes the first plunger in the first printed circuit.
  • the first printed circuit board is in close contact with the contact pad formed on the substrate.
  • Embodiments of the MIMO antenna assembly may further include one or more of the following features.
  • the first port includes an opening formed in the upper surface; An insulating bush inserted into the opening to close the opening; A barrel barrel penetrating the insulating bush and protruding from the bush; At least a portion of the conductive plunger inserted into the barrel of the cylinder; And a spring disposed in the barrel to support the conductive plunger.
  • the MIMO antenna assembly further includes a second printed circuit board having a plurality of transmit and receive circuits connected to the plurality of band pass filters.
  • a plurality of structures are formed on an upper surface of the second printed circuit board, the contact pads being electrically connected to the transmission and reception circuits, and each bandpass filter is disposed in a cavity therein.
  • a second port having a conductive plunger electrically connected and protruding from the bottom surface, each bandpass filter having the second port with the conductive plunger of the second port in contact with the contact pad; It is coupled to a printed circuit board.
  • the second port of each bandpass filter includes an opening formed in a lower surface thereof; A bush inserted into the opening to close the opening; A barrel barrel penetrating the bush and protruding from the bush; At least a portion of the conductive plunger inserted into the barrel of the cylinder; And a spring disposed in the barrel of the cylinder to support the conductive plunger.
  • a plurality of structures are formed on an upper surface of the second printed circuit board, the contact pads being electrically connected to the transceiver circuits, and each bandpass filter is formed from an internal cavity.
  • a second port having a conductive rod extending from and protruding from the bottom surface, each bandpass filter coupled to the second printed circuit board with the conductive rod in contact with the contact pad.
  • the second port of each bandpass filter includes an opening formed in the lower surface; An insulating bush inserted into the opening to close the opening; And the conductive rod passing through the insulating bush and protruding from the bush.
  • each bandpass filter has a first port electrically connected to an interior cavity and having a conductive rod protruding from the top surface, wherein each bandpass filter The conductive rod is in close contact with the first printed circuit board while being in contact with the contact pad formed on the first printed circuit board.
  • the first port includes an opening formed in the upper surface; An insulating bush inserted into the opening to close the opening; A conductive pin penetrating the insulating bush and protruding from the bush; And the conductive rod fixed to the end of the conductive pin in a vertical direction.
  • a MIMO antenna system operating with a time division duplex (TDD) communication protocol includes a plurality of antenna elements, a plurality of band pass filters connected to the plurality of antenna elements, and a plurality of band pass filters. It includes a plurality of transmission and reception circuits connected. Each transmit / receive circuit includes an RF interface connected to the band pass filter, and a transmission path and a reception path connected to the RF interface by time division.
  • the MIMO antenna system is a calibration network in which a plurality of switches are connected in a tree structure, and a switch located at the top of the tree structure is selectively connected to a specific transmission path among the plurality of transmission paths and a specific reception path among the plurality of reception paths.
  • the plurality of switches located at the lowest position in the tree structure further includes a calibration network, each connected to a plurality of directional couplers coupled to RF interfaces of the plurality of transceiver circuits.
  • the specific transmission path is used for application of a pilot signal for calibration for the plurality of reception paths in a downlink time interval, and the specific reception path in the uplink time interval is used for the plurality of transmissions. It is used as a feedback path for calibration of the paths.
  • Embodiments of the MIMO antenna system may further include one or more of the following features.
  • the MIMO antenna system further includes processing circuitry coupled to the plurality of transmit / receive circuits and perform transmit calibration for the plurality of transmit paths and receive calibration for the plurality of receive paths. .
  • the processing circuit includes, as an offset value, an RF deviation of the plurality of previously measured bandpass filters and antenna feeder lines in the deviation between each transmission path and each reception path.
  • the transmission calibration and the reception calibration are performed.
  • the processing circuit performs calibration in real time while the MIMO antenna is operating.
  • the plurality of transmission and reception circuits, the calibration network and the processing circuit are formed on one printed circuit board.
  • the processing circuitry forms a first calibration path comprised of the plurality of directional couplers, the calibration network and the specific receive path, and transmits via each transmit path via the first calibration path.
  • a signal is obtained and a transmission calibration is performed based on a comparison between the transmission signal applied to each transmission path and the transmission signal acquired through the first calibration path.
  • the processing circuit generates a pilot signal for calibration of each receive path, forms a second calibration path comprised of the particular transmission path, the calibration network and the directional coupler, and the second calibration.
  • the pilot signal is inserted into each reception path through a path, and reception calibration is performed based on a comparison between the generated pilot signal and a pilot signal extracted from an output signal of each reception path.
  • each transmitting circuit comprises an up converter, a D / A converter and a power amplifier (PA), wherein the specific transmission path further comprises a switch located between the power amplifier and the D / A converter, The switch further includes a switch for bypassing a pilot signal applied to the specific transmission path to the calibration network in an uplink time interval.
  • PA power amplifier
  • each receiving circuit comprises a low noise amplifier (LNA), an A / D converter and a down converter
  • the specific receiving path further comprises a switch located between the low noise amplifier and the A / D converter
  • the switch further includes a switch receiving a transmission signal via each transmission path that is fed back from the calibration network in a downlink time interval.
  • the pilot signal has a frequency in-band of the received signal.
  • the pilot signal has an out-band frequency of the received signal.
  • each transmit / receive circuit further comprises a circulator coupled to the transmit path, the receive path and the RF interface, wherein a received signal input from the RF interface to the circulator is transferred to the receive path.
  • the transmission signal input to the circulator from the transmission path is transmitted to the RF interface.
  • the receiving path is connected to the circulator via a TDD switch, the TDD switch being a first input connected to the circulator, a first output connected to the receiving path, and a terminating resistor connected thereto. And a two output terminal, wherein the TDD switch is connected to the first input terminal in the downlink time interval.
  • a plurality of antennas a plurality of band pass filters connected to the plurality of antennas, a plurality of transmission / reception circuits connected to the plurality of band pass filters, and a time division duplex (TDD) through the plurality of antennas
  • TDD time division duplex
  • the present invention provides a method for calibrating a MIMO antenna system including a plurality of transmission and reception circuits for transmitting and receiving in a communication protocol, and a calibration network in which a plurality of switches are connected in a tree structure.
  • the method includes a first calibration comprising a directional coupler coupled to a branch between the plurality of transmission and reception circuits and the band pass filter, and a reception path included in a specific transmission and reception circuit among the calibration network and the plurality of transmission and reception circuits. Forming a path.
  • the method includes obtaining a transmission signal transmitted to the plurality of bandpass filters through the first calibration path; And performing transmission calibration based on a comparison between the transmission signal applied to each transmission path and the transmission signal acquired through the first calibration path.
  • Embodiments of the calibration method may further include one or more of the following features.
  • the process of forming the first calibration path and the process of acquiring the transmission signal are performed in a downlink time interval.
  • the performing of the calibration may further include including, as an offset value, RF deviations of the plurality of bandpass filters previously measured in deviations between transmission paths included in each transmission and reception circuit. .
  • the calibration method comprises: generating a pilot signal for calibration of each receive path; Forming a second calibration path including a directional coupler coupled to a branch between the plurality of transmission / reception circuits and the band pass filter, a transmission path included in a specific transmission / reception circuit among the calibration network and the plurality of transmission / reception circuits. Process of doing; Inserting the pilot signal into a transmission path included in the specific transmission / reception circuit to insert the pilot signal into a reception path included in the plurality of transmission / reception circuits through the second calibration path; And performing reception calibration based on a comparison between the generated pilot signal and the pilot signal extracted from the output signal of each reception path.
  • the forming of the second calibration path and the inserting of the pilot signal are performed in an uplink time interval.
  • the performing of the reception calibration may include offsetting RF deviations of the plurality of previously measured bandpass filters and antenna feeder lines to deviations between respective reception paths included in each transceiver circuit. It further includes the process of including it as a value.
  • FIG. 1 is a perspective view illustrating an exemplary appearance of an antenna device having an antenna assembly according to the present invention.
  • FIG. 2 is a diagram illustrating a stack structure of an exemplary massive MIMO antenna.
  • FIG. 3 is an exploded view of an exemplary subassembly implementing first to second layers in the stack structure of FIG. 2.
  • FIG. 4 is a diagram illustrating a laminated structure of a massive MIMO antenna system according to an embodiment of the present invention.
  • FIG. 5 is an exploded view of a massive MIMO antenna according to an embodiment of the present invention taking the stacked structure of FIG.
  • FIG. 6 is an exploded view of a subassembly in which filters are coupled to a first PCB to which an antenna element is coupled according to an embodiment of the present invention.
  • FIG. 7 is a diagram illustrating an exemplary structure in which a bandpass filter is connected to a PCB through an RF connector.
  • FIG. 8 is a perspective view showing the structure of a cavity filter according to an embodiment of the present invention.
  • FIG. 9 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to an embodiment of the present invention.
  • FIG. 10 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention.
  • FIG. 11 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention.
  • FIG 12 illustrates filter assemblies according to an embodiment of the present invention.
  • FIG. 13 is a view illustrating a state in which filter assemblies are assembled in a first PCB according to an embodiment of the present invention.
  • FIG. 14 is a circuit diagram illustrating the function of a massive MIMO antenna assembly according to the present invention.
  • FIG. 15A illustrates a transmission / reception module in which no SPDT switch exists between the RF IC and the RF devices
  • FIG. 15B illustrates a transmission / reception module in which an SPDT switch exists between the RF IC and the RF devices.
  • 16 is a diagram for explaining signal flow in TX calibration.
  • 17 is a diagram for explaining signal flow in RX calibration.
  • FIG. 18 is a diagram for explaining a fixed phase deviation of filters and antenna feeder lines.
  • calibration network refers to a path for feeding back a transmission signal for each transmission path obtained through a bidirectional coupler coupled to an output terminal of each transmission path to a calibration processor, and each reception path from a calibration processor. Refers to an RF circuit that provides a path through which a pilot signal is transmitted to an input terminal of a.
  • the antenna device 10 includes a housing 12 in which a heat sink is largely formed, and a radome 11 coupled to the housing.
  • An antenna assembly to be described later is embedded between the housing 12 and the radome 11.
  • a power supply unit 13 is coupled to the bottom of the housing 11, for example, via a docking structure, and the power supply unit 13 operates electronic components provided in the antenna assembly. Provide operating power for
  • FIG. 2 is a diagram illustrating a stack structure of an exemplary massive MIMO antenna.
  • the massive MIMO antenna 20 illustrated in FIG. 2 includes a radome, a housing in which a heat sink is formed outside, and an antenna assembly arranged therebetween.
  • the antenna assembly is configured in such a way that the RF elements and the modules in which the digital elements are implemented are combined in a stacked structure.
  • the main modules of the illustrated antenna assembly can be divided into six layers.
  • the first layer includes a printed circuit board (PCB) 210 on which a calibration network is implemented, and a plurality of antenna elements 210 installed on the top thereof.
  • the second layer consists of a plurality of filters 230, each filter 230 being electrically connected to signal lines of the RF feeding network on the first layer via an RF interface such as an RF connector.
  • the third layer includes a PCB 240 in which analog processing circuitry such as a power amplifier (PA) is implemented.
  • analog processing circuitry such as a power amplifier (PA) is implemented.
  • PA power amplifier
  • Each power amplifier included in the analog processing circuit is electrically connected to the corresponding filters 230 on the second layer through an RF interface.
  • the analog processing circuitry is connected via a calibration network and an RF interface.
  • the fourth layer includes a digital board 250 and a power supply unit (PSU) 250 in which digital processing circuits are implemented.
  • the digital board 250 converts a digital signal received from a base station base band unit (BBU) into an analog RF signal, converts an analog RF signal received from an antenna into a digital signal, and transmits the digital signal to the base station BBU.
  • BBU base station base band unit
  • the digital board 250 is connected to the PCB 240 in which the analog processing circuit on the third layer is implemented through the RF interface.
  • FIG. 3 is an exploded view of an exemplary subassembly implementing first to second layers in the stack structure of FIG. 2.
  • a plurality of sublayers corresponding to the first layer and a filter bank corresponding to the second layer are combined to form a subassembly of the antenna assembly.
  • the first sub-layer includes a PCB in which an RF feeding network is implemented and a plurality of antenna elements installed on the top thereof.
  • the second sub layer includes a reflector, and the third sub layer includes a PCB on which a calibration network is implemented.
  • the first sub layer to the third sub layer constituting the first layer may be implemented as a multi-layer PCB.
  • a filter bank incorporating a plurality of filters is fastened to sublayers.
  • the filter bank is a structure for securing a mating connection and a fastening force of the plurality of filters, which inevitably increases the size of the subassembly.
  • a calibration network is located between the antenna and the filter.
  • the calibration network typically consists of a plurality of switches and is connected to RF couplers coupled to the back of each filter.
  • the feed network and the filters are bound to connect via an RF connector (eg, a standardized RF interface such as a coaxial connector).
  • the RF connector is also used for the RF interface between them.
  • the MIMO antenna system illustrated in FIGS. 2 and 3 is composed of a plurality of layers, and each layer is connected to each other through an RF connector, and thus it is difficult to reduce weight and size.
  • the present invention proposes a Massive MIMO antenna system having a slimmer and more compact laminated structure.
  • FIG. 4 is a diagram illustrating a laminated structure of a massive MIMO antenna system according to an embodiment of the present invention.
  • FIG. 5 is an exploded view of a massive MIMO antenna according to an embodiment of the present invention taking the stacked structure of
  • FIG. 6 is an exploded view of a subassembly in which filters are coupled to a first PCB to which an antenna element is coupled according to an embodiment of the present invention.
  • the present invention operates the calibration function at the front end of the filter 430 (that is, at the output end of the power amplifier), not at the front end of the antenna element 410.
  • the phase deviation caused by the filter and antenna feeder lines can be managed at an acceptable level by producing / using filters with a fixed phase deviation.
  • the calibration network located between the existing antenna element and the filter can be formed together with the power amplifier and the digital circuit on a single board, and a PCB with a feeding network is formed.
  • the filter can be tightly attached to the lower part.
  • the present invention manages the phase deviation caused by the filter and the antenna feeder line at an acceptable level, but takes a strategy of reducing the antenna assembly to a compact size.
  • a calibration network is formed on one board 440 together with a power amplifier and a digital circuit.
  • a power amplifier is formed on one board 440 together with a power amplifier and a digital circuit.
  • the MIMO antenna assembly includes a first PCB 420 and a second PCB 440.
  • An RF power supply network is formed in the first PCB 420.
  • a plurality of antenna elements 410 are fastened to an upper surface of the first PCB 420 to be electrically connected to the RF power supply network, and a plurality of band pass filters 430 are tightly fastened to the lower surface to be electrically connected to the RF power supply network. do.
  • At least one ground plane is formed in the first PCB 420, and the ground plane may function as a reflector for the plurality of antenna elements. That is, by using the ground plane formed on the first PCB 420 as a reflector, the separate reflector illustrated in FIG. 3 may be omitted.
  • the second PCB 440 is formed with a digital processing circuit that performs baseband processing, an analog processing circuit that provides a plurality of transmit / receive (TX / RX) circuits, and a calibration network.
  • the band pass filter 430 is electrically connected to the signal line of the first PCB 410 and is electrically connected to the signal line of the second PCB 440.
  • the present invention proposes a new fastening structure between the filter and the PCB with improved size and assembly.
  • the present invention proposes a fastening structure that can uniformly provide the fastening force necessary to secure the electrical characteristics of the plurality of filters, thereby minimizing the cumulative amount of assembly tolerances generated when the plurality of filters are assembled.
  • FIG. 7 is a diagram illustrating an exemplary structure in which a bandpass filter is connected to a PCB through an RF connector.
  • an RF connector of a blind mating connector type is typically used.
  • FIG. 7 illustrates a cavity filter with RF connectors 711 and 712 on the top and bottom surfaces, respectively.
  • an RF connector female
  • RF connector male
  • RF connector female
  • each cavity filter since each cavity filter is individually fastened to the PCB, assembly tolerances occur in RF characteristics due to the difference in the fastening force between the cavity filters.
  • each cavity filter must be spaced apart from the PCB by the length (A) of the fastening structure 713 in consideration of the length of the assembly of the RF connectors, inevitably increases in size.
  • a very complicated hardware structure eg, a structure in which a filter is embedded in a separate assembly case such as the filter bank illustrated in FIG. 3 is required.
  • FIG. 8 is a perspective view showing the structure of a cavity filter according to an embodiment of the present invention.
  • 9 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to an embodiment of the present invention. In Fig. 9, to avoid confusion, the internal structure of the cavity filter is omitted.
  • the cavity filter includes a first input / output port 810 and a second input / output port 860.
  • the first input and output port 810 is disposed on the upper surface (eg, cover) of the cavity filter, and the second input and output port 860 is disposed on the lower surface of the cavity filter.
  • these input / output ports 810 and 860 are configured with a pin structure and are different from standardized RF interfaces such as coaxial connectors.
  • the first input / output port 810 is configured as a fin structure inserted into an opening section formed on an upper surface of the cavity filter.
  • the fin structure includes a conductive fin 811 and an insulating bush 812.
  • the conductive pin 811 penetrates through the insulating bush 812 and protrudes from the insulating bush 812.
  • the fin structure is inserted into the opening to seal the opening.
  • a portion of the conductive pin 811 protrudes from the top surface of the cavity filter.
  • a plurality of fastening grooves 820a to 820c fastened by the first PCB and the bolt are formed on the upper surface of the cavity filter.
  • the cavity filter is tightly coupled to the bottom surface of the first PCB 420 in which a feeding network is formed.
  • the first PCB 420 has a plurality of plated through holes 920 connected to the power feeding network.
  • the cavity filter is fastened in close contact with the bottom surface of the first PCB 420 with a portion of the conductive pin 811 inserted into the through hole 820 formed in the first PCB 420.
  • a soldering process may be performed on the contact portion between the conductive pin 811 and the through hole 920.
  • the cavity filter needs to be coupled to the upper surface of the second PCB 440 at a predetermined distance.
  • an opening is formed in the protrusion 850 protruding in the height direction on the lower surface of the filter.
  • the fin structure 860 coupled with the conductive pin 861 and the bush 862 is inserted into an opening formed in the protrusion 850 to seal the opening.
  • the protrusion 850 having the opening is formed with an insertion portion 851 for accommodating a socket mounted on a second PCB to be described later.
  • the lower surface of the filter is formed with a fastening groove 840 is fastened by the structure and the bolt formed in the second PCB 440.
  • the cavity filter is coupled to the upper surface of the second PCB 440 on which the RF circuit is formed.
  • a socket 950 is surface mounted on the top surface of the second PCB 440.
  • the socket 950 includes a hole into which the second coaxial pin 861 of the cavity filter is inserted and at least one contact pin 951 electrically contacting the conductive pin 861 inserted into the hole.
  • the conductive pin 861 is inserted into the hole of the socket 950.
  • the upper surface of the cavity filter and the second PCB 440 is spaced apart by the height of the protrusion 850 formed on the lower surface of the cavity filter.
  • the height of the protrusion 850 is designed in consideration of the size of the elements mounted on the upper surface of the second PCB 440, and the separation distance between the cavity filter and the second PCB 440 is lower than that of the connection structure using the RF connector of FIG. Decrease significantly.
  • FIG. 10 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention. Note that in FIG. 10, the internal structure of the cavity filter is omitted to avoid confusion.
  • the first input / output port is configured with a fin structure inserted into an opening section formed in an upper surface of the cavity filter.
  • the pin structure includes a spring pin connector and an insulating bush 1014.
  • the spring pin connector has a cylindrical conductive barrel 1012 which penetrates the insulating bush 1014 and protrudes from the insulating bush 1014, a conductive plunger 1011 at least partially inserted into the barrel 1012, And a spring 1013 disposed in the barrel 1012 to support the plunger 1011.
  • the fin structure is inserted into the opening to seal the opening.
  • a portion of the plunger 1011 protrudes from the top surface of the cavity filter and is configured to be pushed into the barrel barrel 1212 by pressing pressure (eg, as it adheres to the first PCB 420).
  • the cavity filter is tightly coupled to the bottom surface of the first PCB 420 in which a feeding network is formed.
  • the first PCB 420 has a plurality of contact pads (not shown) connected to the power feeding network.
  • the cavity filter is in close contact with the bottom surface of the first PCB 420 while the head of the plunger 1011 is in contact with the contact pad formed in the first PCB 420.
  • a portion of the plunger 1011 is pushed into the barrel 1012 of the cylinder as the upper surface of the cavity filter is in close contact with the first PCB 420.
  • a spring 1013 inside barrel 1012 provides a suitable contact pressure between the head of the plunger 1011 and the contact pad.
  • the second I / O port consists of a fin structure inserted into an opening section formed in the upper surface of the cavity filter.
  • the pin structure includes a spring pin connector and an insulating bush 1054.
  • the spring pin connector has a cylindrical barrel 1052 protruding from the insulating bush 1054 through the insulating bush 1054, a plunger 1051 at least partially inserted into the barrel 1052, and a barrel 1052. ) And a spring 1053 disposed within and supporting the plunger 1051.
  • a socket 1060 is surface mounted on the top surface of the second PCB 440.
  • a contact pad 1061 is formed on the upper surface of the socket 1060 to be electrically connected to the transceiver circuit.
  • the cavity filter is coupled with the second PCB 440 with the head of the plunger 1051 of the second input / output port being in contact with the contact pad 1061 formed in the second PCB 440.
  • the cavity filter and the top surface of the second PCB 440 are spaced apart by the height of the socket 1060 mounted in the second PCB 440.
  • a protrusion protruding in the height direction may be formed on the lower surface of the filter, and a spring pin connector may be located in the opening formed in the protrusion. At least a portion of the socket mounted on the second PCB 440 may be inserted into an opening formed in the protrusion.
  • FIG. 11 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention. 11 also, the internal structure of the cavity filter is omitted in order to avoid confusion.
  • the first input / output port includes a fin structure inserted into an opening section formed on an upper surface of the cavity filter.
  • the fin structure includes an insulating bush 1113, a conductive pin 1111 penetrating through the insulating bush 1113, and protruding from the insulating bush 1113, and a conductive pin fixed perpendicularly to the distal end of the conductive pin 1111.
  • a conductive rod 1112. The conductive rod 1112 is bent so that its ends protrude from the top surface of the filter.
  • the cavity filter is tightly coupled to the bottom surface of the first PCB 420 in which a feeding network is formed. Similar to the embodiment of FIG.
  • the first PCB 420 is formed with a plurality of contact pads (not shown) connected to the power feeding network.
  • the cavity filter is fastened in close contact with the bottom surface of the first PCB 420 with the end of the conductive rod 1052 being in contact with the contact pad formed in the first PCB 420.
  • the conductive rod 1112 is bent to the lower side of the filter as the upper surface of the cavity filter is in close contact with the first PCB 420.
  • the conductive rod 1112 preferably has an elastic force to provide an appropriate contact pressure with the contact pad.
  • the second I / O port consists of a fin structure inserted into an opening section formed in the upper surface of the cavity filter.
  • the fin structure includes an insulating bush 1153 inserted into the opening, a conductive pin 1151 penetrating through the insulating bush 1153, and protruding from the insulating bush 1153, and perpendicular to the ends of the conductive pin 1151.
  • a conductive rod 1152 fixed with a. The conductive rod 1152 is bent in the middle to protrude from the bottom surface of the filter.
  • a socket 1160 is surface mounted on the top surface of the second PCB 440.
  • a contact pad 1161 is formed on the upper surface of the socket 1160 to be electrically connected to the transceiver circuit.
  • the cavity filter is coupled with the second PCB 440 with the end of the conductive rod 1152 of the second input / output port being in contact with the contact pad 1161 formed in the second PCB 440.
  • the cavity filter and the top surface of the second PCB 440 are spaced apart by the height of the socket 1160 mounted in the second PCB 440.
  • protrusions protruding in the height direction may be formed on the lower surface of the filter, and pin structures may be located in the openings formed in the protrusions. At least a portion of the socket mounted on the second PCB 440 may be inserted into an opening formed in the protrusion.
  • the structures of the first input / output port and the second input / output port of the cavity filter illustrated in FIGS. 9 to 11 may be used in combination as necessary.
  • the cavity filter may have a structure of a first input / output port illustrated in FIG. 9 and a structure of a second input / output port illustrated in FIG. 10 or 11.
  • the cavity filters may be separately assembled to the lower surface of the first PCB 420 and the upper surface of the second PCB 440, but a large variation in RF characteristics may occur due to the fastening force difference between the cavity filters.
  • the present invention proposes an assembly method capable of minimizing the accumulation amount of assembly tolerances generated when assembling a plurality of filters and a structure capable of uniformly transmitting the clamping force necessary to secure the electrical characteristics of the filter.
  • FIG. 12 is an enlarged view illustrating an enlarged view of filter assemblies and a portion at which a filter is coupled to a push bar, according to an exemplary embodiment.
  • FIG. 13 is a view illustrating a state in which filter assemblies are assembled in a first PCB according to an embodiment of the present invention.
  • the filter assembly includes a push bar 1210 and a set of filters assembled in line to the push bar 1210.
  • the filter is formed with a step 1250 to receive the push bar 1210.
  • the stepped part 1250 has a shape in which one side of the filter is cut at right angles.
  • the stepped part 1250 is provided with fastening holes 1253 into which the insertion protrusions 1251a and 1251b and the bolt are inserted.
  • the push bars 1210 are formed with insertion grooves (not shown) into which the insertion protrusions 1251a and 1251b of each filter are inserted, and are inserted between the insertion grooves (not shown) by respective cavity filters and bolts.
  • a plurality of fastening grooves (not shown) to be fastened are formed.
  • the push bar 1210 has two or more insertion protrusions 1211a and 1211b inserted into insertion holes (not shown) formed in the first PCB.
  • the insertion protrusions 1211a and 1211b of the push bar 1210 are inserted into the insertion holes (not shown) of the first PCB, the conductive pins of the group of filters assembled to the push bar 1210 as illustrated in FIG. 10. It is inserted into the through holes formed in the first PCB. 13 shows an exemplary shape in which four filter assemblies are assembled to a first PCB.
  • a plurality of fastening holes 1212a and 1212b are formed to be fastened by the structure of the second PCB and the bolts.
  • the push bar 1210 is connected to the second PCB. It is bolted to the structure and can provide a uniform clamping force to a group of filters assembled to the push bar 1210. If the push bar 1210 is bent, it is difficult to transfer a uniform load or clamping force to each filter, so the push bar 1210 should have a certain level or more of rigidity.
  • the method of fastening the filter to the PCB by using the push bar 1210 minimizes the accumulation of tolerances when the filters are coupled to the PCB, adjusts the tolerances consistently, and provides stable blind mating with the antenna and the RF transceiver circuit. Makes it possible.
  • an apparatus and an assembly structure required for the filter are not required separately.
  • the antenna assembly can also be contributed to simplifying the assembly process.
  • the structure for the unique electrical connection between the filter and the PCB proposed by the present invention does not require a coaxial connector or RF cabling, and the unique fastening structure between the PCB and the filter assembly proposed by the present invention is a filter for each filter.
  • the push bars can be used to fasten the filters to the PCB, allowing easy disassembly of the antenna assembly or filter assembly. It is easy to replace the faulty antenna.
  • each TX / RX path has a deviation. Have. Compensating for this deviation is called beamforming calibration in the radio module.
  • the present invention proposes a method of temporally split-sharing the same RF path in TX and RX calibration using characteristics of a MIMO antenna system operating in a time division duplex (TDD) scheme. do.
  • TDD time division duplex
  • TX calibration the variation of RF characteristics (phase / amplitude / delay, etc.) between each transmission path is calculated based on a correlation calculation between the feedback signal captured at the rear end of the transmission path and the transmitted signal using the magnetic transmission signal. Measure and perform TX calibration to compensate for the measured deviation.
  • a pilot signal is inserted into each reception path, and RF characteristics (phase / amplitude / delay) between the reception paths are based on a correlation operation between the pilot signal and the signal output at the rear end of the reception path.
  • Etc. Measure the deviation and perform an RX calibration that compensates for the measured deviation.
  • This calibration algorithm itself is substantially the same as that disclosed in Korean Patent Application No. 10-2015-0063177 (Publication No. 10-2016-0132166) filed by the applicant. The disclosures of the above Korean patent applications are all incorporated herein by reference.
  • FIGS. 14, 15A, and 15B an exemplary circuit configuration and signal connection of a massive MIMO antenna assembly will be described with reference to FIGS. 14, 15A, and 15B.
  • FIG. 14 is a circuit diagram illustrating the function of a massive MIMO antenna assembly according to the present invention.
  • a digital processing circuit for performing baseband processing an analog processing circuit divided into a plurality of transmission / reception modules, and a calibration network are formed in the second PCB.
  • Each transmit / receive module is connected via an RF interface to a bandpass filter connected to an antenna element.
  • TX / RX calibration according to one embodiment of the present invention is performed on the filter front end.
  • a calibration H / W (eg, a calibration network) can be realized by utilizing a free space on the second PCB on which the RF transceiver circuit and the like are formed.
  • the complexity and connection at 2PCB is reduced, resulting in spatial gain and material cost savings.
  • FIG. 15A illustrates a transmission / reception module in which no SPDT switch exists between the RF IC and the RF devices
  • FIG. 15B illustrates a transmission / reception module in which an SPDT switch exists between the RF IC and the RF devices.
  • each transmit / receive module includes a plurality of RF elements and an RF IC for providing a transmission path and a reception path for a corresponding antenna element.
  • the RF IC includes an up converter for up-converting a baseband digital transmission signal received from a digital processing circuit to a transmission frequency and a D / conversion for converting the up-converted digital transmission signal into an analog RF transmission signal.
  • a converter may be included.
  • the up converter and the D / A converter form part of the transmission path.
  • the RF IC may include an A / D converter that converts an analog RF received signal into a digital received signal, and a down converter that converts the digital received signal into a baseband digital received signal.
  • the A / D converter and the down converter form part of the reception path.
  • the RF down converter down converts the received received signal to baseband, and the A / D converter converts the baseband signal into a digital signal.
  • the baseband digital signal is sent to a digital processing circuit.
  • Each transmission path further includes a power amplifier (PA), a circulator and a directional coupler.
  • Each receive path further includes a low noise amplifier (LNA).
  • a circulator is installed at the connection portion between the transmission path and the reception path.
  • the received signal that is, the uplink RF signal
  • the received signal that is, the uplink RF signal
  • the transmission signal (downlink RF signal) input from the power amplifier to the circulator is transmitted to the filter side.
  • SPDT switches that function as TDD switches.
  • One terminal of the SPDT switch is connected with a terminating resistor to minimize changes in Voltage Standing Wave Ratio (VSWR) characteristics.
  • VSWR Voltage Standing Wave Ratio
  • the SPDT switch When the transmit / receive module operates in transmit mode (ie, in the downlink time interval), the SPDT switch connects the circulator to the terminating resistor. When the transmit / receive module operates in the receive mode (ie, in the uplink time interval), the SPDT switch connects the circulator to the LNA.
  • the SPDT switch 1510 is further included in the transmission path TX0 of the specific transmission / reception module.
  • the reception path RX1 of the specific transmission / reception module further includes an SPDT switch 1560 after the low noise amplifier (LNA).
  • LNA low noise amplifier
  • the calibration network (which may be referred to as a 'matrix switch') consists of a plurality of switches that take a tree structure.
  • the highest switch SPDT is connected to the SPDT switch 1510 included in the specific transmission path among the plurality of transmission paths, and is also connected to the SPDT switch 1560 included in the specific reception path among the plurality of reception paths.
  • the lowest switches SP4T are connected to an SPDT switch connected to a directional RF coupler located at the rear of the power amplifier on the plurality of transmission paths.
  • 16 is a diagram for explaining signal flow in TX calibration.
  • the analog RF signal (i.e., transmit signal) transmitted from the RFIC to each transmission path is captured by a directional coupler behind the power amplifier.
  • the analog RF signal transmitted to the transmission path TX0 is captured by the directional coupler, and the captured signal CAL # 0 is input to the lowest switch of the calibration network.
  • the LNA of the reception path RX1 is OFF.
  • the downlink RF signal transmitted to the transmission path TX1 is captured by the directional coupler behind the power amplifier, and the captured signal CAL # 1 is input to the lowest switch of the calibration network.
  • the captured signal CAL # 1 is transmitted to the RF IC through the SPDT switch 1560 located on the specific receive path RX1 through the top switch of the calibration network.
  • the captured signal passes through an A / D converter and a down converter for the specific reception path RX1, which is included in the RF IC, and then a correlation operation with a corresponding original transmission signal is applied and used for calibration.
  • the specific TX calibration algorithm is substantially the same as that disclosed in Korean Patent Application No. 10-2015-0063177 (Publication No. 10-2016-0132166).
  • the transmission path when the transmission path is ON (i.e., in the downlink time interval), the reception path must be kept in the OFF state. do.
  • a RU (Pilot) signal is inserted to determine RF characteristics such as delay, phase, and gain of the reception paths.
  • the pilot signal may be inserted in-band or out-of-band in the RX band. However, it is more appropriate to insert a pilot signal into a band in order to accurately detect amplitude and phase in real time even while the main signal of each reception path is received.
  • 'inserted in-band' means that the frequency band allowed for receiving the uplink RF signal is inserted outside the band actually used for transmitting and receiving the uplink RF signal.
  • the inserted pilot signal is removed by the digital filter in the digital domain, so it does not affect the reception modem performance.
  • the pilot signal is inserted into the RX filter output terminal. If the RX filter removes the pilot signal, the pilot element does not emit radiation by the antenna element. Therefore, on-service calibration, that is, calibration can be performed in real time while the antenna system is operating.
  • 17 is a diagram for explaining signal flow in RX calibration.
  • RX CAL, CAL # 0, CAL # 1, CAL # 2 ... all refer to pilot signals used for RX calibration.
  • the pilot signal transmitted from the RFIC to the transceiver circuit is denoted as "RX CAL”
  • the pilot signal output from the lowest switch of the calibration network is " CAL # 0, CAL # 1, CAL # 2 ... ".
  • a pilot signal "RX CAL" used to calibrate each reception path is input to a specific transmission path TX0 from an RFIC.
  • the pilot signal " RX CAL " input to the specific transmission path TX0 is transmitted to the top switch of the calibration network through the SPDT switch 1360 located in front of the power amplifier.
  • the reception paths to which the pilot signal is inserted are selected by the switches included in the calibration network.
  • the pilot signal is inserted into the reception path through which the received signal is transmitted by the directional coupler located on the selected reception path, and finally delivered to the RFIC corresponding to the selected reception path.
  • the pilot signal "CAL # 0" is transmitted to the RF IC through the circulator, the SPDT switch and the LNA along with the reception signal.
  • the pilot signal (“CAL # 1") is transmitted to the RF IC through the circulator, the SPDT switch and the LNA along with the received signal.
  • the pilot signal together with the received signal passes through an A / D converter and a down converter for the corresponding receive path provided in each RF IC, and is then separated from the received signal through a digital filter.
  • the separated pilot signal is used for calibration by applying a correlation operation to the pilot signal "RX CAL" input to a specific transmission path TX0.
  • the specific RX calibration algorithm is substantially the same as that disclosed in Korean Patent Application No. 10-2015-0063177 (Publication No. 10-2016-0132166).
  • the calibration method proposed by the present invention can perform calibration in real time while operating in a time division duplex (TDD) antenna.
  • TDD time division duplex
  • it performs TX / RX calibration with one calibration H / W configuration and can perform calibration in real time while the antenna system is operating.
  • the up converter or the down converter for the transmission signal and the reception signal there is no need for a separate up converter or down converter for performing TX calibration and RX calibration. That is, a down converter for a reception signal of a specific reception path is used for down conversion of a captured transmission signal, and an up converter for a transmission signal of a specific transmission path is used for up conversion of a pilot signal to be inserted into each reception path.
  • FIG. 18 is a diagram for explaining a fixed phase deviation of filters and antenna feeder lines.
  • the calibration function was applied to the front end of the filter (ie, the output stage of the power amplifier), not to the front end of the antenna element. That is, a magnetic transmission signal was captured at the front of the filter, and a pilot signal was inserted at the front of the filter.
  • the fixed RF deviation (especially phase deviation) of each filter and antenna feeder lines is inevitably excluded from the real time deviation measurement.
  • these previously measured fixed RF deviations are offset in each transmission path and each receiving path deviation measured in real time.
  • Calibration is performed by including (offset) value. That is, after the RF deviations of the plurality of previously measured band pass filters and the antenna feeder lines are included as offset values in the deviations between the transmission paths, calibration of each transmission path may be performed. In addition, after the RF deviations of the plurality of previously measured band pass filters and the antenna feeder lines are included as offset values in the deviations between the reception paths, calibration of each reception path may be performed. Note that the phase deviation caused by the filter and antenna feeder lines can be managed at an acceptable level by producing / using filters with a fixed phase deviation.
  • the calibration method proposed by the present invention also applies to the structure applied to the front end of the antenna, that is, the structure in which the lowest switches of the calibration network are coupled to the front end of the antenna. Applicable.

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Abstract

A MIMO antenna assembly of a lightweight laminated structure is disclosed. One aspect of the present invention provides a MIMO antenna assembly of a lightweight laminated structure, wherein a calibration network, which has been placed between an existing antenna element and a filter, is formed on one board together with a power amplifier and a digital circuit, and the filter is closely attached to the lower portion of a PCB on which a feeding network is formed. The present invention adopts a strategy to reduce the antenna assembly to a compact size while managing a phase deviation caused by the filter at an allowable level. Another aspect of the present invention provides a calibration method in a MIMO antenna operating in a Time Division Duplex (TDD) scheme and a MIMO antenna using the same, wherein the calibration method can perform a TX/RX calibration in a single calibration hardware configuration and perform the calibration in real time during operation.

Description

적층구조의 MIMO 안테나 어셈블리Stacked MIMO Antenna Assembly
본 발명은 MIMO(Multiple Input Multiple Output) 안테나에 관한 것이다. 보다 상세하게는, 경량화된 적층구조의 MIMO 안테나 어셈블리와, TDD(Time Division Duplex) 방식으로 동작하는 MIMO 안테나에서의 캘리브레이션(Calibration)에 관한 것이다. The present invention relates to a multiple input multiple output (MIMO) antenna. More specifically, the present invention relates to a lightweight MIMO antenna assembly having a laminated structure and a calibration in a MIMO antenna operating in a time division duplex (TDD) scheme.
이 부분에 기술된 내용은 단순히 본 실시예에 대한 배경 정보를 제공할 뿐 종래기술을 구성하는 것은 아니다.The contents described in this section merely provide background information on the present embodiment and do not constitute a prior art.
MIMO(Multiple Input Multiple Output) 기술은 다수의 안테나를 사용하여 데이터 전송용량을 획기적으로 늘리는 기술로서, 송신기에서는 각각의 송신 안테나를 통해 서로 다른 데이터를 전송하고, 수신기에서는 적절한 신호처리를 통해 송신 데이터들을 구분해 내는 공간 다중화(Spatial multiplexing) 기법이다. 따라서 송수신 안테나의 개수를 증가시킴에 따라 채널 용량이 증가하여 보다 많은 데이터를 송수신할 수 있게 한다. 예를 들어 안테나 수를 10개로 증가시키면 현재의 단일 안테나 시스템에 비해 같은 주파수 대역을 사용하여 약 10배의 채널 용량을 확보하게 된다.Multiple Input Multiple Output (MIMO) technology is a technology that dramatically increases the data transmission capacity by using multiple antennas. The transmitter transmits different data through each transmit antenna, and the receiver transmits different data through appropriate signal processing. Spatial multiplexing technique to distinguish. Therefore, as the number of transmit / receive antennas is increased, channel capacity increases to allow more data to be transmitted and received. For example, if you increase the number of antennas to 10, you get about 10 times the channel capacity using the same frequency band compared to the current single antenna system.
4G LTE-advanced에서는 8개의 안테나까지 사용하고 있으며, 현재 pre-5G 단계에서 64 또는 128개의 안테나를 장착한 제품이 개발되고 있고, 5G에서는 훨씬 더 많은 수의 안테나를 갖는 기지국 장비가 사용될 것으로 예상되며, 이를 Massive MIMO 기술이라고 한다. 현재의 셀(Cell) 운영이 2-Dimension인데 반해, Massive MIMO 기술이 도입되면 3D-Beamforming이 가능해지므로 Massive MIMO 기술은 FD-MIMO(Full Dimension MIMO)라고도 불린다.4G LTE-advanced uses up to 8 antennas. Currently, products with 64 or 128 antennas are being developed in the pre-5G phase, and base station equipment with a much larger number of antennas is expected to be used in 5G. This is called Massive MIMO technology. While the current cell operation is 2-Dimension, 3D-Beamforming is possible when Massive MIMO technology is introduced. Massive MIMO technology is also called Full Dimension MIMO (FD-MIMO).
Massive MIMO 기술에서는 안테나 소자의 숫자가 늘어나면서 이에 따른 송수신기와 필터의 숫자도 함께 증가한다. 그러함에도 설치 장소의 리스 비용이나 공간적인 제약으로 인해, RF 부품(안테나 소자/필터/전력 증폭기/트랜시버 등)을 작고 가벼우며 값싸게 만드는 것이 Massive MIMO 기술을 채용한 안테나의 성패를 좌우하게 된다. Massive MIMO 안테나는 커버리지(Coverage) 확장을 위해서는 고출력이 필요한데, 이러한 고출력으로 인한 소모전력과 발열량은 무게 및 사이즈를 줄이는 데 부정적인 요인으로 작용한다.In Massive MIMO technology, as the number of antenna elements increases, so does the number of transceivers and filters. Nevertheless, due to lease costs and space constraints, making RF components (antenna elements / filters / power amplifiers / transceivers) small, light and inexpensive will determine the success or failure of antennas employing Massive MIMO technology. Massive MIMO antennas require high power to increase coverage, and the power consumption and heat generated by these high powers are a negative factor in reducing weight and size.
따라서, 이러한 안테나 시스템을 소형화/경량화하고, 다수의 RF 소자들 간의 전기적인 연결 및 조립을 용이하게 할 수 있는 안테나 시스템의 구조를 개발하는 것은 당해 업계가 당면한 과제라 할 수 있다. Therefore, it is a challenge for the industry to develop a structure of an antenna system that can reduce / reduce such an antenna system and facilitate electrical connection and assembly between a plurality of RF elements.
본 발명은 소형이면서 경량화된 적층구조의 MIMO 안테나를 제공하는 데 주된 목적이 있다.SUMMARY OF THE INVENTION The present invention has a main object to provide a MIMO antenna having a compact and lightweight laminated structure.
또한, 본 발명은 다수 개의 필터의 조립 시에 발생하는 조립 공차의 누적량을 최소화할 수 있는 조립 방식과 필터의 전기적 특성을 확보하기 위해 필요한 체결력을 균일하게 전달할 수 있는 구조를 제안한다.In addition, the present invention proposes an assembly method capable of minimizing the accumulation amount of assembly tolerances generated when assembling a plurality of filters and a structure capable of uniformly transmitting the clamping force necessary to secure the electrical characteristics of the filter.
또한, 본 발명은 TDD(Time Division Duplex) 방식으로 동작하는 MIMO 안테나에서, 하나의 캘리브레이션 하드웨어 구성으로 TX/RX 캘리브레이션을 수행하며, 운영되는 동안 실시간으로 캘리브레이션을 수행할 수 있는 캘리브레이션 기법을 제공하는 데 다른 목적이 있다.In addition, the present invention provides a calibration technique that performs TX / RX calibration with one calibration hardware configuration in a MIMO antenna operating in a time division duplex (TDD) scheme and can perform calibration in real time while operating. There is another purpose.
본 실시예의 일 측면에 의하면, 적층 구조의 안테나 어셈블리를 포함하는 MIMO 안테나 시스템을 제공한다. MIMO 안테나 시스템에서, 레이돔과 배면에 히트싱크가 형성된 하우징 사이에 적층 구조의 안테나 어셈블리가 내장된다. 적층 구조의 안테나 어셈블리는 급전 네트워크(Feeding network)가 형성된 제1인쇄회로기판(Printed Circuit Board; PCB); 상기 제1인쇄회로기판의 상기 레이돔에 대향하는 상부 면에 설치되고 상기 급전 네트워크와 연결된 복수의 안테나 소자; 및 상기 제1인쇄회로기판의 하부 면에 배치되고 상기 급전 네트워크와 연결된 복수의 대역통과필터를 포함하는 필터 어셈블리를 포함한다. 또한, 적층 구조의 안테나 어셈블리는 상기 하우징에 대면 배치된 제2인쇄회로기판으로서, 상기 복수의 대역통과필터와 연결된 복수의 송수신회로가 형성된 제2인쇄회로기판을 더 포함한다.According to an aspect of the present embodiment, a MIMO antenna system including an antenna assembly having a stacked structure is provided. In the MIMO antenna system, a laminated antenna assembly is embedded between the radome and a housing having a heatsink formed on the rear surface thereof. An antenna assembly having a stacked structure includes a first printed circuit board (PCB) on which a feeding network is formed; A plurality of antenna elements installed on an upper surface of the first printed circuit board facing the radome and connected to the power supply network; And a filter assembly disposed on a lower surface of the first printed circuit board and including a plurality of band pass filters connected to the feed network. The antenna assembly of the stacked structure further includes a second printed circuit board disposed to face the housing, and further comprising a second printed circuit board having a plurality of transmit / receive circuits connected to the plurality of band pass filters.
본 실시예의 다른 측면에 의하면, 적층 구조의 MIMO 안테나 어셈블리를 제공한다. 상기 적층 구조의 MIMO 안테나 어셈블리는 급전 네트워크(Feeding network)가 형성된 제1인쇄회로기판(Printed Circuit Board; PCB); 상기 제1인쇄회로기판의 상부 면에 설치되고 상기 급전 네트워크와 연결된 복수의 안테나 소자; 및 상기 제1인쇄회로기판의 하부 면에 배치되고 상기 급전 네트워크와 연결된 복수의 대역통과필터를 포함하는 필터 어셈블리를 포함한다. 또한, 상기 적층 구조의 MIMO 안테나 어셈블리는 상기 제1인쇄회로기판의 하부에 배치되는 제2인쇄회로기판를 포함한다. 제2인쇄회로기판에는 상기 복수의 대역통과필터와 연결된 복수의 송수신회로, 상기 복수의 송수신회로와 연결되어 기저대역 신호의 디지털 프로세싱을 수행하는 디지털 회로 및 복수의 스위치가 트리 구조로 연결된 캘리브레이션 회로가 형성되어 있다.According to another aspect of the present embodiment, a MIMO antenna assembly having a stacked structure is provided. The multilayer MIMO antenna assembly includes a first printed circuit board (PCB) on which a feeding network is formed; A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network; And a filter assembly disposed on a lower surface of the first printed circuit board and including a plurality of band pass filters connected to the feed network. In addition, the multilayer MIMO antenna assembly includes a second printed circuit board disposed under the first printed circuit board. The second printed circuit board includes a plurality of transmission / reception circuits connected to the plurality of band pass filters, a digital circuit connected to the plurality of transmission / reception circuits to perform digital processing of baseband signals, and a calibration circuit in which a plurality of switches are connected in a tree structure. Formed.
본 실시예의 또 다른 측면에 의하면, 급전 네트워크(Feeding network) 및 상기 급전 네트워크에 전기적으로 연결된 복수의 쓰루 홀(through hole)이 형성된 제1인쇄회로기판(Printed Circuit Board; PCB); 상기 제1인쇄회로기판의 상부 면에 설치되고, 상기 급전 네트워크와 연결된 복수의 안테나 소자; 및 상기 제1인쇄회로기판의 하부 면에 밀착체결된 복수의 대역통과필터를 포함하는 MIMO 안테나 어셈블리를 제공한다. 각 대역통과필터는 내부의 중공(cavity)으로부터 연장되어 상부 면으로부터 돌출된 도전성 제1핀을 가진 제1포트를 구비하고, 각 대역통과필터는 상기 제1핀의 돌출된 부분이 상기 제1인쇄회로기판에 형성된 상기 쓰루 홀에 삽입된 채로 상기 제1인쇄회로기판에 밀착 체결된다. 상기 MIMO 안테나 어셈블리의 실시예들은 다음의 특징들을 하나 이상 더 포함할 수 있다.According to another aspect of the present embodiment, a first printed circuit board (PCB) having a feeding network and a plurality of through holes electrically connected to the feeding network; A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network; And a plurality of band pass filters adhered to the lower surface of the first printed circuit board. Each bandpass filter has a first port having a conductive first pin extending from an interior cavity and protruding from an upper surface thereof, each bandpass filter having a protruding portion of the first pin printed on the first print. It is tightly coupled to the first printed circuit board while being inserted into the through hole formed in the circuit board. Embodiments of the MIMO antenna assembly may further include one or more of the following features.
몇몇 실시예에서, 상기 제1포트는, 상기 상부 면에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 절연 부시; 및 상기 절연 부시를 관통하여 상기 부시로부터 돌출된 상기 도전성 핀을 포함한다.In some embodiments, the first port includes an opening formed in the upper surface; An insulating bush inserted into the opening to close the opening; And the conductive pins penetrating through the insulating bush and protruding from the bush.
몇몇 실시예에서, 상기 복수의 대역통과필터는, 상기 상부 면에 상기 인쇄회로기판과 볼트에 의해 체결되는 복수의 체결홈이 형성된다.In some embodiments, the plurality of band pass filters may include a plurality of fastening grooves fastened by the printed circuit board and bolts on the upper surface.
몇몇 실시예에서, 상기 복수의 대역통과필터는, 상기 제1인쇄회로기판에 형성된 삽입홀들에 삽입되는 삽입돌기들이 형성된 푸시 바(push bar)에 일렬로 조립된 필터 어셈블리를 형성한다. In some embodiments, the plurality of band pass filters form a filter assembly assembled in a row on a push bar having insertion protrusions inserted into insertion holes formed in the first printed circuit board.
몇몇 실시예에서, 상기 복수의 대역통과필터는 상기 푸시 바를 수용하는 단차부를 포함하고, 상기 단차부에는 삽입돌기들 및 체결홀이 형성되어 있으며, 상기 푸시 바에는 각 대역통과필터의 삽입돌기들이 삽입되는 삽입홈들이 형성되고, 각 대역통과필터의 체결홀과 볼트에 의해 체결되는 복수의 체결홈이 형성된다.In some embodiments, the plurality of band pass filters include a step portion for receiving the push bar, wherein the step portions are provided with insertion protrusions and fastening holes, and the push bars are inserted with insertion protrusions of respective band pass filters. Insertion grooves are formed, and a plurality of fastening grooves are fastened by fastening holes and bolts of each band pass filter.
몇몇 실시예에서, 상기 MIMO 안테나 어셈블리는 상기 복수의 대역통과필터와 연결되는 복수의 송수신 회로가 형성된 제2인쇄회로기판을 더 포함한다.In some embodiments, the MIMO antenna assembly further includes a second printed circuit board having a plurality of transmit and receive circuits connected to the plurality of band pass filters.
몇몇 실시예에서, 상기 제2인쇄회로기판의 상부 면에는 상기 복수의 송수신회로와 연결된 복수의 RF 소켓(Socket)이 실장되어 있으며, 각 대역통과필터는 하부 면으로부터 돌출되고, 중심에 상기 RF 소켓이 삽입되는 홈이 형성된 돌출부 및 내부의 중공으로부터 연장되어 상기 돌출부에 형성된 상기 홈을 관통하는 도전성 핀을 포함하는 제2포트를 구비하고, 각 대역통과필터는 상기 제2포트의 도전성 핀이 상기 RF 소켓에 형성된 홀에 삽입된 채로 상기 제2인쇄회로기판에 결합된다.In some embodiments, a plurality of RF sockets connected to the plurality of transceiver circuits are mounted on an upper surface of the second printed circuit board, and each bandpass filter protrudes from a lower surface of the second printed circuit board. And a second port including a groove having a groove into which the groove is inserted and a conductive pin extending from the hollow inside and penetrating the groove formed in the protrusion, wherein each band pass filter has a conductive pin at the second port. It is coupled to the second printed circuit board while being inserted into a hole formed in the socket.
몇몇 실시예에서, 각 대역통과필터의 상기 제2포트는, 상기 홈에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 절연 부시; 및 상기 절연 부시를 관통하여 상기 부시로부터 돌출된 상기 도전성 핀을 포함한다.In some embodiments, the second port of each bandpass filter includes an opening formed in the groove; An insulating bush inserted into the opening to close the opening; And the conductive pins penetrating through the insulating bush and protruding from the bush.
몇몇 실시예에서, 상기 제2인쇄회로기판의 상부 면에는 상기 송수신회로와 전기적으로 연결된 접촉 패드(contact pad)가 형성된 복수의 구조물이 실장되어 있으며, 각 대역통과필터는 내부의 중공(cavity)에 전기적으로 연결되고 하부 면으로부터 돌출된 도전성 플런저(plunger)를 가진 제2포트를 구비하고, 각 대역통과필터는 상기 플런저가 상기 접촉 패드(contact pad)에 접촉된 채로 상기 제2인쇄회로기판에 결합된다.In some embodiments, a plurality of structures are formed on an upper surface of the second printed circuit board, the contact pads being electrically connected to the transmission and reception circuits, and each bandpass filter is disposed in a cavity therein. A second port having a conductive plunger electrically connected and protruding from the bottom surface, each bandpass filter coupled to the second printed circuit board with the plunger in contact with the contact pad; do.
몇몇 실시예에서, 각 대역통과필터의 상기 제2포트는, 상기 하부 면에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 절연 부시; 상기 절연 부시를 관통하여 상기 부시로부터 돌출된 원통의 바렐(barrel); 상기 원통의 바렐에 적어도 일부가 삽입된 상기 플런저(plunger); 및 상기 바렐 내에 배치되어 상기 플런저를 지지하는 스프링을 포함한다.In some embodiments, the second port of each bandpass filter includes an opening formed in the lower surface; An insulating bush inserted into the opening to close the opening; A barrel barrel penetrating the insulating bush and protruding from the bush; The plunger having at least a portion inserted into the barrel of the cylinder; And a spring disposed in the barrel to support the plunger.
몇몇 실시예에서, 상기 복수의 대역통과필터는 상기 제2인쇄회로기판과 체결되는 푸시 바(push bar)에 일렬로 조립되어 필터 어셈블리를 형성하고, 상기 제2인쇄회로기판과 체결된 상기 푸시 바는, 각 대역통과필터가 균일한 힘으로 상기 제2인쇄회로기판에 결합되도록, 각 대역통과필터에 균일한 압력을 제공한다.In some embodiments, the plurality of bandpass filters may be assembled in a line to a push bar coupled with the second printed circuit board to form a filter assembly, and the push bar coupled with the second printed circuit board. Provides uniform pressure to each bandpass filter such that each bandpass filter is coupled to the second printed circuit board with a uniform force.
몇몇 실시예에서, 상기 복수의 대역통과필터의 하부 면에는, 복수의 송수신 회로가 형성된 제2인쇄회로기판과 볼트에 의해 체결되는 체결홈이 형성된다.In some embodiments, a lower surface of the plurality of band pass filters may include a fastening groove fastened by a bolt and a second printed circuit board having a plurality of transceiving circuits.
본 실시예의 또 다른 측면에 의하면, 급전 네트워크(Feeding network) 및 상기 급전 네트워크에 전기적으로 연결된 복수의 접촉 패드(contact pad)가 형성된 제1인쇄회로기판(Printed Circuit Board; PCB); 상기 제1인쇄회로기판의 상부 면에 설치되고, 상기 급전 네트워크와 연결된 복수의 안테나 소자; 및 상기 제1인쇄회로기판의 하부 면에 밀착체결된 복수의 대역통과필터를 포함하는 MIMO 안테나 어셈블리를 제공한다. 각 대역통과필터는 내부의 중공(cavity)으로부터 연장되어 상부 면으로부터 돌출된 도전성 제1플런저(plunger)를 가진 제1포트를 구비하고, 각 대역통과필터는 상기 제1플런저가 상기 제1인쇄회로기판에 형성된 상기 접촉 패드에 접촉된 채로 상기 제1인쇄회로기판에 밀착 체결된다. 상기 MIMO 안테나 어셈블리의 실시예들은 다음의 특징들을 하나 이상 더 포함할 수 있다.According to another aspect of the present embodiment, a first printed circuit board (PCB) having a feeding network and a plurality of contact pads electrically connected to the feeding network; A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network; And a plurality of band pass filters adhered to the lower surface of the first printed circuit board. Each bandpass filter has a first port having a conductive first plunger extending from an interior cavity and protruding from an upper surface thereof, wherein each bandpass filter includes the first plunger in the first printed circuit. The first printed circuit board is in close contact with the contact pad formed on the substrate. Embodiments of the MIMO antenna assembly may further include one or more of the following features.
몇몇 실시예에서, 상기 제1포트는, 상기 상부 면에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 절연 부시; 상기 절연 부시를 관통하여 상기 부시로부터 돌출된 원통의 바렐(barrel); 상기 원통의 바렐에 적어도 일부가 삽입된 상기 도전성 플런저; 및 상기 바렐 내에 배치되어 상기 도전성 플런저를 지지하는 스프링을 포함한다.In some embodiments, the first port includes an opening formed in the upper surface; An insulating bush inserted into the opening to close the opening; A barrel barrel penetrating the insulating bush and protruding from the bush; At least a portion of the conductive plunger inserted into the barrel of the cylinder; And a spring disposed in the barrel to support the conductive plunger.
몇몇 실시예에서, 상기 MIMO 안테나 어셈블리는 상기 복수의 대역통과필터와 연결되는 복수의 송수신 회로가 형성된 제2인쇄회로기판을 더 포함한다.In some embodiments, the MIMO antenna assembly further includes a second printed circuit board having a plurality of transmit and receive circuits connected to the plurality of band pass filters.
몇몇 실시예에서, 상기 제2인쇄회로기판의 상부 면에는 상기 송수신회로와 전기적으로 연결된 접촉 패드(contact pad)가 형성된 복수의 구조물이 실장되어 있으며, 각 대역통과필터는 내부의 중공(cavity)에 전기적으로 연결되고 하부 면으로부터 돌출된 도전성 플런저(plunger)를 가진 제2포트를 구비하고, 각 대역통과필터는 상기 제2포트의 도전성 플런저가 상기 접촉 패드(contact pad)에 접촉된 채로 상기 제2인쇄회로기판에 결합된다.In some embodiments, a plurality of structures are formed on an upper surface of the second printed circuit board, the contact pads being electrically connected to the transmission and reception circuits, and each bandpass filter is disposed in a cavity therein. A second port having a conductive plunger electrically connected and protruding from the bottom surface, each bandpass filter having the second port with the conductive plunger of the second port in contact with the contact pad; It is coupled to a printed circuit board.
몇몇 실시예에서, 각 대역통과필터의 상기 제2포트는, 하부 면에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 부시; 상기 부시를 관통하여 상기 부시로부터 돌출된 원통의 바렐(barrel); 상기 원통의 바렐에 적어도 일부가 삽입된 상기 도전성 플런저; 및 상기 원통의 바렐 내에 배치되어 상기 도전성 플런저를 지지하는 스프링을 포함한다.In some embodiments, the second port of each bandpass filter includes an opening formed in a lower surface thereof; A bush inserted into the opening to close the opening; A barrel barrel penetrating the bush and protruding from the bush; At least a portion of the conductive plunger inserted into the barrel of the cylinder; And a spring disposed in the barrel of the cylinder to support the conductive plunger.
몇몇 실시예에서, 상기 제2인쇄회로기판의 상부 면에는 상기 송수신회로와 전기적으로 연결된 접촉 패드(contact pad)가 형성된 복수의 구조물이 실장되어 있으며, 각 대역통과필터는 내부의 중공(cavity)으로부터 연장되어 하부 면으로부터 돌출된 도전성 로드를 가진 제2포트를 구비하고, 각 대역통과필터는 상기 도전성 로드가 상기 접촉 패드(contact pad)에 접촉된 채로 상기 제2인쇄회로기판에 결합된다. In some embodiments, a plurality of structures are formed on an upper surface of the second printed circuit board, the contact pads being electrically connected to the transceiver circuits, and each bandpass filter is formed from an internal cavity. A second port having a conductive rod extending from and protruding from the bottom surface, each bandpass filter coupled to the second printed circuit board with the conductive rod in contact with the contact pad.
몇몇 실시예에서, 각 대역통과필터의 상기 제2포트는, 상기 하부 면에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 절연 부시; 및 상기 절연 부시를 관통하여 상기 부시로부터 돌출된 상기 도전성 로드를 포함한다.In some embodiments, the second port of each bandpass filter includes an opening formed in the lower surface; An insulating bush inserted into the opening to close the opening; And the conductive rod passing through the insulating bush and protruding from the bush.
본 실시예의 또 다른 측면에 의하면, 각 대역통과필터는 내부의 중공(cavity)에 전기적으로 연결되고 상부 면으로부터 돌출된 도전성 로드(conductive rod)를 가진 제1포트를 구비하고, 각 대역통과필터는 상기 도전성 로드가 상기 제1인쇄회로기판에 형성된 상기 접촉 패드에 접촉된 채로 상기 제1인쇄회로기판에 밀착 체결된다. 몇몇 실시예에서, 상기 제1포트는, 상기 상부 면에 형성된 개구부; 상기 개구부에 삽입되어 상기 개구부를 밀폐하는 절연 부시; 상기 절연 부시를 관통하여 상기 부시로부터 돌출된 도전성 핀; 및 상기 도전성 핀의 말단에 수직방향으로 고정된 상기 도전성 로드를 포함한다.According to yet another aspect of this embodiment, each bandpass filter has a first port electrically connected to an interior cavity and having a conductive rod protruding from the top surface, wherein each bandpass filter The conductive rod is in close contact with the first printed circuit board while being in contact with the contact pad formed on the first printed circuit board. In some embodiments, the first port includes an opening formed in the upper surface; An insulating bush inserted into the opening to close the opening; A conductive pin penetrating the insulating bush and protruding from the bush; And the conductive rod fixed to the end of the conductive pin in a vertical direction.
본 실시예의 또 다른 측면에 따르면, TDD(Time Division Duplex) 통신 프로토콜로 동작하는 MIMO 안테나 시스템은 복수의 안테나 소자, 상기 복수의 안테나 소자에 연결된 복수의 대역통과필터, 및 상기 복수의 대역통과필터에 연결된 복수의 송수신회로를 포함한다. 각 송수신회로는 상기 대역통과필터에 연결되는 RF 인터페이스와 상기 RF 인터페이스에 시분할로 연결되는 송신경로 및 수신경로를 포함한다. 상기 MIMO 안테나 시스템은 복수의 스위치들이 트리 구조로 연결된 캘리브레이션 네트워크로서, 상기 트리 구조에서 최상위에 위치한 스위치는 상기 복수의 송신경로 중 특정 송신경로와 상기 복수의 수신경로 중 특정 수신경로에 선택적으로 연결되며, 상기 트리 구조에서 최하위에 위치하는 복수의 스위치들은 각각 상기 복수의 송수신회로의 RF 인터페이스에 커플링된 복수의 방향성 커플러에 연결된, 캘리브레이션 네트워크를 더 포함한다. 상기 MIMO 안테나 시스템에 따르면, 하향링크 시간 구간에서 상기 특정 송신경로는 상기 복수의 수신경로들에 대한 캘리브레이션을 위한 파일럿 신호의 인가를 위해 사용되고, 상향링크 시간 구간에서 상기 특정 수신경로는 상기 복수의 송신경로들에 대한 캘리브레이션을 위한 피드백 경로로 사용된다. 상기 MIMO 안테나 시스템의 실시예들은 다음의 특징들을 하나 이상 더 포함할 수 있다.According to another aspect of the present embodiment, a MIMO antenna system operating with a time division duplex (TDD) communication protocol includes a plurality of antenna elements, a plurality of band pass filters connected to the plurality of antenna elements, and a plurality of band pass filters. It includes a plurality of transmission and reception circuits connected. Each transmit / receive circuit includes an RF interface connected to the band pass filter, and a transmission path and a reception path connected to the RF interface by time division. The MIMO antenna system is a calibration network in which a plurality of switches are connected in a tree structure, and a switch located at the top of the tree structure is selectively connected to a specific transmission path among the plurality of transmission paths and a specific reception path among the plurality of reception paths. The plurality of switches located at the lowest position in the tree structure further includes a calibration network, each connected to a plurality of directional couplers coupled to RF interfaces of the plurality of transceiver circuits. According to the MIMO antenna system, the specific transmission path is used for application of a pilot signal for calibration for the plurality of reception paths in a downlink time interval, and the specific reception path in the uplink time interval is used for the plurality of transmissions. It is used as a feedback path for calibration of the paths. Embodiments of the MIMO antenna system may further include one or more of the following features.
몇몇 실시예에서, 상기 MIMO 안테나 시스템은, 상기 복수의 송수신회로와 연결되며, 상기 복수의 송신경로들에 대한 송신 캘리브레이션과 상기 복수의 수신경로들에 대한 수신 캘리브레이션을 수행하는 프로세싱 회로를 더 포함한다. In some embodiments, the MIMO antenna system further includes processing circuitry coupled to the plurality of transmit / receive circuits and perform transmit calibration for the plurality of transmit paths and receive calibration for the plurality of receive paths. .
몇몇 실시예에서, 상기 프로세싱 회로는, 각 송신경로 간의 편차 및 각 수신경로 간의 편차에, 사전에 측정된 상기 복수의 대역통과필터들과 안테나 피더라인(feeder line)들의 RF 편차를 오프셋 값으로 포함시켜, 상기 송신 캘리브레이션 및 상기 수신 캘리브레이션을 수행한다. In some embodiments, the processing circuit includes, as an offset value, an RF deviation of the plurality of previously measured bandpass filters and antenna feeder lines in the deviation between each transmission path and each reception path. The transmission calibration and the reception calibration are performed.
몇몇 실시예에서, 상기 프로세싱 회로는, 상기 MIMO 안테나가 운영되는 동안 실시간으로 캘리브레이션을 수행한다.In some embodiments, the processing circuit performs calibration in real time while the MIMO antenna is operating.
몇몇 실시예에서, 상기 복수의 송수신회로, 상기 캘리브레이션 네트워크 및 상기 프로세싱 회로는, 하나의 인쇄회로기판에 형성된다.In some embodiments, the plurality of transmission and reception circuits, the calibration network and the processing circuit are formed on one printed circuit board.
몇몇 실시예에서, 상기 프로세싱 회로는, 상기 복수의 방향성 커플러, 상기 캘리브레이션 네트워크 및 상기 특정 수신경로로 구성되는 제1캘리브레이션 경로를 형성하고, 상기 제1캘리브레이션 경로를 통해, 각 송신경로를 경유한 송신신호를 획득하고, 각 송신경로에 인가된 송신신호와 상기 제1캘리브레이션 경로를 통해 획득한 송신신호 간의 비교에 기초하여 송신 캘리브레이션을 수행한다.In some embodiments, the processing circuitry forms a first calibration path comprised of the plurality of directional couplers, the calibration network and the specific receive path, and transmits via each transmit path via the first calibration path. A signal is obtained and a transmission calibration is performed based on a comparison between the transmission signal applied to each transmission path and the transmission signal acquired through the first calibration path.
몇몇 실시예에서, 상기 프로세싱 회로는, 각 수신경로의 교정을 위한 파일럿 신호를 생성하고, 상기 특정 송신경로, 상기 캘리브레이션 네트워크 및 상기 방향성 커플러로 구성되는 제2캘리브레이션 경로를 형성하고, 상기 제2캘리브레이션 경로를 통해 상기 생성된 파일럿 신호를 각 수신경로에 삽입하고, 상기 생성된 파일럿 신호와 각 수신경로의 출력신호로부터 추출한 파일럿 신호 간의 비교에 기초하여 수신 캘리브레이션을 수행한다.In some embodiments, the processing circuit generates a pilot signal for calibration of each receive path, forms a second calibration path comprised of the particular transmission path, the calibration network and the directional coupler, and the second calibration. The pilot signal is inserted into each reception path through a path, and reception calibration is performed based on a comparison between the generated pilot signal and a pilot signal extracted from an output signal of each reception path.
몇몇 실시예에서, 각 송신회로는 상향 컨버터, D/A 컨버터 및 파워 증폭기(PA)를 포함하고, 상기 특정 송신경로는 상기 파워 증폭기와 상기 D/A 컨버터 사이에 위치한 스위치를 더 포함하고, 상기 스위치는, 상향링크 시간 구간에서, 상기 특정 송신경로로 인가되는 파일럿 신호를 상기 캘리브레이션 네트워크로 우회시키는 스위치를 더 포함한다.In some embodiments, each transmitting circuit comprises an up converter, a D / A converter and a power amplifier (PA), wherein the specific transmission path further comprises a switch located between the power amplifier and the D / A converter, The switch further includes a switch for bypassing a pilot signal applied to the specific transmission path to the calibration network in an uplink time interval.
몇몇 실시예에서, 각 수신회로는 저잡음 증폭기(LNA), A/D 컨버터 및 하향 컨버터를 포함하고, 상기 특정 수신경로는 상기 저잡음 증폭기와 상기 A/D 컨버터 사이에 위치한 스위치를 더 포함하고, 상기 스위치는, 하향링크 시간 구간에서, 상기 캘리브레이션 네트워크로부터 되먹임되는 각 송신경로를 경유한 송신신호를 입력받는 스위치를 더 포함한다.In some embodiments, each receiving circuit comprises a low noise amplifier (LNA), an A / D converter and a down converter, wherein the specific receiving path further comprises a switch located between the low noise amplifier and the A / D converter, The switch further includes a switch receiving a transmission signal via each transmission path that is fed back from the calibration network in a downlink time interval.
몇몇 실시예에서, 상기 파일럿 신호는 수신 신호의 대역 내(in-band)의 주파수를 가진다.In some embodiments, the pilot signal has a frequency in-band of the received signal.
몇몇 실시예에서, 상기 파일럿 신호는 수신 신호의 대역 외(out-band)의 주파수를 가진다.In some embodiments, the pilot signal has an out-band frequency of the received signal.
몇몇 실시예에서, 각 송수신 회로는 상기 송신경로, 상기 수신경로 및 상기 RF 인터페이스에 연결된 셔큘레이터(circulator)를 더 포함하고, 상기 RF 인터페이스로부터 상기 서큘레이터에 입력되는 수신신호는 상기 수신경로로 전달되고, 상기 송신경로로부터 상기 서큘레이터에 입력되는 송신신호는 상기 RF 인터페이스로 전달된다.In some embodiments, each transmit / receive circuit further comprises a circulator coupled to the transmit path, the receive path and the RF interface, wherein a received signal input from the RF interface to the circulator is transferred to the receive path. The transmission signal input to the circulator from the transmission path is transmitted to the RF interface.
몇몇 실시예에서, 상기 수신경로는 TDD 스위치를 통해 상기 서큘레이터에 연결되며, 상기 TDD 스위치는 상기 서큘레이터에 연결되는 제1입력단, 상기 수신 경로에 연결되는 제1출력단, 및 종단 저항이 연결된 제2출력단을 포함하며, 상기 TDD 스위치는, 하향링크 시간 구간에서, 상기 제1입력단을 상기 제2출력단에 연결된다.In some embodiments, the receiving path is connected to the circulator via a TDD switch, the TDD switch being a first input connected to the circulator, a first output connected to the receiving path, and a terminating resistor connected thereto. And a two output terminal, wherein the TDD switch is connected to the first input terminal in the downlink time interval.
본 발명의 또 다른 측면에 따르면, 복수의 안테나, 상기 복수의 안테나에 연결된 복수의 대역통과필터, 상기 복수의 대역통과필터에 연결된 복수의 송수신회로로서, 상기 복수의 안테나를 통해 TDD(Time Division Duplex) 통신 프로토콜로 송신 및 수신하는 복수의 송수신회로, 및 복수의 스위치들이 트리 구조로 연결된 캘리브레이션 네트워크를 포함하는 MIMO 안테나 시스템을 캘리브레이션하는 방법을 제공한다. 상기 방법은 상기 복수의 송수신회로와 상기 대역통과필터 사이의 브랜치(branch)에 커플링된 방향성 커플러, 상기 캘리브레이션 네트워크 및 상기 복수의 송수신회로 중 특정 송수신회로에 포함된 수신경로로 구성되는 제1캘리브레이션 경로를 형성하는 과정을 포함한다. 상기 방법은 상기 제1캘리브레이션 경로를 통해 상기 복수의 대역통과필터로 전송되는 송신신호를 획득하는 과정; 및 각 송신경로에 인가된 송신신호와 상기 제1캘리브레이션 경로를 통해 획득한 송신신호 간의 비교에 기초하여 송신 캘리브레이션을 수행하는 과정을 더 포함한다. 상기 캘리브레이션 방법의 실시예들은 다음의 특징들을 하나 이상 더 포함할 수 있다.According to another aspect of the present invention, a plurality of antennas, a plurality of band pass filters connected to the plurality of antennas, a plurality of transmission / reception circuits connected to the plurality of band pass filters, and a time division duplex (TDD) through the plurality of antennas The present invention provides a method for calibrating a MIMO antenna system including a plurality of transmission and reception circuits for transmitting and receiving in a communication protocol, and a calibration network in which a plurality of switches are connected in a tree structure. The method includes a first calibration comprising a directional coupler coupled to a branch between the plurality of transmission and reception circuits and the band pass filter, and a reception path included in a specific transmission and reception circuit among the calibration network and the plurality of transmission and reception circuits. Forming a path. The method includes obtaining a transmission signal transmitted to the plurality of bandpass filters through the first calibration path; And performing transmission calibration based on a comparison between the transmission signal applied to each transmission path and the transmission signal acquired through the first calibration path. Embodiments of the calibration method may further include one or more of the following features.
몇몇 실시예에서, 상기 제1캘리브레이션 경로를 형성하는 과정 및 상기 송신신호를 획득하는 과정은 하향링크 시간 구간에서 수행된다.In some embodiments, the process of forming the first calibration path and the process of acquiring the transmission signal are performed in a downlink time interval.
몇몇 실시예에서, 상기 송신 캘리브레이션을 수행하는 과정은, 각 송수신회로에 포함된 각 송신경로 간의 편차에 사전에 측정된 상기 복수의 대역통과필터들의 RF 편차를 오프셋 값으로 포함시키는 과정을 더 포함한다.In some embodiments, the performing of the calibration may further include including, as an offset value, RF deviations of the plurality of bandpass filters previously measured in deviations between transmission paths included in each transmission and reception circuit. .
몇몇 실시예에서, 상기 캘리브레이션 방법은, 각 수신경로의 교정을 위한 파일럿 신호를 생성하는 과정; 상기 복수의 송수신회로와 상기 대역통과필터 사이의 브랜치(branch)에 커플링된 방향성 커플러, 상기 캘리브레이션 네트워크 및 상기 복수의 송수신회로 중 특정 송수신회로에 포함된 송신경로로 구성되는 제2캘리브레이션 경로를 형성하는 과정; 상기 제2캘리브레이션 경로를 통해 상기 파일럿 신호를 상기 복수의 송수신회로에 포함된 수신경로에 삽입하기 위해, 상기 특정 송수신회로에 포함된 송신경로에 상기 파일럿 신호를 삽입하는 과정; 및 상기 생성된 파일럿 신호와 각 수신경로의 출력신호로부터 추출한 파일럿 신호 간의 비교에 기초하여 수신 캘리브레이션을 수행하는 과정을 더 포함한다.In some embodiments, the calibration method comprises: generating a pilot signal for calibration of each receive path; Forming a second calibration path including a directional coupler coupled to a branch between the plurality of transmission / reception circuits and the band pass filter, a transmission path included in a specific transmission / reception circuit among the calibration network and the plurality of transmission / reception circuits. Process of doing; Inserting the pilot signal into a transmission path included in the specific transmission / reception circuit to insert the pilot signal into a reception path included in the plurality of transmission / reception circuits through the second calibration path; And performing reception calibration based on a comparison between the generated pilot signal and the pilot signal extracted from the output signal of each reception path.
몇몇 실시예에서, 상기 제2캘리브레이션 경로를 형성하는 과정 및 상기 파일럿 신호를 삽입하는 과정은 상향링크 시간 구간에서 수행된다.In some embodiments, the forming of the second calibration path and the inserting of the pilot signal are performed in an uplink time interval.
몇몇 실시예에서, 상기 수신 캘리브레이션을 수행하는 과정은, 사전에 측정된 상기 복수의 대역통과필터들과 안테나 피더라인(feeder line)들의 RF 편차를 각 송수신회로에 포함된 각 수신경로 간의 편차에 오프셋 값으로 포함시키는 과정을 더 포함한다.In some embodiments, the performing of the reception calibration may include offsetting RF deviations of the plurality of previously measured bandpass filters and antenna feeder lines to deviations between respective reception paths included in each transceiver circuit. It further includes the process of including it as a value.
도 1은 본 발명에 따른 안테나 어셈블리가 내장되는 안테나 장치의 예시적인 외형을 도시한 사시도이다. 1 is a perspective view illustrating an exemplary appearance of an antenna device having an antenna assembly according to the present invention.
도 2는 예시적인 Massive MIMO 안테나의 적층구조를 도식화한 도면이다. 2 is a diagram illustrating a stack structure of an exemplary massive MIMO antenna.
도 3은 도 2의 적층구조에서 제1레이어 내지 제2레이어를 구현한 예시적인 서브 어셈블리의 분해도이다.3 is an exploded view of an exemplary subassembly implementing first to second layers in the stack structure of FIG. 2.
도 4는 본 발명의 일 실시예에 따른 Massive MIMO 안테나 시스템의 적층구조를 도식화한 도면이다. 4 is a diagram illustrating a laminated structure of a massive MIMO antenna system according to an embodiment of the present invention.
도 5는 도 4의 적층구조를 취하는 본 발명의 일 실시예에 따른 Massive MIMO 안테나의 분해도이다. FIG. 5 is an exploded view of a massive MIMO antenna according to an embodiment of the present invention taking the stacked structure of FIG.
도 6은 본 발명의 일 실시예에 따른 안테나 소자가 결합된 제1PCB에 필터들이 결합한 서브 어셈블리의 분해도이다.6 is an exploded view of a subassembly in which filters are coupled to a first PCB to which an antenna element is coupled according to an embodiment of the present invention.
도 7은 대역통과필터가 RF 커넥터를 통해 PCB에 연결되는 예시적인 구조를 도시한 도면이다.7 is a diagram illustrating an exemplary structure in which a bandpass filter is connected to a PCB through an RF connector.
도 8은 본 발명의 일 실시예에 따른 캐비티 필터의 구조를 도시한 사시도이다. 8 is a perspective view showing the structure of a cavity filter according to an embodiment of the present invention.
도 9는 본 발명의 일 실시예에 따른 캐비티 필터가 제1PCB 및 제2PCB에 연결된 구조를 설명하기 위한 단면도이다. 9 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to an embodiment of the present invention.
도 10은 본 발명의 다른 실시예에 따른 캐비티 필터가 제1PCB 및 제2PCB에 연결된 구조를 설명하기 위한 단면도이다. 10 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention.
도 11은 본 발명의 또 다른 실시예에 따른 캐비티 필터가 제1PCB 및 제2PCB에 연결된 구조를 설명하기 위한 단면도이다. FIG. 11 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention.
도 12는 본 발명의 일 실시예에 따른 필터 어셈블리들을 도시한 도면이다. 12 illustrates filter assemblies according to an embodiment of the present invention.
도 13은 본 발명의 일 실시예에 따른 필터 어셈블리들을 제1PCB에 조립한 상태를 도시한 도면이다.FIG. 13 is a view illustrating a state in which filter assemblies are assembled in a first PCB according to an embodiment of the present invention.
도 14는 본 발명에 따른 Massive MIMO 안테나 어셈블리의 기능을 도식화한 회로도이다. 14 is a circuit diagram illustrating the function of a massive MIMO antenna assembly according to the present invention.
도 15a는 RF IC와 RF 소자들 사이에 SPDT 스위치가 존재하지 않는 송수신 모듈을 도시한 도면이고, 도 15b는 RF IC와 RF 소자들 사이에 SPDT 스위치가 존재하는 송수신 모듈을 도시한 도면이다. FIG. 15A illustrates a transmission / reception module in which no SPDT switch exists between the RF IC and the RF devices, and FIG. 15B illustrates a transmission / reception module in which an SPDT switch exists between the RF IC and the RF devices.
도 16은 TX 캘리브레이션에서 신호 흐름을 설명하기 위한 도면이다. 16 is a diagram for explaining signal flow in TX calibration.
도 17은 RX 캘리브레이션에서 신호 흐름을 설명하기 위한 도면이다. 17 is a diagram for explaining signal flow in RX calibration.
도 18은 필터들과 안테나 피더 라인(feeder line)들의 고정된 위상편차를 설명하기 위한 도면이다.FIG. 18 is a diagram for explaining a fixed phase deviation of filters and antenna feeder lines.
이하, 본 발명의 일부 실시예들을 예시적인 도면을 통해 상세하게 설명한다. 각 도면의 구성요소들에 참조부호를 부가함에 있어서, 동일한 구성요소들에 대해서는 비록 다른 도면상에 표시되더라도 가능한 한 동일한 부호를 가지도록 하고 있음에 유의해야 한다. 또한, 본 발명을 설명함에 있어, 관련된 공지 구성 또는 기능에 대한 구체적인 설명이 본 발명의 요지를 흐릴 수 있다고 판단되는 경우에는 그 상세한 설명은 생략한다. Hereinafter, some embodiments of the present invention will be described in detail through exemplary drawings. In adding reference numerals to the components of each drawing, it should be noted that the same reference numerals are assigned to the same components as much as possible even though they are shown in different drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related well-known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.
명세서 전체에서, 어떤 부분이 어떤 구성요소를 '포함', '구비'한다고 할 때, 이는 특별히 반대되는 기재가 없는 한 다른 구성요소를 제외하는 것이 아니라 다른 구성요소를 더 포함할 수 있는 것을 의미한다. 명세서에서 사용된 "캘리브레이션 네트워크(calibration network)"라는 용어는 각 송신경로의 출력단에 커플링된 양방향 커플러를 통해 획득된 각 송신경로별 송신신호를 캘리브레이션 프로세서로 피드백하는 경로, 캘리브레이션 프로세서로부터 각 수신 경로의 입력단으로 파일럿 신호가 전달되는 경로를 제공하는 RF 회로를 지칭한다.Throughout the specification, when a part is said to include, 'include' a certain component, which means that it may further include other components, except to exclude other components unless otherwise stated. . As used herein, the term "calibration network" refers to a path for feeding back a transmission signal for each transmission path obtained through a bidirectional coupler coupled to an output terminal of each transmission path to a calibration processor, and each reception path from a calibration processor. Refers to an RF circuit that provides a path through which a pilot signal is transmitted to an input terminal of a.
도 1은 본 발명에 따른 안테나 어셈블리가 내장되는 안테나 장치의 예시적인 외형을 도시한 사시도이다. 안테나 장치(10)는 크게 히트 싱크(heat sink)가 형성된 하우징(housing; 12)과, 하우징에 결합된 레이돔(radome; 11)을 포함한다. 하우징(12)과 레이돔(11) 사이에는 후술할 안테나 어셈블리(antenna assembly)가 내장된다. 하우징(11)의 하부에는, 예컨대 도킹(docking) 구조를 통해, 파워 서플라이 유닛(PSU, power supply unit; 13)이 결합되며, 파워 서플라이 유닛(13)은 안테나 어셈블리에 구비된 전자 부품들을 동작시키기 위한 동작 전원을 제공한다.1 is a perspective view illustrating an exemplary appearance of an antenna device having an antenna assembly according to the present invention. The antenna device 10 includes a housing 12 in which a heat sink is largely formed, and a radome 11 coupled to the housing. An antenna assembly to be described later is embedded between the housing 12 and the radome 11. A power supply unit 13 is coupled to the bottom of the housing 11, for example, via a docking structure, and the power supply unit 13 operates electronic components provided in the antenna assembly. Provide operating power for
1. 적층구조의 Massive MIMO 안테나 어셈블리Massive MIMO Antenna Assembly
도 2는 예시적인 Massive MIMO 안테나의 적층구조를 도식화한 도면이다. 2 is a diagram illustrating a stack structure of an exemplary massive MIMO antenna.
도 2에 예시된 Massive MIMO 안테나(20)는 레이돔(radome)과, 외부에 히트 싱크(heat sink)가 형성된 하우징(housing)과, 이들 사이에 배열되는 안테나 어셈블리(antenna assembly)를 포함한다. 안테나 어셈블리는 RF 소자들과 디지털 소자들이 구현된 모듈들이 적층 구조로 결합된 형태로 구성된다. 예시된 안테나 어셈블리의 주요 모듈들은 크게 6개의 레이어(Layer)로 구분될 수 있다.The massive MIMO antenna 20 illustrated in FIG. 2 includes a radome, a housing in which a heat sink is formed outside, and an antenna assembly arranged therebetween. The antenna assembly is configured in such a way that the RF elements and the modules in which the digital elements are implemented are combined in a stacked structure. The main modules of the illustrated antenna assembly can be divided into six layers.
제1레이어에는 캘리브레이션 네트워크가 구현된 인쇄회로기판(printed circuit board: PCB; 210)과 그 상단에 설치된 복수의 안테나 소자(210)가 포함된다. 제2레이어는 복수의 필터들(230)로 구성되며, 각 필터(230)는 제1레이어 상의 RF 급전 네트워크의 신호 라인들과 RF 커넥터와 같은 RF 인터페이스를 통해 전기적으로 연결된다.The first layer includes a printed circuit board (PCB) 210 on which a calibration network is implemented, and a plurality of antenna elements 210 installed on the top thereof. The second layer consists of a plurality of filters 230, each filter 230 being electrically connected to signal lines of the RF feeding network on the first layer via an RF interface such as an RF connector.
제3레이어는 파워 증폭기(power amplifier; PA) 등의 아날로그 프로세싱 회로가 구현된 PCB(240)을 포함한다. 아날로그 프로세싱 회로에 포함된 각 파워 증폭기는 제2레이어 상의 대응되는 필터들(230)과 RF 인터페이스를 통해 전기적으로 연결된다. 또한, 아날로그 프로세싱 회로는 캘리브레이션 네트워크와 RF 인터페이스를 통해 연결된다.The third layer includes a PCB 240 in which analog processing circuitry such as a power amplifier (PA) is implemented. Each power amplifier included in the analog processing circuit is electrically connected to the corresponding filters 230 on the second layer through an RF interface. In addition, the analog processing circuitry is connected via a calibration network and an RF interface.
제4레이어에는 디지털 프로세싱 회로가 구현된 디지털 보드(250)와 파워 서플라이 유닛(PSU; 250)이 포함된다. 디지털 보드(250)는 기지국 BBU(base band unit)로부터 수신되는 디지털 신호를 아날로그 RF 신호로 변환하고 안테나에서 수신되는 아날로그 RF 신호를 디지털 신호로 변환하여 기지국 BBU에 전송하는 기능을 수행한다. 디지털 보드(250)는, RF 인터페이스를 통해, 제3레이어 상의 아날로그 프로세싱 회로가 구현된 PCB(240)과 연결된다.The fourth layer includes a digital board 250 and a power supply unit (PSU) 250 in which digital processing circuits are implemented. The digital board 250 converts a digital signal received from a base station base band unit (BBU) into an analog RF signal, converts an analog RF signal received from an antenna into a digital signal, and transmits the digital signal to the base station BBU. The digital board 250 is connected to the PCB 240 in which the analog processing circuit on the third layer is implemented through the RF interface.
도 3은 도 2의 적층구조에서 제1레이어 내지 제2레이어를 구현한 예시적인 서브 어셈블리의 분해도이다.3 is an exploded view of an exemplary subassembly implementing first to second layers in the stack structure of FIG. 2.
도시된 바와 같이, 제1레이어에 해당하는 복수의 서브 레이어들과 제2레이어에 해당하는 필터 뱅크(filter bank)가 결합하여 안테나 어셈블리의 서브 어셈블리를 이룬다. 제1서브 레이어에는 RF 급전 네트워크(feeding network)가 구현된 PCB와 그 상단에 설치된 복수의 안테나 소자가 포함된다. 제2서브 레이어는 반사판(reflector)을 포함하며, 제3서브 레이어는 캘리브레이션 네트워크가 구현된 PCB을 포함한다. 제1레이어를 구성하는 제1서브 레이어 내지 제3서브 레이어는 다중 레이어 PCB(Multi-layer PCB)로 구현될 수 있다. 특히, 도 2에는 복수의 필터들을 내장된 필터 뱅크(filter bank)가 서브 레이어들과 체결되어 있다. 필터 뱅크는 복수의 필터들의 blind mating connection과 체결력 확보를 위한 구조물로서, 서브 어셈블리의 사이즈를 불가피하게 증가시킨다.As shown, a plurality of sublayers corresponding to the first layer and a filter bank corresponding to the second layer are combined to form a subassembly of the antenna assembly. The first sub-layer includes a PCB in which an RF feeding network is implemented and a plurality of antenna elements installed on the top thereof. The second sub layer includes a reflector, and the third sub layer includes a PCB on which a calibration network is implemented. The first sub layer to the third sub layer constituting the first layer may be implemented as a multi-layer PCB. In particular, in FIG. 2, a filter bank incorporating a plurality of filters is fastened to sublayers. The filter bank is a structure for securing a mating connection and a fastening force of the plurality of filters, which inevitably increases the size of the subassembly.
도 2 및 도 3에 예시된 적층구조에서는, 캘리브레이션 네트워크가 안테나와 필터 사이에 위치한다. 캘리브레이션 네트워크는 통상 복수의 스위치로 구성되며, 각 필터의 후단에 커플링된 RF 커플러들과 연결된다. 따라서, 급전 네트워크와 필터들은 RF 커넥터(예컨대, 동축 커넥터(coaxial connector)와 같은 표준화된 RF 인터페이스)를 통해 연결할 수밖에 없다. 또한, 파워 증폭기가 형성된 아날로그 보드와 디지털 보드와 별개의 레이어로 구성되므로, 이들 간의 RF 인터페이스에도 RF 커넥터가 사용된다. 이와 같이, 도 2 및 도 3에 예시된 MIMO 안테나 시스템은 다수의 레이어로 구성되어 있고, 각 레이어들을 RF 커넥터를 통해 서로 연결하는 구조이므로, 무게와 크기를 줄이기 어렵다.In the stack structure illustrated in FIGS. 2 and 3, a calibration network is located between the antenna and the filter. The calibration network typically consists of a plurality of switches and is connected to RF couplers coupled to the back of each filter. Thus, the feed network and the filters are bound to connect via an RF connector (eg, a standardized RF interface such as a coaxial connector). In addition, since the analog board and the digital board on which the power amplifier is formed are composed of separate layers, the RF connector is also used for the RF interface between them. As described above, the MIMO antenna system illustrated in FIGS. 2 and 3 is composed of a plurality of layers, and each layer is connected to each other through an RF connector, and thus it is difficult to reduce weight and size.
본 발명은 보다 슬림하고 컴팩트한 적층구조의 Massive MIMO 안테나 시스템을 제안한다.The present invention proposes a Massive MIMO antenna system having a slimmer and more compact laminated structure.
도 4는 본 발명의 일 실시예에 따른 Massive MIMO 안테나 시스템의 적층구조를 도식화한 도면이다. 도 5는 도 4의 적층구조를 취하는 본 발명의 일 실시예에 따른 Massive MIMO 안테나의 분해도이다. 도 6은 본 발명의 일 실시예에 따른 안테나 소자가 결합된 제1PCB에 필터들이 결합한 서브 어셈블리의 분해도이다.4 is a diagram illustrating a laminated structure of a massive MIMO antenna system according to an embodiment of the present invention. FIG. 5 is an exploded view of a massive MIMO antenna according to an embodiment of the present invention taking the stacked structure of FIG. 6 is an exploded view of a subassembly in which filters are coupled to a first PCB to which an antenna element is coupled according to an embodiment of the present invention.
본 발명은, 후술하는 바와 같이, 캘리브레이션 기능을, 안테나 소자(410) 전단이 아닌, 필터(430)의 전단(즉, 파워 증폭기의 출력단)에서 동작시킨다. 필터와 안테나 피더 라인으로 인해 발생하는 위상 편차는, 고정된 위상 편차를 갖는 필터들을 생산/사용함으로써, 허용가능한 수준에서 관리할 수 있다는 점에 유의한다. 캘리브레이션 기능을 파워 증폭기의 출력단에서 동작시킴으로써, 기존의 안테나 소자와 필터 사이에 위치하던 캘리브레이션 네트워크를 파워 증폭기 및 디지털 회로와 함께 하나의 보드에 형성할 수 있게 되며, 급전 네트워크(feeding network)가 형성된 PCB 하부에 필터를 밀착결합시킬 수 있게 된다. 다시 말해, 본 발명은 필터와 안테나 피더 라인으로 인해 발생하는 위상 편차를 허용가능한 수준에서 관리하되, 안테나 어셈블리를 컴팩트한 사이즈로 줄이는 전략을 취한다.As described later, the present invention operates the calibration function at the front end of the filter 430 (that is, at the output end of the power amplifier), not at the front end of the antenna element 410. Note that the phase deviation caused by the filter and antenna feeder lines can be managed at an acceptable level by producing / using filters with a fixed phase deviation. By operating the calibration function at the output of the power amplifier, the calibration network located between the existing antenna element and the filter can be formed together with the power amplifier and the digital circuit on a single board, and a PCB with a feeding network is formed. The filter can be tightly attached to the lower part. In other words, the present invention manages the phase deviation caused by the filter and the antenna feeder line at an acceptable level, but takes a strategy of reducing the antenna assembly to a compact size.
도 4에 도시된 바와 같이, 본 발명의 일 실시예에 따른 적층 구조에서는, 캘리브레이션 네트워크가 파워 증폭기 및 디지털 회로와 함께 하나의 보드(440)에 형성된다. 따라서, 파워 증폭기, 캘리브레이션 네트워크, 및 디지털 회로 간에 RF 케이블 연결이 필요 없게 된다. 또한, 도 2에 비해, 도 4의 적층구조는 적은 수의 레이어로 구성된다.As shown in FIG. 4, in a stacked structure according to an embodiment of the present invention, a calibration network is formed on one board 440 together with a power amplifier and a digital circuit. Thus, there is no need for an RF cable connection between the power amplifier, the calibration network, and the digital circuit. In addition, compared to FIG. 2, the stacking structure of FIG.
본 실시예에 따른 MIMO 안테나 어셈블리는 제1PCB(420)와 제2PCB(440)를 포함한다. 제1PCB(420)에는 RF 급전 네트워크가 형성되어 있다. 제1PCB(420)의 상부 면에는 복수의 안테나 소자(410)가 체결되어 RF 급전 네트워크에 전기적으로 연결되고, 하부 면에는 복수의 대역통과필터(430)가 밀착 체결되어 RF 급전 네트워크와 전기적으로 연결된다. 제1PCB(420)에는 적어도 하나의 접지면(ground plane)이 형성되어 있으며, 접지면은 복수의 안테나 소자들에 대해 반사판으로서 기능할 수 있다. 즉, 제1PCB(420)에 형성된 접지면을 반사판으로 활용함으로써, 도 3에 도시된 별도의 반사판이 생략될 수 있다. 제2PCB(440)에는 기저대역 처리를 수행하는 디지털 프로세싱 회로, 복수의 송신/수신(TX/RX) 회로를 제공하는 아날로그 프로세싱 회로, 및 캘리브레이션 네트워크가 형성되어 있다. 대역통과필터(430)는 제1PCB(410)의 신호라인과 전기적으로 연결되며, 제2PCB(440)의 신호라인과 전기적으로 연결된다.The MIMO antenna assembly according to the present embodiment includes a first PCB 420 and a second PCB 440. An RF power supply network is formed in the first PCB 420. A plurality of antenna elements 410 are fastened to an upper surface of the first PCB 420 to be electrically connected to the RF power supply network, and a plurality of band pass filters 430 are tightly fastened to the lower surface to be electrically connected to the RF power supply network. do. At least one ground plane is formed in the first PCB 420, and the ground plane may function as a reflector for the plurality of antenna elements. That is, by using the ground plane formed on the first PCB 420 as a reflector, the separate reflector illustrated in FIG. 3 may be omitted. The second PCB 440 is formed with a digital processing circuit that performs baseband processing, an analog processing circuit that provides a plurality of transmit / receive (TX / RX) circuits, and a calibration network. The band pass filter 430 is electrically connected to the signal line of the first PCB 410 and is electrically connected to the signal line of the second PCB 440.
이하에서는 대역통과필터와 PCB들 간의 체결 구조에 대해 설명하기로 한다. 본 발명은 사이즈 및 조립성을 개선한 필터와 PCB 간의 새로운 체결 구조를 제안한다. 또한, 복수의 필터의 전기적 특성을 확보하기 위해 필요한 체결력을 균일하게 제공하여, 복수의 필터 조립 시에 발생하는 조립 공차의 누적량을 최소화할 수 있는 체결 구조를 제안한다.Hereinafter, the fastening structure between the band pass filter and the PCB will be described. The present invention proposes a new fastening structure between the filter and the PCB with improved size and assembly. In addition, the present invention proposes a fastening structure that can uniformly provide the fastening force necessary to secure the electrical characteristics of the plurality of filters, thereby minimizing the cumulative amount of assembly tolerances generated when the plurality of filters are assembled.
먼저, 도 7을 참조하여, 종래의 체결 구조를 설명하기로 한다. 도 7은 대역통과필터가 RF 커넥터를 통해 PCB에 연결되는 예시적인 구조를 도시한 도면이다. 대역통과필터를 PCB에 체결하는 경우, 통상적으로 블라인드 결합 커넥터(blind mating connector) 타입의 RF 커넥터가 사용된다. 도 7에는 상부 면과 하부 면에 각각 RF 커넥터(711, 712)를 구비한 캐비티 필터(cavity filter)가 예시되어 있다. PCB 상에는 캐비티 필터의 하부에 위치한 RF 커넥터(male)에 삽입되는 RF 커넥터(female)가 표면 실장되어 있다. 각 캐비티 필터는 체결 구조물(713)를 통해 개별적으로 PCB에 체결된다. First, a conventional fastening structure will be described with reference to FIG. 7. 7 is a diagram illustrating an exemplary structure in which a bandpass filter is connected to a PCB through an RF connector. When the bandpass filter is fastened to the PCB, an RF connector of a blind mating connector type is typically used. FIG. 7 illustrates a cavity filter with RF connectors 711 and 712 on the top and bottom surfaces, respectively. On the PCB, an RF connector (female) inserted into an RF connector (male) located under the cavity filter is surface mounted. Each cavity filter is individually fastened to the PCB via a fastening structure 713.
도 7에 예시된 구조에서는 각 캐비티 필터가 개별적으로 PCB에 체결되므로, 각 캐비티 필터 간의 체결력 차이로 인해 RF 특성에 조립 공차가 발생하게 된다. 또한, 각 캐비티 필터가 RF 커넥터들의 결합체의 길이를 고려한 체결 구조물(713)의 길이("A")만큼 PCB으로부터 이격될 수밖에 없어, 불가피하게 사이즈가 증가하게 된다. 특히, 필터의 상/하부 면 모두에 blind mating connection을 적용하기 위해서는 매우 복잡한 하드웨어 구조(예컨대, 도 3에 예시된 필터 뱅크와 같이, 별도의 조립 케이스에 필터가 내장된 구조)가 필요하다.In the structure illustrated in FIG. 7, since each cavity filter is individually fastened to the PCB, assembly tolerances occur in RF characteristics due to the difference in the fastening force between the cavity filters. In addition, each cavity filter must be spaced apart from the PCB by the length (A) of the fastening structure 713 in consideration of the length of the assembly of the RF connectors, inevitably increases in size. In particular, in order to apply blind mating connection to both the upper and lower surfaces of the filter, a very complicated hardware structure (eg, a structure in which a filter is embedded in a separate assembly case such as the filter bank illustrated in FIG. 3) is required.
필터의 PCB 간의 RF 인터페이스RF interface between PCB of filter
도 8은 본 발명의 일 실시예에 따른 캐비티 필터의 구조를 도시한 사시도이다. 도 9는 본 발명의 일 실시예에 따른 캐비티 필터가 제1PCB 및 제2PCB에 연결된 구조를 설명하기 위한 단면도이다. 도 9에서는, 혼동을 피하기 위해, 캐비티 필터의 내부 구조를 생략하였음에 유의한다.8 is a perspective view showing the structure of a cavity filter according to an embodiment of the present invention. 9 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to an embodiment of the present invention. In Fig. 9, to avoid confusion, the internal structure of the cavity filter is omitted.
도 8에 도시된 바와 같이, 캐비티 필터는 제1입출력 포트(810) 및 제2입출력 포트(860)를 포함한다. 제1입출력 포트(810)는 캐비티 필터의 상부 면(예컨대, 커버)에 배치되며, 제2입출력 포트(860)는 캐비티 필터의 하부 면에 배치된다. 이들 입출력 포트들(810, 860)은 핀 구조물로 구성되어 있으며, 동축 커넥터와 같은 표준화된 RF 인터페이스와는 상이함에 유의하여야 한다.As shown in FIG. 8, the cavity filter includes a first input / output port 810 and a second input / output port 860. The first input and output port 810 is disposed on the upper surface (eg, cover) of the cavity filter, and the second input and output port 860 is disposed on the lower surface of the cavity filter. It should be noted that these input / output ports 810 and 860 are configured with a pin structure and are different from standardized RF interfaces such as coaxial connectors.
도 8을 참조하면, 제1입출력 포트(810)는 캐비티 필터의 상부 면에 형성된 개구부(opening section)에 삽입되는 핀 구조물로 구성된다. 핀 구조물은 전도성 핀(811) 및 절연 부시(insulating bush; 812)를 포함한다. 전도성 핀(811)은 절연 부시(812)를 관통하여 절연 부시(812)로부터 돌출되어 있다. 핀 구조물은 개구부에 삽입되어 개구부를 밀폐한다. 전도성 핀(811)의 일부분은 캐비티 필터의 상부 면으로부터 돌출된다. 또한, 캐비티 필터의 상부 면에는 제1PCB와 볼트에 의해 체결되는 복수의 체결홈(820a~820c)이 형성되어 있다.Referring to FIG. 8, the first input / output port 810 is configured as a fin structure inserted into an opening section formed on an upper surface of the cavity filter. The fin structure includes a conductive fin 811 and an insulating bush 812. The conductive pin 811 penetrates through the insulating bush 812 and protrudes from the insulating bush 812. The fin structure is inserted into the opening to seal the opening. A portion of the conductive pin 811 protrudes from the top surface of the cavity filter. In addition, a plurality of fastening grooves 820a to 820c fastened by the first PCB and the bolt are formed on the upper surface of the cavity filter.
도 9에 도시된 바와 같이, 캐비티 필터는 급전 네트워크(feeding network)가 형성된 제1PCB(420)의 하부 면에 밀착하여 결합한다. 제1PCB(420)에는 급전 네트워크와 연결된 복수의 도금 쓰루 홀(plated through hole; 920)이 형성되어 있다. 캐비티 필터는 전도성 핀(811)의 일부분이 제1PCB(420)에 형성된 쓰루 홀(820)에 삽입된 상태로 제1PCB(420)의 하부 면과 밀착하여 체결된다. 전도성 핀(811)과 쓰루 홀(920)의 접촉 부분에는 솔더링(soldering) 처리가 수행될 수 있다.As shown in FIG. 9, the cavity filter is tightly coupled to the bottom surface of the first PCB 420 in which a feeding network is formed. The first PCB 420 has a plurality of plated through holes 920 connected to the power feeding network. The cavity filter is fastened in close contact with the bottom surface of the first PCB 420 with a portion of the conductive pin 811 inserted into the through hole 820 formed in the first PCB 420. A soldering process may be performed on the contact portion between the conductive pin 811 and the through hole 920.
한편, 제2PCB(440)에는 다수의 RF IC 혹은 디지털 IC 등이 실장되므로, 이들 실장된 소자들의 손상을 막기 위해, 캐비티 필터가 일정 정도 이격된 채로 제2PCB(440)의 상부 면과 결합될 필요가 있다. 다시 도 8을 참조하면, 필터의 하부 면에는 높이 방향으로 돌출된 돌출부(850)에 개구부가 형성되어 있다. 전도성 핀(861)과 부시(862)가 결합된 핀 구조물(860)은 돌출부(850)에 형성된 개구부에 삽입되어 개구부를 밀폐한다. 또한, 개구부가 형성된 돌출부(850)에는 후술하는 제2PCB에 실장된 소켓(socket)을 수용하는 삽입부(851)가 형성되어 있다. 또한, 필터의 하부 면에는 제2PCB(440)에 형성된 구조물과 볼트에 의해 체결되는 체결홈(840)이 형성되어 있다.Meanwhile, since a plurality of RF ICs or digital ICs are mounted in the second PCB 440, in order to prevent damage to the mounted devices, the cavity filter needs to be coupled to the upper surface of the second PCB 440 at a predetermined distance. There is. Referring to FIG. 8 again, an opening is formed in the protrusion 850 protruding in the height direction on the lower surface of the filter. The fin structure 860 coupled with the conductive pin 861 and the bush 862 is inserted into an opening formed in the protrusion 850 to seal the opening. In addition, the protrusion 850 having the opening is formed with an insertion portion 851 for accommodating a socket mounted on a second PCB to be described later. In addition, the lower surface of the filter is formed with a fastening groove 840 is fastened by the structure and the bolt formed in the second PCB 440.
도 9를 참조하면, 캐비티 필터는 RF 회로가 형성된 제2PCB(440)의 상부 면에 결합한다. 제2PCB(440)의 상부 면에는 소켓(socket; 950)이 표면 실장되어(surface mounted) 있다. 소켓(950)은 캐비티 필터의 제2동축 핀(861)이 삽입되는 홀(hole)과 홀에 삽입된 전도성 핀(861)에 전기적으로 접촉하는 적어도 하나의 접촉 핀(951)을 구비한다. 캐비티 필터의 삽입부(851)에 소켓(950)이 수용되면, 소켓(950)의 홀에 전도성 핀(861)이 삽입된다. 캐비티 필터와 제2PCB(440)의 상부 면은 캐비티 필터의 하부 면에 형성된 돌출부(850)의 높이만큼 이격된다. 돌출부(850)의 높이는 제2PCB(440)의 상부 면에 실장되는 소자들의 크기를 고려하여 설계되며, 도 7의 RF 커넥터를 이용한 연결구조에 비해, 캐비티 필터와 제2PCB(440) 간에 이격 거리가 현저하게 감소한다.9, the cavity filter is coupled to the upper surface of the second PCB 440 on which the RF circuit is formed. A socket 950 is surface mounted on the top surface of the second PCB 440. The socket 950 includes a hole into which the second coaxial pin 861 of the cavity filter is inserted and at least one contact pin 951 electrically contacting the conductive pin 861 inserted into the hole. When the socket 950 is accommodated in the insertion portion 851 of the cavity filter, the conductive pin 861 is inserted into the hole of the socket 950. The upper surface of the cavity filter and the second PCB 440 is spaced apart by the height of the protrusion 850 formed on the lower surface of the cavity filter. The height of the protrusion 850 is designed in consideration of the size of the elements mounted on the upper surface of the second PCB 440, and the separation distance between the cavity filter and the second PCB 440 is lower than that of the connection structure using the RF connector of FIG. Decrease significantly.
도 10은 본 발명의 다른 실시예에 따른 캐비티 필터가 제1PCB 및 제2PCB에 연결된 구조를 설명하기 위한 단면도이다. 도 10에서는, 혼동을 피하기 위해, 캐비티 필터의 내부 구조를 생략하였음에 유의한다.10 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention. Note that in FIG. 10, the internal structure of the cavity filter is omitted to avoid confusion.
도 10을 참조하면, 제1입출력 포트는 캐비티 필터의 상부 면에 형성된 개구부(opening section)에 삽입되는 핀 구조물로 구성된다. 핀 구조물은 스프링 핀 커넥터(spring pin connector)와 절연 부시(1014)를 포함한다. 스프링 핀 커넥터는 절연 부시(1014)를 관통하여 절연 부시(1014)로부터 돌출된 원통의 도전성의 바렐(barrel; 1012), 바렐(1012)에 적어도 일부가 삽입된 도전성의 플런저(plunger; 1011), 및 바렐(1012) 내에 배치되어 플런저(1011)를 지지하는 스프링(1013)을 포함한다. 핀 구조물은 개구부에 삽입되어 개구부를 밀폐한다. 플런저(1011)의 일부분은 캐비티 필터의 상부 면으로부터 돌출되어 있으며, (예컨대, 제1PCB(420)에 밀착됨에 따라) 누르는 압력에 의해 원통의 바렐(1012) 내부로 밀려 들어가도록 구성된다.Referring to FIG. 10, the first input / output port is configured with a fin structure inserted into an opening section formed in an upper surface of the cavity filter. The pin structure includes a spring pin connector and an insulating bush 1014. The spring pin connector has a cylindrical conductive barrel 1012 which penetrates the insulating bush 1014 and protrudes from the insulating bush 1014, a conductive plunger 1011 at least partially inserted into the barrel 1012, And a spring 1013 disposed in the barrel 1012 to support the plunger 1011. The fin structure is inserted into the opening to seal the opening. A portion of the plunger 1011 protrudes from the top surface of the cavity filter and is configured to be pushed into the barrel barrel 1212 by pressing pressure (eg, as it adheres to the first PCB 420).
캐비티 필터는 급전 네트워크(feeding network)가 형성된 제1PCB(420)의 하부 면에 밀착하여 결합한다. 제1PCB(420)에는 급전 네트워크와 연결된 복수의 접촉 패드(contact pad; 미도시)가 형성되어 있다. 캐비티 필터는 플런저(1011)의 헤드가 제1PCB(420)에 형성된 상기 접촉 패드에 접촉된 채로 제1PCB(420)의 하부 면과 밀착하여 체결된다. 플런저(1011)의 일부분은 캐비티 필터의 상부면이 제1PCB(420)에 밀착됨에 따라 원통의 바렐(1012) 내부로 밀려 들어간다. 바렐(1012) 내부의 스프링(1013)은 플런저(1011)의 헤드와 접촉 패드 간에 적정한 접촉 압력을 제공한다. The cavity filter is tightly coupled to the bottom surface of the first PCB 420 in which a feeding network is formed. The first PCB 420 has a plurality of contact pads (not shown) connected to the power feeding network. The cavity filter is in close contact with the bottom surface of the first PCB 420 while the head of the plunger 1011 is in contact with the contact pad formed in the first PCB 420. A portion of the plunger 1011 is pushed into the barrel 1012 of the cylinder as the upper surface of the cavity filter is in close contact with the first PCB 420. A spring 1013 inside barrel 1012 provides a suitable contact pressure between the head of the plunger 1011 and the contact pad.
제1입출력 포트와 동일하게, 제2입출력 포트는 캐비티 필터의 상부 면에 형성된 개구부(opening section)에 삽입되는 핀 구조물로 구성된다. 핀 구조물은 스프링 핀 커넥터(spring pin connector)와 절연 부시(1054)를 포함한다. 스프링 핀 커넥터는 절연 부시(1054)를 관통하여 절연 부시(1054)로부터 돌출된 원통의 바렐(barrel; 1052), 바렐(1052)에 적어도 일부가 삽입된 플런저(plunger; 1051), 및 바렐(1052) 내에 배치되어 플런저(1051)를 지지하는 스프링(1053)을 포함한다. Like the first I / O port, the second I / O port consists of a fin structure inserted into an opening section formed in the upper surface of the cavity filter. The pin structure includes a spring pin connector and an insulating bush 1054. The spring pin connector has a cylindrical barrel 1052 protruding from the insulating bush 1054 through the insulating bush 1054, a plunger 1051 at least partially inserted into the barrel 1052, and a barrel 1052. ) And a spring 1053 disposed within and supporting the plunger 1051.
제2PCB(440)의 상부 면에는 소켓(socket; 1060)이 표면 실장되어(surface mounted) 있다. 소켓(1060)의 상부면에는 송수신회로와 전기적으로 연결된 접촉 패드(contact pad; 1061)가 형성되어 있다. 캐비티 필터는 제2입출력 포트의 플런저(1051)의 헤드가 제2PCB(440)에 형성된 접촉 패드(1061)에 접촉된 채로 제2PCB(440)과 결합된다. 도 10의 예시에서, 캐비티 필터와 제2PCB(440)의 상부 면은 제2PCB(440)에 실장된 소켓(1060)의 높이만큼 이격된다. 다른 일부 예시들에서, 도 8 및 도 9의 실시예와 유사하게, 필터의 하부 면에 높이 방향으로 돌출된 돌출부가 형성되고, 돌출부에 형성된 개구부에 스프링 핀 커넥터가 위치할 수 있다. 제2PCB(440)에 실장된 소켓의 적어도 일부분이 돌출부에 형성된 개구부에 삽입될 수 있다.A socket 1060 is surface mounted on the top surface of the second PCB 440. A contact pad 1061 is formed on the upper surface of the socket 1060 to be electrically connected to the transceiver circuit. The cavity filter is coupled with the second PCB 440 with the head of the plunger 1051 of the second input / output port being in contact with the contact pad 1061 formed in the second PCB 440. In the example of FIG. 10, the cavity filter and the top surface of the second PCB 440 are spaced apart by the height of the socket 1060 mounted in the second PCB 440. In some other examples, similar to the embodiment of FIGS. 8 and 9, a protrusion protruding in the height direction may be formed on the lower surface of the filter, and a spring pin connector may be located in the opening formed in the protrusion. At least a portion of the socket mounted on the second PCB 440 may be inserted into an opening formed in the protrusion.
도 11은 본 발명의 또 다른 실시예에 따른 캐비티 필터가 제1PCB 및 제2PCB에 연결된 구조를 설명하기 위한 단면도이다. 도 11에서도, 혼동을 피하기 위해, 캐비티 필터의 내부 구조를 생략하였음에 유의한다.FIG. 11 is a cross-sectional view illustrating a structure in which a cavity filter is connected to a first PCB and a second PCB according to another embodiment of the present invention. 11 also, the internal structure of the cavity filter is omitted in order to avoid confusion.
도 11을 참조하면, 제1입출력 포트는 캐비티 필터의 상부 면에 형성된 개구부(opening section)에 삽입되는 핀 구조물로 구성된다. 핀 구조물은 절연 부시(1113)와, 절연 부시(1113)를 관통하여 절연 부시(1113)로부터 돌출된 도전성 핀(conductive pin; 1111)과, 도전성 핀(1111)의 말단에 수직방향으로 고정된 도전성의 로드(conductive rod; 1112)를 포함한다. 도전성의 로드(1112)는 굴곡되어 말단이 필터의 상부 면으로부터 돌출되어 있다. 캐비티 필터는 급전 네트워크(feeding network)가 형성된 제1PCB(420)의 하부 면에 밀착하여 결합한다. 도 10의 실시예와 유사하게, 제1PCB(420)에는 급전 네트워크와 연결된 복수의 접촉 패드(contact pad; 미도시)가 형성되어 있다. 캐비티 필터는 도전성의 로드(1052)의 말단이 제1PCB(420)에 형성된 상기 접촉 패드에 접촉된 채로 제1PCB(420)의 하부 면과 밀착하여 체결된다. 도전성의 로드(1112)는 캐비티 필터의 상부면이 제1PCB(420)에 밀착됨에 따라 필터의 하부 측으로 휘어진다. 도전성의 로드(1112)는 접촉 패드와 적정한 접촉 압력을 제공할 수 있도록 탄성력을 가지는 것이 바람직하다. Referring to FIG. 11, the first input / output port includes a fin structure inserted into an opening section formed on an upper surface of the cavity filter. The fin structure includes an insulating bush 1113, a conductive pin 1111 penetrating through the insulating bush 1113, and protruding from the insulating bush 1113, and a conductive pin fixed perpendicularly to the distal end of the conductive pin 1111. A conductive rod 1112. The conductive rod 1112 is bent so that its ends protrude from the top surface of the filter. The cavity filter is tightly coupled to the bottom surface of the first PCB 420 in which a feeding network is formed. Similar to the embodiment of FIG. 10, the first PCB 420 is formed with a plurality of contact pads (not shown) connected to the power feeding network. The cavity filter is fastened in close contact with the bottom surface of the first PCB 420 with the end of the conductive rod 1052 being in contact with the contact pad formed in the first PCB 420. The conductive rod 1112 is bent to the lower side of the filter as the upper surface of the cavity filter is in close contact with the first PCB 420. The conductive rod 1112 preferably has an elastic force to provide an appropriate contact pressure with the contact pad.
제1입출력 포트와 동일하게, 제2입출력 포트는 캐비티 필터의 상부 면에 형성된 개구부(opening section)에 삽입되는 핀 구조물로 구성된다. 핀 구조물은 개구부에 삽입된 절연 부시(1153)와, 절연 부시(1153)를 관통하여 절연 부시(1153)로부터 돌출된 도전성 핀(conductive pin; 1151)과, 도전성 핀(1151)의 말단에 수직방향으로 고정된 도전성 로드(conductive rod; 1152)를 포함한다. 도전성 로드(1152)는 중간에 굴곡되어 말단이 필터의 하부 면으로부터 돌출되어 있다. Like the first I / O port, the second I / O port consists of a fin structure inserted into an opening section formed in the upper surface of the cavity filter. The fin structure includes an insulating bush 1153 inserted into the opening, a conductive pin 1151 penetrating through the insulating bush 1153, and protruding from the insulating bush 1153, and perpendicular to the ends of the conductive pin 1151. And a conductive rod 1152 fixed with a. The conductive rod 1152 is bent in the middle to protrude from the bottom surface of the filter.
도 10의 실시예와 유사하게, 제2PCB(440)의 상부 면에는 소켓(socket; 1160)이 표면 실장되어(surface mounted) 있다. 소켓(1160)의 상부면에는 송수신회로와 전기적으로 연결된 접촉 패드(contact pad; 1161)가 형성되어 있다. 캐비티 필터는 제2입출력 포트의 도전성 로드(1152)의 말단이 제2PCB(440)에 형성된 접촉 패드(1161)에 접촉된 채로 제2PCB(440)과 결합된다. 도 10의 예시에서, 캐비티 필터와 제2PCB(440)의 상부 면은 제2PCB(440)에 실장된 소켓(1160)의 높이만큼 이격된다. 다른 일부 예시들에서, 도 8 및 도 9의 실시예와 유사하게, 필터의 하부 면에 높이 방향으로 돌출된 돌출부가 형성되고, 돌출부에 형성된 개구부에 핀 구조물이 위치할 수 있다. 제2PCB(440)에 실장된 소켓의 적어도 일부분이 돌출부에 형성된 개구부에 삽입될 수 있다.Similar to the embodiment of FIG. 10, a socket 1160 is surface mounted on the top surface of the second PCB 440. A contact pad 1161 is formed on the upper surface of the socket 1160 to be electrically connected to the transceiver circuit. The cavity filter is coupled with the second PCB 440 with the end of the conductive rod 1152 of the second input / output port being in contact with the contact pad 1161 formed in the second PCB 440. In the example of FIG. 10, the cavity filter and the top surface of the second PCB 440 are spaced apart by the height of the socket 1160 mounted in the second PCB 440. In some other examples, similar to the embodiment of FIGS. 8 and 9, protrusions protruding in the height direction may be formed on the lower surface of the filter, and pin structures may be located in the openings formed in the protrusions. At least a portion of the socket mounted on the second PCB 440 may be inserted into an opening formed in the protrusion.
도 9 내지 도 11에 예시된 캐비티 필터의 제1 입출력 포트 및 제2 입출력포트의 구조들은 필요에 따라 조합되어 사용될 수 있음에 유의하여야 한다. 예컨대, 캐비티 필터는 도 9에 예시된 제1 입출력 포트의 구조를 가지는 동시에, 도 10 혹은 도 11에 예시된 제2 입출력 포트의 구조를 가질 수 있다.It should be noted that the structures of the first input / output port and the second input / output port of the cavity filter illustrated in FIGS. 9 to 11 may be used in combination as necessary. For example, the cavity filter may have a structure of a first input / output port illustrated in FIG. 9 and a structure of a second input / output port illustrated in FIG. 10 or 11.
푸시바(push bar)를Push bar 이용한 필터 결합 Filter combination
캐비티 필터들은 개별적으로 제1PCB(420)의 하부 면 및 제2PCB(440)의 상부 면에 조립될 수 있으나, 각 캐비티 필터 간의 체결력 차이로 인해 RF 특성에 큰 편차가 발생할 수 있다. 본 발명은 다수 개의 필터의 조립 시에 발생하는 조립 공차의 누적량을 최소화할 수 있는 조립 방식과 필터의 전기적 특성을 확보하기 위해 필요한 체결력을 균일하게 전달할 수 있는 구조를 제안한다.The cavity filters may be separately assembled to the lower surface of the first PCB 420 and the upper surface of the second PCB 440, but a large variation in RF characteristics may occur due to the fastening force difference between the cavity filters. The present invention proposes an assembly method capable of minimizing the accumulation amount of assembly tolerances generated when assembling a plurality of filters and a structure capable of uniformly transmitting the clamping force necessary to secure the electrical characteristics of the filter.
도 12는 본 발명의 일 실시예에 따른 필터 어셈블리들과, 푸시 바에 필터가 결합되는 부위를 확대한 확대도를 도시한 도면이다. 도 13은 본 발명의 일 실시예에 따른 필터 어셈블리들을 제1PCB에 조립한 상태를 도시한 도면이다.12 is an enlarged view illustrating an enlarged view of filter assemblies and a portion at which a filter is coupled to a push bar, according to an exemplary embodiment. FIG. 13 is a view illustrating a state in which filter assemblies are assembled in a first PCB according to an embodiment of the present invention.
도 12에 도시된 것처럼, 필터 어셈블리는 푸시 바(push bar; 1210)와 푸시 바(1210)에 일렬로 조립된 일단의 필터들을 포함한다. 필터에는 푸시 바(1210)를 수용하는 단차부(1250)가 형성된다. 단차부(1250)는 필터의 일측이 직각을 이루며 절단된 형상을 갖는다. 단차부(1250)에는 삽입돌기들(1251a, 1251b)과 볼트가 삽입되는 체결홀(1253)이 형성되어 있다. 이에 대응하여, 푸시 바(1210)에는 각 필터의 삽입돌기들(1251a, 1251b)이 삽입되는 삽입 홈들(미도시)이 형성되어 있으며, 삽입 홈들(미도시) 사이에는 각 캐비티 필터와 볼트에 의해 체결되는 복수의 체결홈(미도시)이 형성되어 있다.As shown in FIG. 12, the filter assembly includes a push bar 1210 and a set of filters assembled in line to the push bar 1210. The filter is formed with a step 1250 to receive the push bar 1210. The stepped part 1250 has a shape in which one side of the filter is cut at right angles. The stepped part 1250 is provided with fastening holes 1253 into which the insertion protrusions 1251a and 1251b and the bolt are inserted. Correspondingly, the push bars 1210 are formed with insertion grooves (not shown) into which the insertion protrusions 1251a and 1251b of each filter are inserted, and are inserted between the insertion grooves (not shown) by respective cavity filters and bolts. A plurality of fastening grooves (not shown) to be fastened are formed.
또한, 푸시 바(1210)에는 제1PCB에 형성된 삽입홀들(미도시)에 삽입되는 2 개 이상의 삽입돌기(1211a, 1211b)가 형성되어 있다. 푸시 바(1210)의 삽입돌기들(1211a, 1211b)이 제1PCB의 삽입홀들(미도시)에 삽입되면, 도 10에 예시된 것처럼, 푸시 바(1210)에 조립된 일단의 필터들의 도전성 핀들이 제1PCB에 형성된 쓰루 홀들에 삽입된다. 도 13에는 4개의 필터 어셈블리가 제1PCB에 조립된 예시적인 형상을 도시되어 있다.In addition, the push bar 1210 has two or more insertion protrusions 1211a and 1211b inserted into insertion holes (not shown) formed in the first PCB. When the insertion protrusions 1211a and 1211b of the push bar 1210 are inserted into the insertion holes (not shown) of the first PCB, the conductive pins of the group of filters assembled to the push bar 1210 as illustrated in FIG. 10. It is inserted into the through holes formed in the first PCB. 13 shows an exemplary shape in which four filter assemblies are assembled to a first PCB.
푸시 바(1210)의 양 끝단에는 제2PCB의 구조물과 볼트에 의해 체결되는 복수의 체결홀(1212a, 1212b)이 형성되어 있다. 푸시 바(1210)에 조립된 일단의 필터들의 돌출부에 형성된 삽입구에 제2PCB에 실장된 소켓이 수용되고, 소켓의 홀에 제2동축 핀이 삽입된 상태에서, 푸시 바(1210)는 제2PCB의 구조물과 볼트 결합되며, 푸시 바(1210)에 조립된 일단의 필터들에게 균일한 체결력을 제공할 수 있다. 푸시 바(1210)가 휘어진다면 각 필터에 균일한 하중 혹은 체결력을 전달하기 어렵기 때문에, 푸시 바(1210)는 일정 수준 이상의 강성을 가져야 한다. At both ends of the push bar 1210, a plurality of fastening holes 1212a and 1212b are formed to be fastened by the structure of the second PCB and the bolts. In a state where the socket mounted on the second PCB is accommodated in the insertion hole formed in the protrusion of the filters of the one end assembled in the push bar 1210, and the second coaxial pin is inserted into the hole of the socket, the push bar 1210 is connected to the second PCB. It is bolted to the structure and can provide a uniform clamping force to a group of filters assembled to the push bar 1210. If the push bar 1210 is bent, it is difficult to transfer a uniform load or clamping force to each filter, so the push bar 1210 should have a certain level or more of rigidity.
이렇게 푸시 바(1210)를 이용하여 필터를 PCB에 체결하는 방식은, 각 필터들을 PCB에 결합할 때의 공차 누적량을 최소화하고 공차량을 일관성 있게 조절되며, 안테나 및 RF 송수신회로와의 안정적인 Blind mating을 가능케 한다. 또한, 필터 체결 시 RF 특성 획득에 필요한 체결력을 얻기 위해, 필터에 개별적으로 소요되는 장치 및 조립 구조가 요구되지 않는다. 또한, 안테나 어셈블리의 조립 공정에 미리 조립된 "필터 어셈블리"를 사용한다면, 조립 공정의 단순화에도 안테나 어셈블리를 기여할 수 있다. The method of fastening the filter to the PCB by using the push bar 1210 minimizes the accumulation of tolerances when the filters are coupled to the PCB, adjusts the tolerances consistently, and provides stable blind mating with the antenna and the RF transceiver circuit. Makes it possible. In addition, in order to obtain a fastening force necessary for acquiring the RF characteristics when the filter is fastened, an apparatus and an assembly structure required for the filter are not required separately. In addition, if the " filter assembly " pre-assembled is used in the assembly process of the antenna assembly, the antenna assembly can also be contributed to simplifying the assembly process.
나아가, 본 발명이 제안하는 필터와 PCB들 간의 특유의 전기적인 연결을 위한 구조는 동축 커넥터나 RF 케이블링이 필요하지 않으며, 본 발명이 제안하는 PCB들과 필터 어셈블리 간의 특유의 체결 구조는 각 필터를 개별적으로 PCB들에 체결하는 대신에 푸시 바를 이용하여 필터들을 일괄적으로 PCB에 체결하는 바, 안테나 어셈블리나 필터 어셈블리를 손쉽게 분해할 수 있으며, 따라서 안테나 어셈블리를 설치하거나 운용하는 도중에 필요한 성능 테스트나 이상이 있는 안테나의 교체를 손쉽게 할 수 있다. Furthermore, the structure for the unique electrical connection between the filter and the PCB proposed by the present invention does not require a coaxial connector or RF cabling, and the unique fastening structure between the PCB and the filter assembly proposed by the present invention is a filter for each filter. Instead of fastening to the PCBs individually, the push bars can be used to fasten the filters to the PCB, allowing easy disassembly of the antenna assembly or filter assembly. It is easy to replace the faulty antenna.
2. 빔포밍 캘리브레이션(beamforming calibration)2. Beamforming Calibration
안테나에서 빔포밍(beamforming)을 제공하기 위해서는 Radio module에서의 각각의 TX 경로와 각각의 RX 경로에서의 진폭과 위상이 일정하게 유지되어야 하나, 실제의 Radio module에는 각각의 TX/RX 경로는 편차를 가지게 된다. 이러한 편차를 보상하는 작업을 Radio module에서의 빔포밍 캘리브레이션(beamforming calibration)이라 부른다. In order to provide beamforming in the antenna, the amplitude and phase of each TX path and each RX path in the Radio module must be kept constant. However, in the actual Radio module, each TX / RX path has a deviation. Have. Compensating for this deviation is called beamforming calibration in the radio module.
본 발명은 TDD(Time Division Duplex) 방식으로 동작하는 MIMO 안테나 시스템의 특성을 이용하여, 송신경로 캘리브레이션(TX calibration)과 수신경로 캘리브레이션(RX calibration)에서 동일한 RF 경로를 시간적으로 분할 공유하는 방식을 제안한다. The present invention proposes a method of temporally split-sharing the same RF path in TX and RX calibration using characteristics of a MIMO antenna system operating in a time division duplex (TDD) scheme. do.
TX 캘리브레이션에서는, 자기 송신신호를 이용하여 송신경로의 후단에서 캡쳐한 피드백 신호와 송신한 신호와의 상관(correlation) 연산을 기초로, 각 송신경로 간의 RF 특성(위상/진폭/지연 등) 편차를 측정하고, 측정된 편차를 보상하는 TX 캘리브레이션을 수행한다. 또한, 수신경로에 대해서는, 파일럿(Pilot) 신호를 각 수신경로에 삽입시켜, 수신경로의 후단에서 출력되는 신호와 파일럿 신호와의 상관 연산을 기초로 각 수신경로 간의 RF 특성(위상/진폭/지연 등) 편차를 측정하고, 측정된 편차를 보상하는 RX 캘리브레이션을 수행한다. 이러한 캘리브레이션 알고리즘 자체는 본원 출원인이 출원한 한국특허출원 제10-2015-0063177호(공개번호 제10-2016-0132166호)에 개시된 방식과 실질적으로 동일하다. 위 한국특허출원의 개시사항이 본 명세서에 참조로서 모두 원용된다.In TX calibration, the variation of RF characteristics (phase / amplitude / delay, etc.) between each transmission path is calculated based on a correlation calculation between the feedback signal captured at the rear end of the transmission path and the transmitted signal using the magnetic transmission signal. Measure and perform TX calibration to compensate for the measured deviation. In addition, for the reception path, a pilot signal is inserted into each reception path, and RF characteristics (phase / amplitude / delay) between the reception paths are based on a correlation operation between the pilot signal and the signal output at the rear end of the reception path. Etc.) Measure the deviation and perform an RX calibration that compensates for the measured deviation. This calibration algorithm itself is substantially the same as that disclosed in Korean Patent Application No. 10-2015-0063177 (Publication No. 10-2016-0132166) filed by the applicant. The disclosures of the above Korean patent applications are all incorporated herein by reference.
이하에서는, 도 14, 도 15a 및 도 15b를 참조하여, Massive MIMO 안테나 어셈블리의 예시적인 회로 구성 및 신호 연결을 설명하기로 한다.Hereinafter, an exemplary circuit configuration and signal connection of a massive MIMO antenna assembly will be described with reference to FIGS. 14, 15A, and 15B.
도 14는 본 발명에 따른 Massive MIMO 안테나 어셈블리의 기능을 도식화한 회로도이다. 도 14에 도시된 바와 같이, 제2PCB에는 기저대역 처리를 수행하는 디지털 프로세싱 회로, 복수의 송수신 모듈로 구분되는 아날로그 프로세싱 회로, 및 캘리브레이션 네트워크가 형성되어 있다. 각 송수신 모듈은 안테나 소자에 연결된 대역통과필터에 RF 인터페이스를 통해 연결된다. 전술한 바와 같이, 본 발명의 일 실시예에 따른 TX/RX 캘리브레이션은 필터 전단에 대해 수행한다. 이러한 방식은, 안테나 전단(즉, 필터 후단)에서 수행되는 구성에 비해, RF 송수신회로 등이 형성된 제2PCB 상의 여유공간을 활용하여 캘리브레이션 H/W(예컨대, 캘리브레이션 네트워크)를 구현할 수 있게 되고, 제2PCB에서의 복잡도와 연결(connection)을 줄여, 공간적인 이득과 재료비의 절감을 가져오게 된다.14 is a circuit diagram illustrating the function of a massive MIMO antenna assembly according to the present invention. As shown in FIG. 14, a digital processing circuit for performing baseband processing, an analog processing circuit divided into a plurality of transmission / reception modules, and a calibration network are formed in the second PCB. Each transmit / receive module is connected via an RF interface to a bandpass filter connected to an antenna element. As described above, TX / RX calibration according to one embodiment of the present invention is performed on the filter front end. In this manner, compared to the configuration performed at the front end of the antenna (that is, the rear end of the filter), a calibration H / W (eg, a calibration network) can be realized by utilizing a free space on the second PCB on which the RF transceiver circuit and the like are formed. The complexity and connection at 2PCB is reduced, resulting in spatial gain and material cost savings.
도 15a는 RF IC와 RF 소자들 사이에 SPDT 스위치가 존재하지 않는 송수신 모듈을 도시한 도면이고, 도 15b는 RF IC와 RF 소자들 사이에 SPDT 스위치가 존재하는 송수신 모듈을 도시한 도면이다. FIG. 15A illustrates a transmission / reception module in which no SPDT switch exists between the RF IC and the RF devices, and FIG. 15B illustrates a transmission / reception module in which an SPDT switch exists between the RF IC and the RF devices.
도 15a를 참조하면, 각 송수신 모듈은 대응되는 안테나 소자에 대한 송신경로 및 수신 경로를 제공하는 복수의 RF 소자들과 RF IC를 포함한다.Referring to FIG. 15A, each transmit / receive module includes a plurality of RF elements and an RF IC for providing a transmission path and a reception path for a corresponding antenna element.
RF IC는 디지털 프로세싱 회로로부터 수신되는 기저대역(base band)의 디지털 송신신호를 송신 주파수로 상향 변환하는 상향 컨버터(up converter)와, 상향 변환된 디지털 송신신호를 아날로그 RF 송신신호로 변환하는 D/A 컨버터를 포함할 수 있다. 상향 컨버터와 D/A 컨버터는 송신경로의 일부를 형성한다. 또한, RF IC는 아날로그 RF 수신신호를 디지털 수신신호로 변환하는 A/D 컨버터와, 디지털 수신신호를 기저대역의 디지털 수신신호로 변환하는 하향 컨버터(down converter)를 포함할 수 있다. A/D 컨버터와 하향 컨버터는 수신경로의 일부를 형성한다. RF 다운 컨버터는 수신되는 수신 신호를 기저대역으로 하향 변환하며, A/D 컨버터는 기저대역 신호를 디지털 신호로 변환한다. 기저대역의 디지털 신호는 디지털 프로세싱 회로로 전송된다.The RF IC includes an up converter for up-converting a baseband digital transmission signal received from a digital processing circuit to a transmission frequency and a D / conversion for converting the up-converted digital transmission signal into an analog RF transmission signal. A converter may be included. The up converter and the D / A converter form part of the transmission path. In addition, the RF IC may include an A / D converter that converts an analog RF received signal into a digital received signal, and a down converter that converts the digital received signal into a baseband digital received signal. The A / D converter and the down converter form part of the reception path. The RF down converter down converts the received received signal to baseband, and the A / D converter converts the baseband signal into a digital signal. The baseband digital signal is sent to a digital processing circuit.
각 송신경로는 파워 증폭기(Power Amplifier; PA), 서큘레이터(circulator) 및 방향성 커플러(directional coupler)를 더 포함한다. 각 수신 경로는 저잡음 증폭기(Low Noise Amplifier: LNA)를 더 포함한다. 송신경로와 수신경로의 접속부분에 서큘레이터(circulator)가 설치된다. 필터측으로부터 서큘레이터로 입력되는 수신신호(즉, 업링크 RF 신호)는 서큘레이터를 거쳐 LNA로 전송된다. 또한, 파워 증폭기로부터 서큘레이터로 입력되는 송신신호(다운링크 RF 신호)는 필터 측으로 전송된다. 서큘레이터의 LNA 사이에는 TDD 스위치로 기능하는 SPDT 스위치가 포함된다. SPDT 스위치의 한 쪽 단자는 VSWR(Voltage Standing Wave Ratio) 특성 변화를 최소화하기 위해 종단 저항이 연결되어 있다. 송수신모듈이 송신모드로 동작할 때(즉, 하향링크 시간 구간에서) SPDT 스위치는 서큘레이터를 종단 저항에 연결한다. 송수신모듈이 수신모드로 동작할 때(즉, 상향링크 시간 구간에서), SPDT 스위치는 서큘레이터를 LNA에 연결한다.Each transmission path further includes a power amplifier (PA), a circulator and a directional coupler. Each receive path further includes a low noise amplifier (LNA). A circulator is installed at the connection portion between the transmission path and the reception path. The received signal (that is, the uplink RF signal) input from the filter side to the circulator is transmitted to the LNA via the circulator. In addition, a transmission signal (downlink RF signal) input from the power amplifier to the circulator is transmitted to the filter side. Between the LNAs of the circulators are included SPDT switches that function as TDD switches. One terminal of the SPDT switch is connected with a terminating resistor to minimize changes in Voltage Standing Wave Ratio (VSWR) characteristics. When the transmit / receive module operates in transmit mode (ie, in the downlink time interval), the SPDT switch connects the circulator to the terminating resistor. When the transmit / receive module operates in the receive mode (ie, in the uplink time interval), the SPDT switch connects the circulator to the LNA.
도 15b에 도시된 바와 같이, 복수의 송수신 모듈 중에서, 특정 송수신 모듈의 송신경로(TX0)에는, 나머지 송수신 모듈의 송신경로와 달리, 파워 증폭기 전단에 SPDT 스위치(1510)가 더 포함되어 있다. 유사하게, 특정 송수신 모듈의 수신경로(RX1)에는, 나머지 송수신 모듈의 수신경로와 달리, 저잡음 증폭기(LNA) 후단에 SPDT 스위치(1560)가 더 포함되어 있다.As shown in FIG. 15B, unlike the transmission paths of the other transmission / reception modules, the SPDT switch 1510 is further included in the transmission path TX0 of the specific transmission / reception module. Similarly, unlike the reception paths of the other transmission / reception modules, the reception path RX1 of the specific transmission / reception module further includes an SPDT switch 1560 after the low noise amplifier (LNA).
캘리브레이션 네트워크(이를 '매트릭스 스위치'라 지칭할 수 있다)는 트리 구조를 취하는 복수의 스위치들로 구성된다. 최상위 스위치(SPDT)는 복수의 송신경로 중에서 특정 송신경로에 포함된 SPDT 스위치(1510)와 연결되며, 또한 복수의 수신경로 중에서 특정 수신경로에 포함된 SPDT 스위치(1560)와 연결된다. 최하위 스위치들(SP4T)은 복수의 송신 경로 상의 파워 증폭기 후단에 위치한 방향성 RF 커플러와 연결된 SPDT 스위치에 연결된다. 캘리브레이션 네트워크에 포함된 스위치들의 선택적인 스위칭에 의해, 각 송신경로 및 각 수신경로를 선택된다.The calibration network (which may be referred to as a 'matrix switch') consists of a plurality of switches that take a tree structure. The highest switch SPDT is connected to the SPDT switch 1510 included in the specific transmission path among the plurality of transmission paths, and is also connected to the SPDT switch 1560 included in the specific reception path among the plurality of reception paths. The lowest switches SP4T are connected to an SPDT switch connected to a directional RF coupler located at the rear of the power amplifier on the plurality of transmission paths. By selective switching of the switches included in the calibration network, each transmission path and each reception path is selected.
이하에서는 본 발명이 제안하는 TDD 방식에서의 TX/RX 캘리브레이션 적용시 신호 흐름을 상세히 설명한다.Hereinafter, the signal flow in the TX / RX calibration application in the TDD scheme proposed by the present invention will be described in detail.
TX 캘리브레이션TX calibration
도 16는 TX 캘리브레이션에서 신호 흐름을 설명하기 위한 도면이다. 16 is a diagram for explaining signal flow in TX calibration.
도 16에는 송신경로 TX0과 TX1에 대한 TX 캘리브레이션을 수행하는 경우에, 신호흐름이 굵은 선으로 표시되어 있다. 도 16에서, "CAL #0, CAL #1, CAL #2 ... "은 각 송신경로의 파워 증폭기 후단에 커플링된 방향성 커플러에 의해 캡쳐된 송신신호를 지칭한다. 또한, "TX CAL" 역시 상기 캡쳐된 송신신호를 지칭하는 것이나, 송수신회로와 캘리브레이션 네트워크 간의 신호흐름 및 연결관계를 설명하기 위해, 편의상, 캘리브레이션 네트워크의 최상위 스위치에서 출력되는 "캡쳐된 송신신호"를 "TX CAL"로 표기하였다.In FIG. 16, when the TX calibration is performed for the transmission paths TX0 and TX1, the signal flow is indicated by a thick line. In Figure 16, "CAL # 0, CAL # 1, CAL # 2 ..." refers to the transmission signal captured by the directional coupler coupled to the rear end of the power amplifier of each transmission path. In addition, "TX CAL" also refers to the captured transmission signal, for convenience, to describe the signal flow and connection relationship between the transmission and reception circuit and the calibration network, for convenience, the "captured transmission signal" output from the top switch of the calibration network It is indicated as "TX CAL".
RFIC로부터 각 송신경로로 전달된 아날로그 RF 신호(즉, 송신신호)는 파워 증폭기 후단의 방향성 커플러(directional coupler)에 의해 캡쳐된다. 예컨대, 송신경로 TX0로 전달된 아날로그 RF 신호는 방향성 커플러에 의해 캡쳐되고, 캡쳐된 신호(CAL#0)는 캘리브레이션 네트워크의 최하위 스위치로 입력된다. 이때, 수신경로 RX1의 LNA는 OFF 상태이다. 마찬가지로, 송신경로 TX1로 전달된 다운링크 RF신호는 파워 증폭기 후단의 방향성 커플러에 의해 캡쳐되고, 캡쳐된 신호(CAL#1)는 캘리브레이션 네트워크의 최하위 스위치로 입력된다. 캡쳐된 신호(CAL#1)는 캘리브레이션 네트워크의 최상위 스위치를 통해, 특정 수신경로(RX1) 상에 위치한 SPDT 스위치(1560)를 통해 RF IC에 전달된다.The analog RF signal (i.e., transmit signal) transmitted from the RFIC to each transmission path is captured by a directional coupler behind the power amplifier. For example, the analog RF signal transmitted to the transmission path TX0 is captured by the directional coupler, and the captured signal CAL # 0 is input to the lowest switch of the calibration network. At this time, the LNA of the reception path RX1 is OFF. Similarly, the downlink RF signal transmitted to the transmission path TX1 is captured by the directional coupler behind the power amplifier, and the captured signal CAL # 1 is input to the lowest switch of the calibration network. The captured signal CAL # 1 is transmitted to the RF IC through the SPDT switch 1560 located on the specific receive path RX1 through the top switch of the calibration network.
캡쳐된 신호는 RF IC에 구비된, 상기 특정 수신경로(RX1)를 위한 A/D 컨버터 및 하향 컨버터를 거친 후, 대응되는 원래의 송신신호와 상관(correlation) 연산이 적용되어 캘리브레이션에 사용된다. 구체적인 TX 캘리브레이션 알고리즘은 한국특허출원 제10-2015-0063177호(공개번호 제10-2016-0132166호)에 개시된 방식과 실질적으로 동일하다.The captured signal passes through an A / D converter and a down converter for the specific reception path RX1, which is included in the RF IC, and then a correlation operation with a corresponding original transmission signal is applied and used for calibration. The specific TX calibration algorithm is substantially the same as that disclosed in Korean Patent Application No. 10-2015-0063177 (Publication No. 10-2016-0132166).
RX 캘리브레이션RX calibration
TDD 방식의 경우, 송신경로가 ON일 때(즉, 하향링크 시간 구간에서) 수신경로가 OFF 상태를 유지해야 하므로, 수신경로가 ON 상태에서(즉, 상향링크 시간 구간에서) RX 캘리브레이션을 수행해야 한다.In the case of the TDD scheme, when the transmission path is ON (i.e., in the downlink time interval), the reception path must be kept in the OFF state. do.
캘리브레이션을 수행하는 RU(Radio Unit)는 수신신호에 대한 정보가 없기 때문에, 수신 경로들의 지연, 위상, 이득 등의 RF 특성을 파악하기 위한 파일럿(Pilot) 신호를 삽입하는 방식을 사용한다. 파일럿 신호는 RX 대역 내(in-band) 또는 대역 외(out-of-band)에 삽입될 수 있다. 다만 각 수신 경로의 주신호(main signal)가 수신되는 도중에도 실시간으로 정확히 진폭과 위상을 검출하기 위해서는 파일럿 신호를 대역 내에 삽입하는 것이 더 적절하다. 여기서, '대역 내(in-band)'에 삽입된다는 의미는 업링크 RF 신호를 수신하기 위해 허용된 주파수 대역에서, 업링크 RF 신호를 송수신하기 위해 실제로 사용하는 대역 이외 부분에 삽입된다는 의미이다.Since the RU (Calibration Unit) performing the calibration has no information on the received signal, a RU (Pilot) signal is inserted to determine RF characteristics such as delay, phase, and gain of the reception paths. The pilot signal may be inserted in-band or out-of-band in the RX band. However, it is more appropriate to insert a pilot signal into a band in order to accurately detect amplitude and phase in real time even while the main signal of each reception path is received. Herein, 'inserted in-band' means that the frequency band allowed for receiving the uplink RF signal is inserted outside the band actually used for transmitting and receiving the uplink RF signal.
삽입된 파일럿 신호는 디지털 영역에서 디지털 필터에 의해 제거되므로 수신모뎀 성능에는 영향을 주지 않는다. 또한, 본 발명에 따른 Massive MIMO 안테나 시스템의 경우, RX 필터 출력단에 파일럿 신호를 삽입하는데, RX 필터가 파일럿 신호를 제거해 준다면 안테나 소자에 의해 파일럿 신호의 방사가 일어나지 않게 된다. 따라서, On-service 캘리브레이션, 즉 안테나 시스템이 운영되는 동안 실시간으로 캘리브레이션을 수행할 수 있다.The inserted pilot signal is removed by the digital filter in the digital domain, so it does not affect the reception modem performance. In the case of the Massive MIMO antenna system according to the present invention, the pilot signal is inserted into the RX filter output terminal. If the RX filter removes the pilot signal, the pilot element does not emit radiation by the antenna element. Therefore, on-service calibration, that is, calibration can be performed in real time while the antenna system is operating.
도 17은 RX 캘리브레이션에서 신호 흐름을 설명하기 위한 도면이다. 17 is a diagram for explaining signal flow in RX calibration.
도 17에는 수신경로 RX0과 RX1에 대한 RF 캘리브레이션을 수행하는 경우에, 신호흐름이 굵은 선으로 표시되어 있다. 도 17에서, RX CAL, CAL #0, CAL #1, CAL #2 ... 은 모두 RX 캘리브레이션에 사용되는 파일럿 신호를 지칭하는 것이다. 다만, 송수신회로와 캘리브레이션 네트워크 간의 신호흐름 및 연결관계를 설명하기 위해, 편의상, RFIC로부터 송수신회로로 전달되는 파일럿 신호를 "RX CAL"로 표기하고, 캘리브레이션 네트워크의 최하위 스위치에서 출력되는 파일럿 신호를 "CAL #0, CAL #1, CAL #2 ... "로 표기하였다.In FIG. 17, when RF calibration is performed for the reception paths RX0 and RX1, the signal flow is indicated by a thick line. In FIG. 17, RX CAL, CAL # 0, CAL # 1, CAL # 2 ... all refer to pilot signals used for RX calibration. However, in order to explain the signal flow and the connection relationship between the transceiver circuit and the calibration network, for convenience, the pilot signal transmitted from the RFIC to the transceiver circuit is denoted as "RX CAL", and the pilot signal output from the lowest switch of the calibration network is " CAL # 0, CAL # 1, CAL # 2 ... ".
도 17을 참조하면, 각 수신경로의 교정에 사용되는 파일럿 신호("RX CAL")는 RFIC로부터 특정 송신경로(TX0)에 입력된다. 특정 송신경로(TX0)에 입력된 파일럿 신호("RX CAL")는 파워 증폭기 전단에 위치한 SPDT 스위치(1360)를 통해 캘리브레이션 네트워크의 최상위 스위치로 전달된다. 캘리브레이션 네트워크에 포함된 스위치들에 의해 파일럿 신호가 삽입될 수신경로가 선택된다. 파일럿 신호는, 선택된 수신경로 상에 위치한 방향성 커플러에 의해, 수신신호가 전달되고 있는 수신경로에 삽입되고, 최종적으로 선택된 수신경로에 대응되는 RFIC로 전달된다. 예컨대, 수신경로 RX0의 경우, 파일럿 신호("CAL #0")는 수신신호와 함께 서큘레이터, SPDT 스위치 및 LNA를 거쳐 RF IC에 전달된다. 또한, 수신경로 RX1의 경우, 파일럿 신호("CAL #1")는 수신신호와 함께 서큘레이터, SPDT 스위치 및 LNA를 거쳐 RF IC에 전달된다.Referring to FIG. 17, a pilot signal "RX CAL" used to calibrate each reception path is input to a specific transmission path TX0 from an RFIC. The pilot signal " RX CAL " input to the specific transmission path TX0 is transmitted to the top switch of the calibration network through the SPDT switch 1360 located in front of the power amplifier. The reception paths to which the pilot signal is inserted are selected by the switches included in the calibration network. The pilot signal is inserted into the reception path through which the received signal is transmitted by the directional coupler located on the selected reception path, and finally delivered to the RFIC corresponding to the selected reception path. For example, in the case of the reception path RX0, the pilot signal "CAL # 0" is transmitted to the RF IC through the circulator, the SPDT switch and the LNA along with the reception signal. In addition, in the case of the reception path RX1, the pilot signal ("CAL # 1") is transmitted to the RF IC through the circulator, the SPDT switch and the LNA along with the received signal.
수신신호와 함께 파일럿 신호는 각 RF IC에 구비된 해당 수신 경로를 위한 A/D 컨버터 및 하향 컨버터를 거친 후, 디지털 필터를 통해 수신신호로부터 분리된다. 분리된 파일럿 신호는 특정 송신경로(TX0)에 입력된 파일럿 신호("RX CAL")와 상관(Correlation) 연산이 적용되어 캘리브레이션에 사용된다. 구체적인 RX 캘리브레이션 알고리즘은 한국특허출원 제10-2015-0063177호(공개번호 제10-2016-0132166호)에 개시된 방식과 실질적으로 동일하다.The pilot signal together with the received signal passes through an A / D converter and a down converter for the corresponding receive path provided in each RF IC, and is then separated from the received signal through a digital filter. The separated pilot signal is used for calibration by applying a correlation operation to the pilot signal "RX CAL" input to a specific transmission path TX0. The specific RX calibration algorithm is substantially the same as that disclosed in Korean Patent Application No. 10-2015-0063177 (Publication No. 10-2016-0132166).
이상과 같이, 본 발명이 제안하는 캘리브레이션 방법은 TDD(Time Division Duplex) 안테나에서 운영되는 동안 실시간으로 캘리브레이션을 수행할 수 있다. 또한, 하나의 캘리브레이션 H/W구성으로 TX/RX 캘리브레이션을 수행하며, 안테나 시스템이 운영되는 동안 실시간으로 캘리브레이션을 수행할 수 있다. 또한, 송신신호 및 수신신호를 위한 상향 컨버터나 하향 컨버터 외에, TX 캘리브레이션과 RX 캘리브레이션 수행을 위한 별도의 상향 컨버터나 하향 컨버터가 필요하지 않게 된다. 즉, 특정 수신경로의 수신신호를 위한 하향 컨버터가 캡쳐된 송신신호의 하향 변환에 사용되며, 특정 송신경로의 송신신호를 위한 상향 컨버터가 각 수신경로에 삽입될 파일럿 신호의 상향 변환에 사용된다.As described above, the calibration method proposed by the present invention can perform calibration in real time while operating in a time division duplex (TDD) antenna. In addition, it performs TX / RX calibration with one calibration H / W configuration and can perform calibration in real time while the antenna system is operating. Further, in addition to the up converter or the down converter for the transmission signal and the reception signal, there is no need for a separate up converter or down converter for performing TX calibration and RX calibration. That is, a down converter for a reception signal of a specific reception path is used for down conversion of a captured transmission signal, and an up converter for a transmission signal of a specific transmission path is used for up conversion of a pilot signal to be inserted into each reception path.
도 18은 필터들과 안테나 피더 라인(feeder line)들의 고정된 위상편차를 설명하기 위한 도면이다. 전술한 바와 같이, 전술한 실시예들에서, 캘리브레이션 기능이, 안테나 소자의 전단이 아닌, 필터의 전단(즉, 파워 증폭기의 출력단)에 적용되었다. 즉, 필터의 전단에서 자기 송신신호가 캡쳐되고, 필터의 전단에 파일럿 신호가 삽입되었다. 따라서, 도 18에 표시된 것과 같이, 각 필터들과 안테나 피더 라인(feeder line)들의 고정된 RF 편차(특히, 위상 편차)는 실시간 편차 측정에서 제외될 수밖에 없다. 이에, 일부 실시예들에서는, 각 필터들과 안테나 피더 라인들의 고정된 RF 편차를 보상하기 위해, 사전에 측정된 이들 고정된 RF 편차를 실시간으로 측정되는 각 송신경로 및 각 수신경로의 편차에 오프셋(offset) 값으로 포함시켜 캘리브레이션을 수행한다. 즉, 사전에 측정된 복수의 대역통과필터들과 안테나 피더 라인(feeder line)들의 RF 편차를 각 송신경로 간의 편차에 오프셋 값으로 포함시킨 후 각 송신경로에 대한 캘리브레이션을 수행할 수 있다. 또한, 사전에 측정된 복수의 대역통과필터들과 안테나 피더 라인들의 RF 편차를 각 수신경로 간의 편차에 오프셋 값으로 포함시킨 후 각 수신경로에 대한 캘리브레이션을 수행할 수 있다. 필터와 안테나 피더 라인으로 인해 발생하는 위상 편차는, 고정된 위상 편차를 갖는 필터들을 생산/사용함으로써, 허용가능한 수준에서 관리할 수 있다는 점에 유의한다. FIG. 18 is a diagram for explaining a fixed phase deviation of filters and antenna feeder lines. As described above, in the above embodiments, the calibration function was applied to the front end of the filter (ie, the output stage of the power amplifier), not to the front end of the antenna element. That is, a magnetic transmission signal was captured at the front of the filter, and a pilot signal was inserted at the front of the filter. Thus, as shown in FIG. 18, the fixed RF deviation (especially phase deviation) of each filter and antenna feeder lines is inevitably excluded from the real time deviation measurement. Thus, in some embodiments, in order to compensate for fixed RF deviations of the respective filters and antenna feeder lines, these previously measured fixed RF deviations are offset in each transmission path and each receiving path deviation measured in real time. Calibration is performed by including (offset) value. That is, after the RF deviations of the plurality of previously measured band pass filters and the antenna feeder lines are included as offset values in the deviations between the transmission paths, calibration of each transmission path may be performed. In addition, after the RF deviations of the plurality of previously measured band pass filters and the antenna feeder lines are included as offset values in the deviations between the reception paths, calibration of each reception path may be performed. Note that the phase deviation caused by the filter and antenna feeder lines can be managed at an acceptable level by producing / using filters with a fixed phase deviation.
덧붙여, 이상의 실시예들에서는 캘리브레이션이 필터 전단에 적용되는 것을 가정하여 설명하였지만, 본 발명이 제안하는 캘리브레이션 방법은 안테나 전단에 적용되는 구조 즉, 캘리브레이션 네트워크의 최하위 스위치들이 안테나 전단에 커플링되는 구조에도 적용가능하다.In addition, although the above embodiments have been described assuming that the calibration is applied to the front end of the filter, the calibration method proposed by the present invention also applies to the structure applied to the front end of the antenna, that is, the structure in which the lowest switches of the calibration network are coupled to the front end of the antenna. Applicable.
이상의 설명은 본 실시예의 기술 사상을 예시적으로 설명한 것에 불과한 것으로서, 본 실시예가 속하는 기술 분야에서 통상의 지식을 가진 자라면 본 실시예의 본질적인 특성에서 벗어나지 않는 범위에서 다양한 수정 및 변형이 가능할 것이다. 따라서, 본 실시예들은 본 실시예의 기술 사상을 한정하기 위한 것이 아니라 설명하기 위한 것이고, 이러한 실시예에 의하여 본 실시예의 기술 사상의 범위가 한정되는 것은 아니다. 본 실시예의 보호 범위는 아래의 청구범위에 의하여 해석되어야 하며, 그와 동등한 범위 내에 있는 모든 기술 사상은 본 실시예의 권리범위에 포함되는 것으로 해석되어야 할 것이다.The above description is merely illustrative of the technical idea of the present embodiment, and those skilled in the art to which the present embodiment belongs may make various modifications and changes without departing from the essential characteristics of the present embodiment. Therefore, the present embodiments are not intended to limit the technical idea of the present embodiment but to describe the present invention, and the scope of the technical idea of the present embodiment is not limited by these embodiments. The scope of protection of the present embodiment should be interpreted by the following claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present embodiment.
CROSS-REFERENCE TO RELATED APPLICATIONCROSS-REFERENCE TO RELATED APPLICATION
본 특허출원은, 본 명세서에 그 전체가 참고로서 포함되는, 2016년 11월 16일 한국에 출원한 특허출원번호 제10-2016-0152609호, 2017년 03월 06일 한국에 출원한 특허출원번호 제10-2017-0028430호, 2017년 03월 06일 한국에 출원한 특허출원번호 제10-2017-0028434호, 및 2017년 03월 06일 한국에 출원한 특허출원번호 제10-2017-0028442호에 대해 우선권을 주장한다.This patent application is incorporated herein by reference in its entirety, the patent application number No. 10-2016-0152609 filed in Korea on November 16, 2016, and the patent application number filed in Korea on March 06, 2017. 10-2017-0028430, Patent Application No. 10-2017-0028434, filed in Korea on March 06, 2017, and Patent Application No. 10-2017-0028442, filed in Korea on March 06, 2017 Insist on priority.

Claims (20)

  1. 레이돔;Radome;
    배면에 히트싱크가 형성된 하우징; 및A housing having a heat sink formed on a rear surface thereof; And
    상기 레이돔과 상기 하우징 사이에 내장된 적층 구조의 안테나 어셈블리를 포함하는 MIMO 안테나 시스템으로서, 상기 안테나 어셈블리는,A MIMO antenna system comprising an antenna assembly of a laminated structure embedded between the radome and the housing, wherein the antenna assembly,
    급전 네트워크(Feeding network)가 형성된 제1인쇄회로기판(Printed Circuit Board; PCB);A first printed circuit board (PCB) on which a feeding network is formed;
    상기 제1인쇄회로기판의 상기 레이돔에 대향하는 상부 면에 설치되고 상기 급전 네트워크에 전기적으로 연결된 복수의 안테나 소자;A plurality of antenna elements installed on an upper surface of the first printed circuit board facing the radome and electrically connected to the feed network;
    상기 제1인쇄회로기판의 하부 면에 배치되고 상기 급전 네트워크에 전기적으로 연결된 복수의 대역통과필터를 포함하는 필터 어셈블리; 및A filter assembly disposed on a lower surface of the first printed circuit board and including a plurality of band pass filters electrically connected to the feed network; And
    상기 하우징에 대면하여 배치된 제2인쇄회로기판으로서, 상기 복수의 대역통과필터와 전기적으로 연결된 복수의 송수신회로가 형성된 제2인쇄회로기판A second printed circuit board disposed to face the housing, the second printed circuit board having a plurality of transmission / reception circuits electrically connected to the plurality of band pass filters;
    을 포함하는, MIMO 안테나 시스템.Including, MIMO antenna system.
  2. 제1항에 있어서,The method of claim 1,
    상기 제2인쇄회로기판에는,In the second printed circuit board,
    상기 복수의 송수신회로와 전기적으로 연결되어 기저대역 신호의 디지털 프로세싱을 수행하는 디지털 회로가 추가로 형성되어 있는 것을 특징으로 하는, MIMO 안테나 시스템.And a digital circuit electrically connected to the plurality of transmission / reception circuits to perform digital processing of a baseband signal.
  3. 제1항에 있어서,The method of claim 1,
    상기 복수의 대역통과필터는 상기 제1인쇄회로기판에 밀착하여 체결된 것을 특징으로 하는, MIMO 안테나 시스템.The plurality of band pass filters are in close contact with the first printed circuit board, characterized in that the MIMO antenna system.
  4. 제1항에 있어서,The method of claim 1,
    각 대역통과필터는 RF 케이블링 없이 상기 급전 네트워크와 직접 연결되는 제1포트를 구비한 것을 특징으로 하는, MIMO 안테나 시스템.Each bandpass filter has a first port directly connected to said feed network without RF cabling.
  5. 제4항에 있어서,The method of claim 4, wherein
    상기 제1인쇄회로기판에는 상기 급전 네트워크에 전기적으로 연결된 복수의 쓰루 홀(Through hole)이 형성되어 있으며, The first printed circuit board has a plurality of through holes electrically connected to the feed network,
    각 대역통과필터의 제1포트는 내부의 중공(cavity)으로부터 연장되어 상부 면으로부터 돌출된 도전성의 핀(pin)을 구비하고, 각 대역통과필터는 상기 도전성의 핀의 일부분이 상기 제1인쇄회로기판에 형성된 상기 쓰루 홀에 삽입된 채로 상기 제1인쇄회로기판에 밀착 체결된 것을 특징으로 하는, MIMO 안테나 시스템.The first port of each bandpass filter has conductive pins extending from an interior cavity and protruding from an upper surface thereof, and each bandpass filter has a portion of the conductive pins of the first printed circuit. And being in close contact with the first printed circuit board while being inserted into the through hole formed in the substrate.
  6. 제4항에 있어서,The method of claim 4, wherein
    상기 제1인쇄회로기판에는 상기 급전 네트워크와 연결된 복수의 접촉 패드(contact pad)가 형성되어 있으며, The first printed circuit board includes a plurality of contact pads connected to the power supply network.
    각 대역통과필터의 제1포트는 내부의 중공(cavity)에 전기적으로 연결되고 상부 면으로부터 돌출된 도전성의 플런저(plunger)를 구비하고, 각 대역통과필터는 상기 도전성의 플런저의 일부분이 상기 제1인쇄회로기판에 형성된 상기 접촉 패드에 접촉한 채로 상기 제1인쇄회로기판에 밀착 체결된 것을 특징으로 하는, MIMO 안테나 시스템.The first port of each bandpass filter includes a conductive plunger electrically connected to an interior cavity and protruding from an upper surface, wherein each bandpass filter has a portion of the conductive plunger being the first port. And being in close contact with the first printed circuit board while being in contact with the contact pad formed on the printed circuit board.
  7. 제4항에 있어서,The method of claim 4, wherein
    상기 제1인쇄회로기판에는 상기 급전 네트워크와 연결된 복수의 접촉 패드(contact pad)가 형성되어 있으며, The first printed circuit board includes a plurality of contact pads connected to the power supply network.
    각 대역통과필터의 제1포트는 내부의 중공(cavity)으로부터 연장되어 상부 면으로부터 돌출된 도전성 핀(conductive pin) 및 상기 도전성 핀의 말단에 수직방향으로 고정된 도전성 로드(conductive rod)를 구비하고, 각 대역통과필터는 상기 도전성 로드의 일부분이 상기 제1인쇄회로기판에 형성된 상기 접촉 패드에 접촉한 채로 상기 제1인쇄회로기판에 밀착 체결된 것을 특징으로 하는, MIMO 안테나 시스템.The first port of each band pass filter has a conductive pin extending from an interior cavity and protruding from an upper surface thereof, and a conductive rod fixed perpendicularly to an end of the conductive pin. And each band pass filter is in close contact with the first printed circuit board while a portion of the conductive rod is in contact with the contact pad formed on the first printed circuit board.
  8. 제1항에 있어서,The method of claim 1,
    상기 필터 어셈블리는, The filter assembly,
    상기 제2인쇄회로기판에 체결되는 푸시 바(push bar)에 상기 복수의 대역통과필터들이 일렬로 조립된 것임을 특징으로 하는, MIMO 안테나 시스템.And a plurality of band pass filters are assembled in a line in a push bar fastened to the second printed circuit board.
  9. 제8항에 있어서,The method of claim 8,
    상기 제2인쇄회로기판과 체결된 상기 푸시 바는, The push bar coupled to the second printed circuit board,
    각 대역통과필터가 균일한 힘으로 상기 제2인쇄회로기판에 결합되도록, 각 대역통과필터에 균일한 압력을 제공하는 것을 특징으로 하는, MIMO 안테나 시스템.And providing uniform pressure to each bandpass filter such that each bandpass filter is coupled to the second printed circuit board with a uniform force.
  10. 제1항에 있어서,The method of claim 1,
    각 대역통과필터는, Each bandpass filter,
    RF 케이블링 없이 상기 송수신회로와 직접 연결되는 제2포트를 구비한 것을 특징으로 하는, MIMO 안테나 시스템.And a second port connected directly to the transmission / reception circuit without RF cabling.
  11. 제10항에 있어서,The method of claim 10,
    상기 제2인쇄회로기판의 상부 면에는 상기 복수의 송수신회로와 연결된 복수의 RF 소켓(Socket)이 실장되어 있으며, A plurality of RF sockets connected to the plurality of transceiver circuits are mounted on an upper surface of the second printed circuit board.
    각 대역통과필터의 제2포트는 하부 면으로부터 돌출되고 중심에 상기 RF 소켓이 삽입되는 홈이 형성된 돌출부 및 내부의 중공으로부터 연장되어 상기 돌출부에 형성된 상기 홈을 관통하는 도전성 핀을 구비하고,The second port of each band pass filter has a protrusion formed from the bottom surface and a groove in which the RF socket is inserted at the center and a conductive pin extending from the hollow inside and penetrating the groove formed in the protrusion,
    각 대역통과필터는 상기 도전성 핀의 일부분이 상기 RF 소켓에 형성된 홀에 삽입된 채로 상기 제2인쇄회로기판에 결합된 것을 특징으로 하는, MIMO 안테나 시스템.Each bandpass filter is coupled to the second printed circuit board with a portion of the conductive pin inserted into a hole formed in the RF socket.
  12. 제10항에 있어서,The method of claim 10,
    상기 제2인쇄회로기판의 상부 면에는 상기 송수신회로와 전기적으로 연결된 접촉 패드(contact pad)가 형성된 복수의 구조물이 실장되어 있으며, The upper surface of the second printed circuit board is mounted with a plurality of structures formed with a contact pad electrically connected to the transceiver circuit,
    각 대역통과필터의 제2포트는 내부의 중공(cavity)으로부터 연장되어 하부 면으로부터 돌출된 도전성 플런저(plunger)를 구비하고, The second port of each bandpass filter has a conductive plunger extending from the interior cavity and protruding from the bottom surface,
    각 대역통과필터는 상기 도전성 플런저의 일부분이 상기 접촉 패드(contact pad)에 접촉된 채로 상기 제2인쇄회로기판에 결합된 것을 특징으로 하는, MIMO 안테나 시스템.Each bandpass filter is coupled to the second printed circuit board with a portion of the conductive plunger in contact with the contact pad.
  13. 제10항에 있어서,The method of claim 10,
    상기 제2인쇄회로기판의 상부 면에는 상기 송수신회로와 전기적으로 연결된 접촉 패드(contact pad)가 형성된 복수의 구조물이 실장되어 있으며, The upper surface of the second printed circuit board is mounted with a plurality of structures formed with a contact pad electrically connected to the transceiver circuit,
    각 대역통과필터의 제2포트는 내부의 중공(cavity)으로부터 연장되어 하부 면으로부터 돌출된 도전성 핀(conductive pin) 및 상기 도전성 핀의 말단에 수직방향으로 고정된 도전성 로드(conductive rod)를 구비하고,The second port of each band pass filter has a conductive pin which extends from the cavity inside and protrudes from the lower surface, and a conductive rod fixed perpendicularly to the end of the conductive pin. ,
    각 대역통과필터는 상기 도전성 로드의 일부분이 상기 접촉 패드(contact pad)에 접촉된 채로 상기 제2인쇄회로기판에 결합된 것을 특징으로 하는, MIMO 안테나 시스템.Each bandpass filter is coupled to the second printed circuit board with a portion of the conductive rod in contact with the contact pad.
  14. 제1항에 있어서,The method of claim 1,
    상기 제2인쇄회로기판에는,In the second printed circuit board,
    복수의 스위치가 트리 구조로 연결된 캘리브레이션 회로가 추가로 형성되어 있는 것을 특징으로 하는, MIMO 안테나 시스템.And a calibration circuit in which a plurality of switches are connected in a tree structure.
  15. 제1항에 있어서,The method of claim 1,
    상기 제1인쇄회로기판에는 적어도 하나의 접지면(Ground plane)이 형성되어 있으며, 상기 접지면은 복수의 안테나 소자들에 대해 반사판(Reflector) 대용으로 기능하는 것을 특징으로 하는, MIMO 안테나 시스템.At least one ground plane is formed on the first printed circuit board, and the ground plane functions as a substitute for a reflector for a plurality of antenna elements.
  16. 적층 구조의 MIMO 안테나 어셈블리로서, A multilayer MIMO antenna assembly,
    급전 네트워크(Feeding network)가 형성된 제1인쇄회로기판(Printed Circuit Board; PCB);A first printed circuit board (PCB) on which a feeding network is formed;
    상기 제1인쇄회로기판의 상부 면에 설치되고 상기 급전 네트워크와 연결된 복수의 안테나 소자;A plurality of antenna elements installed on an upper surface of the first printed circuit board and connected to the feeding network;
    상기 제1인쇄회로기판의 하부 면에 배치되고 상기 급전 네트워크와 연결된 복수의 대역통과필터를 포함하는 필터 어셈블리; 및A filter assembly disposed on a lower surface of the first printed circuit board and including a plurality of band pass filters connected to the feed network; And
    상기 제1인쇄회로기판의 하부에 배치되고, 상기 복수의 대역통과필터와 연결된 복수의 송수신회로, 상기 복수의 송수신회로와 연결되어 기저대역 신호의 디지털 프로세싱을 수행하는 디지털 회로 및 복수의 스위치가 트리 구조로 연결된 캘리브레이션 회로가 형성된 제2인쇄회로기판A plurality of transmit / receive circuits disposed under the first printed circuit board, connected to the plurality of bandpass filters, connected to the plurality of transmit / receive circuits, and perform digital processing of baseband signals; Second printed circuit board with calibration circuit connected in structure
    을 포함하는 MIMO 안테나 어셈블리.MIMO antenna assembly comprising a.
  17. 제16항에 있어서, The method of claim 16,
    상기 제2인쇄회로기판에는,In the second printed circuit board,
    상기 복수의 송수신회로와 연결되어 기저대역 신호의 디지털 프로세싱을 수행하는 디지털 회로가 추가로 형성되어 있는 것을 특징으로 하는, MIMO 안테나 어셈블리.And a digital circuit further connected to the plurality of transmission / reception circuits to perform digital processing of a baseband signal.
  18. 제16항에 있어서, The method of claim 16,
    상기 제2인쇄회로기판에는,In the second printed circuit board,
    복수의 스위치가 트리 구조로 연결된 캘리브레이션 회로가 추가로 형성되어 있는 것을 특징으로 하는, MIMO 안테나 어셈블리.And a calibration circuit, in which a plurality of switches are connected in a tree structure, further comprising a MIMO antenna assembly.
  19. 제16항에 있어서, The method of claim 16,
    상기 복수의 대역통과필터는, The plurality of band pass filters,
    RF 케이블링 없이 상기 급전 네트워크와 직접 연결되는 제1포트를 구비하고, 상기 제1인쇄회로기판에 밀착하여 체결된 것을 특징으로 하는, MIMO 안테나 어셈블리.And a first port directly connected to the power supply network without RF cabling, and fastened to the first printed circuit board in close contact with the first printed circuit board.
  20. 제16항에 있어서, The method of claim 16,
    각 대역통과필터는 RF 케이블링 없이 상기 송수신회로와 직접 연결되는 제2포트를 구비한 것을 특징으로 하는, MIMO 안테나 어셈블리.Each bandpass filter has a second port connected directly to the transceiver circuit without RF cabling.
PCT/KR2017/013034 2016-11-16 2017-11-16 Mimo antenna assembly of laminated structure WO2018093176A2 (en)

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EP21171645.1A EP3883140A1 (en) 2016-11-16 2017-11-16 Mimo antenna assembly having stacked structure
JP2019525742A JP6793256B2 (en) 2016-11-16 2017-11-16 Laminated MIMO antenna assembly
US16/412,426 US11088731B2 (en) 2016-11-16 2019-05-15 MIMO antenna assembly having stacked structure
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KR1020170028434A KR101855139B1 (en) 2016-11-16 2017-03-06 Calibration in MIMO antenna
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