WO2018064583A1

WO2018064583A1 - Ue configured to support up to two harq processes in nb-iot

Info

Publication number: WO2018064583A1
Application number: PCT/US2017/054510
Authority: WO
Inventors: Debdeep CHATTERJEE; Qiaoyang Ye
Original assignee: Intel Corporation
Priority date: 2016-09-30
Filing date: 2017-09-29
Publication date: 2018-04-05
Also published as: DE112017004245T5

Abstract

Technology for an evolved node B (eNB) configured to support up to two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) is disclosed. The eNB can encode a first downlink control information (DCI) and a second DCI for a selected user equipment (UE) in a narrow band physical downlink control channel (NPDCCH). The eNB can encode data for transmission in a narrow band physical downlink shared channel (NPDSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to receiving the data encoded in the NPDSCH. The eNB can also comprise of a memory interface configured to receive from a memory the data.

Description

UE CONFIGURED TO SUPPORT UP TO TWO

HARQ PROCESSES IN NB-IOT

BACKGROUND

[0001] Wireless systems typically include multiple User Equipment (UE) devices communicatively coupled to one or more Base Stations (BS). The one or more BSs may be Long Term Evolved (LTE) evolved NodeBs (eNB) or New Radio (NR) next generation NodeBs (gNB) that can be communicatively coupled to one or more UEs by a Third- Generation Partnership Project (3 GPP) network.

[0002] Next generation wireless communication systems are expected to be a unified network/system that is targeted to meet vastly different and sometimes conflicting performance dimensions and services. New Radio Access Technology (RAT) is expected to support a broad range of use cases including Enhanced Mobile Broadband (eMBB), Massive Machine Type Communication (mMTC), Mission Critical Machine Type Communication (uMTC), and similar service types operating in frequency ranges up to 100 GHz.

BRIEF DESCRIPTION OF THE DRAWINGS

[0003] Features and advantages of the disclosure will be apparent from the detailed description which follows, taken in conjunction with the accompanying drawings, which together illustrate, by way of example, features of the disclosure; and, wherein:

[0004] FIG 1 illustrates an example of 8 ms time-gap between two NPDSCH

transmissions in accordance with an example;

[0005] FIG 2 illustrates NPUSCH transmission procedures with a 2-process HARQ, in accordance with an example;

[0006] FIG 3 illustrates a table of a single downlink control information (DCI) utilized to schedule two transmission blocks (TBs) in accordance with an example;

[0007] FIG 4 illustrates a table of an alternative of a single DCI utilized to schedule two transmission blocks (TBs) in accordance with an example; [0008] FIG. 5 illustrates a table of two DCIs configured to schedule two TBs in accordance with an example;

[0009] FIG 6 illustrates a table of an alternative of two DCIs configured to schedule two TBs in accordance with an example;

[0010] FIG. 7 depicts functionality of an evolved NodeB (eNB) operable to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink in accordance with an example;

[0011] FIG. 8 depicts functionality of a user equipment (UE) operable to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink in accordance with an example;

[0012] FIG 9 illustrates an architecture of a system 900 of a network in accordance with an example;

[0013] FIG. 10 illustrates a diagram of a wireless device (e.g., UE) and a base station (e.g., eNodeB) in accordance with an example;

[0014] FIG 11 illustrates example interfaces of baseband circuitry in accordance with an example; and

[0015] FIG 12 illustrates a diagram of a wireless device (e.g., UE) in accordance with an example.

[0016] Reference will now be made to the exemplary embodiments illustrated, and specific language will be used herein to describe the same. It will nevertheless be understood that no limitation of the scope of the technology is thereby intended.

DETAILED DESCRIPTION

[0017] Before the present technology is disclosed and described, it is to be understood that this technology is not limited to the particular structures, process actions, or materials disclosed herein, but is extended to equivalents thereof as would be recognized by those ordinarily skilled in the relevant arts. It should also be understood that terminology employed herein is used for the purpose of describing particular examples only and is not intended to be limiting. The same reference numerals in different drawings represent the same element. Numbers provided in flow charts and processes are provided for clarity in illustrating actions and operations and do not necessarily indicate a particular order or sequence.

DEFINITIONS

[0018] As used herein, the term "User Equipment (UE)" refers to a computing device capable of wireless digital communication such as a smart phone, a tablet computing device, a laptop computer, a multimedia device such as an iPod Touch®, or other type computing device that provides text or voice communication. The term "User Equipment (UE)" may also be refer to as a "mobile device," "wireless device," of "wireless mobile device."

[0019] As used herein, the term "wireless access point" or "Wireless Local Area Network Access Point (WLAN-AP)" refers to a device or configured node on a network that allows wireless capable devices and wired networks to connect through a wireless standard, including WiFi, Bluetooth, or other wireless communication protocol.

[0020] As used herein, the term "Base Station (BS)" includes "Base Transceiver Stations (BTS)," "NodeBs," "evolved NodeBs (eNodeB or eNB)," and/or "next generation NodeBs (gNodeB or gNB)," and refers to a device or configured node of a mobile phone network that communicates wirelessly with UEs.

[0021] As used herein, the term "cellular telephone network," "4G cellular," "Long Term Evolved (LTE)," "5G cellular" and/or "New Radio (NR)" refers to wireless broadband technology developed by the Third Generation Partnership Project (3GPP), and will be referred to herein simply as "New Radio (NR)."

EXAMPLE EMBODIMENTS

[0022] An initial overview of technology embodiments is provided below and then specific technology embodiments are described in further detail later. This initial summary is intended to aid readers in understanding the technology more quickly but i not intended to identify key features or essential features of the technology nor is it intended to limit the scope of the claimed subject matter. [0023] Narrow band Internet of Things (NB-IoT) is a technology standardized by the Third Generation Partnership Project (3GPP). NB-IoT has been designed to address specific cellular IoT (CIoT) constraints, such that NB-IoT can provide improved indoor coverage, support for a relatively large number of low throughput devices, low delay sensitivity, low device cost, low device power consumption and an improved network architecture. NB-IoT can be deployed in either the Global System for Mobile

Communications (GSM) spectrum or the Long Term Evolution (LTE) spectrum. NB-IoT can also be deployed in Fifth Generation (5G) or New Radio (NR) technologies.

[0024] The technology disclosed, provides for enhancements to an NB-IoT system design operable to enable lower power consumption latency. This lower power consumption latency can be configured to support in downlink (DL) and uplink (UL) for 2 hybrid automatic repeat request (HARQ) processes and a larger maximum transport block size (TBS) for NB-IoT UEs.

[0025] According to 3GPP LTE Release 13 specifications, NB-IoT supports a maximum of a single HARQ process for both DL and UL. However, as indicated above, it was agreed recently to support up to 2 DL and UL HARQ processes and also an increased value of the max TBS for DL and UL in order to improve the power consumption and latency performance of NB-IoT UEs in good coverage.

[0026] In one example, expected utilization of the larger number of HARQ processes to improve the peak data rates is by enabling scheduling of two narrow band physical downlink shared channel (NPDSCH) or a narrow band physical uplink shared channel (NPUSCH) transmissions within a single scheduling opportunity, thereby improving the peak data rates. Accordingly, the following timing relationships are maintained: the period from the end of the NPDCCH to the start of the NPDSCH is 4ms; the period from the end of the NPDCCH to the start of the NPUSCH format 1 is 8ms; the period from the end of the NPDSCH to the start of the NPUSCH format 2 for acknowledgement / negative acknowledgement Ack/NACK) feedback is at least 12ms; and the period from the end of the NPUSCH format 1 to the time when the UE starts monitoring the

NPDCCH is 3ms).

[0027] In one example, to minimize device complexity and in consideration of the single HARQ process, it is specified in 3GPP Release 13 that an NB-IoT UE that has received a grant from an NPDCCH does not have to monitor NPDCCH for any further DL or UL grants during the time period between the end of the NPDCCH that schedules the grant and the start of the corresponding NPDSCH or NPUSCH transmission. This is intuitive since there is only a single DL or UL grant

[0028] In one example, a way to improve the peak data rates and latency performance for NB-IoT UEs in good coverage by using two DL and UL processes is by scheduling a UE with two DL or UL transport blocks (TBs) within a single scheduling duration (i.e., within the period that the UE receives a grant and finishes the transmit/receive (Tx/Rx) processes satisfying the timing relationships).

[0029] In one example, the main components for the support of up to two DL and UL HARQ processes for NB-IoT UEs involve the following considerations: Timing relationships between the physical channels; transmission of ACK/NACK feedback from NB-IoT UEs in response to NPDSCH in the DL; Indication and scheduling UEs for NPDSCH and NPUSCH with 2 HARQ processes - i.e., details of Downlink Control Information (DCI) changes; and the applicability of two DL and UL HARQ processes.

Timing relationships between the physical channels

[0030] FIG 1 illustrates an example of an 8 ms time-gap 100 between two NPDSCH transmissions used in the 3GPP Release 13. In the accordance with one embodiment, the timing relationships can be maintained so as to minimally impact the UE complexity.

Thus, it may be beneficial to avoid any parallel processing of NPDSCH corresponding to the two TBs that may be scheduled in a "back-to-back" manner. Accordingly, an 8ms time-gap between two NPDSCH transmissions as shown in FIG 1 can be beneficial.

[0031] In another example, if the UE complexity increase is considered acceptable, then the constraint of having a minimum of 8ms gap between the two NPDSCH transmissions, as shown in FIG 1, can be removed, thereby enabling higher peak data rates. For example, by scheduling the NPDSCH transport blocks to occur consecutively-in-time, without a gap. The Rel-13 timing relationships can be maintained on a per-HARQ process basis.

[0032] In one example, additional constraints on the gaps between the NPDCCH 110 and the NPDSCH 120 TBs can be considered to limit the UE complexity. Following the 3 GPP Rel-13 specifications, the UE is not expected to monitor for NPDCCH 110 once it detects a valid DL assignment or UL grant or PDCCH order indicated via the DCI. However, if two DCIs are used to schedule the two HARQ processes for DL/UL, then the UE may need to monitor for NPDCCH 110 until the end of the current period of the search space (SS) for the potential scheduling of the other HARQ process. The end of the current period can be until n milliseconds (ms) before the start of first NPDSCH, where n is a positive integer. For instance, n can be a period of 4 ms or 2ms before the start of first NPDSCH.

[0033] In one example, a minimum gap of 4ms is maintained between the end of the

NPDCCH 110 SS and the start of the first NPDSCH 120 TB scheduled by the DCI carried in the NPDCCH 110 SS. A down-side of this restriction is that the minimum delay between the first DCI and the first NPDSCH 120 is increased compared to the 3 GPP Rel- 13 timing, which is defined such that a minimum gap of 4ms exists between the end of the NPDCCH 110 and the start of the NPDSCH 120 scheduled by this NPDCCH 110.

[0034] In one example, an alternative is to specify the UE behavior such that the UE can expect that there exists at least a 4ms gap between the end of the second DCI and the start of the first NPDSCH 120, while the exact scheduling delay is left up to an appropriate network implementation to ensure the presence of such a gap. Additionally, the NPUSCH 130 can further take place in a similar 2 ms gap along with the NPDCCH 110. The NPUSCH can carry the ACK/NACK feedback for an NDSCH within a 12 ms gap between the start of NPUSCH and the end of associated NPDSCH. Note that this is possible by appropriately selecting the scheduling delay for the first NPDSCH 120 with respect to the first DCI. For instance, the starting subframe of the first NPDSCH 120 cab be n + 5 + x NB-IoT downlink subframes from the end of the NPDCCH which schedule this NPDSCH, where n an integer representing the last subframe of the first DCI and x is an integer from the set of values of the scheduling delay field in DCI format Nl for the maximum number of repetitions (Rmax) < 128, viz., {0,4,8,12,16,32,64,128}, indicating the delay in terms of the number of valid NB-IoT DL subframes. In an RRC connected state, the UE can monitor the UE-specific search space (USS) to obtain its uplink and downlink assignments. There can be a reconfiguration message accordingly that can contain the Rmax.

[0035] For additional flexibility and efficiency, in another embodiment, a new set of scheduling delay values is defined with finer granularity including smaller values, e.g., {0, 1, 2, 3, 4, 6, 12, 16} when the UE is configured explicitly or implicitly to be scheduled with 2 HARQ processes. Further, as described in the preceding paragraphs, a UE supporting up to 2 HARQ processes may expect to be configured with two processes depending on the NPDCCH 110 SS configuration. Therefore, the UE can be configured to interpret the scheduling delay field in the DCI format Nl with the new (smaller) values when the UE expects to be scheduled with two DL or UL processes.

[0036] In one example, when a single TB is to be scheduled, the 3GPP Rel-13 behavior of having a minimum of 4ms gap between the end of the NPDCCH 110 and the start of the associated NPDSCH 120 is maintained. When two TBs are scheduled using two DCIs, the network can ensure that the start of the first NPDSCH 120 TB maintains a gap of at least 4ms from the end of the 2nd NPDCCH carrying the 2nd DL assignment.

[0037] In additional examples, various combinations of the above embodiments, and subsequent embodiments disclosed can be applicable for the scheduling of two NPUSCH 130 TBs as well, with a minimum delay being 4ms instead of 8ms between two NPUSCH TBs and potentially a new set of values for the scheduling delay field in DCI format NO compared to those defined in Rel-13 ({8, 16, 32, 64}).

[0038] In one embodiment, one or more processors can be configured to decode data received from the NPUSCH, wherein a scheduling delay is selected with a starting subframe of a first NPUSCH that is the first UL subframe after n+x milliseconds from the end of the NPDCCH scheduling the NPUSCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format NO, wherein the set of values for a single DCI associated with a single HARQ process is {8 , 16, 32, 64} or the set or subset of values for two DCI associated with two HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

[0039] FIG 2 illustrates NPUSCH transmission procedures with a two-process HARQ. With the 3GPP Rel-13 single HARQ process, a UE or an eNB can transmit one transport block and then wait until the relevant NB-IoT timing relationships have passed before the next TB can be sent (or the same TB re-transmitted). In deep coverage, this does not affect latency or power consumption because the transmissions are long (due to repetitions) compared with the timing relationships. But in good coverage, adding one additional HARQ process is helpful to reduce the latency because the UE or eNB can transmit two transport blocks in succession without having to wait for the NB-IoT timing relationships to pass.

[0040] In one example, in order to avoid any increase in device complexity, each

NPDCCH can be decoded before the start of reception of the next NPDCCH 210.

Deriving from the existing 12ms timing relationship for NPDCCH 210 to NPUSCH 220, but removing the time allowance for protocol and radio TX/RX turn-around which is not relevant for the case of NPDCCH 210 to NPDCCH 210, a spacing of 8ms for NPDCCH 210 to next NPDCCH 210 would avoid an increase in processing MIPS for convolutional code (TBCC) decoding with a two-process HARQ.

[0041] In one example, a similar spacing between successive NPUSCH 220 of 3 ms would provide sufficient time for UE to prepare the data for the second NPUSCH 220 transmission. This shows how the two-HARQ design can be executed with minimal downsides to the UE complexity or chipset development.

[0042] In one example, by using a two-process HARQ, the transmitted payload in each cycle can be doubled with only a small increase of latency.

Transmission of ACK/NACK (A/N) feedback from NB-IoT UEs in response to NPDSCH in the DL

[0043] In addition, it can be assumed, within this section, that the earliest A/N feedback from the UE on NPUSCH format 2 is transmitted not before 12ms after the end of the second NPDSCH TB. From the description and diagram in FIG. 1 with 3 GPP Rel. 13 timing, it is not clear on how the UE may exactly transmit the DL A/N feedback.

[0044] Accordingly, various options can be considered. In the first example, there can be a single NPUSCH format 2 transmission. In one embodiment within the first option, HARQ-ACK bundling is used to transmit the A/N feedback for the two DL TBs, such that the A/N response for each TB is combined to a single bit of feedback via a logical AND operation.

[0045] In the case where a single DCI is used, due to the logical AND operation, in the case of a NACK indication, both NPDSCH TBs would need to be retransmitted. Hence, a separate HARQ process ID for each TB would not need to be indicated in the DCI. To allow the UE to distinguish whether only a single TB was scheduled or two TBs were scheduled, but it missed one of them, an additional bit can be included in the single DCI to indicate the number of TBs scheduled within the NPDCCH period.

[0046] In the case where two separate DCIs are used to schedule each NPDSCH TB, a HARQ process ID can be included in each DCI via a 1-bit field to indicate the corresponding TB. Alternatively, the TB can be indicated implicitly, by predefining a fixed relationship between the TB and the HARQ process ID. For example, the smaller HARQ process ID can correspond to the first TB, or vice versa. In another embodiment, due to the logical AND operation between both NPDSCH TBs, the corresponding TB for the DCI may not need to be differentiated. Additionally, to allow the UE to distinguish whether only a single TB was scheduled or two were scheduled but it missed one of them, an additional bit can be included in each DCI to indicate the number of TBs scheduled within the NPDCCH period. The frequency and time domain offsets for the A/N transmission in the 2nd DCI can be reserved for HARQ-ACK bundling and a separate transmission of A/N bits.

[0047] In one embodiment of the first option, there can also be a separate transmission of A/N bits for each TB, with a single NPUSCH format 2 transmission. For example, a 2-bit A/N feedback can be introduced where the first bit corresponds to the first TB and the 2nd bit corresponds to the 2nd TB.

[0048] In one embodiment of the first option, there can be an indication of A/N feedback for the 2 TBs using a single NPUSCH format 2 transmission with channel selection or resource selection. The resource selection mechanism can be configured to imply that two NPUSCH format 2 resources are configured and the additional bit of information is implicitly conveyed by the UE's selection of one of the two NPUSCH format 2 resources. In this case, the two NPUSCH format 2 resources reserved for the UE to provide feedback via channel selection can be indicated implicitly or explicitly. The two resources can either be: (i) different NPUSCH format 2 resources separated in the time domain; or, (ii) different NPUSCH format 2 resources separated in the frequency domain.

[0049] Accordingly, the choice of frequency domain or time domain multiplexing of the two transmissions can either be specified or configured via RRC signaling or dynamically indicated via the DL DCI scheduling the NPDSCH. The option of multiplexing the two resources in the frequency domain (i.e., in two different subcarriers) can be more beneficial than the time domain option as it does not prolong the A/N feedback for the case of transmission of A/N on the second time-domain NPUSCH format 2 resource. For the time or the frequency domain multiplexing of the two resources, the indication of the two resources can be provided implicitly by only explicitly indicating the time or frequency (respectively) offset in the DCI for the first resource and specifying an additional fixed time or frequency offset with respect to the first resource to determine the second resource. Here, it is assumed that a single DCI is used to schedule both TBs. However, if two DL DCIs are used to schedule the two NPDSCH TBs, then the two resources can be indicated explicitly via each DL assignment. Further details for the A/N feedback states are discussed below.

[0050] In one embodiment, when a single DCI is used to schedule both TBs, the A/N feedback can be indicated as in Table 1 in FIG 3. Note that alternative representations, e.g., swapping the bit indicators 0 and 1 is a straightforward variation on the design as shown in FIG 3. In FIG 3, A = ACK, N = NACK, N.A. is not applicable, and DTX = the DL assignment was not detected.

[0051] In one embodiment an alternative is displayed in FIG. 4, when a single DCI is used to schedule both TBs, as indicated in Table 2 in FIG 4. In FIG. 4, A = ACK, N = NACK, and DTX = the DL assignment was not detected.

[0052] Further within the first option, the time offset value for the first NPUSCH format 2 resource can be indicated relative to 12ms after the end of the second NPDSCH, and the frequency offset value can be indicated also for the first NPUSCH format 2 resource. If the resources are multiplexed in frequency, then the second NPUSCH format 2 resource can assume that the same time domain location and the frequency domain location is determined with respect to (w.r.t.) the first resource via a fixed offset (specified) - next subcarrier (for instance), or via an offset configured by higher layers, or even an offset indicated by an additional 1 or 2 bit field in the DCI to indicate 2 or 4 values of offsets relative to the first resource.

[0053] Table 3 in FIG. 5, further provides an example of when two DCIs are used to schedule each TBs in a set of multiple TBs, and the A/N feedback can be indicated.

Another alternative is further provided for in Table 4 in FIG. 6.

[0054] Further within option 1, the time offset value for the first NPUSCH format 2 resource can be indicated relative to 12ms after the end of the second NPDSCH, and the frequency offset value can be indicated also for the first NPUSCH format 2 resource. Both the time offset value and the frequency offset value can be indicated by the first DCI.

[0055] In one embodiment, if the resources are multiplexed in frequency, then the second NPUSCH format 2 resource can assume the same time domain location and the frequency domain location is determined w.r.t. the first resource via a fixed offset (specified) - next subcarrier (for instance), or via an offset configured by higher layers, or even an offset indicated by an additional 1 or 2 bit field in the DCI to indicate 2 or 4 values of offsets relative to the first resource. This method of determining the frequency location can be applied even for time domain multiplexing of the two resources. The time domain offset can be indicated only for the first resource. The second resource can be derived based on a fixed or higher-layer configured offset relative to the end of the first resource. The one bit carried by the NPUSCH format 2 plus resource selection out of 2 resource candidates can be used to indicate 4 combinations, i.e. the 2-bit A/N information for the 2 HARQ processes.

[0056] In one embodiment, in the case where two separate DCIs are used to schedule each NPDSCH TB, the HARQ process identification (ID) is included in each DCI via a 1- bit field to indicate the corresponding TB, and additionally, to allow the UE to distinguish whether only a single TB was scheduled or two were scheduled but it missed one of them. An additional bit can be included in each DCI to indicate the number of TBs scheduled within the NPDCCH period. The additional bit of information can also be fixed, or indicated by higher layer signaling (e.g. RRC signaling).

[0057] In a second option, there can be multiple NPUSCH format 2 transmissions. In one embodiment, there can be two separate NPUSCH format 2 transmissions wherein each NPUSCH format 2 transmission carries the A/N feedback corresponding to a single TB. In case of frequency domain separation between the two NPUSCH format 2 resources, they can be located contiguous in frequency in order to preserve the single carrier property of UL transmissions. When the two resources are separated in time domain, it implies an increased power consumption due to a longer duration of an UL transmission. While for the case of frequency domain multiplexing of the two resources, transmitting on both resources implies a lower transmission Power Spectral Density (PSD) and thus, a reduction in the coverage or need for additional time domain repetitions.

Downlink Control Information (DCI) Changes

Single DCI to schedule two TBs (NPDSCH or NPUSCH)

MCS and resource size indication:

[0058] For a single DCI based indication, in one embodiment, both TBs are scheduled with same MCS and N_SF (Number of subframes) values for NPDSCH and N_RU (Number of resource units) values for NPUSCH.

[0059] In another embodiment, a single set of MCS and N SF/N RU for the first TB is indicated, while the values for the second set is indicated via 1-bit or 2-bit offsets each that can indicate either a larger or smaller value for the MCS and N_SF or N_RU values respectively. The offset can also be configured by higher layer signaling rather than indicated in the DCI. Alternatively, the offset can be predefined and no explicit indication is needed in this case.

[0060] In yet another embodiment, the MCS and N SF or N RU values for each TB is indicated independently for full scheduling flexibility at the cost of increased DCI size.

RV and NDI

[0061] In one embodiment, a redundancy version (RV) and/or a new data indicator (NDI) can be indicated independently for each TB. Alternatively, the RV and/or NDI can be set to be the same for both TBs.

HARQ Process ID

[0062] In one embodiment, the HARQ process ID can be indicated explicitly for each TB. In another embodiment, the HARQ process ID is indicated explicitly, by defining the first TB corresponding to first HARQ ID and the second TB corresponding to second HARQ ID.

[0063] The scheduling delay for NPDSCH can be indicated only for the first NPDSCH while the second NPDSCH starts 8ms after the first one. Alternatively, an additional bit can be introduced to indicate additional delay for the second NPDSCH by 0ms or K ms, where K is an integer that is either specified or defined as a function of the Rmax for the NPDCCH USS.

[0064] In one example, the scheduling delay for the NPUSCH can be indicated only for the first NPUSCH while the second NPUSCH can starts 3ms after the first one.

Alternatively, there may be no gap between the two NPUSCH transmissions or a new field may be introduced to indicate dynamically the gap value. In any case, the UE is expected to monitor NPDCCH not before 3ms after the end of the second NPUSCH transmission. The same frequency domain resource allocation for the 2 NPUSCH transmission can be specified for the case of a single DCI.

Separate DCIs to schedule two TBs (NPDSCH or NPUSCH)

[0065] MCS, resource size, RV, and/or NDI can be indicated individually for each TB with full flexibility.

[0066] The scheduling delay for NPDSCH can be separately configured in each DCI such that there is at least an 8ms gap between the end of the first NPDSCH and the start of the second NPDSCH. Alternatively, there may be no constraint on the minimum gap between the end of the first NPDSCH and the start of the second NPDSCH.

[0067] The scheduling delay for NPUSCH can be separately configured in each DCI such that there is at least a 3ms gap between the end of the first NPUSCH and the start of the second NPUSCH. Alternatively, there may be no gap between the two NPUSCH transmissions. In any case, the UE is expected to monitor NPDCCH not before 3ms after the end of the second NPUSCH transmission.

Applicability of two Downlink (PL) and Uplink (UL) HARQ Processes

[0068] In one embodiment, two DL and UL processes may be used only for UEs in good coverage. Thus, in one embodiment, this can be a function of the aggregation level (AL) or repetition level (RL) used for the NPDCCH USS or for a particular NPDCCH transmission (for the case of AL-based determination of eligibility).

[0069] As an example, two DL and UL processes can be configured to a UE only when the NPDCCH USS includes NPDCCH candidate with AL = 1 and when the NPDCCH is actually transmitted with AL = 1. As another example, two DL and UL processes can be configured to a UE only when the R max for NPDCCH USS is no more than X, where X is either specified, e.g. X = 4 or X = 8, or is configured by higher layers.

[0070] Further, in an embodiment, the changes to DCIs apply only to DCI formats NO and Nl in the UE-specific search space (USS) and not for any DCI transmitted in the Common Search Space (CSS).

[0071] Another example provides functionality 700 of an evolved nodeB (eNB) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink as shown in FIG 7. The eNB can comprise one or more processors configured to: encode a first downlink control information (DCI) and a second DCI for a selected user equipment (UE) in a narrow band physical downlink control channel (NPDCCH) 710. The eNB can comprise one or more processors configured to: encode data for transmission in a narrow band physical downlink shared channel (NPDSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to receiving the data encoded in the NPDSCH 720. The eNB can also comprise of a memory interface configured to receive from a memory the data.

[0072] In one embodiment the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide at least a 2 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH or an end of a NPDCCH, or a NPDCCH candidate and a start of a first NPDSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[0073] In one embodiment the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide a four millisecond (ms) gap between an end of the second DCI and a start of a first NPDSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[0074] In one embodiment the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein a scheduling delay is selected with a starting subframe of a first NPDSCH that is n+5+x NB-IoT DL subframes from the end of the NPDCCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format Nl, wherein the set of values for a single DCI associated with a single HARQ process is {0, 4, 8, 12, 16, 32, 64, 128} or the set of values for two DCI associated with multiple HARQ processes {0, 1, 2, 3, 4, 6, 12, 16} .

[0075] In one embodiment the one or more processors are further configured to: decode data received at the eNB in a narrow band physical uplink shared channel (NPUSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to transmitting the data encoded by the UE in the NPUSCH.

[0076] In one embodiment the one or more processors are further configured to decode data received from the NPUSCH, wherein the data is scheduled to provide an 8 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH where the UE needs to monitor and a start of a first NPUSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[0077] In one embodiment the one or more processors are further configured to decode data received from the NPUSCH, wherein a scheduling delay is selected with a starting subframe of a first NPUSCH that is the first UL subframe after n+x milliseconds from the end of the NPDCCH scheduling the NPUSCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format NO, wherein the set of values for a single DCI associated with a single HARQ process is {8 , 16, 32, 64} or the set or subset of values for two DCI associated with two HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

[0078] Another example provides functionality 800 of a user equipment (UE) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink, as shown in FIG 8. The UE can comprise one or more processors configured to: decode data received in a first narrow band physical downlink shared channel (NPDSCH) transport block (TB) and a second

NPDSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are associated with one or more of a first downlink control information (DCI) and a second DCI 810. The UE can comprise one or more processors configured to: encode

acknowledgement/negative acknowledgement (ACK/NACK) feedback for the first NPDSCH TB and the second NPDSCH TB in one or more bits of feedback transmitted in one or more narrow band physical uplink shared channel (NPUSCH) format 2 transmissions 820. The eNB can also comprise of a memory interface configured to send to the memory the ACK/NACK feedback.

[0079] In one embodiment the one or more processors are further configured to encode the ACK/NACK feedback using HARQ/ Acknowledgement (ACK) bundling with a single ACK/NACK response for the first NPDSCH TB and the second NPDSCH TB combined in a single bit of feedback via a logical AND operation in a single NPUSCH format 2 transmission.

[0080] In one embodiment the one or more processors are further configured to decode an additional bit in one of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

[0081] In one embodiment the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to decode a HARQ process identification (ID) in each of the first DCI and the second DCI via a 1-bit field to indicate a corresponding TB. The one or more processors are further configured to associate each of the first NPDSCH TB and the second

NPDSCH TB with a HARQ process ID based on a predefined fixed relationship between the first NPDSCH TB and the second NPDSCH TB with the HARQ process ID.

Additionally, the one or more processors are further configured to decode an additional bit in each of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period. [0082] In one embodiment the one or more processors are further configured to encode a first ACK/NACK feedback and a second ACK/NACK feedback for a first TB and a second TB respectively in a single NPUSCH format 2 transmission, wherein a first bit is associated with the first TB and a second bit is associated with the second TB.

[0083] In one embodiment the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2 transmission to provide feedback via resource selection.

[0084] In one embodiment the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2 transmission to provide feedback via resource selection, wherein the resource selection comprises two NPUSCH format 2 resources that are configured in a time domain or two NPUSCH format 2 resources that are configured in a frequency domain.

[0085] In one embodiment the one or more processors are further configured to select one of the two NPUSCH format 2 resources to send a single bit of feedback.

[0086] In one embodiment the one or more processors are further configured to identify the two NPUSCH format 2 resources from information received in the first DCI, wherein the first DCI contains a time or frequency offset of a first resource of the two NPUSCH format 2 resources and an additional time or frequency offset of the second resource of the two NPUSCH format 2 resources relative to the first resource.

[0087] In one embodiment the one or more processors are further configured to identify the two NPUSCH format 2 resources from information received in the first DCI and the second DCI when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB.

[0088] In one embodiment the one or more processors are further configured to decode the first DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as: mm mm Kit transmitted Bit ransmitted on Resou rce I on Resource 2

A A 0

A N 1

N A 1

N/DTX N/DTX 0

DTX DTX N.A. N.A.

Or

TB I TB2 Bit transmitted Bit transmitted on Resou rce 1 on Resource 2

A A 1

A N 0

N A 1

N/DTX N/DTX 0

DTX DTX N.A. N.A. where TBI is the first NPDSCH TB, TB2 is the second NPDSCH TB, A is ACK, N is NACK, DTX is the DL assignment was not detected and N.A. is not applicable.

[0089] In one embodiment In one embodiment wherein the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 ms delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

[0090] In one embodiment the one or more processors are further configured to decode the first DCI and the second DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

N/DTX A 1

N N 0

DTX I )TX N.A. N.A.

Or

TB I Ι Ϊ2 Bit transmitted Bit transmitted on Resou rce 1 on Resource 2

A A 1

A N /DTX 0

N/DTX A 1

N N 0

DTX I )TX N.A. N.A. where TBI is the first NPDSCH TB, TB2 is the second NPDSCH TB, A is ACK, N is NACK, DTX is the DL assignment was not detected and N.A. is not applicable.

[0091] In one embodiment the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 millisecond (ms) delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

[0092] In one embodiment the one or more processors are further configured to encode the ACK/NACK feedback for the first NPUSCH TB in a first NPUSCH format 2 transmission and encode the ACK/NACK feedback for the second NPUSCH TB in a second NPUSCH format 2 transmission.

[0093] In one embodiment the one or more processors are further configured to decode the first DCI to determine a schedule of the first NPDSCH TB and the second NPDSCH TB or a first NPUSCH TB and a second NPUSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are scheduled with a same modulation and coding scheme (MCS) value, and/or a same number of subframes (N_SF) value, and the first NPUSCH TB and the second NPUSCH TB are scheduled with the same MCS and/or a same number of resource units (N_RU) value. [0094] In one embodiment the one or more processors are further configured to decode, in the first DCI, a first modulation and coding scheme (MCS) value, and a first number of subframes (N SF) value for a first NPDSCH TB or the first MCS value and a first number of resource units (N RU) value for a first NPUSCH TB. Additionally, the one or more processors are further configured to decode, in the first DCI, , a second modulation and coding scheme (MCS) value, and a second number of subframes (N_SF) value for a second NPDSCH TB or the second MCS value and a second number of resource units (N RU) value for a second NPUSCH TB.

[0095] In one embodiment the one or more processors are further configured to decode in the first DCI an indication that the second MCS value, the second N_SF value, and the second N_RU value are offset relative to the first MCS value, the first N_SF value, and the first N_RU value respectively using a 1-bit or a 2-bit offset.

[0096] In one embodiment the one or more processors are further configured to decode in the first DCI or the second DCI: a redundancy value (RV) or a new data indicator (NDI) for each of the first NPDSCH TB and the second NPDSCH TB. Or, the one or more processors can be further configured to decode in the first DCI or the second DCI a same RV or a same NDI for both of the first NPDSCH TB and the second NPDSCH TB.

[0097] In one embodiment one or more of the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to decode a scheduling delay for the first NPDSCH TB. The one or more processors are further configured to schedule the second NPDSCH TB for 8 milliseconds (ms) after the first NPDSCH TB. Or , the one or more processors are further configured to schedule an additional delay of K ms from the end of first NPDSCH TB to the start of second NPDSCH TB, where K is predetermined or is defined as a function of a maximum number of repetitions (Rmax) of a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS). Or the one or more processors are further configured to schedule the second NPDSCH TB without gap constraint after the first NPDSCH TB.

[0098] In one embodiment one or more of the first DCI and the second DCI are used to schedule a first NPUSCH TB and a second NPUSCH TB, the one or more processors are further configured to decode a scheduling delay for a first NPUSCH TB in one of the first DCI or the second DCI. And, the one or more processors are further configured to schedule the second NPUSCH TB for 3 milliseconds (ms) after the first NPUSCH TB. Or, the one or more processors are further configured to schedule the second NPUSCH TB directly after the first NPUSCH TB. Or, the one or more processors are further configured to decode a field indicating a dynamic gap value between the first NPUSCH TB and the second NPUSCH TB.

[0099] In one embodiment the one or more processors are further configured to determine that two HARQ processes can be used at the UE based on a function of an aggregation level (AL) where AL is 1, or a repetition level (RL) used for a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS). Or, the one or more processors are further configured to determine that two HARQ processes can be used at the UE based on a function of a maximum number of repetitions (Rmax) for the NPDCCH USS is less than or equal to X, where X is a predetermined integer or X is configured by higher layers.

[00100] FIG 9 illustrates an architecture of a system 900 of a network in accordance with some embodiments. The system 900 is shown to include a user equipment (UE) 901 and a UE 902. The UEs 901 and 902 are illustrated as smartphones (e.g., handheld touchscreen mobile computing devices connectable to one or more cellular networks), but may also comprise any mobile or non-mobile computing device, such as Personal Data Assistants (PDAs), pagers, laptop computers, desktop computers, wireless handsets, or any computing device including a wireless communications interface.

[00101] In some embodiments, any of the UEs 901 and 902 can comprise an Internet of Things (IoT) UE, which can comprise a network access layer designed for low-power IoT applications utilizing short-lived UE connections. An IoT UE can utilize

technologies such as machine-to-machine (M2M) or machine-type communications (MTC) for exchanging data with an MTC server or device via a public land mobile network (PLMN), Proximity -Based Service (ProSe) or device-to-device (D2D) communication, sensor networks, or IoT networks. The M2M or MTC exchange of data may be a machine-initiated exchange of data. An IoT network describes interconnecting IoT UEs, which may include uniquely identifiable embedded computing devices (within the Internet infrastructure), with short-lived connections. The IoT UEs may execute background applications (e.g., keep-alive messages, status updates, etc.) to facilitate the connections of the IoT network.

[00102] The UEs 901 and 902 may be configured to connect, e.g., communicatively couple, with a radio access network (RAN) 910— the RAN 910 may be, for example, an Evolved Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (E-UTRAN), a NextGen RAN (NG RAN), or some other type of RAN. The UEs 901 and 902 utilize connections 903 and 904, respectively, each of which comprises a physical communications interface or layer (discussed in further detail below); in this example, the connections 903 and 904 are illustrated as an air interface to enable communicative coupling, and can be consistent with cellular communications protocols, such as a Global System for Mobile Communications (GSM) protocol, a code-division multiple access (CDMA) network protocol, a Push-to-Talk (PTT) protocol, a PTT over Cellular (POC) protocol, a Universal Mobile Telecommunications System (UMTS) protocol, a 3GPP Long Term Evolution (LTE) protocol, a fifth generation (5G) protocol, a New Radio (NR) protocol, and the like.

[00103] In this embodiment, the UEs 901 and 902 may further directly exchange communication data via a ProSe interface 905. The ProSe interface 905 may alternatively be referred to as a sidelink interface comprising one or more logical channels, including but not limited to a Physical Sidelink Control Channel (PSCCH), a Physical Sidelink Shared Channel (PSSCH), a Physical Sidelink Discovery Channel (PSDCH), and a Physical Sidelink Broadcast Channel (PSBCH).

[00104] The UE 902 is shown to be configured to access an access point (AP) 906 via connection 907. The connection 907 can comprise a local wireless connection, such as a connection consistent with any IEEE 802.11 protocol, wherein the AP 906 would comprise a wireless fidelity (WiFi®) router. In this example, the AP 906 is shown to be connected to the Internet without connecting to the core network of the wireless system (described in further detail below).

[00105] The RAN 910 can include one or more access nodes that enable the connections 903 and 904. These access nodes (ANs) can be referred to as base stations (BSs), NodeBs, evolved NodeBs (eNBs), next Generation NodeBs (gNB), RAN nodes, and so forth, and can comprise ground stations (e.g., terrestrial access points) or satellite stations providing coverage within a geographic area (e.g., a cell). The RAN 910 may include one or more RAN nodes for providing macrocells, e.g., macro RAN node 911, and one or more RAN nodes for providing femtocells or picocells (e.g., cells having smaller coverage areas, smaller user capacity, or higher bandwidth compared to macrocells), e.g., low power (LP) RAN node 912.

[00106] Any of the RAN nodes 911 and 912 can terminate the air interface protocol and can be the first point of contact for the UEs 901 and 902. In some embodiments, any of the RAN nodes 911 and 912 can fulfill various logical functions for the RAN 910 including, but not limited to, radio network controller (RNC) functions such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management.

[00107] In accordance with some embodiments, the UEs 901 and 902 can be configured to communicate using Orthogonal Frequency-Division Multiplexing (OFDM) communication signals with each other or with any of the RAN nodes 911 and 912 over a multicarrier communication channel in accordance various communication techniques, such as, but not limited to, an Orthogonal Frequency -Division Multiple Access (OFDMA) communication technique (e.g., for downlink communications) or a Single Carrier Frequency Division Multiple Access (SC-FDMA) communication technique (e.g., for uplink and ProSe or sidelink communications), although the scope of the embodiments is not limited in this respect. The OFDM signals can comprise a plurality of orthogonal subcarriers.

[00108] In some embodiments, a downlink resource grid can be used for downlink transmissions from any of the RAN nodes 911 and 912 to the UEs 901 and 902, while uplink transmissions can utilize similar techniques. The grid can be a time-frequency grid, called a resource grid or time-frequency resource grid, which is the physical resource in the downlink in each slot. Such a time-frequency plane representation is a common practice for OFDM systems, which makes it intuitive for radio resource allocation. Each column and each row of the resource grid corresponds to one OFDM symbol and one OFDM subcarrier, respectively. The duration of the resource grid in the time domain corresponds to one slot in a radio frame. The smallest time-frequency unit in a resource grid is denoted as a resource element. Each resource grid comprises a number of resource blocks, which describe the mapping of certain physical channels to resource elements. Each resource block comprises a collection of resource elements; in the frequency domain, this may represent the smallest quantity of resources that currently can be allocated. There are several different physical downlink channels that are conveyed using such resource blocks.

[00109] The physical downlink shared channel (PDSCH) may carry user data and higher-layer signaling to the UEs 901 and 902. The physical downlink control channel (PDCCH) may carry information about the transport format and resource allocations related to the PDSCH channel, among other things. It may also inform the UEs 901 and 902 about the transport format, resource allocation, and H-ARQ (Hybrid Automatic

Repeat Request) information related to the uplink shared channel. Typically, downlink scheduling (assigning control and shared channel resource blocks to the UE 902 within a cell) may be performed at any of the RAN nodes 911 and 912 based on channel quality information fed back from any of the UEs 901 and 902. The downlink resource assignment information may be sent on the PDCCH used for (e.g., assigned to) each of the UEs 901 and 902.

[00110] The PDCCH may use control channel elements (CCEs) to convey the control information. Before being mapped to resource elements, the PDCCH complex-valued symbols may first be organized into quadruplets, which may then be permuted using a sub-block interleaver for rate matching. Each PDCCH may be transmitted using one or more of these CCEs, where each CCE may correspond to nine sets of four physical resource elements known as resource element groups (REGs). Four Quadrature Phase Shift Keying (QPSK) symbols may be mapped to each REG. The PDCCH can be transmitted using one or more CCEs, depending on the size of the downlink control information (DCI) and the channel condition. There can be four or more different

PDCCH formats defined in LTE with different numbers of CCEs (e.g., aggregation level, L=l, 2, 4, or 8).

[00111] Some embodiments may use concepts for resource allocation for control channel information that are an extension of the above-described concepts. For example, some embodiments may utilize an enhanced physical downlink control channel

(EPDCCH) that uses PDSCH resources for control information transmission. The EPDCCH may be transmitted using one or more enhanced the control channel elements (ECCEs). Similar to above, each ECCE may correspond to nine sets of four physical resource elements known as an enhanced resource element groups (EREGs). An ECCE may have other numbers of EREGs in some situations.

[00112] The RAN 910 is shown to be communicatively coupled to a core network (CN) 920— via an SI interface 913. In embodiments, the CN 920 may be an evolved packet core (EPC) network, a NextGen Packet Core (NPC) network, or some other type of CN. In this embodiment the SI interface 913 is split into two parts: the Sl-U interface 914, which carries traffic data between the RAN nodes 911 and 912 and the serving gateway (S-GW) 922, and the Sl-mobility management entity (MME) interface 915, which is a signaling interface between the RAN nodes 911 and 912 and MMEs 921.

[00113] In this embodiment, the CN 920 comprises the MMEs 921, the S-GW 922, the Packet Data Network (PDN) Gateway (P-GW) 923, and a home subscriber server (HSS) 924. The MMEs 921 may be similar in function to the control plane of legacy Serving General Packet Radio Service (GPRS) Support Nodes (SGSN). The MMEs 921 may manage mobility aspects in access such as gateway selection and tracking area list management. The HSS 924 may comprise a database for network users, including subscription-related information to support the network entities' handling of

communication sessions. The CN 920 may comprise one or several HSSs 924, depending on the number of mobile subscribers, on the capacity of the equipment, on the organization of the network, etc. For example, the HSS 924 can provide support for routing/roaming, authentication, authorization, naming/addressing resolution, location dependencies, etc.

[00114] The S -GW 922 may terminate the S 1 interface 913 towards the RAN 910, and routes data packets between the RAN 910 and the CN 920. In addition, the S-GW 922 may be a local mobility anchor point for inter-RAN node handovers and also may provide an anchor for inter-3GPP mobility. Other responsibilities may include lawful intercept, charging, and some policy enforcement.

[00115] The P-GW 923 may terminate an SGi interface toward a PDN. The P-GW 923 may route data packets between the EPC network 923 and extemal networks such as a network including the application server 930 (alternatively referred to as application function (AF)) via an Internet Protocol (IP) interface 925. Generally, the application server 930 may be an element offering applications that use IP bearer resources with the core network (e.g., UMTS Packet Services (PS) domain, LTE PS data services, etc.). In this embodiment, the P-GW 923 is shown to be communicatively coupled to an application server 930 via an IP communications interface 925. The application server 930 can also be configured to support one or more communication services (e.g., Voice- over-Internet Protocol (VoIP) sessions, PTT sessions, group communication sessions, social networking services, etc.) for the UEs 901 and 902 via the CN 920.

[00116] The P-GW 923 may further be a node for policy enforcement and charging data collection. Policy and Charging Enforcement Function (PCRF) 926 is the policy and charging control element of the CN 920. In a non-roaming scenario, there may be a single PCRF in the Home Public Land Mobile Network (HPLMN) associated with a UE's Internet Protocol Connectivity Access Network (IP-CAN) session. In a roaming scenario with local breakout of traffic, there may be two PCRFs associated with a UE's IP-CAN session: a Home PCRF (H-PCRF) within a HPLMN and a Visited PCRF (V-PCRF) within a Visited Public Land Mobile Network (VPLMN). The PCRF 926 may be communicatively coupled to the application server 930 via the P-GW 923. The application server 930 may signal the PCRF 926 to indicate a new service flow and select the appropriate Quality of Service (QoS) and charging parameters. The PCRF 926 may provision this rule into a Policy and Charging Enforcement Function (PCEF) (not shown) with the appropriate traffic flow template (TFT) and QoS class of identifier (QCI), which commences the QoS and charging as specified by the application server 930.

[00117] FIG 10 illustrates a diagram of a wireless device (e.g., UE) and a base station (e.g., eNodeB). FIG 10 illustrates example components of a device 1000 in accordance with some embodiments. In some embodiments, the device 1000 may include application circuitry 1002, baseband circuitry 1004, Radio Frequency (RF) circuitry 1006, front-end module (FEM) circuitry 1008, one or more antennas 1010, and power management circuitry (PMC) 1012 coupled together at least as shown. The components of the illustrated device 1000 may be included in a UE or a RAN node. In some embodiments, the device 1000 may include less elements (e.g., a RAN node may not utilize application circuitry 1002, and instead include a processor/controller to process IP data received from an EPC). In some embodiments, the device 1000 may include additional elements such as, for example, memory /storage, display, camera, sensor, or input/output (I/O) interface. In other embodiments, the components described below may be included in more than one device (e.g., said circuitries may be separately included in more than one device for Cloud-RAN (C-RAN) implementations).

[00118] The application circuitry 1002 may include one or more application processors. For example, the application circuitry 1002 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, etc.). The processors may be coupled with or may include memory /storage and may be configured to execute instructions stored in the memory /storage to enable various applications or operating systems to run on the device 1000. In some embodiments, processors of application circuitry 1002 may process IP data packets received from an EPC.

[00119] The baseband circuitry 1004 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The baseband circuitry 1004 may include one or more baseband processors or control logic to process baseband signals received from a receive signal path of the RF circuitry 1006 and to generate baseband signals for a transmit signal path of the RF circuitry 1006. Baseband processing circuity 1004 may interface with the application circuitry 1002 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 1006. For example, in some embodiments, the baseband circuitry 1004 may include a third generation (3G) baseband processor 1004A, a fourth generation (4G) baseband processor 1004B, a fifth generation (5G) baseband processor 1004C, or other baseband processor(s) 1004D for other existing generations, generations in development or to be developed in the future (e.g., second generation (2G), silOh generation (6G), etc.). The baseband circuitry 1004 (e.g., one or more of baseband processors 1004A-D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 1006. In other embodiments, some or all of the functionality of baseband processors 1004A-D may be included in modules stored in the memory 1004G and executed via a Central Processing Unit (CPU) 1004E. The radio control functions may include, but are not limited to, signal modulation/demodulation, encoding/decoding, radio frequency shifting, etc. In some embodiments,

modulation/demodulation circuitry of the baseband circuitry 1004 may include Fast- Fourier Transform (FFT), precoding, or constellation mapping/demapping functionality. In some embodiments, encoding/decoding circuitry of the baseband circuitry 1004 may include convolution, tail-biting convolution, turbo, Viterbi, or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.

[00120] In some embodiments, the baseband circuitry 1004 may include one or more audio digital signal processor(s) (DSP) 1004F. The audio DSP(s) 1004F may be include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments. Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 1004 and the application circuitry 1002 may be implemented together such as, for example, on a system on a chip (SOC).

[00121] In some embodiments, the baseband circuitry 1004 may provide for communication compatible with one or more radio technologies. For example, in some embodiments, the baseband circuitry 1004 may support communication with an evolved universal terrestrial radio access network (EUTRAN) or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), a wireless personal area network (WPAN). Embodiments in which the baseband circuitry 1004 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.

[00122] RF circuitry 1006 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 1006 may include switches, filters, amplifiers, etc. to facilitate the communication with the wireless network. RF circuitry 1006 may include a receive signal path which may include circuitry to down-convert RF signals received from the FEM circuitry 1008 and provide baseband signals to the baseband circuitry 1004. RF circuitry 1006 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband circuitry 1004 and provide RF output signals to the FEM circuitry 1008 for transmission.

[00123] In some embodiments, the receive signal path of the RF circuitry 1006 may include mixer circuitry 1006a, amplifier circuitry 1006b and filter circuitry 1006c. In some embodiments, the transmit signal path of the RF circuitry 1006 may include filter circuitry 1006c and mixer circuitry 1006a. RF circuitry 1006 may also include synthesizer circuitry 1006d for synthesizing a frequency for use by the mixer circuitry 1006a of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 1006a of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 1008 based on the synthesized frequency provided by synthesizer circuitry 1006d. The amplifier circuitry 1006b may be configured to amplify the down-converted signals and the filter circuitry 1006c may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry 1004 for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a necessity. In some embodiments, mixer circuitry 1006a of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

[00124] In some embodiments, the mixer circuitry 1006a of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 1006d to generate RF output signals for the FEM circuitry 1008. The baseband signals may be provided by the baseband circuitry 1004 and may be filtered by filter circuitry 1006c.

[00125] In some embodiments, the mixer circuitry 1006a of the receive signal path and the mixer circuitry 1006a of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and upconversion, respectively. In some embodiments, the mixer circuitry 1006a of the receive signal path and the mixer circuitry 1006a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 1006a of the receive signal path and the mixer circuitry 1006a may be arranged for direct downconversion and direct upconversion, respectively. In some embodiments, the mixer circuitry 1006a of the receive signal path and the mixer circuitry 1006a of the transmit signal path may be configured for super-heterodyne operation.

[00126] In some embodiments, the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals and the input baseband signals may be digital baseband signals. In these alternate embodiments, the RF circuitry 1006 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry and the baseband circuitry 1004 may include a digital baseband interface to communicate with the RF circuitry 1006.

[00127] In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the

embodiments is not limited in this respect.

[00128] In some embodiments, the synthesizer circuitry 1006d may be a fractional -N synthesizer or a fractional N/N+l synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 1006d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.

[00129] The synthesizer circuitry 1006d may be configured to synthesize an output frequency for use by the mixer circuitry 1006a of the RF circuitry 1006 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 1006d may be a fractional N/N+l synthesizer.

[00130] In some embodiments, frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a necessity. Divider control input may be provided by either the baseband circuitry 1004 or the applications processor 1002 depending on the desired output frequency. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications processor 1002. [00131] Synthesizer circuitry 1006d of the RF circuitry 1006 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by either N or N+l (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. In these embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[00132] In some embodiments, synthesizer circuitry 1006d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fLO). In some embodiments, the RF circuitry 1006 may include an IQ/polar converter.

[00133] FEM circuitry 1008 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 1010, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 1006 for further processing. FEM circuitry 1008 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 1006 for transmission by one or more of the one or more antennas 1010. In various embodiments, the amplification through the transmit or receive signal paths may be done solely in the RF circuitry 1006, solely in the FEM 1008, or in both the RF circuitry 1006 and the FEM 1008.

[00134] In some embodiments, the FEM circuitry 1008 may include a TX/RX switch to switch between transmit mode and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include an LNA to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 1006). The transmit signal path of the FEM circuitry 1008 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 1006), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 1010).

[00135] In some embodiments, the PMC 1012 may manage power provided to the baseband circuitry 1004. In particular, the PMC 1012 may control power-source selection, voltage scaling, battery charging, or DC-to-DC conversion. The PMC 1012 may often be included when the device 1000 is capable of being powered by a battery, for example, when the device is included in a UE. The PMC 1012 may increase the power conversion efficiency while providing desirable implementation size and heat dissipation

characteristics.

[00136] While FIG 10 shows the PMC 1012 coupled only with the baseband circuitry 1004. However, in other embodiments, the PMC 10 12 may be additionally or alternatively coupled with, and perform similar power management operations for, other components such as, but not limited to, application circuitry 1002, RF circuitry 1006, or FEM 1008.

[00137] In some embodiments, the PMC 1012 may control, or otherwise be part of, various power saving mechanisms of the device 1000. For example, if the device 1000 is in an RRC_Connected state, where it is still connected to the RAN node as it expects to receive traffic shortly, then it may enter a state known as Discontinuous Reception Mode (DRX) after a period of inactivity. During this state, the device 1000 may power down for brief intervals of time and thus save power.

[00138] If there is no data traffic activity for an elOended period of time, then the device 1000 may transition off to an RRC_Idle state, where it disconnects from the network and does not perform operations such as channel quality feedback, handover, etc. The device 1000 goes into a very low power state and it performs paging where again it periodically wakes up to listen to the network and then powers down again. The device 1000 may not receive data in this state, in order to receive data, it can transition back to RRC Connected state. [00139] An additional power saving mode may allow a device to be unavailable to the network for periods longer than a paging interval (ranging from seconds to a few hours). During this time, the device is totally unreachable to the network and may power down completely. Any data sent during this time incurs a large delay and it is assumed the delay is acceptable.

[00140] Processors of the application circuitry 1002 and processors of the baseband circuitry 1004 may be used to execute elements of one or more instances of a protocol stack. For example, processors of the baseband circuitry 1004, alone or in combination, may be used execute Layer 3, Layer 2, or Layer 1 functionality, while processors of the application circuitry 1004 may utilize data (e.g., packet data) received from these layers and further execute Layer 4 functionality (e.g., transmission communication protocol (TCP) and user datagram protocol (UDP) layers). As referred to herein, Layer 3 may comprise a radio resource control (RRC) layer, described in further detail below. As referred to herein, Layer 2 may comprise a medium access control (MAC) layer, a radio link control (RLC) layer, and a packet data convergence protocol (PDCP) layer, described in further detail below. As referred to herein, Layer 1 may comprise a physical (PHY) layer of a UE/RAN node, described in further detail below.

[00141] FIG. 11 illustrates example interfaces of baseband circuitry in accordance with some embodiments. As discussed above, the baseband circuitry 1004 of FIG. 10 may comprise processors 1004A-1004E and a memory 1004G utilized by said processors. Each of the processors 1004A-1004E may include a memory interface, 1104A-1104E, respectively, to send/receive data to/from the memory 1004G

[00142] The baseband circuitry 1004 may further include one or more interfaces to communicatively couple to other circuitries/devices, such as a memory interface 1112 (e.g., an interface to send/receive data to/from memory elOernal to the baseband circuitry 1004), an application circuitry interface 1114 (e.g., an interface to send/receive data to/from the application circuitry 1002 of FIG 10), an RF circuitry interface 1116 (e.g., an interface to send/receive data to/from RF circuitry 1006 of FIG 10), a wireless hardware connectivity interface 1118 (e.g., an interface to send/receive data to/from Near Field Communication (NFC) components, Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi® components, and other communication components), and a power management interface 1120 (e.g., an interface to send/receive power or control signals to/from the PMC 1012.

[00143] FIG 12 provides an example illustration of the wireless device, such as a user equipment (UE), a mobile station (MS), a mobile wireless device, a mobile

communication device, a tablet, a handset, or other type of wireless device. The wireless device can include one or more antennas configured to communicate with a node, macro node, low power node (LPN), or, transmission station, such as a base station (BS), an evolved Node B (eNB), a baseband processing unit (BBU), a remote radio head (RRH), a remote radio equipment (RRE), a relay station (RS), a radio equipment (RE), or other type of wireless wide area network (WWAN) access point. The wireless device can be configured to communicate using at least one wireless communication standard such as, but not limited to, 3 GPP LTE, WiMAX, High Speed Packet Access (HSPA), Bluetooth, and WiFi. The wireless device can communicate using separate antennas for each wireless communication standard or shared antennas for multiple wireless communication standards. The wireless device can communicate in a wireless local area network

(WLAN), a wireless personal area network (WPAN), and/or a WWAN. The wireless device can also comprise a wireless modem. The wireless modem can comprise, for example, a wireless radio transceiver and baseband circuitry (e.g., a baseband processor). The wireless modem can, in one example, modulate signals that the wireless device transmits via the one or more antennas and demodulate signals that the wireless device receives via the one or more antennas.

[00144] FIG 12 also provides an illustration of a microphone and one or more speakers that can be used for audio input and output from the wireless device. The display screen can be a liquid crystal display (LCD) screen, or other type of display screen such as an organic light emitting diode (OLED) display. The display screen can be configured as a touch screen. The touch screen can use capacitive, resistive, or another type of touch screen technology. An application processor and a graphics processor can be coupled to internal memory to provide processing and display capabilities. A non-volatile memory port can also be used to provide data input/output options to a user. The non-volatile memory port can also be used to expand the memory capabilities of the wireless device. A keyboard can be integrated with the wireless device or wirelessly connected to the wireless device to provide additional user input. A virtual keyboard can also be provided using the touch screen.

Examples

[00145] The following examples pertain to specific technology embodiments and point out specific features, elements, or actions that can be used or otherwise combined in achieving such embodiments.

[00146] Example 1 includes an apparatus of an evolved node B (eNB) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink or uplink, the apparatus comprising: one or more processors configured to: encode a first downlink control information (DCI) and a second DCI for a selected user equipment (UE) in a narrow band physical downlink control channel (NPDCCH); and encode data for transmission in a narrow band physical downlink shared channel (NPDSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to receiving the data encoded in the NPDSCH; and a memory interface configured to receive from a memory the data.

[00147] Example 2 includes the apparatus of example 1, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide at least a 2 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH or a NPDCCH candidate to be monitored by the UE and a start of a first NPDSCH transport block (TB) scheduled by the first DCI carried in the search space of the NPDCCH.

[00148] Example 3 includes the apparatus of example 1 or 2, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide a four millisecond (ms) gap between an end of the second DCI and a start of a first NPDSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[00149] Example 4 includes the apparatus of example 1 or 2, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein a scheduling delay is selected with a starting subframe of a first NPDSCH that is n+5+x NB-IoT DL subframes from the end of the NPDCCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format Nl, wherein the set of values for a single DCI associated with a single HARQ process is {0, 4, 8 , 12, 16, 32, 64, 128} or the set of values for two DCI associated with multiple HARQ processes {0, 1, 2, 3, 4, 6, 12, 16} .

[00150] Example 5 includes the apparatus of example 1, wherein the one or more processors are further configured to: decode data received at the eNB in a narrow band physical uplink shared channel (NPUSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to transmitting the data encoded by the UE in the NPUSCH.

[00151] Example 6 includes the apparatus of example 2 or 5, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein the data is scheduled to provide an 8 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH where the UE needs to monitor and a start of a first NPUSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[00152] Example 7 includes the apparatus of example 2 or 5, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein a scheduling delay is selected with a starting subframe of a first NPUSCH that is the first UL subframe after n+x milliseconds from the end of the NPDCCH scheduling the NPUSCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format NO, wherein the set of values for a single DCI associated with a single HARQ process is {8 , 16, 32, 64} or the set or subset of values for two DCI associated with two HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

[00153] Example 8 includes an apparatus of a user equipment (UE) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink, the apparatus comprising: one or more processors configured to: decode data received in a first narrow band physical downlink shared channel (NPDSCH) transport block (TB) and a second NPDSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are associated with one or more of a first downlink control information (DCI) and a second DCI; and encode

acknowledgement/negative acknowledgement (ACK/NACK) feedback for the first NPDSCH TB and the second NPDSCH TB in one or more bits of feedback transmitted in one or more narrow band physical uplink shared channel (NPUSCH) format 2 transmissions; and a memory interface configured to send to the memory the ACK/NACK feedback.

[00154] Example 9 includes the apparatus of example 8, wherein the one or more processors are further configured to decode one or more of the first DCI or the second DCI to determine a scheduled timing relationship of the first NPDSCH TB and the second NPDSCH TB, wherein the scheduled timing relationship comprises: a gap less than 8 milliseconds (ms) between the reception of the first NPDSCH TB and the second NPDSCH TB; or no gap between the reception of the first NPDSCH TB and the second NPDSCH TB at the UE, wherein a transmission and the reception of the first NPDSCH TB and the second NPDSCH TB are scheduled to be consecutive in time.

[00155] Example 10 includes the apparatus of example 8 or 9, wherein the one or more processors are further configured to encode the ACK/NACK feedback using

HARQ/ Acknowledgement (ACK) bundling with a single ACK/NACK response for the first NPDSCH TB and the second NPDSCH TB combined in a single bit of feedback via a logical AND operation in a single NPUSCH format 2 transmission.

[00156] Example 11 includes the apparatus of example 8, wherein the one or more processors are further configured to decode an additional bit in one of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

[00157] Example 12 includes the apparatus of example 8 or 9, wherein, when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to: decode a HARQ process identification (ID) in each of the first DCI and the second DCI via a 1-bit field to indicate a corresponding TB; associate each of the first NPDSCH TB and the second NPDSCH TB with a HARQ process ID based on a predefined fixed relationship between the first NPDSCH TB and the second NPDSCH TB with the HARQ process ID; and/or decode an additional bit in each of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period. [00158] Example 13 includes the apparatus of example 8, wherein the one or more processors are further configured to encode a first ACK/NACK feedback and a second ACK/NACK feedback for a first TB and a second TB respectively in a single NPUSCH format 2 transmission, wherein a first bit is associated with the first TB and a second bit is associated with the second TB.

[00159] Example 14 includes the apparatus of example 8, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2

transmission to provide feedback via resource selection.

[00160] Example 15 includes the apparatus of example 9 or 14, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2

transmission to provide feedback via resource selection, wherein the resource selection comprises two NPUSCH format 2 resources that are configured in a time domain or two NPUSCH format 2 resources that are configured in a frequency domain.

[00161] Example 16 includes the apparatus of example 15, wherein the one or more processors are further configured to select one of the two NPUSCH format 2 resources to send a single bit of feedback.

[00162] Example 17 includes the apparatus of example 15, wherein the one or more processors are further configured to identify the two NPUSCH format 2 resources from information received in the first DCI, wherein the first DCI contains a time or frequency offset of a first resource of the two NPUSCH format 2 resources and an additional time or frequency offset of the second resource of the two NPUSCH format 2 resources relative to the first resource.

[00163] Example 18 includes the apparatus of example 15, wherein the one or more processors are further configured to identify the two NPUSCH format 2 resources from information received in the first DCI and the second DCI when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB.

[00164] Example 19 includes the apparatus of example 9 or 13, wherein the one or more processors are further configured to decode the first DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

Or

where TBI is the first NPDSCH TB, TB2 is the second NPDSCH TB, A is ACK, N is NACK, DTX is the DL assignment was not detected and N.A. is not applicable.

[00165] Example 20 includes the apparatus of example 19, wherein the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 ms delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

[00166] Example 21 includes the apparatus of example 9 or 13, wherein the one or more processors are further configured to decode the first DCI and the second DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

Ι ΙΪ Ι TB2 Bit transmitted Bit transmitted on Resou rce 1 on Resource 2

A A 0

A N/DTX 1

N/DTX A 1

N N 0

DTX DTX N.A. N.A.

Or

Ι ΙΪ Ι TB2 Bit transmitted Bit transmitted on Resou rce 1 on Resource 2

A A 1

A N/DTX 0

N/DTX A 1

N N 0

[00167] Example 22 includes the apparatus of example 21, wherein the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 millisecond (ms) delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

[00168] Example 23 includes the apparatus of example 8, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPUSCH TB in a first NPUSCH format 2 transmission and encode the ACK/NACK feedback for the second NPUSCH TB in a second NPUSCH format 2 transmission. [00169] Example 24 includes the apparatus of example 8, wherein the one or more processors are further configured to decode the first DCI to determine a schedule of the first NPDSCH TB and the second NPDSCH TB or a first NPUSCH TB and a second NPUSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are scheduled with a same modulation and coding scheme (MCS) value, a same number of subframes (N SF) value, and the first NPUSCH TB and the second NPUSCH TB are scheduled with the same MCS and a same number of resource units (N_RU) value.

[00170] Example 25 includes the apparatus of example 8, wherein the one or more processors are further configured to: decode, in the first DCI, a first modulation and coding scheme (MCS) value, and a first number of subframes (N_SF) value for a first NPDSCH TB or the first MCS value and a first number of resource units (N RU) value for a first NPUSCH TB; and decode, in the first DCI, , a second modulation and coding scheme (MCS) value, and a second number of subframes (N_SF) value for a second NPDSCH TB or the second MCS value and a second number of resource units (N RU) value for a second NPUSCH TB.

[00171] Example 26 includes the apparatus of example 25, wherein the one or more processors are further configured to: decode in the first DCI an indication that the second MCS value, the second N_SF value, and the second N_RU value are offset relative to the first MCS value, the first N_SF value, and the first N_RU value respectively using a 1-bit or a 2-bit offset.

[00172] Example 27 includes the apparatus of example 8, wherein the one or more processors are further configured to decode in the first DCI or the second DCI: a redundancy value (RV) or a new data indicator (NDI) for each of the first NPDSCH TB and the second NPDSCH TB; or a same RV or a same NDI for both of the first NPDSCH TB and the second NPDSCH TB.

[00173] Example 28 includes the apparatus of example 8, wherein, when one or more of the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to: decode a scheduling delay for the first NPDSCH TB; schedule the second NPDSCH TB for 8 milliseconds (ms) after the first NPDSCH TB; or decode an additional delay of K ms, where K is predetermined or is defined as a function of a maximum number of repetitions (Rmax) of a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS).

[00174] Example 29 includes the apparatus of example 8, wherein, when one or more of the first DCI and the second DCI are used to schedule a first NPUSCH TB and a second NPUSCH TB, the one or more processors are further configured to: decode a scheduling delay for a first NPUSCH TB in one of the first DCI or the second DCI; and schedule the second NPUSCH TB for 3 milliseconds (ms) after the first NPUSCH TB; or schedule the second NPUSCH TB directly after the first NPUSCH TB; or decode a field indicating a dynamic gap value between the first NPUSCH TB and the second NPUSCH TB.

[00175] Example 30 includes the apparatus of example 8 or 9, wherein the one or more processors are further configured to: determine that two HARQ processes can be used at the UE based on a function of an aggregation level (AL) where AL is 1, or a repetition level (RL) used for a narrow band physical downlink control channel (NPDCCH) UE- specific search space (USS); or determine that two HARQ processes can be used at the UE based on a function of a maximum number of repetitions (Rmax) for the NPDCCH USS is less than or equal to X, where X is a predetermined integer or X is configured by higher layers.

[00176] Example 31 includes an apparatus of an evolved node B (eNB) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink or uplink, the apparatus comprising: one or more processors configured to: encode a first downlink control information (DCI) and a second DCI for a selected user equipment (UE) in a narrow band physical downlink control channel (NPDCCH); and encode data for transmission in a narrow band physical downlink shared channel (NPDSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to receiving the data encoded in the NPDSCH; and a memory interface configured to receive from a memory the data.

[00177] Example 32 includes the apparatus of example 31, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide at least a 2 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH or a NPDCCH candidate to be monitored by the UE and a start of a first NPDSCH transport block (TB) scheduled by the first DCI carried in the search space of the NPDCCH.

[00178] Example 33 includes the apparatus of example 31, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide a four millisecond (ms) gap between an end of the second DCI and a start of a first NPDSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[00179] Example 34 includes the apparatus of example 31, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein a scheduling delay is selected with a starting subframe of a first NPDSCH that is n+5+x NB-IoT DL subframes from the end of the NPDCCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format Nl, wherein the set of values for a single DCI associated with a single HARQ process is {0, 4, 8 , 12, 16, 32, 64, 128} or the set of values for two DCI associated with multiple HARQ processes {0, 1, 2, 3, 4, 6, 12, 16} .

[00180] Example 35 includes the apparatus of example 31, wherein the one or more processors are further configured to: decode data received at the eNB in a narrow band physical uplink shared channel (NPUSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to transmitting the data encoded by the UE in the NPUSCH.

[00181] Example 36 includes the apparatus of example 35, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein the data is scheduled to provide an 8 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH where the UE needs to monitor and a start of a first NPUSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

[00182] Example 37 includes the apparatus of example 35, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein a scheduling delay is selected with a starting subframe of a first NPUSCH that is the first UL subframe after n+x milliseconds from the end of the NPDCCH scheduling the NPUSCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format NO, wherein the set of values for a single DCI associated with a single HARQ process is {8 , 16, 32, 64} or the set or subset of values for two DCI associated with two HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

[00183] Example 38 includes an apparatus of a user equipment (UE) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink, the apparatus comprising: one or more processors configured to: decode data received in a first narrow band physical downlink shared channel (NPDSCH) transport block (TB) and a second NPDSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are associated with one or more of a first downlink control information (DCI) and a second DCI; and encode

[00184] Example 39 includes the apparatus of example 38, wherein the one or more processors are further configured to decode one or more of the first DCI or the second DCI to determine a scheduled timing relationship of the first NPDSCH TB and the second NPDSCH TB, wherein the scheduled timing relationship comprises: a gap less than 8 milliseconds (ms) between the reception of the first NPDSCH TB and the second NPDSCH TB; or no gap between the reception of the first NPDSCH TB and the second NPDSCH TB at the UE, wherein a transmission and the reception of the first NPDSCH TB and the second NPDSCH TB are scheduled to be consecutive in time.

[00185] Example 40 includes the apparatus of example 38, wherein the one or more processors are further configured to encode the ACK/NACK feedback using

[00186] Example 41 includes the apparatus of example 38, wherein the one or more processors are further configured to decode an additional bit in one of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

[00187] Example 42 includes the apparatus of example 38, wherein, when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to: decode a HARQ process identification (ID) in each of the first DCI and the second DCI via a 1-bit field to indicate a corresponding TB; associate each of the first NPDSCH TB and the second NPDSCH TB with a HARQ process ID based on a predefined fixed relationship between the first NPDSCH TB and the second NPDSCH TB with the HARQ process ID; and/or decode an additional bit in each of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

[00188] Example 43 includes the apparatus of example 38, wherein the one or more processors are further configured to encode a first ACK/NACK feedback and a second ACK/NACK feedback for a first TB and a second TB respectively in a single NPUSCH format 2 transmission, wherein a first bit is associated with the first TB and a second bit is associated with the second TB.

[00189] Example 44 includes the apparatus of example 38, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2

transmission to provide feedback via resource selection.

[00190] Example 45 includes the apparatus of example 44, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2

[00191] Example 46 includes the apparatus of example 45, wherein the one or more processors are further configured to select one of the two NPUSCH format 2 resources to send a single bit of feedback. [00192] Example 47 includes the apparatus of example 45, wherein the one or more processors are further configured to identify the two NPUSCH format 2 resources from information received in the first DCI, wherein the first DCI contains a time or frequency offset of a first resource of the two NPUSCH format 2 resources and an additional time or frequency offset of the second resource of the two NPUSCH format 2 resources relative to the first resource.

[00193] Example 48 includes the apparatus of example 45, wherein the one or more processors are further configured to identify the two NPUSCH format 2 resources from information received in the first DCI and the second DCI when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB.

[00194] Example 49 includes the apparatus of example 43, wherein the one or more processors are further configured to decode the first DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

Or

N/DTX N/DTX 0

[00195] Example 50 includes the apparatus of example 49, wherein the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 ms delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

[00196] Example 51 includes the apparatus of example 49, wherein the one or more processors are further configured to decode the first DCI and the second DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

Or

[00197] Example 52 includes the apparatus of example 51, wherein the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 millisecond (ms) delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

[00198] Example 53 includes the apparatus of example 38, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPUSCH TB in a first NPUSCH format 2 transmission and encode the ACK/NACK feedback for the second NPUSCH TB in a second NPUSCH format 2 transmission.

[00199] Example 54 includes the apparatus of example 38, wherein the one or more processors are further configured to decode the first DCI to determine a schedule of the first NPDSCH TB and the second NPDSCH TB or a first NPUSCH TB and a second

NPUSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are scheduled with a same modulation and coding scheme (MCS) value, a same number of subframes (N SF) value, and the first NPUSCH TB and the second NPUSCH TB are scheduled with the same MCS and a same number of resource units (N_RU) value.

[00200] Example 55 includes the apparatus of example 38, wherein the one or more processors are further configured to: decode, in the first DCI, a first modulation and coding scheme (MCS) value, and a first number of subframes (N_SF) value for a first NPDSCH TB or the first MCS value and a first number of resource units (N RU) value for a first NPUSCH TB; and decode, in the first DCI, , a second modulation and coding scheme (MCS) value, and a second number of subframes (N_SF) value for a second

NPDSCH TB or the second MCS value and a second number of resource units (N RU) value for a second NPUSCH TB.

[00201] Example 56 includes the apparatus of example 55, wherein the one or more processors are further configured to: decode in the first DCI an indication that the second MCS value, the second N_SF value, and the second N_RU value are offset relative to the first MCS value, the first N_SF value, and the first N_RU value respectively using a 1-bit or a 2-bit offset.

[00202] Example 57 includes the apparatus of example 38, wherein the one or more processors are further configured to decode in the first DCI or the second DCI: a redundancy value (RV) or a new data indicator (NDI) for each of the first NPDSCH TB and the second NPDSCH TB; or a same RV or a same NDI for both of the first NPDSCH TB and the second NPDSCH TB.

[00203] Example 58 includes the apparatus of example 38, wherein, when one or more of the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to: decode a scheduling delay for the first NPDSCH TB; schedule the second NPDSCH TB for 8 milliseconds (ms) after the first NPDSCH TB; or decode an additional delay of K ms, where K is predetermined or is defined as a function of a maximum number of repetitions (Rmax) of a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS).

[00204] Example 59 includes the apparatus of example 38, wherein, when one or more of the first DCI and the second DCI are used to schedule a first NPUSCH TB and a second NPUSCH TB, the one or more processors are further configured to: decode a scheduling delay for a first NPUSCH TB in one of the first DCI or the second DCI; and schedule the second NPUSCH TB for 3 milliseconds (ms) after the first NPUSCH TB; or schedule the second NPUSCH TB directly after the first NPUSCH TB; or decode a field indicating a dynamic gap value between the first NPUSCH TB and the second NPUSCH TB.

[00205] Example 60 includes the apparatus of example 38, wherein the one or more processors are further configured to: determine that two HARQ processes can be used at the UE based on a function of an aggregation level (AL) where AL is 1, or a repetition level (RL) used for a narrow band physical downlink control channel (NPDCCH) UE- specific search space (USS); or determine that two HARQ processes can be used at the UE based on a function of a maximum number of repetitions (Rmax) for the NPDCCH USS is less than or equal to X, where X is a predetermined integer or X is configured by higher layers. [00206] Example 61 includes an apparatus of an evolved node B (eNB) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink or uplink, the apparatus comprising: one or more processors configured to: encode a first downlink control information (DCI) and a second DCI for a selected user equipment (UE) in a narrow band physical downlink control channel (NPDCCH); and encode data for transmission in a narrow band physical downlink shared channel (NPDSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to receiving the data encoded in the NPDSCH; and a memory interface configured to receive from a memory the data.

[00207] Example 62 includes the apparatus of example 61, wherein the one or more processors are further configured to: encode data for transmission in the NPDSCH, wherein the data is scheduled to provide at least a 2 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH or a NPDCCH candidate to be monitored by the UE and a start of a first NPDSCH transport block (TB) scheduled by the first DCI carried in the search space of the NPDCCH; or decode data received at the eNB in a narrow band physical uplink shared channel (NPUSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to transmitting the data encoded by the UE in the NPUSCH.

[00208] Example 63 includes the apparatus of example 61 or 62, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide a four millisecond (ms) gap between an end of the second DCI and a start of a first NPDSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH or a scheduling delay is selected with a starting subframe of a first NPDSCH that is n+5+x NB-IoT DL subframes from the end of the NPDCCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format Nl, wherein the set of values for a single DCI associated with a single HARQ process is {0, 4, 8 , 12, 16, 32, 64, 128} or the set of values for two DCI associated with multiple HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

[00209] Example 64 includes the apparatus of example 62 or 63, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein the data is scheduled to provide an 8 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH where the UE needs to monitor and a start of a first NPUSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH, or wherein a scheduling delay is selected with a starting subframe of a first NPUSCH that is the first UL subframe after n+x milliseconds from the end of the NPDCCH scheduling the NPUSCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format NO, wherein the set of values for a single DCI associated with a single HARQ process is {8 , 16, 32, 64} or the set or subset of values for two DCI associated with two HARQ processes {0, 1, 2, 3, 4, 6, 12, 16} .

[00210] Example 65 includes an apparatus of a user equipment (UE) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink and uplink, the apparatus comprising: one or more processors configured to: decode data received in a first narrow band physical downlink shared channel (NPDSCH) transport block (TB) and a second NPDSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are associated with one or more of a first downlink control information (DCI) and a second DCI; and encode

[00211] Example 66 includes the apparatus of example 65, wherein the one or more processors are further configured to: decode one or more of the first DCI or the second DCI to determine a scheduled timing relationship of the first NPDSCH TB and the second NPDSCH TB, wherein the scheduled timing relationship comprises: a gap less than 8 milliseconds (ms) between the reception of the first NPDSCH TB and the second NPDSCH TB; or no gap between the reception of the first NPDSCH TB and the second NPDSCH TB at the UE, wherein a transmission and the reception of the first NPDSCH TB and the second NPDSCH TB are scheduled to be consecutive in time; or encode the ACK/NACK feedback using HARQ/ Acknowledgement (ACK) bundling with a single ACK/NACK response for the first NPDSCH TB and the second NPDSCH TB combined in a single bit of feedback via a logical AND operation in a single NPUSCH format 2 transmission; decode an additional bit in one of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period; or identify the two NPUSCH format 2 resources from information received in the first DCI, wherein the first DCI contains a time or frequency offset of a first resource of the two NPUSCH format 2 resources and an additional time or frequency offset of the second resource of the two NPUSCH format 2 resources relative to the first resource.

[00212] Example 67 includes the apparatus of example 65 or 66, wherein, when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to: decode a HARQ process identification (ID) in each of the first DCI and the second DCI via a 1-bit field to indicate a corresponding TB; associate each of the first NPDSCH TB and the second NPDSCH TB with a HARQ process ID based on a predefined fixed relationship between the first NPDSCH TB and the second NPDSCH TB with the HARQ process ID; and/or decode an additional bit in each of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

[00213] Example 68 includes the apparatus of example 65, wherein the one or more processors are further configured to: encode a first ACK/NACK feedback and a second ACK/NACK feedback for a first TB and a second TB respectively in a single NPUSCH format 2 transmission, wherein a first bit is associated with the first TB and a second bit is associated with the second TB; or encode the ACK/NACK feedback for the first

NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2

[00214] Example 69 includes the apparatus of example 68, wherein the one or more processors are further configured to decode the first DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

Or

[00215] Example 70 includes the apparatus of example 69, wherein the one or more processors are further configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 ms delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource; a redundancy value (RV) or a new data indicator (NDI) for each of the first NPDSCH TB and the second NPDSCH TB; or a same RV or a same NDI for both of the first NPDSCH TB and the second NPDSCH TB.

[00216] Example 71 includes the apparatus of example 65, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPUSCH TB in a first NPUSCH format 2 transmission and encode the ACK/NACK feedback for the second NPUSCH TB in a second NPUSCH format 2 transmission. [00217] Example 72 includes the apparatus of example 65, wherein the one or more processors are further configured to: decode, in the first DCI, a first modulation and coding scheme (MCS) value, and a first number of subframes (N_SF) value for a first NPDSCH TB or the first MCS value and a first number of resource units (N RU) value for a first NPUSCH TB; and decode, in the first DCI, , a second modulation and coding scheme (MCS) value, and a second number of subframes (N_SF) value for a second NPDSCH TB or the second MCS value and a second number of resource units (N RU) value for a second NPUSCH TB; or decode in the first DCI an indication that the second MCS value, the second N_SF value, and the second N_RU value are offset relative to the first MCS value, the first N_SF value, and the first N_RU value respectively using a 1-bit or a 2-bit offset.

[00218] Example 73 includes the apparatus of example 65, wherein, when one or more of the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to: decode a scheduling delay for the first NPDSCH TB; schedule the second NPDSCH TB for 8 milliseconds (ms) after the first NPDSCH TB; or decode an additional delay of K ms, where K is predetermined or is defined as a function of a maximum number of repetitions (Rmax) of a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS).

[00219] Example 74 includes the apparatus of example 65, wherein, when one or more of the first DCI and the second DCI are used to schedule a first NPUSCH TB and a second NPUSCH TB, the one or more processors are further configured to: decode a scheduling delay for a first NPUSCH TB in one of the first DCI or the second DCI; and schedule the second NPUSCH TB for 3 milliseconds (ms) after the first NPUSCH TB; or schedule the second NPUSCH TB directly after the first NPUSCH TB; or decode a field indicating a dynamic gap value between the first NPUSCH TB and the second NPUSCH TB.

[00220] Example 75 includes the apparatus of example 65 or 69, wherein the one or more processors are further configured to: determine that two HARQ processes can be used at the UE based on a function of an aggregation level (AL) where AL is 1, or a repetition level (RL) used for a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS); or determine that two HARQ processes can be used at the UE based on a function of a maximum number of repetitions (Rmax) for the NPDCCH USS is less than or equal to X, where X is a predetermined integer or X is configured by higher layers.

[00221] Various techniques, or certain aspects or portions thereof, may take the form of program code (i.e., instructions) embodied in tangible media, such as floppy diskettes, compact disc-read-only memory (CD-ROMs), hard drives, non-transitory computer readable storage medium, or any other machine-readable storage medium wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the various techniques. In the case of program code execution on programmable computers, the computing device may include a processor, a storage medium readable by the processor (including volatile and nonvolatile memory and/or storage elements), at least one input device, and at least one output device. The volatile and non-volatile memory and/or storage elements may be a random-access memory (RAM), erasable programmable read only memory (EPROM), flash drive, optical drive, magnetic hard drive, solid state drive, or other medium for storing electronic data. The node and wireless device may also include a transceiver module (i.e., transceiver), a counter module (i.e., counter), a processing module (i.e., processor), and/or a clock module (i.e., clock) or timer module (i.e., timer). In one example, selected components of the transceiver module can be located in a cloud radio access network (C-RAN). One or more programs that may implement or utilize the various techniques described herein may use an application programming interface (API), reusable controls, and the like. Such programs may be implemented in a high level procedural or object oriented programming language to communicate with a computer system. However, the program(s) may be implemented in assembly or machine language, if desired. In any case, the language may be a compiled or interpreted language, and combined with hardware implementations.

[00222] As used herein, the term "circuitry" may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules. In some embodiments, circuitry may include logic, at least partially operable in hardware.

[00223] It should be understood that many of the functional units described in this specification have been labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom very-large-scale integration (VLSI) circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.

[00224] Modules may also be implemented in software for execution by various types of processors. An identified module of executable code may, for instance, comprise one or more physical or logical blocks of computer instructions, which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module may not be physically located together, but may comprise disparate instructions stored in different locations which, when joined logically together, comprise the module and achieve the stated purpose for the module.

[00225] Indeed, a module of executable code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different storage devices, and may exist, at least partially, merely as electronic signals on a system or network. The modules may be passive or active, including agents operable to perform desired functions.

[00226] Reference throughout this specification to "an example" or "exemplary" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one embodiment of the present technology. Thus, appearances of the phrases "in an example" or the word "exemplary" in various places throughout this specification are not necessarily all referring to the same embodiment.

[00227] As used herein, a plurality of items, structural elements, compositional elements, and/or materials may be presented in a common list for convenience. However, these lists should be construed as though each member of the list is individually identified as a separate and unique member. Thus, no individual member of such list should be construed as a de facto equivalent of any other member of the same list solely based on their presentation in a common group without indications to the contrary. In addition, various embodiments and example of the present technology may be referred to herein along with alternatives for the various components thereof. It is understood that such embodiments, examples, and alternatives are not to be construed as defacto equivalents of one another, but are to be considered as separate and autonomous representations of the present technology.

[00228] Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided, such as examples of layouts, distances, network examples, etc., to provide a thorough understanding of embodiments of the technology. One skilled in the relevant art will recognize, however, that the technology can be practiced without one or more of the specific details, or with other methods, components, layouts, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the technology.

While the forgoing examples are illustrative of the principles of the present technology in one or more particular applications, it will be apparent to those of ordinary skill in the art that numerous modifications in form, usage and details of implementation can be made without the exercise of inventive faculty, and without departing from the principles and concepts of the technology. Accordingly, it is not intended that the technology be limited, except as by the claims set forth below.

Claims

What is claimed is:

1. An apparatus of an evolved node B (eNB) configured to support two hybrid

automatic repeat request (HARQ) processes in narrow band internet of things (NB-IoT) for downlink or uplink, the apparatus comprising:

one or more processors configured to:

encode a first downlink control information (DCI) and a second DCI for a selected user equipment (UE) in a narrow band physical downlink control channel (NPDCCH); and

encode data for transmission in a narrow band physical downlink shared channel (NPDSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to receiving the data encoded in the NPDSCH; and

a memory interface configured to receive from a memory the data.

2. The apparatus of claim 1, wherein the one or more processors are further

configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide at least a 2 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH or a NPDCCH candidate to be monitored by the UE and a start of a first NPDSCH transport block (TB) scheduled by the first DCI carried in the search space of the NPDCCH.

The apparatus of claim 1 or 2, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein the data is scheduled to provide a four millisecond (ms) gap between an end of the second DCI and a start of a first NPDSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH.

The apparatus of claim 1 or 2, wherein the one or more processors are further configured to encode data for transmission in the NPDSCH, wherein a scheduling delay is selected with a starting subframe of a first NPDSCH that is n+5+x NB- IoT DL subframes from the end of the NPDCCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format Nl, wherein the set of values for a single DCI associated with a single HARQ process is {0, 4, 8 , 12, 16, 32, 64, 128} or the set of values for two DCI associated with multiple HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

The apparatus of claim 1, wherein the one or more processors are further configured to:

decode data received at the eNB in a narrow band physical uplink shared channel (NPUSCH), wherein the data is scheduled to enable the selected UE to decode the first DCI and the second DCI prior to transmitting the data encoded by the UE in the NPUSCH.

The apparatus of claim 2 or 5, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein the data is scheduled to provide an 8 millisecond (ms) gap between an end of a search space (SS) of the NPDCCH where the UE needs to monitor and a start of a first NPUSCH transport block (TB) scheduled by the first DCI or the second DCI carried in the search space of the NPDCCH. The apparatus of claim 2 or 5, wherein the one or more processors are further configured to decode data received from the NPUSCH, wherein a scheduling delay is selected with a starting subframe of a first NPUSCH that is the first UL subframe after n+x milliseconds from the end of the NPDCCH scheduling the NPUSCH, where n is a last subframe of the first DCI and x is an integer from a set of values of a scheduling delay field in a DCI format NO, wherein the set of values for a single DCI associated with a single HARQ process is {8 , 16, 32, 64} or the set or subset of values for two DCI associated with two HARQ processes {0, 1, 2, 3, 4, 6, 12, 16}.

An apparatus of a user equipment (UE) configured to support two hybrid automatic repeat request (HARQ) processes in narrow band internet of thing (NB-IoT) for downlink and uplink, the apparatus comprising: one or more processors configured to:

decode data received in a first narrow band physical downlink shared channel (NPDSCH) transport block (TB) and a second NPDSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are associated with one or more of a first downlink control information (DCI) and a second DCI; and

encode acknowledgement/negative acknowledgement

(ACK/NACK) feedback for the first NPDSCH TB and the second NPDSCH TB in one or more bits of feedback transmitted in one or more narrow band physical uplink shared channel (NPUSCH) format 2 transmissions; and

a memory interface configured to send to the memory the ACK/NACK feedback.

9. The apparatus of claim 8, wherein the one or more processors are further

configured to decode one or more of the first DCI or the second DCI to determine a scheduled timing relationship of the first NPDSCH TB and the second NPDSCH TB, wherein the scheduled timing relationship comprises:

a gap less than 8 milliseconds (ms) between the reception of the first NPDSCH TB and the second NPDSCH TB; or

no gap between the reception of the first NPDSCH TB and the second NPDSCH TB at the UE, wherein a transmission and the reception of the first NPDSCH TB and the second NPDSCH TB are scheduled to be consecutive in time.

10. The apparatus of claim 8 or 9, wherein the one or more processors are further configured to encode the ACK/NACK feedback using HARQ/Acknowledgement (ACK) bundling with a single ACK/NACK response for the first NPDSCH TB and the second NPDSCH TB combined in a single bit of feedback via a logical AND operation in a single NPUSCH format 2 transmission.

11. The apparatus of claim 8, wherein the one or more processors are further configured to decode an additional bit in one of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

12. The apparatus of claim 8 or 9, wherein, when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to:

decode a HARQ process identification (ID) in each of the first DCI and the second DCI via a 1-bit field to indicate a corresponding TB;

associate each of the first NPDSCH TB and the second NPDSCH TB with a HARQ process ID based on a predefined fixed relationship between the first NPDSCH TB and the second NPDSCH TB with the HARQ process ID; and/or decode an additional bit in each of the first DCI or the second DCI to determine a number of transport blocks (TBs) scheduled within a narrow band physical downlink control channel (NPDCCH) period.

13. The apparatus of claim 8, wherein the one or more processors are further

configured to encode a first ACK/NACK feedback and a second ACK/NACK feedback for a first TB and a second TB respectively in a single NPUSCH format

2 transmission, wherein a first bit is associated with the first TB and a second bit is associated with the second TB.

14. The apparatus of claim 8, wherein the one or more processors are further

configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2 transmission to provide feedback via resource selection.

15. The apparatus of claim 9 or 14, wherein the one or more processors are further configured to encode the ACK/NACK feedback for the first NPDSCH TB and the second NPDSCH TB using a single NPUSCH format 2 transmission to provide feedback via resource selection, wherein the resource selection comprises two NPUSCH format 2 resources that are configured in a time domain or two

NPUSCH format 2 resources that are configured in a frequency domain.

16. The apparatus of claim 15, wherein the one or more processors are further

configured to select one of the two NPUSCH format 2 resources to send a single bit of feedback.

17. The apparatus of claim 15, wherein the one or more processors are further

configured to identify the two NPUSCH format 2 resources from information received in the first DCI, wherein the first DCI contains a time or frequency offset of a first resource of the two NPUSCH format 2 resources and an additional time or frequency offset of the second resource of the two NPUSCH format 2 resources relative to the first resource.

18. The apparatus of claim 15, wherein the one or more processors are further

configured to identify the two NPUSCH format 2 resources from information received in the first DCI and the second DCI when the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB.

19. The apparatus of claim 9 or 13, wherein the one or more processors are further configured to decode the first DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

TB I TB2 Bit transmitted Bit transmitted on Resou rce 1 on Resource 2

A A 0

A N 1

N A 1

N/DTX N/DTX 0

DTX DTX N.A. N.A.

Or TB I TB2 Bit transmitted Bit transmitted on Resou rce 1 on Resource 2

A A 1

A N 0

N A 1

N/DTX N/DTX 0

20. The apparatus of claim 19, wherein the one or more processors are further

configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 ms delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

21. The apparatus of claim 9 or 13, wherein the one or more processors are further configured to decode the first DCI and the second DCI used to schedule the first NPDSCH TB and the second NPDSCH TB, wherein the ACK/NACK feedback is indicated as:

Or

where TB I is the first NPDSCH TB, TB2 is the second NPDSCH TB, A is ACK, N is NACK, DTX is the DL assignment was not detected and N.A. is not applicable.

22. The apparatus of claim 21 , wherein the one or more processors are further

configured to decode, from the first DCI or the second DCI, a time offset value of the first NPUSCH format 2 resource relative to a 12 millisecond (ms) delay from an end of the second NPDSCH TB and a frequency offset value for the first NPUSCH format 2 resource.

23. The apparatus of claim 8, wherein the one or more processors are further

configured to encode the ACK/NACK feedback for the first NPUSCH TB in a first NPUSCH format 2 transmission and encode the ACK/NACK feedback for the second NPUSCH TB in a second NPUSCH format 2 transmission.

24. The apparatus of claim 8, wherein the one or more processors are further

configured to decode the first DCI to determine a schedule of the first NPDSCH TB and the second NPDSCH TB or a first NPUSCH TB and a second NPUSCH TB, wherein the first NPDSCH TB and the second NPDSCH TB are scheduled with a same modulation and coding scheme (MCS) value, a same number of subframes (N SF) value, and the first NPUSCH TB and the second NPUSCH TB are scheduled with the same MCS and a same number of resource units (N_RU) value.

25. The apparatus of claim 8, wherein the one or more processors are further

configured to:

decode, in the first DCI, a first modulation and coding scheme (MCS) value, and a first number of subframes (N SF) value for a first NPDSCH TB or the first MCS value and a first number of resource units (N_RU) value for a first NPUSCH TB; and

decode, in the first DCI, , a second modulation and coding scheme (MCS) value, and a second number of subframes (N SF) value for a second NPDSCH TB or the second MCS value and a second number of resource units (N_RU) value for a second NPUSCH TB.

26. The apparatus of claim 25, wherein the one or more processors are further

configured to:

decode in the first DCI an indication that the second MCS value, the second N_SF value, and the second N_RU value are offset relative to the first MCS value, the first N_SF value, and the first N_RU value respectively using a 1- bit or a 2-bit offset.

27. The apparatus of claim 8, wherein the one or more processors are further

configured to decode in the first DCI or the second DCI:

a redundancy value (RV) or a new data indicator (NDI) for each of the first NPDSCH TB and the second NPDSCH TB; or

a same RV or a same NDI for both of the first NPDSCH TB and the second NPDSCH TB.

28. The apparatus of claim 8, wherein, when one or more of the first DCI and the second DCI are used to schedule the first NPDSCH TB and the second NPDSCH TB, the one or more processors are further configured to:

decode a scheduling delay for the first NPDSCH TB; schedule the second NPDSCH TB for 8 milliseconds (ms) after the first NPDSCH TB; or

decode an additional delay of K ms, where K is predetermined or is defined as a function of a maximum number of repetitions (Rmax) of a narrow band physical downlink control channel (NPDCCH) UE-specific search space (USS).

29. The apparatus of claim 8, wherein, when one or more of the first DCI and the second DCI are used to schedule a first NPUSCH TB and a second NPUSCH TB, the one or more processors are further configured to:

decode a scheduling delay for a first NPUSCH TB in one of the first DCI or the second DCI; and

schedule the second NPUSCH TB for 3 milliseconds (ms) after the first NPUSCH TB; or

schedule the second NPUSCH TB directly after the first NPUSCH TB; or decode a field indicating a dynamic gap value between the first NPUSCH TB and the second NPUSCH TB.

30. The apparatus of claim 8 or 9, wherein the one or more processors are further configured to:

determine that two HARQ processes can be used at the UE based on a function of an aggregation level (AL) where AL is 1, or a repetition level (RL) used for a narrow band physical downlink control channel (NPDCCH) UE- specific search space (USS); or

determine that two HARQ processes can be used at the UE based on a function of a maximum number of repetitions (Rmax) for the NPDCCH USS is less than or equal to X, where X is a predetermined integer or X is configured by higher layers.