WO2017173915A1

WO2017173915A1 - Message processing method, device, and system, and computer storage medium

Info

Publication number: WO2017173915A1
Application number: PCT/CN2017/076784
Authority: WO
Inventors: 刘峰
Original assignee: 中兴通讯股份有限公司
Priority date: 2016-04-05
Filing date: 2017-03-15
Publication date: 2017-10-12
Also published as: CN107294870A

Abstract

Disclosed in the embodiments of the present invention are a message processing method, device, and system, and a computer storage medium. The message processing method comprises: obtaining a message, and recording the time stamp of the inlet clock when said message enters a data network, said inlet clock being synchronized to an outlet clock; sending the time stamp and the message by means of said data network.

Description

Message processing method, device, system and computer storage medium

Technical field

The present invention relates to the field of data message transmission, and in particular, to a message processing method, apparatus, system, and computer storage medium.

Background technique

The rapid development of Ethernet technology has made data services the main traffic of the network. The data network has begun to replace the Synchronous Digital Hierarchy (SDH) network as the development direction of the communication network. At present, various operators have vigorously developed the packet transmission network (PTN, Packet Transport Network), IPRAN (IP Radio Access Network) and other data networks gradually replace the SDH network. The data network has low comprehensive cost and flexible service scheduling capability, which satisfies the transmission requirements of current data services. However, data networks have uncertainties in delay time and delay time jitter in service transmission. In some areas, they are not sensitive to the transmission duration of data packets, but are very sensitive to changes in message delivery time. For example, In the power system communication private network, the control center needs to make the power generation switch command of the two power stations upstream and downstream, and the command transmission time is determined to ensure that the upstream and downstream electric switch operates the electric switch according to the command sequence relationship, and the switching sequence of the upstream and downstream electric switches There are strict requirements, and the wrong order of the electric gate will cause disorder of the power operation of the grid, causing disaster. Due to the uncertain message delivery time of the data network, the demand for the power private network cannot be met.

Summary of the invention

The embodiments of the present invention are directed to a packet processing method, apparatus, system, and computer storage medium, which are intended to solve the problem that the data packet transmission time is unstable in the prior art, thereby causing security risks and the like.

In order to solve the above technical problem, an embodiment of the present invention provides a packet sending method, including:

Obtain a message;

Recording a timestamp of the entry clock when the packet enters the data network; wherein the entry clock is synchronized with the exit clock;

Transmitting the timestamp and the message through the data network.

As an implementation manner, the sending, by the data network, the timestamp and the packet includes: inserting the timestamp into the packet; re-encapsulating the packet; The data network sends the repackaged message.

The embodiment of the invention further provides a packet receiving method, including:

Receiving a message through the data network and a timestamp of the entry clock when the message enters the data network;

Determining an output moment of the packet according to the timestamp and a preset maximum delay;

When the time point of the egress clock is less than the output time, the message is buffered, wherein the egress clock is synchronized with the entry clock.

As an implementation manner, determining the output moment of the packet according to the timestamp and the preset maximum delay includes: calculating a sum of the timestamp and the preset maximum delay, and determining the report The output moment of the text is greater than or equal to the sum of the timestamp and the preset maximum delay.

As an implementation manner, when the time point of the exit clock is greater than or equal to the output time, the method further includes: outputting the message.

As an embodiment, when the timestamp is encapsulated into the packet, the outputting the packet includes: removing the timestamp from the packet; and re-performing the packet Package and output.

The embodiment of the invention further provides a packet processing method, including:

Obtain a message;

Transmitting the timestamp and the message packet through the data network;

As an implementation manner, the sending, by the data network, the timestamp and the packet includes: inserting the timestamp into the packet; re-encapsulating the packet, and passing the The data network sends the repackaged message.

The embodiment of the invention further provides a message sending device, comprising:

a packet generation module configured to obtain a packet;

a time recording module configured to record a timestamp of an entry clock when the packet enters the data network; wherein the entry clock is synchronized with an exit clock;

The message sending module is configured to send the timestamp and the message through the data network.

As an implementation manner, the packet sending module includes a first encapsulating module configured to The timestamp is inserted into the packet, and the packet is re-encapsulated.

The embodiment of the invention further provides a message receiving device, comprising:

a message receiving module, configured to receive a message through the data network and a timestamp of an entry clock when the message enters the data network;

a time determining module, configured to determine an output moment of the packet according to the timestamp and a preset maximum delay;

The message cache module is configured to cache the message when the time point of the egress clock is less than the output time, wherein the egress clock is synchronized with the entry clock.

In an embodiment, the time determining module is configured to calculate a sum of the timestamp and the preset maximum delay, and determine that an output time of the packet is greater than or equal to the timestamp and the preset maximum Sum of delay

In an embodiment, the device further includes a message output module configured to output the message when a time point of the exit clock is greater than or equal to the output time.

As an embodiment, when the timestamp is encapsulated into the packet, the packet output module includes a second encapsulating module, configured to remove the timestamp from the packet, The message is repackaged and output.

The embodiment of the invention further provides a message processing system, including a message sending device and a message receiving device;

The message sending device is configured to obtain a message; record a timestamp of an entry clock when the message enters the data network; wherein the entry clock is synchronized with an exit clock; and the timestamp is sent through the data network Transmitting the message to the message receiving device;

The packet receiving device is configured to receive a packet through a data network and a timestamp of an entry clock when the packet enters the data network; and determine the packet according to the timestamp and a preset maximum delay. Output time; when the time point of the exit clock is less than the output time, the message is buffered, and the exit clock is synchronized with the entry clock.

The embodiment of the present invention further provides a computer storage medium, where the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the application in the message sending apparatus according to the embodiment of the present invention. Message sending method.

The embodiment of the present invention further provides a computer storage medium, where the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the application in the message receiving apparatus according to the embodiment of the present invention. Message receiving method.

The packet processing method, device, system, and computer storage medium provided by the embodiment of the present invention, the data sending device obtains a packet, records a timestamp of the entry clock when the packet enters the data network, and sends the timestamp through the data network. And the data receiving device receives the packet and the timestamp of the entry clock when the packet enters the data network, and determines the output time of the packet according to the timestamp and the preset maximum delay. When the time point of the exit clock is less than the output time, the message is buffered. The technical solution of the embodiment overcomes the problem that the message output is indeterminate due to the time uncertainty of the transmission of the message in the data network, so that the message can be transmitted according to a fixed time, which facilitates subsequent processing and expands The application range of the data network has improved the user experience.

DRAWINGS

FIG. 1 is a flowchart of a method for sending a message according to an embodiment of the present invention;

2 is a flowchart of a method for receiving a message according to an embodiment of the present invention;

FIG. 3 is a flowchart of a packet processing method according to an embodiment of the present invention;

4 is a schematic diagram of a packet sending apparatus module according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a packet receiving apparatus module according to an embodiment of the present invention; FIG.

FIG. 6 is a flowchart of a packet processing method according to an embodiment of the present invention.

detailed description

When the packet is transmitted through the data network, the embodiment of the present invention enters the data network. The interval stamp and the preset maximum delay are such that when the message is transmitted to the message receiving device, the output can be output only when the output time is satisfied, thereby avoiding the message being transmitted without restriction. If the transmission time is uncertain, the message must be delayed by the preset maximum delay, which facilitates subsequent operations and expands the application range of the data network.

The various embodiments of the present invention are further described below in conjunction with the accompanying drawings.

The embodiment provides a packet sending method, and the packet sending method can be applied to a packet sending apparatus. Referring to Figure 1, including:

S101. Obtain a message;

S102. Record a timestamp of an entry clock when the packet enters the data network, where the entry clock is synchronized with an exit clock.

S103. Send the timestamp and the packet by using the data network.

In the embodiment S101, the message may be generated by the message sending device, but not necessarily generated by the message sending device itself, or may be sent to the message sending device after being generated by another device. The message sending device is a starting point for the message to be sent through the data network, and the message enters the data network in the message sending device.

In the embodiment S102, the message sending device sends the message through the data network, and the message sending device is the starting point of the data network; when the message is sent, when the message is entered into the data network, A timestamp of the entry clock, the timestamp corresponding to the message. As an implementation manner, an entry clock is set at a location where the packet enters the data network, that is, an entry clock is set at an output port of the packet sending device, and the entry clock is used to record the time when the packet enters the data network in real time. .

The recording precision of the entry clock can be very high, and can be accurate to the moment when the message enters the data network, that is, the time at which the time is recorded; for example, it can be accurate to seconds, milliseconds, subtle, even picoseconds, nanoseconds, and the like; The higher the accuracy, the smaller the fluctuation in transit time. In this implementation, there is no limitation on the form or principle of the clock, whether it is a mechanical clock, an electronic clock, a quartz clock, or the original Zizhong, etc., are all feasible.

The time of the entry of the message sending device and the time of the exit clock of the message receiving device should be synchronized, as the time required for the message sending device to transmit the message and the time at which the message receiving device receives the message are recorded; The meaning of synchronization is that the time of the entry clock and the exit clock are the same, or the conversion relationship between the time of the entry clock and the time of the exit clock is determined. For example, the time zone where Beijing is located is Dongba District, and the time zone where Tokyo is located is Dongjiu District. Then there is an hour difference between Beijing time and Tokyo time; therefore, if the message sending device is in Beijing, it is reported. If the text receiving device is in Tokyo, the time stamp of the record should be added by one hour, or the time of the exit clock should be subtracted by one hour, so that the entry clock and the exit clock can be synchronized.

The manner of synchronizing the ingress clock and the egress clock may include multiple types. Generally, the synchronization mode of the clock is divided into two categories: one is to synchronize between the egress clock and the ingress clock, that is, Taking an exit clock/ingress clock as a reference, the entry clock corresponding to the exit clock is coincident with the exit clock, or the exit clock corresponding to the entry clock is consistent with the entry clock; The absolute time of the clock is not necessarily accurate, but has no effect on the implementation of the embodiment. Second, the exit clock and the entry clock are both synchronized with the reference clock, that is, based on a third-party standard clock, which is recorded as a reference clock. The exit clock and the entry clock are both synchronized with the reference clock, and correspondingly, the synchronization between the exit clock and the entry clock is achieved. Specifically, the synchronization method may include: Global Positioning System (GPS), Network Time Protocol (NTP), China Beidou satellite navigation system, atomic clock, IEEE1588 (precision clock synchronization of network measurement and control system) Protocol standard) and so on any synchronization.

In this embodiment S103, the packet sending apparatus has acquired the timestamp corresponding to the packet; in order to enable the timestamp to be known by the packet receiving apparatus, the timestamp and the packet need to be combined and passed. Data network is sent. The reason for sending in combination is to avoid messages and time. The stamp cannot arrive at the message receiving device at the same time, thereby causing trouble for the message receiving device to perform the comparison. However, in other embodiments, even if the timestamp and the corresponding message do not arrive at the message receiving device at the same time, the implementation of the embodiment does not have much influence.

As an implementation manner, after the time stamp of the packet entering the data network is recorded, the time stamp is inserted into the packet, so that the packet and the corresponding time stamp arrive at the same time. Text receiving device. Specifically, the timestamp can be inserted into any of a plurality of locations in the packet, such as a packet header, a packet header, and a payload, or a trailer at the end of the packet.

The packet adds the timestamp to the original content. Therefore, the packet is usually re-encapsulated. The re-encapsulation includes, but is not limited to, recalculating the length of the packet and recalculating the cyclic redundancy of the packet. Code check (CRC, Cyclic Redundancy Code) check byte, etc. After the packet is re-encapsulated, the encapsulated packet can be sent to the packet receiving device through the data network, and then the packet receiving device processes the packet.

The embodiment further provides a message receiving method, and the message receiving method can be applied to a message receiving device. Please refer to Figure 2, including:

S201. Receive a packet through a data network, and a timestamp of an entry clock when the packet enters the data network.

S202. Determine, according to the timestamp and the preset maximum delay, an output moment of the packet.

S203. If the time point of the egress clock is less than the output time, buffer the packet, where the egress clock is synchronized with the entry clock.

In this embodiment, the received message is a packet transmitted through the data network; the packet transmission time is not determined, that is, the time of transmission and the arrival time of the packet are not determined, because the data network itself There is no fixed transmission time. The timestamp is the time of the entry clock when the message enters the data network.

As an implementation manner, the timestamp and the packet combination are sent through the data network, that is, the time. The stamp and the message arrive at the message output device at the same time; the reason for the combination is to prevent the message and the time stamp from being able to reach the message receiving device at the same time, thereby causing trouble for the message receiving device to perform the comparison. However, in other embodiments, even if the timestamp and the corresponding message do not arrive at the message receiving device at the same time, the implementation of the embodiment does not have much influence.

In the embodiment S202, in addition to the timestamp corresponding to the received message, the packet receiving apparatus further has a preset maximum delay and a time point of the exit clock. The time point of the exit clock is the time indicated by the exit clock. The exit clock is similar to the entrance clock. Its accuracy can be very high, for example, it can be accurate to seconds, milliseconds, subtle, even picoseconds, nanoseconds, etc. The higher the accuracy, the more accurate the message delivery time. The output is expected to be delayed; in this embodiment, the form, or principle, of the clock is not limited, and it is feasible whether it is a mechanical clock, an electronic clock, a quartz clock, an atomic clock, or the like. The accuracy of the exit clock may be the same as the accuracy of the entry clock.

In this embodiment, determining the output time of the packet according to the timestamp corresponding to the packet and the preset maximum delay includes: calculating a sum of the timestamp and the preset maximum delay, and determining the report. The output moment of the text is greater than or equal to the sum of the timestamp and the preset maximum delay. The output time refers to a time point, and the message is allowed to output at a time point that satisfies the sum of the time stamp equal to or greater than the preset maximum time, and is also allowed to satisfy the time greater than the sum of the time stamp and the preset maximum time. Point output; although the output time is a time point, it does not mean that the message will be output at this moment. In fact, the output time is the earliest time point at which the message is allowed to be output, that is, a time point, which can be guaranteed. The message can be sent from the transmission to the output for a fixed period of time and this fixed time is as short as possible, ensuring efficiency.

The preset maximum delay is also mentioned above. Since the time for transmitting the packet in the data network is not fixed, in this embodiment, a fixed preset maximum delay is set, and the time between sending and output of the packet is determined by the preset maximum delay. Fixed, the fixed transmission time is the preset maximum delay. The preset maximum delay is a preset time delay for the message to be fixed. time. Generally speaking, although the transmission time of the packets transmitted in the data network is not fixed, there is usually a maximum transmission time, that is, the maximum delay time. In the normal transmission process, the message does not exceed this maximum. The delay time, the transmission time is less than this maximum delay time. The maximum delay time is generally experimental data, that is, a value determined by multiple sampling, from the message transmitting device to the message receiving device, under normal circumstances, the delay time of the message is not exceeded at most. The preset maximum delay in this embodiment generally refers to the maximum delay time, so that the time that the packet is transmitted in the data network does not exceed the preset maximum delay, so that the packet can be sent from the The output period is fixed, reducing or not causing fluctuations, making the transmission of the message more stable. Of course, the preset maximum delay can also be adjusted according to the needs, as long as it is within a reasonable range.

In the embodiment S203, when the time point of the exit clock is less than the output time, the message is buffered. It should be noted that the time point of the egress clock is not only the time when the packet arrives at the packet receiving device, and the time point of the egress clock refers to the time indicated on the egress clock; The reminder time is always elapsed. Therefore, when the time point of the exit clock is less than the output time, the comparison should be continued. If the time of the exit clock is less than the output time, the message can be output when the output clock reaches the output time; if the time of the exit clock is greater than the output time, the message can be directly output. In other words, when the time point of the exit clock is less than the output time, the output time is the time when the true output of the message is outward; when the time point of the exit clock is greater than the output time, the message can be directly output.

In this embodiment, when the packet has just arrived at the packet receiving device, it is obvious that the time point of the egress clock or the difference between the elapsed clock prompt time and the time stamp is the time when the packet is transmitted in the data network. It can be seen from the foregoing that this time is not fixed, and it is often floating. Therefore, this embodiment provides the concept of preset maximum delay; if the time point of the exit clock is always smaller than the output time, the The message is cached. During the buffering, the time of the exit clock will be closer to the output time, and when the time of the exit clock is equal to the output time, The message can be output.

In addition, since the timestamp is the time of the entry clock, the exit clock should be synchronized with the entry clock; the meaning of synchronization is that the time of the entry clock and the exit clock are the same, or between the time of the entry clock and the time of the exit clock. The conversion relationship is deterministic.

The synchronization mode between the egress clock and the ingress clock may include multiple types. Generally, the synchronization mode of the clock is divided into two categories: one is synchronization between the egress clock and the ingress clock. That is, the egress clock corresponding to the egress clock is aligned with the egress clock, or the egress clock corresponding to the ingress clock is consistent with the entry clock, based on the egress clock/ingress clock; The absolute time of the two clocks is not necessarily accurate, but has no effect on the implementation of the embodiment, as long as the time synchronization between the two is sufficient; the second is that both the exit clock and the entry clock are synchronized with the reference clock, that is, A third-party standard clock is used as a reference, and is recorded as a reference clock, so that both the egress clock and the ingress clock are synchronized with the reference clock, and accordingly, the egress clock and the ingress clock are synchronized. Specifically, the synchronization method may include: GPS, NTP, China Beidou satellite navigation system, atomic clock, IEEE1588, etc., any synchronous manner.

If the timestamp is encapsulated in the packet, the timestamp in the packet is removed, and then the packet is re-encapsulated and output. Re-encapsulation includes but is not limited to: recalculating the message length content, recalculating the CRC check byte of the message, and the like.

The outputted message can be output to the desired place to achieve the desired function; in this embodiment, the time elapsed from the transmission of the message to the output is consistent, in other words, as long as the message is transmitted. When the sequence of the messages is set in sequence, it can ensure that when the message is output, it is also output according to the preset timing. For the same message receiving device, when transmitting, the timing between two messages is set. After the data network is transmitted, if the first message is received later, the message will be sent first. The buffer is buffered when it does not meet the requirements of the output time, so that the first transmitted message can still be guaranteed to be output first; and the message transmitting device The same is true for sending time-series messages to different message receiving devices. It is also possible to ensure that the timing of message transmission is consistent with the timing of reception, thereby making the user's operation easier and more reliable.

This embodiment provides a packet processing method. Referring to FIG. 3, the method includes:

S301. Obtain a message.

S302. Record a timestamp of an entry clock when the packet enters the data network, where the entry clock is synchronized with the exit clock.

S303. The packet sending apparatus sends the timestamp and the packet to the packet receiving apparatus by using the data network.

S304. The packet receiving device receives the packet through the data network, and a timestamp of the entry clock when the packet enters the data network.

S305. Determine, according to the timestamp and the preset maximum delay, an output moment of the packet.

S306. If the time point of the egress clock is less than the output time, buffer the packet, where the egress clock is synchronized with the entry clock.

In the embodiment S301, the message may be generated by the message sending device, but not necessarily generated by the message sending device itself, or may be sent to the message sending device after being generated by another device. The message sending device is a starting point for the message to be sent through the data network, and the message enters the data network at the point of the message sending device.

In the embodiment S302, the message sending device sends the message through the data network, and the message sending device is the starting point of the data network; when the message is sent, when the message is entered into the data network, A timestamp of the entry clock, the timestamp corresponding to the message. As an implementation manner, an entry clock is set at a location where the packet enters the data network, that is, an entry clock is set at an output port of the packet sending device, and the entry clock is used to record the time when the packet enters the data network in real time. .

The recording accuracy of the entry clock can be very high, and can be accurate to the moment when the message enters the data network, that is, the time at the time is recorded; for example, it can be accurate to seconds, milliseconds, subtle, or even Picoseconds, nanoseconds, etc.; the higher the precision, the smaller the fluctuation in transit time. In this implementation, the form, or principle, of the clock is not limited, and it is feasible whether it is a mechanical clock, an electronic clock, a quartz clock, an atomic clock, or the like.

The manner of synchronizing the ingress clock and the egress clock may include multiple types. Generally, the synchronization mode of the clock is divided into two categories: one is to synchronize between the egress clock and the ingress clock, that is, Taking an exit clock/ingress clock as a reference, the entry clock corresponding to the exit clock is coincident with the exit clock, or the exit clock corresponding to the entry clock is consistent with the entry clock; The absolute time of the clock is not necessarily accurate, but has no effect on the implementation of the embodiment. Second, the exit clock and the entry clock are both synchronized with the reference clock, that is, based on a third-party standard clock, which is recorded as a reference clock. And causing both the exit clock and the entry clock to be synchronized with the reference clock, and correspondingly, the synchronization between the exit clock and the entry clock. Specifically, the synchronization method may include: GPS, NTP, China Beidou satellite navigation system, atomic clock, IEEE1588, etc., any synchronous manner.

In this embodiment S303, the packet sending apparatus has acquired the timestamp corresponding to the packet; in order to enable the timestamp to be known by the packet receiving apparatus, the timestamp and the packet need to be combined and passed. Data network is sent. The reason for sending in combination is to avoid messages and time. The stamp cannot arrive at the message receiving device at the same time, thereby causing trouble for the message receiving device to perform the comparison. However, in other embodiments, even if the timestamp and the corresponding message do not arrive at the message receiving device at the same time, the implementation of the embodiment does not have much influence.

The packet adds the timestamp to the original content. Therefore, the packet is usually re-encapsulated. The re-encapsulation includes, but is not limited to, recalculating the length of the packet and recalculating the CRC of the packet. Bytes, etc. After the packet is re-encapsulated, the encapsulated packet can be sent to the packet receiving device through the data network, and then the packet receiving device processes the packet.

In the embodiment S304, the received message is a packet transmitted through the data network; the packet transmission time is not determined, that is, the time of transmission and the arrival time of the packet are not determined, because the data network itself There is no fixed transmission time. The timestamp is the time of the entry clock when the message enters the data network.

As an implementation manner, the timestamp and the packet combination are sent through the data network, that is, the timestamp and the message arrive at the message output device at the same time; the reason for the combination is that the message and the timestamp cannot reach the message at the same time. Receiving the device, thereby causing trouble for the message receiving device to perform the comparison. However, in other embodiments, even if the timestamp and the corresponding message do not arrive at the message receiving device at the same time, the implementation of the embodiment does not have much influence.

In the embodiment S305, in addition to the timestamp corresponding to the received message, the packet receiving apparatus further has a preset maximum delay and a time point of the exit clock. The time point of the exit clock is the time indicated by the exit clock. The exit clock is similar to the entrance clock, and its accuracy can be very high. For example, it can be accurate to seconds, milliseconds, subtle, even picoseconds, nanoseconds, etc.; the higher the precision, the more accurate the message delivery time, and the more the message can be output with the expected delay; in this embodiment, the clock The form, or principle, is not limited, whether it is a mechanical clock, an electronic clock, a quartz clock, an atomic clock, etc., are all feasible. The accuracy of the exit clock may be the same as the accuracy of the entry clock.

The preset maximum delay is also mentioned above. Since the time for transmitting the packet in the data network is not fixed, in this embodiment, a fixed preset maximum delay is set, and the time between sending and output of the packet is determined by the preset maximum delay. Fixed, the fixed transmission time is the preset maximum delay. The preset maximum delay is a preset time for delaying the message for a fixed period of time. Generally speaking, although the transmission time of the packets transmitted in the data network is not fixed, there is usually a maximum transmission time, that is, the maximum delay time. In the normal transmission process, the message does not exceed this maximum. The delay time, the transmission time is less than this maximum delay time. The maximum delay time is generally experimental data, that is, a value determined by multiple sampling, from the message transmitting device to the message receiving device, under normal circumstances, the delay time of the message is not exceeded at most. The preset maximum delay in this embodiment generally refers to the maximum delay time, so that the time that the packet is transmitted in the data network does not exceed the preset maximum delay, and therefore, the packet can be reported. The time from the transmission to the output is fixed, reducing or not causing fluctuations, making the transmission of the message more stable. Of course, the preset maximum delay can also be adjusted according to the needs, as long as it is within a reasonable range.

In the embodiment S306, when the time point of the exit clock is less than the output time, the message is buffered. It should be noted that the time point of the egress clock is not only the time when the packet arrives at the packet receiving device, and the time point of the egress clock refers to the time indicated on the egress clock; The reminder time is always elapsed. Therefore, when the time point of the exit clock is less than the output time, the comparison should be continued. If the time of the exit clock is less than the output time, the message can be output when the output clock reaches the output time; if the time of the exit clock is greater than the output time, the message can be directly output. In other words, when the time point of the exit clock is less than the output time, the output time is the time when the true output of the message is outward; when the time point of the exit clock is greater than the output time, the message can be directly output.

In this embodiment, when the packet has just arrived at the packet receiving device, it is obvious that the time point of the egress clock or the difference between the elapsed clock prompt time and the time stamp is the time when the packet is transmitted in the data network. It can be seen from the foregoing that this time is not fixed, and it is often floating. Therefore, this embodiment provides the concept of preset maximum delay; if the time point of the exit clock is always smaller than the output time, the report is always The text is cached. During the buffering period, the time point of the exit clock will be closer to the output time, and when the time point of the exit clock is equal to the output time, the message can be output.

The synchronization mode between the egress clock and the ingress clock may include multiple types. Generally, the synchronization mode of the clock is divided into two categories: one is synchronization between the egress clock and the ingress clock. That is, the exit clock/entry clock is used as a reference, and the exit clock is correspondingly entered. The port clock is consistent with the egress clock, or the egress clock corresponding to the ingress clock is consistent with the ingress clock; the result of the synchronization is that the absolute time of the two clocks is not necessarily accurate, but the implementation of the embodiment is not Impact, as long as the time synchronization between the two can be; second, the exit clock and the entry clock are synchronized with the reference clock, that is, based on a third-party standard clock, recorded as the reference clock, making the exit clock And the entry clock are both synchronized with the reference clock, and correspondingly, the synchronization between the exit clock and the entry clock is achieved. Specifically, the synchronization method may include: GPS, NTP, China Beidou satellite navigation system, atomic clock, IEEE1588, etc., any synchronous manner.

When the packet is output, if the timestamp is inserted into the packet and the packet is re-encapsulated, the timestamp in the packet needs to be removed, and then the packet is re-reconstructed. Package and then output. Re-encapsulation includes but is not limited to: recalculating the message length content, recalculating the CRC check byte of the message, and the like.

The outputted message can be output to the desired place to achieve the desired function; in this embodiment, the time elapsed from the transmission of the message to the output is consistent, in other words, as long as the message is transmitted. When the sequence of the messages is set in sequence, it can ensure that when the message is output, it is also output according to the preset timing. For the same message receiving device, when transmitting, the timing between two messages is set. After the data network is transmitted, if the first message is received later, the message will be sent first. The buffer is not satisfied by the requirement of the output time, so that the first transmitted message can still be output first; and the message transmitting device sends the timed message to different message receiving devices, and the same can be performed. It ensures that the timing when the message is sent is consistent with the timing at the time of receiving, making the user's operation easier and more reliable.

This embodiment provides a message sending apparatus. Referring to FIG. 4, the method includes:

The message generating module 101 is configured to obtain a message;

The time recording module 102 is configured to record a timestamp of the entry clock when the packet enters the data network; wherein the entry clock is synchronized with the exit clock;

The message sending module 103 is configured to send the timestamp and the message through the data network.

In this embodiment, the packet may be generated by the packet generating module 101, and may not be generated by the packet generating module 101 itself, or may be sent to the packet sending device after being generated by other devices; The text sending module 103 is a starting point for sending a message through the data network, and the message enters the data network in the message sending module 103.

In this embodiment, the message sending module 103 sends the message through the data network, and the message sending module 103 is the starting point of the data network. When the message is sent, the time recording module 102 records the message. The timestamp of the entry clock when entering the data network, the timestamp corresponding to the message. As an implementation manner, an entry clock is set at a location where the packet enters the data network, that is, an entry clock is set at an output port of the packet sending device, and the entry clock is used to record the time when the packet enters the data network in real time. .

The recording precision of the entry clock can be very high, and can be accurate to the moment when the message enters the data network, that is, the time at which the time is recorded; for example, it can be accurate to seconds, milliseconds, subtle, even picoseconds, nanoseconds, and the like; The higher the accuracy, the smaller the fluctuation in transit time. In this implementation, the form, or principle, of the clock is not limited, and it is feasible whether it is a mechanical clock, an electronic clock, a quartz clock, an atomic clock, or the like.

The time of the exit clock and the exit clock of the packet receiving device should be synchronized because the time when the packet sending module 103 needs to send the packet and the time when the packet receiving device receives the packet should be synchronized; the meaning of the synchronization is that the entry is The time between the clock and the exit clock is the same, or the conversion relationship between the time of the entry clock and the time of the exit clock is determined. For example, the time zone where Beijing is located is Dongba District, and the time zone where Tokyo is located is Dongjiu District. Then there is an hour difference between Beijing time and Tokyo time; therefore, if the message sending device is in Beijing, it is reported. If the text receiving device is in Tokyo, the time stamp of the record should be added by one hour, or the time of the exit clock should be subtracted by one hour, so that the entry clock and the exit clock can be synchronized.

The manner of synchronizing the ingress clock and the egress clock may include multiple types. Generally, the synchronization mode of the clock is divided into two categories: one is to synchronize between the egress clock and the ingress clock, that is, Taking an exit clock/ingress clock as a reference, the entry clock corresponding to the exit clock is coincident with the exit clock, or the exit clock corresponding to the entry clock is consistent with the entry clock; The absolute time of the clock is not necessarily accurate, but has no effect on the implementation of the embodiment. Second, the exit clock and the entry clock are both synchronized with the reference clock, that is, based on a third-party standard clock, which is recorded as a reference clock. The exit clock and the entry clock are both synchronized with the reference clock, and correspondingly, the synchronization between the exit clock and the entry clock is achieved. Specifically, the synchronization method may include: GPS, NTP, China Beidou satellite navigation system, atomic clock, IEEE1588, etc., any synchronous manner.

At this time, the time recording module 102 has acquired the timestamp corresponding to the message; in order to enable the timestamp to be known by the message receiving device, the timestamp and the message need to be combined and sent through the data network. The reason for the combination transmission is to prevent the message and the time stamp from being able to reach the message receiving device at the same time, thereby causing trouble for the message receiving device to perform comparison. However, in other embodiments, even if the timestamp and the corresponding message do not arrive at the message receiving device at the same time, the implementation of the embodiment does not have much influence.

As an embodiment, the device further includes a first encapsulating module 1031, configured to insert the timestamp into the packet after the timestamp of the packet entering the data network is recorded, and the packet is inserted into the packet. Repackage. This ensures that the message and its corresponding timestamp will arrive at the message receiving device at the same time. Specifically, the timestamp can be inserted into any of a plurality of locations in the packet, such as a packet header, a packet header, and a payload, or a trailer at the end of the packet.

The packet adds the timestamp to the original content. Therefore, the packet is usually re-encapsulated. The re-encapsulation includes, but is not limited to, recalculating the length of the packet and recalculating the CRC of the packet. Bytes, etc. After the packet is re-encapsulated, the encapsulated packet can be sent to the packet receiving device through the data network, and then the packet is received. The receiving device processes the message.

In this embodiment, the time recording module 102 in the message sending device may be implemented by a central processing unit (CPU, Central Processing Unit) and a digital signal processor (DSP, Digital Signal Processor) in the device. , a micro-control unit (MCU) or a field-programmable gate array (FPGA); the message sending module 103 in the message sending device can pass the communication module in practical applications. (including: basic communication suite, operating system, communication module, standardized interface and protocol, etc.) and transceiver antenna implementation; the message generation module 101 in the message sending device can be used by the CPU, DSP, MCU or The FPGA is implemented or implemented by a communication module.

This embodiment further provides a message receiving apparatus. Referring to FIG. 5, the method includes:

The message receiving module 201 is configured to receive the message through the data network and the time stamp of the entry clock when the message enters the data network;

The time determining module 202 is configured to determine an output moment of the packet according to the timestamp and the preset maximum delay.

The message buffering module 203 is configured to cache the message if the time point of the egress clock is less than the output time, wherein the egress clock is synchronized with the ingress clock.

In this embodiment, the message receiving module 201 receives the message transmitted through the data network; the message transmission time is not determined, that is, the time of transmission and the arrival time of the message are not determined, which is due to the data. The network itself does not have a certain transmission time. The timestamp is the time of the entry clock when the message enters the data network.

As an implementation manner, the timestamp and the packet combination are sent through the data network, that is, the timestamp and the message arrive at the message receiving module 201 at the same time; the reason for the combination is to prevent the message and the timestamp from being simultaneously reported. The text receiving module 201 causes trouble in comparison. However, in other implementation manners, even if the timestamp and the corresponding message do not arrive at the message receiving module 201 at the same time, the implementation of the embodiment does not have much influence.

In this embodiment, in addition to the timestamp corresponding to the received packet, the preset maximum delay and the time point of the exit clock are also included. The time point of the exit clock is the time indicated by the exit clock. The exit clock is similar to the entrance clock. Its accuracy can be very high, for example, it can be accurate to seconds, milliseconds, subtle, even picoseconds, nanoseconds, etc. The higher the accuracy, the more accurate the message delivery time. The output is expected to be delayed; in this embodiment, the form, or principle, of the clock is not limited, and it is feasible whether it is a mechanical clock, an electronic clock, a quartz clock, an atomic clock, or the like. The accuracy of the exit clock may be the same as the accuracy of the entry clock.

In this embodiment, the time determining module 202 is configured to calculate a sum of the timestamp and the preset maximum delay, and determine that the output time of the packet is greater than or equal to the timestamp and the preset maximum The sum of the delays. The output time refers to a time point, and the message is allowed to output at a time point that satisfies the sum of the time stamp equal to or greater than the preset maximum time, and is also allowed to satisfy the time greater than the sum of the time stamp and the preset maximum time. Point output; although the output time is a time point, it does not mean that the message will be output at this moment. In fact, the output time is the earliest time point at which the message is allowed to be output, that is, a time point, which can be guaranteed. The message can be sent from the transmission to the output for a fixed period of time and this fixed time is as short as possible, ensuring efficiency.

The preset maximum delay is also mentioned above. Since the time for transmitting the packet in the data network is not fixed, in this embodiment, a fixed preset maximum delay is set, and the time between sending and output of the packet is determined by the preset maximum delay. It is fixed, and the fixed transmission time is the preset maximum delay. The preset maximum delay is a preset time for delaying the message for a fixed period of time. Generally speaking, although the transmission time of the packets transmitted in the data network is not fixed, there is usually a maximum transmission time, that is, the maximum delay time. In the normal transmission process, the message does not exceed this maximum. The delay time, the transmission time is less than this maximum delay time. The maximum delay time is generally experimental data, that is, a value determined by multiple sampling, from the message transmitting device to the message receiving device, under normal circumstances, the delay time of the message is not exceeded at most. The preset maximum delay in this embodiment generally refers to the maximum delay time, such that The time that the packet is transmitted in the data network does not exceed the preset maximum delay. Therefore, the time from the transmission to the output can be fixed, reducing or not causing fluctuations, and the transmission of the packet is more stable. Of course, the preset maximum delay can also be adjusted according to the needs, as long as it is within a reasonable range.

In this embodiment, since the timestamp is the time of the entry clock, the exit clock should be synchronized with the entry clock; the meaning of the synchronization is that the time of the entry clock and the exit clock are consistent, or the time of the entry clock and the time of the exit clock The conversion relationship between them is deterministic.

In this embodiment, when the time point of the egress clock is less than the output time, the message caching module 203 buffers the message. It should be noted that the time point of the egress clock is not only the time when the packet arrives at the packet receiving module 201, and the time point of the egress clock refers to the time indicated on the egress clock; The indicated time is always elapsed. Therefore, when the time point of the exit clock is less than the output time, the comparison should be continued. As an embodiment, the device further includes a message output module 204 configured to output the report when the time point of the exit clock is less than the output time, when the output time is reached at the time of the exit clock If the time point of the exit clock is greater than or equal to the output time, the message is directly output. Specifically, when the time of the exit clock is less than the output time, the output time is the time of the true outward output of the message; when the time of the exit clock is greater than the output time, the message can be directly output.

In this embodiment, when the message has just arrived at the message receiving module 201, it is obvious that the time point of the exit clock or the time difference between the time and the time stamp of the exit clock is the time when the message is transmitted in the data network. . It can be seen from the foregoing that this time is not fixed, and it is often floating. Therefore, this embodiment provides the concept of preset maximum delay; if the time point of the exit clock is always smaller than the output time, the report is The text cache module 203 always caches the message. During the buffering period, the time point of the exit clock will be closer to the output time, and when the time point of the exit clock is equal to the output time, the message output module 204 can output the message.

As an embodiment, the message output module 204 further includes a second encapsulating module 2041, configured to remove the timestamp from the packet when the timestamp is encapsulated in the packet, The message is repackaged and output. Re-encapsulation includes but is not limited to: recalculating the message length content, recalculating the CRC check byte of the message, and the like.

In this embodiment, the time determining module 202 in the message receiving device is in an actual application. It can be implemented by a CPU, a DSP, an MCU or an FPGA in the device; the message receiving module 201 in the message receiving device can pass through a communication module (including: basic communication suite, operating system, communication) in practical applications. The module, the standardized interface and the protocol, and the transmitting and receiving antennas are implemented; the message buffering module 203 in the message sending device can be implemented in a memory in an actual application.

The embodiment provides a message processing system, including the above-mentioned message sending device and message receiving device, wherein:

As an implementation manner, the packet sending apparatus is configured to insert the time stamp into the packet, re-encapsulate the packet, and send the re-encapsulated packet through the data network. .

In this embodiment, the packet receiving apparatus is configured to calculate a sum of the timestamp and the preset maximum delay, and determine that the output time of the packet is greater than or equal to the timestamp and the preset maximum The sum of the delays.

In this embodiment, the message receiving apparatus is configured to output the message when the time point of the egress clock is greater than or equal to the output time.

In this embodiment, the packet receiving apparatus is configured to remove the timestamp from the packet when the timestamp is encapsulated into the packet, and re-encapsulate the packet. And output.

In the embodiment of the present invention, the packet sending apparatus and the packet receiving apparatus may specifically refer to The description of the foregoing embodiment is not repeated here; the composition of the packet sending apparatus may be specifically shown in FIG. 4; the composition of the packet receiving apparatus may be specifically shown in FIG. 5.

The packet sending apparatus and the packet receiving apparatus shown in FIG. 4 and FIG. 5, the embodiment provides a packet processing method. Referring to FIG. 6, the method includes:

S401. Obtain a message.

The packet may be generated by the packet generating module 101, and may not be generated by the packet generating module 101 itself, or may be sent by other devices to the packet sending device; the packet sending module 103 is The message passes through the starting point of the data network, and the message enters the data network in the message sending module 103.

S402. Record a timestamp of the entry clock when the packet enters the data network, and insert the timestamp into the packet; wherein the entry clock is synchronized with the exit clock.

The manner of synchronizing the ingress clock and the egress clock may include multiple types. Generally, the synchronization mode of the clock is divided into two categories: one is synchronization between the egress clock and the ingress clock, that is, the egress clock. Taking the entry clock as a reference, making the entry clock corresponding to the exit clock coincide with the exit clock, or making the exit clock corresponding to the entry clock coincide with the entry clock; thus the result of the synchronization is two clocks The absolute time is not necessarily accurate, but has no effect on the implementation of the embodiment. Second, the exit clock and the entry clock are both synchronized with the reference clock, that is, based on a third-party standard clock, which is recorded as a reference clock. Both the egress clock and the ingress clock are synchronized with the reference clock, and accordingly, synchronization is achieved between the egress clock and the ingress clock. Specifically, the synchronization method may include: GPS, NTP, China Beidou satellite navigation system, atomic clock, IEEE1588, etc., any synchronous manner.

After the timestamp of the packet entering the data network is recorded, the timestamp is inserted into the packet, and the packet is re-encapsulated. This ensures that the message and its corresponding timestamp will arrive at the message receiving device at the same time.

S403. Encapsulate the packet with the timestamp inserted.

S404: The message is transmitted through the data network.

S405. Acquire a time-stamped message transmitted through the data network, and determine an output time according to a time point of the exit clock and a preset maximum delay.

The received message is a message transmitted through the data network; the message transmission time is not determined, that is, the time of transmission and the arrival time of the message are not determined, because the data network itself does not have a certain transmission time. .

S406: Cache the packet.

S407. Determine whether the time point of the exit clock satisfies the output time; if yes, go to S408; if not, go to S406.

The time point of the egress clock is less than the output time, or the difference between the time point of the egress clock and the timestamp is less than the preset maximum delay. Then, the time point of the egress clock is not satisfied with the output time; if it is not satisfied, the pair is The message is cached.

S408. Remove the timestamp in the packet and re-encapsulate the packet.

If the timestamp is encapsulated in the packet, the timestamp in the packet is removed and the packet is re-encapsulated and output. Re-encapsulation includes but is not limited to: recalculating the message length content, recalculating the CRC check byte of the message, and the like.

S409. Output the message to the outside world.

In the several embodiments provided by the present invention, it should be understood that the disclosed method and apparatus may be implemented in other manners. The device embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division, and the actual implementation may have another The way of dividing, such as: multiple modules or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the communication connections between the various components shown or discussed may be indirect coupling or communication connections through some interfaces, devices or modules, and may be electrical, mechanical or otherwise.

The modules described above as separate components may or may not be physically separated. The components displayed as modules may or may not be physical modules, that is, may be located in one place or distributed to multiple network modules; Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each module may be separately used as one module, or two or more modules may be integrated into one module; The module can be implemented in the form of hardware or in the form of hardware plus software function modules.

It will be understood by those skilled in the art that all or part of the steps of implementing the foregoing method embodiments may be performed by hardware related to program instructions. The foregoing program may be stored in a computer readable storage medium, and when executed, the program includes The foregoing steps of the method embodiment; and the foregoing storage medium includes: a removable storage device, a read-only memory (ROM), a magnetic disk or an optical disk, and the like, which can store program codes.

Alternatively, the above-described integrated module of the embodiment of the present invention may be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a stand-alone product. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions. A computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention. The foregoing storage medium includes various media that can store program codes, such as a mobile storage device, a ROM, a magnetic disk, or an optical disk.

The memory switching method and apparatus described in the embodiments of the present invention are only exemplified by the foregoing embodiments, but are not limited thereto, and those skilled in the art should understand that the technical solutions described in the foregoing embodiments may still be modified. Equivalent replacement of some or all of the technical features may be made without departing from the scope of the technical solutions of the embodiments of the present invention.

The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention.

Industrial applicability

The technical solution of the embodiment of the present invention overcomes the problem that the output of the packet is uncertain due to the uncertainty of the time of transmission of the packet in the data network, so that the packet can be transmitted according to a fixed time, which facilitates subsequent processing. Expanded the application range of the data network and improved the user experience.

Claims

A method for sending a message, comprising:

Obtain a message;

Recording a timestamp of the entry clock when the packet enters the data network; wherein the entry clock is synchronized with the exit clock;

Transmitting the timestamp and the message through the data network.
The method for transmitting a message according to claim 1, wherein the transmitting the timestamp and the message through the data network comprises: inserting the timestamp into the message; The packet is re-encapsulated; the re-encapsulated message is sent through the data network.
A message receiving method includes:

Receiving a message through the data network and a timestamp of the entry clock when the message enters the data network;

Determining an output moment of the packet according to the timestamp and a preset maximum delay;

When the time point of the egress clock is less than the output time, the message is buffered, wherein the egress clock is synchronized with the entry clock.
The method of receiving a message according to claim 3, wherein the determining, according to the timestamp and the preset maximum delay, the output time of the message comprises: calculating the timestamp and the preset maximum time And determining, by the sum of the packets, an output moment of the packet is greater than or equal to a sum of the timestamp and the preset maximum delay.
The message receiving method according to claim 3 or 4, wherein when the time point of the exit clock is greater than or equal to the output time, the method further comprises: outputting the message.
The packet receiving method according to claim 5, wherein when the time stamp is encapsulated into the message, the outputting the message comprises: removing the timestamp from the message The packet is re-encapsulated and output.
A packet processing method includes:

Obtain a message;

Recording a timestamp of the entry clock when the packet enters the data network; wherein the entry clock is synchronized with the exit clock;

Transmitting the timestamp and the message by using the data network;

Receiving a message through the data network and a timestamp of the entry clock when the message enters the data network;

Determining an output moment of the packet according to the timestamp and a preset maximum delay;

When the time point of the egress clock is less than the output time, the message is buffered, wherein the egress clock is synchronized with the entry clock.
The method of claim 7 wherein said transmitting said timestamp and said message over said data network comprises: inserting said timestamp into said message; re-performing said message Encapsulating and transmitting the repackaged message through the data network.
The method according to claim 7, wherein the determining the output moment of the packet according to the timestamp and the preset maximum delay comprises: calculating a sum of the timestamp and the preset maximum delay And determining that the output time of the packet is greater than or equal to a sum of the timestamp and the preset maximum delay.
The method according to claim 7 or 9, wherein when the time point of the exit clock is greater than or equal to the output time, the method further comprises: outputting the message.
The method of claim 10, wherein when the timestamp is encapsulated into the message, the outputting the message comprises: removing the timestamp from the message; The message is repackaged and output.
A message sending device includes:

a packet generation module configured to obtain a packet;

a time recording module configured to record a timestamp of an entry clock when the packet enters the data network; wherein the entry clock is synchronized with an exit clock;

The message sending module is configured to send the timestamp and the message through the data network.
The message transmitting apparatus according to claim 12, wherein the message sending module comprises a first encapsulating module, configured to insert the time stamp into the message, and re-encapsulate the message.
A message receiving device includes:

a message receiving module, configured to receive a message through the data network and a timestamp of an entry clock when the message enters the data network;

a time determining module, configured to determine an output moment of the packet according to the timestamp and a preset maximum delay;

The message cache module is configured to cache the message when the time point of the egress clock is less than the output time, wherein the egress clock is synchronized with the entry clock.
The message receiving apparatus according to claim 14, wherein the time determining module is configured to calculate a sum of the timestamp and the preset maximum time delay, and determine that an output time of the message is greater than or equal to the The sum of the timestamp and the preset maximum delay.
The message receiving apparatus according to claim 14 or 15, further comprising a message output module configured to output the message when a time point of the exit clock is greater than or equal to the output time.
The message receiving apparatus according to claim 16, wherein, when the time stamp is encapsulated into the message, the message output module includes a second encapsulation module configured to set the time stamp from the The packet is removed, and the packet is re-encapsulated and output.
A message processing system, comprising a message sending device and a message receiving device;

The message sending device is configured to obtain a message; record a timestamp of an entry clock when the message enters the data network; wherein the entry clock is synchronized with an exit clock; and the timestamp is sent through the data network Transmitting the message to the message receiving device;

The message receiving apparatus is configured to receive a message through a data network and enter the message a timestamp of the entry clock of the data network; determining an output time of the packet according to the timestamp and a preset maximum delay; and when the time point of the exit clock is less than the output time, The file is cached, and the exit clock is synchronized with the entry clock.
A computer storage medium storing computer executable instructions for executing the message transmission method of claim 1 or 2.
A computer storage medium storing computer executable instructions for performing the message receiving method according to any one of claims 3 to 6.