WO2016143547A1 - Photoelectric conversion element, photoelectric conversion device, method for manufacturing photoelectric conversion element, and method for manufacturing photoelectric conversion device - Google Patents

Photoelectric conversion element, photoelectric conversion device, method for manufacturing photoelectric conversion element, and method for manufacturing photoelectric conversion device Download PDF

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Publication number
WO2016143547A1
WO2016143547A1 PCT/JP2016/055764 JP2016055764W WO2016143547A1 WO 2016143547 A1 WO2016143547 A1 WO 2016143547A1 JP 2016055764 W JP2016055764 W JP 2016055764W WO 2016143547 A1 WO2016143547 A1 WO 2016143547A1
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Prior art keywords
electrode
photoelectric conversion
semiconductor film
amorphous semiconductor
forming
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PCT/JP2016/055764
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French (fr)
Japanese (ja)
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親扶 岡本
直城 浅野
土津田 義久
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シャープ株式会社
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Priority to JP2017504969A priority Critical patent/JPWO2016143547A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/05Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Definitions

  • the present invention relates to a photoelectric conversion device, a photoelectric conversion device, a method for manufacturing a photoelectric conversion device, and a method for manufacturing a photoelectric conversion device.
  • the most manufactured and sold solar cells have a structure in which electrodes are formed on a light receiving surface that is a surface on which sunlight is incident and a back surface that is opposite to the light receiving surface, respectively.
  • FIG. 17 shows a schematic cross-sectional view of the back junction solar cell described in Patent Document 1.
  • the back junction solar cell described in Patent Document 1 shown in FIG. 17 includes a semiconductor substrate 111 and a first semiconductor layer 112 and a second semiconductor layer 114 on the back surface of the semiconductor substrate 111.
  • the first semiconductor layer 112 includes an i-type amorphous silicon layer and a p-type amorphous silicon layer that are sequentially stacked from the back surface side of the semiconductor substrate 111.
  • the second semiconductor layer 114 includes an i-type amorphous silicon layer and an n-type amorphous silicon layer that are sequentially stacked from the back side of the semiconductor substrate 111.
  • An insulating layer 116 is provided so as to cover the end portions of the first semiconductor layer 112 and the second semiconductor layer 114. Further, a transparent electrode layer 118a and a p-side electrode layer 120a are sequentially stacked on the first semiconductor layer 112 from the first semiconductor layer 112 side, and on the second semiconductor layer 114, the second semiconductor layer 114 side. The transparent electrode layer 118b and the n-side electrode layer 120b are sequentially stacked.
  • the transparent electrode layers 118a and 118b, the p-side electrode layer 120a, and the n-side electrode layer 120b are formed as follows. That is, first, an ITO (Indium Tin Oxide) layer is uniformly formed on the first semiconductor layer 112, the second semiconductor layer 114, and the insulating layer 116 by a sputtering method, and then a printing method or a coating method is applied on the ITO layer. Use to install silver paste. Thereafter, the position where the insulating layer 116 is formed is irradiated with laser light and scanned in a predetermined direction, thereby forming a separation groove 130 having a width G 0 in a direction perpendicular to the scanning direction. Transparent electrode layers 118a and 118b, a p-side electrode layer 120a, and an n-side electrode layer 120b are formed.
  • ITO Indium Tin Oxide
  • the embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and a surface of one surface side of the semiconductor substrate.
  • a second conductive type amorphous semiconductor film; a first electrode on the first conductive type amorphous semiconductor film; a second electrode on the second conductive type amorphous semiconductor film; and one surface side of the semiconductor substrate And an insulating layer that covers the insulating layer, wherein the insulating layer is provided with an opening for electrical connection with the first electrode and electrical connection with the second electrode.
  • the embodiment disclosed herein includes a photoelectric conversion element and a wiring sheet, and the photoelectric conversion element includes a semiconductor substrate of a first conductivity type or a second conductivity type, and a first surface on one surface side of the semiconductor substrate.
  • the wiring sheet includes an insulating base material, a first wiring and a second wiring on the insulating base material, and the first electrode and the first wiring are a first conductive layer.
  • the second electrode and the second wiring are photoelectric conversion devices that are electrically connected by a second conductive layer.
  • the embodiment disclosed herein includes a step of forming a first conductivity type amorphous semiconductor film on one surface side of a semiconductor substrate of a first conductivity type or a second conductivity type, and a step of forming a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate.
  • the step of forming the first electrode, and the step of forming the second electrode electrical connection with the first electrode and the second electrode so as to cover one surface side of the semiconductor substrate And a step of forming an insulating layer having an opening for electrical connection.
  • Embodiment disclosed here includes the process of producing a photoelectric conversion element, the process of connecting a photoelectric conversion element to a wiring sheet, and the process of producing a photoelectric conversion element is the 1st conductivity type or the 2nd conductivity type Forming a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, forming a second conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and first conductivity Forming a first electrode on the first amorphous semiconductor film, forming a second electrode on the second conductive amorphous semiconductor film, forming the first electrode, and forming the second electrode Forming an insulating layer having an opening for electrical connection with the first electrode and electrical connection with the second electrode so as to cover one surface side of the semiconductor substrate after the step of performing In the step of connecting to the wiring sheet, the first electrode and the first wiring are arranged in the opening. And a step of electrically connecting the second electrode and the second wiring by a second conductive layer disposed in the opening. .
  • the reliability of the photoelectric conversion element and the photoelectric conversion device can be improved.
  • FIG. 3 is a schematic cross-sectional view of the heterojunction back contact cell of Embodiment 1.
  • 3 is a schematic plan view of the back side of the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1.
  • FIG. 3 is a schematic plan view of a heterojunction back contact cell with a wiring sheet according to Embodiment 1.
  • FIG. 3 is a schematic plan view of a wiring sheet used in the heterojunction back contact cell with a wiring sheet of Embodiment 1.
  • FIG. 3 is a schematic enlarged cross-sectional view along the direction orthogonal to the longitudinal direction of the first wiring and the second wiring of the heterojunction back contact cell with a wiring sheet of Embodiment 1.
  • FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell with wiring sheet according to the first embodiment.
  • 2 is a schematic cross-sectional view of a back junction solar cell described in Patent Document 1.
  • FIG. 1 is a schematic cross-sectional view of the heterojunction back contact cell 10 according to the first embodiment.
  • the heterojunction back contact cell 10 of Embodiment 1 includes a first i on the semiconductor substrate 1 and the second surface 1b which is the back surface opposite to the first surface 1a which is the light receiving surface of the semiconductor substrate 1.
  • Type amorphous semiconductor film 2 and second i type amorphous semiconductor film 4 first conductivity type amorphous semiconductor film 3 on first i type amorphous semiconductor film 2, and second i type amorphous semiconductor film 2
  • the second electrode 12 and the insulating layer 13 covering the second surface 1b side of the semiconductor substrate 1 are provided.
  • the insulating layer 13 is provided with an opening 14 for electrical connection with the first electrode 11 and electrical connection with the second electrode 12.
  • amorphous semiconductor film 6 is provided on the first surface 1 a of the semiconductor substrate 1, and a dielectric film 7 is provided on the amorphous semiconductor film 6.
  • the semiconductor substrate 1 is an n-type single crystal silicon substrate, and the first i-type amorphous semiconductor film 2 and the second i-type amorphous semiconductor film 4 are i-type amorphous silicon films, respectively.
  • the first conductive amorphous semiconductor film 3 is a p-type amorphous silicon film, and the second conductive amorphous semiconductor film 5 is an n-type amorphous silicon film.
  • the amorphous semiconductor film 6 is an i-type amorphous silicon film, and the dielectric film 7 is a silicon nitride film.
  • i-type is not only a completely intrinsic state but also a sufficiently low concentration (n-type impurity concentration is less than 1 ⁇ 10 15 / cm 3 and p-type impurity concentration is 1 ⁇ (Less than 10 15 / cm 3 ) is meant to include n-type or p-type impurities.
  • n-type means a state where the n-type impurity concentration is 1 ⁇ 10 15 / cm 3 or more
  • p-type means that the p-type impurity concentration is 1 ⁇ 10 15 / cm 3. It means a state of cm 3 or more.
  • the n-type impurity concentration and the p-type impurity concentration can be measured by, for example, secondary ion mass spectrometry (SIMS).
  • amorphous silicon includes not only amorphous silicon in which the dangling bonds of silicon atoms are not terminated with hydrogen, but also dangling of silicon atoms such as hydrogenated amorphous silicon. It also includes those whose hands are terminated with hydrogen or the like.
  • FIG. 2 shows a schematic plan view of the back surface side of the heterojunction back contact cell 10 according to the first embodiment.
  • strip-shaped first electrodes 11 and strip-shaped second electrodes 12 are alternately arranged on the back surface of the heterojunction back contact cell 10 of the first embodiment.
  • the strip-shaped first electrode 11 and the strip-shaped second electrode 12 extend in the same direction, and the gap between the side wall 11a of the adjacent first electrode 11 and the side wall 12a of the second electrode 12 is G. It has become.
  • the extending direction of the first electrode 11 and the extending direction of the second electrode 12 are the same will be described. However, the extending direction of the first electrode 11 and the extending direction of the second electrode 12 are described. It may be different from the extending direction.
  • a strip-shaped opening 14 is formed so as to be included in each of the formation region of the first electrode 11 and the formation region of the second electrode 12.
  • the extending direction of the strip-shaped opening 14 is also the same as the extending direction of the first electrode 11 and the extending direction of the second electrode 12.
  • the case in which the extending direction of the opening 14 is the same as the extending direction of each of the first electrode 11 and the second electrode 12 will be described. It may be different from at least one of the extending direction of the first electrode 11 and the extending direction of the second electrode 12.
  • the substrate 1 is manufactured, and the first i-type amorphous semiconductor film 2 is formed so as to be in contact with the entire surface of the second surface 1b which is the back surface of the semiconductor substrate 1.
  • the method for forming the first i-type amorphous semiconductor film 2 is not particularly limited. For example, a plasma CVD (Chemical Vapor Deposition) method can be used.
  • a first conductive amorphous semiconductor film 3 is formed so as to be in contact with the entire surface of the first i-type amorphous semiconductor film 2.
  • the formation method of the 1st conductivity type amorphous semiconductor film 3 is not specifically limited, For example, plasma CVD method can be used.
  • a first i-type amorphous semiconductor film 2 and a first conductive-type amorphous semiconductor film 3 are formed on the first conductive-type amorphous semiconductor film 3.
  • An etching mask 31 having an opening at a location where the stacked body 51 is etched in the thickness direction is formed.
  • etching mask 31 As a mask, a part of the first stacked body 51 is etched in the thickness direction. As a result, a part of the second surface 1b of the semiconductor substrate 1 is exposed. Thereafter, as shown in FIG. 7, the etching mask 31 is completely removed.
  • the second i-type amorphous semiconductor film 4 is formed so as to cover the second surface 1 b of the semiconductor substrate 1 and the first stacked body 51.
  • the method for forming the second i-type amorphous semiconductor film 4 is not particularly limited, and for example, a plasma CVD method can be used.
  • a second conductivity type amorphous semiconductor film 5 is formed on the second i-type amorphous semiconductor film 4.
  • the formation method of the 2nd conductivity type amorphous semiconductor film 5 is not specifically limited, For example, plasma CVD method can be used.
  • the etching mask 32 is formed only in the portion where the 52 is left.
  • etching mask 32 As a mask, a part of the second stacked body 52 is etched in the thickness direction so that a part of the first conductive type amorphous semiconductor film 3 is formed as shown in FIG. Expose. Thereafter, the etching mask 32 is completely removed.
  • the first electrode 11 is formed on the first conductive type amorphous semiconductor film 3, and the second electrode 12 is formed on the second conductive type amorphous semiconductor film 5.
  • the 1st electrode 11 and the 2nd electrode 12 are formed so that the space
  • the formation method of the 1st electrode 11 and the 2nd electrode 12 is not specifically limited, For example, a vapor deposition method etc. can be used.
  • an insulating layer 13 having an opening 14 is formed so as to cover the second surface 1 b side of the semiconductor substrate 1.
  • the insulating layer 13 covers the entire surface on the second surface 1b side of the semiconductor substrate 1 after the first electrode 11 and the second electrode 12 are formed. It is formed by forming a silicon oxide film and / or a silicon nitride film by a sputtering method.
  • the opening 14 is formed by evaporating a part of the insulating layer 13 by irradiating the region corresponding to the formation region of the opening 14 of the insulating layer 13 with laser light.
  • FIG. 13 is a schematic plan view of the heterojunction back contact cell with a wiring sheet according to the first embodiment.
  • the heterojunction back contact cell with wiring sheet according to the first embodiment has a plurality of heterojunction back contact cells 10 according to the first embodiment installed on the wiring sheet 20 and electrically connected in series. It is configured by being connected.
  • FIG. 14 is a schematic plan view of a wiring sheet 20 used in the heterojunction back contact cell with a wiring sheet according to the first embodiment.
  • the wiring sheet 20 includes an insulating base material 21, first wirings 22 and second wirings 23 on the insulating base material 21.
  • the first wirings 22 and the second wirings 23 are also formed in a band shape, and are spaced apart from each other on the insulating base material 21 so that the longitudinal directions of these wirings are the same direction. Has been placed.
  • one end of the plurality of first wirings 22 and one end of the plurality of second wirings 23 are electrically connected to a strip-shaped current collection wiring 24, respectively.
  • the current collecting wiring 24 is disposed on the insulating base material 21 so as to have a longitudinal direction in a direction orthogonal to the longitudinal directions of the first wiring 22 and the second wiring 23.
  • the current collecting wiring 24 collects current from the plurality of first wirings 22 or the plurality of second wirings 23 and electrically connects the heterojunction back contact cells 10 of the first embodiment in series.
  • an insulating substrate can be used.
  • a film of polyester, polyethylene naphthalate, polyimide, or the like can be used.
  • first wiring 22, the second wiring 23, and the current collecting wiring 24 a conductive material can be used, for example, copper or the like can be used.
  • the first wiring 22, the second wiring 23, and the current collecting wiring 24 are each formed, for example, by forming a conductive film such as a metal film on the entire surface of the insulating base 21 and then etching a part thereof. It can be formed by removing and patterning.
  • FIG. 15 shows a schematic enlarged cross-sectional view along a direction orthogonal to the longitudinal direction of the first wiring 22 and the second wiring 23 of the heterojunction back contact cell with wiring sheet of the first embodiment.
  • the first wiring 22 of the wiring sheet 20 and the first electrode 11 of the heterojunction back contact cell 10 of Embodiment 1 are electrically connected by the first conductive layer 15 provided in the opening 14.
  • the second wiring 23 of the wiring sheet 20 and the second electrode 12 of the heterojunction back contact cell 10 of Embodiment 1 are electrically connected by the second conductive layer 16 provided in the opening 14.
  • the first conductive layer 15 for example, a material capable of achieving conduction between the first electrode 11 and the first wiring 22 and capable of bonding the first electrode 11 and the first wiring 22 is used. be able to.
  • the second conductive layer 16 is made of, for example, a material that can achieve electrical connection between the second electrode 12 and the second wiring 23 and can bond the second electrode 12 and the second wiring 23. Can do.
  • the heterojunction back contact cell with wiring sheet according to the first embodiment is formed in the opening 14 of the insulating layer 13 of the heterojunction back contact cell 10 according to the first embodiment, for example, as shown in the schematic cross-sectional view of FIG.
  • the first electrode 11 and the second electrode 12 can be installed on the first electrode 11 and the first wiring 22, respectively.
  • a separation groove having a narrow width is provided between the first electrode 11 and the second electrode 12 by laser irradiation, and the first electrode 11 and the second electrode 12 are connected. Since there is no need for separation, the gap G between the first electrode 11 and the second electrode 12 can be made wider than the width G 0 of the separation groove in Patent Document 1. Thereby, in this embodiment, the insulation distance (gap G) between the 1st electrode 11 and the 2nd electrode 12 can be taken long compared with the case of patent document 1.
  • the insulating layer 13 is provided in the gap G between the first electrode 11 and the second electrode 12, the electrical connection between the first electrode 11 and the second electrode 12 is performed. Separation can be further ensured.
  • the reliability of the heterojunction back contact cell and the heterojunction back contact cell with the wiring sheet can be improved.
  • the distance G between the first electrode 11 and the second electrode 12 should be 40 ⁇ m or more. Is preferable, and it is more preferable that it is 50 micrometers or more.
  • the distance G between the first electrode 11 and the second electrode 12 is preferably 400 ⁇ m or less, and more preferably 200 ⁇ m or less.
  • the conductivity type of the semiconductor substrate 1 is n-type has been described.
  • the conductivity type of the semiconductor substrate 1 may be p-type.
  • the first conductivity type is p-type and the second conductivity type is n-type.
  • the first conductivity type is n-type and the second conductivity type is p-type. May be.
  • the second embodiment is characterized in that the opening 14 is formed by applying an etching paste to a region corresponding to the region where the opening 14 of the insulating layer 13 is formed and then heating.
  • the insulating layer 13 and the opening 14 are formed by applying an organic insulating resin as the insulating layer 13 by a printing method so that the opening 14 is formed at a position where the opening 14 is to be formed. It is characterized by.
  • the insulating layer 13 and the opening 14 are formed by printing an organic insulating resin as the insulating layer 13 by an inkjet method so that the opening 14 is formed at a position where the opening 14 is to be formed. It is characterized by.
  • the insulating layer 13 having the opening 14 is formed by forming a silicon oxide film and / or a silicon nitride film by a sputtering method using a shadow mask that masks a region corresponding to the opening 14 of the insulating layer 13. It is characterized by forming.
  • An embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and one of the semiconductor substrates.
  • a second conductive amorphous semiconductor film on the surface side, a first electrode on the first conductive amorphous semiconductor film, a second electrode on the second conductive amorphous semiconductor film, and one of the semiconductor substrates And an insulating layer covering the surface of the photoelectric conversion element, wherein the insulating layer is provided with an opening for electrical connection with the first electrode and electrical connection with the second electrode. .
  • an insulating layer is located between the first electrode and the second electrode. In this case, the reliability of the photoelectric conversion element can be further improved.
  • the distance between the first electrode and the second electrode is preferably 40 ⁇ m or more. In this case, the reliability of the photoelectric conversion element can be further improved.
  • the distance between the first electrode and the second electrode is preferably 400 ⁇ m or less. In this case, the characteristics of the photoelectric conversion element can be improved.
  • the photoelectric conversion element of the embodiment disclosed herein may further include a first i-type amorphous semiconductor film between the semiconductor substrate and the first conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
  • the first i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the first conductivity type amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
  • the photoelectric conversion element of the embodiment disclosed herein may further include a second i-type amorphous semiconductor film between the semiconductor substrate and the second conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
  • the second i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the second conductivity-type amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
  • Embodiment disclosed here is provided with a photoelectric conversion element and a wiring sheet, and a photoelectric conversion element is a 1st conductivity type or 2nd conductivity type semiconductor substrate, and the one surface side of a semiconductor substrate
  • the wiring sheet is provided with an insulating base material, a first wiring and a second wiring on the insulating base material, and the first electrode and the first wiring are the first and second wirings.
  • the photoelectric conversion device is electrically connected by one conductive layer, and the second electrode and the second wiring are electrically connected by the second conductive layer. That. Thereby, the reliability of the photoelectric conversion device can be improved.
  • an insulating layer is located between the first electrode and the second electrode. In this case, the reliability of the photoelectric conversion device can be further improved.
  • the distance between the first electrode and the second electrode is preferably 40 ⁇ m or more. In this case, the reliability of the photoelectric conversion device can be further improved.
  • the distance between the first electrode and the second electrode is preferably 400 ⁇ m or less. In this case, the characteristics of the photoelectric conversion device can be further improved.
  • the photoelectric conversion device according to the embodiment disclosed herein may further include a first i-type amorphous semiconductor film between the semiconductor substrate and the first conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion device can be improved.
  • the photoelectric conversion device according to the embodiment disclosed herein may further include a second i-type amorphous semiconductor film between the semiconductor substrate and the second conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion device can be improved.
  • An embodiment disclosed herein includes a step of forming a first conductivity type amorphous semiconductor film on one surface side of a first conductivity type or second conductivity type semiconductor substrate, and one of the semiconductor substrates. Forming a second conductive type amorphous semiconductor film on the surface side; forming a first electrode on the first conductive type amorphous semiconductor film; and forming a first electrode on the second conductive type amorphous semiconductor film. Electrical connection with the first electrode and the second electrode so as to cover one surface side of the semiconductor substrate after the step of forming the two electrodes, the step of forming the first electrode, and the step of forming the second electrode And a step of forming an insulating layer having an opening for electrical connection. In this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the step of forming the opening may include a step of irradiating a part of the insulating layer with laser light. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the step of forming the opening may include a step of applying an etching paste to a part of the insulating layer. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the step of forming the insulating layer may include a step of forming a silicon oxide film as the insulating layer. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the step of forming the insulating layer may include a step of forming a silicon nitride film as the insulating layer. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the step of forming the insulating layer includes a step of forming the insulating layer so as to be positioned between the first electrode and the second electrode. It is preferable that In this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the first electrode and the second electrode are formed such that the distance between the first electrode and the second electrode is 40 ⁇ m or more. It is preferable. In this case, a photoelectric conversion element with further improved reliability can be manufactured.
  • the first electrode and the second electrode are formed so that the distance between the first electrode and the second electrode is 400 ⁇ m or less. It is preferable. In this case, a photoelectric conversion element with further improved characteristics can be manufactured.
  • the step of forming the first conductivity type amorphous semiconductor film includes the step of forming a first i-type amorphous on one surface side of the semiconductor substrate.
  • a step of forming a semiconductor film and a step of forming a first conductivity type amorphous semiconductor film on the first i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
  • the step of forming the second conductivity type amorphous semiconductor film includes the step of forming a second i-type amorphous on one surface side of the semiconductor substrate.
  • a step of forming a semiconductor film and a step of forming a second conductivity type amorphous semiconductor film on the second i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
  • Embodiment disclosed here includes the process of producing a photoelectric conversion element, the process of connecting a photoelectric conversion element to a wiring sheet, and the process of producing a photoelectric conversion element is 1st conductivity type or 1st.
  • the step of connecting to the wiring sheet includes opening the first electrode and the first wiring.
  • a method for manufacturing a photoelectric conversion device comprising: a step of electrically connecting with a first conductive layer disposed; and a step of electrically connecting a second electrode and a second wiring with a second conductive layer disposed in an opening. It is. In this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the step of forming the opening may include a step of irradiating a part of the insulating layer with laser light. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the step of forming the opening may include a step of applying an etching paste to a part of the insulating layer. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the step of forming the insulating layer may include a step of forming a silicon oxide film as the insulating layer. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the step of forming the insulating layer may include a step of forming a silicon nitride film as the insulating layer. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the step of forming the insulating layer includes a step of forming the insulating layer so as to be positioned between the first electrode and the second electrode. It is preferable. In this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the first electrode and the second electrode are formed such that the distance between the first electrode and the second electrode is 40 ⁇ m or more. It is preferable. In this case, a photoelectric conversion device with further improved reliability can be manufactured.
  • the first electrode and the second electrode are formed so that the distance between the first electrode and the second electrode is 400 ⁇ m or less. It is preferable. In this case, a photoelectric conversion device with improved characteristics can be manufactured.
  • the step of forming the first conductivity type amorphous semiconductor film includes the step of forming a first i-type amorphous on one surface side of the semiconductor substrate.
  • a step of forming a semiconductor film and a step of forming a first conductivity type amorphous semiconductor film on the first i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
  • the step of forming the second conductivity type amorphous semiconductor film includes the step of forming the second i-type amorphous on one surface side of the semiconductor substrate.
  • a step of forming a semiconductor film and a step of forming a second conductivity type amorphous semiconductor film on the second i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
  • Embodiment disclosed here can be utilized for a photoelectric conversion element, a photoelectric conversion apparatus, and these manufacturing methods, especially a solar cell, a solar cell module, and these manufacturing methods, a heterojunction type back contact cell, and a wiring sheet There is a possibility that it can be suitably used for the attached heterojunction back contact cell and their manufacturing method.

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Abstract

A photoelectric conversion element (10) is provided with: a first conductivity-type amorphous semiconductor film (3) and a second conductivity-type amorphous semiconductor film (5), which are on one surface side of a first conductivity-type or second conductivity-type semiconductor substrate (1); a first electrode (11) on the first conductivity-type amorphous semiconductor film (3); a second electrode (12) on the second conductivity-type amorphous semiconductor film (5); and an insulating layer (13) covering the one surface side of the semiconductor substrate (1). The insulating layer (13) is provided with an opening (14) for electrical connection to the first electrode (11) and electrical connection to the second electrode (12).

Description

光電変換素子、光電変換装置、光電変換素子の製造方法および光電変換装置の製造方法Photoelectric conversion element, photoelectric conversion device, method for manufacturing photoelectric conversion device, and method for manufacturing photoelectric conversion device
 本発明は、光電変換素子、光電変換装置、光電変換素子の製造方法および光電変換装置の製造方法に関する。 The present invention relates to a photoelectric conversion device, a photoelectric conversion device, a method for manufacturing a photoelectric conversion device, and a method for manufacturing a photoelectric conversion device.
 太陽光エネルギを電気エネルギに直接変換する太陽電池は、近年、特に、地球環境問題の観点から、次世代のエネルギ源としての期待が急激に高まっている。太陽電池には、化合物半導体または有機材料を用いたものなど様々な種類のものがあるが、現在、主流となっているのは、シリコン結晶を用いたものである。 In recent years, expectations for solar cells that directly convert solar energy into electrical energy have increased rapidly, especially from the viewpoint of global environmental problems. There are various types of solar cells, such as those using compound semiconductors or organic materials, but the mainstream is currently using silicon crystals.
 現在、最も多く製造および販売されている太陽電池は、太陽光が入射する側の面である受光面と、受光面の反対側である裏面とにそれぞれ電極が形成された構造のものである。 Currently, the most manufactured and sold solar cells have a structure in which electrodes are formed on a light receiving surface that is a surface on which sunlight is incident and a back surface that is opposite to the light receiving surface, respectively.
 しかしながら、受光面に電極を形成した場合には、電極における太陽光の反射および吸収があることから、電極の面積分だけ入射する太陽光の量が減少する。そのため、裏面のみに電極を形成した裏面接合型太陽電池の開発が進められている(たとえば特許文献1参照)。 However, when an electrode is formed on the light receiving surface, sunlight is reflected and absorbed by the electrode, so that the amount of incident sunlight is reduced by the area of the electrode. Therefore, development of a back junction solar cell in which an electrode is formed only on the back surface is underway (see, for example, Patent Document 1).
 図17に、特許文献1に記載の裏面接合型太陽電池の模式的な断面図を示す。図17に示される特許文献1に記載の裏面接合型太陽電池は、半導体基板111と、半導体基板111の裏面上の第1半導体層112および第2半導体層114とを備えている。ここで、第1半導体層112は半導体基板111の裏面側から順次積層されたi型アモルファスシリコン層とp型アモルファスシリコン層とによって構成されている。また、第2半導体層114は半導体基板111の裏面側から順次積層されたi型アモルファスシリコン層とn型アモルファスシリコン層とによって構成されている。 FIG. 17 shows a schematic cross-sectional view of the back junction solar cell described in Patent Document 1. The back junction solar cell described in Patent Document 1 shown in FIG. 17 includes a semiconductor substrate 111 and a first semiconductor layer 112 and a second semiconductor layer 114 on the back surface of the semiconductor substrate 111. Here, the first semiconductor layer 112 includes an i-type amorphous silicon layer and a p-type amorphous silicon layer that are sequentially stacked from the back surface side of the semiconductor substrate 111. The second semiconductor layer 114 includes an i-type amorphous silicon layer and an n-type amorphous silicon layer that are sequentially stacked from the back side of the semiconductor substrate 111.
 第1半導体層112および第2半導体層114のそれぞれの端部を覆うように絶縁層116が設けられている。また、第1半導体層112上には第1半導体層112側から透明電極層118aとp側電極層120aとが順次積層されており、第2半導体層114上には第2半導体層114側から透明電極層118bとn側電極層120bとが順次積層されている。 An insulating layer 116 is provided so as to cover the end portions of the first semiconductor layer 112 and the second semiconductor layer 114. Further, a transparent electrode layer 118a and a p-side electrode layer 120a are sequentially stacked on the first semiconductor layer 112 from the first semiconductor layer 112 side, and on the second semiconductor layer 114, the second semiconductor layer 114 side. The transparent electrode layer 118b and the n-side electrode layer 120b are sequentially stacked.
 ここで、透明電極層118a,118b、p側電極層120aおよびn側電極層120bは以下のように形成される。すなわち、まず、第1半導体層112、第2半導体層114および絶縁層116上に、スパッタリング法によりITO(Indium Tin Oxide)層を一様に形成した後に、ITO層上に印刷法や塗布法を用いて銀ペーストを設置する。その後絶縁層116が形成された位置に対してレーザ光を照射し、所定の方向に走査することによって、当該走査方向と直交する方向に幅G0を有する分離溝130が形成され、これにより、透明電極層118a,118b、p側電極層120aおよびn側電極層120bが形成される。 Here, the transparent electrode layers 118a and 118b, the p-side electrode layer 120a, and the n-side electrode layer 120b are formed as follows. That is, first, an ITO (Indium Tin Oxide) layer is uniformly formed on the first semiconductor layer 112, the second semiconductor layer 114, and the insulating layer 116 by a sputtering method, and then a printing method or a coating method is applied on the ITO layer. Use to install silver paste. Thereafter, the position where the insulating layer 116 is formed is irradiated with laser light and scanned in a predetermined direction, thereby forming a separation groove 130 having a width G 0 in a direction perpendicular to the scanning direction. Transparent electrode layers 118a and 118b, a p-side electrode layer 120a, and an n-side electrode layer 120b are formed.
特開2011-44749号公報JP 2011-44749 A
 しかしながら、特許文献1においては、照射されるレーザ光のスポット径によって、分離溝130の幅G0が決定されるため、幅G0が非常に狭かった。そのため、p側電極層120aとn側電極層120bとの分離が不十分となり、信頼性が低くなることがあったため、その改善が要望されていた。 However, in Patent Document 1, since the width G 0 of the separation groove 130 is determined by the spot diameter of the irradiated laser beam, the width G 0 is very narrow. For this reason, separation between the p-side electrode layer 120a and the n-side electrode layer 120b becomes insufficient, and the reliability may be lowered.
 ここで開示された実施形態は、第1導電型または第2導電型の半導体基板と、半導体基板の一方の面側の第1導電型非晶質半導体膜と、半導体基板の一方の面側の第2導電型非晶質半導体膜と、第1導電型非晶質半導体膜上の第1電極と、第2導電型非晶質半導体膜上の第2電極と、半導体基板の一方の面側を覆う絶縁層と、を備え、絶縁層には、第1電極との電気的な接続および第2電極との電気的な接続を図るための開口が設けられている光電変換素子である。 The embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and a surface of one surface side of the semiconductor substrate. A second conductive type amorphous semiconductor film; a first electrode on the first conductive type amorphous semiconductor film; a second electrode on the second conductive type amorphous semiconductor film; and one surface side of the semiconductor substrate And an insulating layer that covers the insulating layer, wherein the insulating layer is provided with an opening for electrical connection with the first electrode and electrical connection with the second electrode.
 ここで開示された実施形態は、光電変換素子と、配線シートと、を備え、光電変換素子は、第1導電型または第2導電型の半導体基板と、半導体基板の一方の面側の第1導電型非晶質半導体膜と、半導体基板の一方の面側の第2導電型非晶質半導体膜と、第1導電型非晶質半導体膜上の第1電極と、第2導電型非晶質半導体膜上の第2電極と、半導体基板の一方の面側を覆う絶縁層とを備え、絶縁層には、第1電極との電気的な接続および第2電極との電気的な接続を図るための開口が設けられており、配線シートは、絶縁性基材と、絶縁性基材上の第1配線と第2配線とを備え、第1電極と第1配線とは第1導電層により電気的に接続されており、第2電極と第2配線とは第2導電層により電気的に接続されている光電変換装置である。 The embodiment disclosed herein includes a photoelectric conversion element and a wiring sheet, and the photoelectric conversion element includes a semiconductor substrate of a first conductivity type or a second conductivity type, and a first surface on one surface side of the semiconductor substrate. A conductive amorphous semiconductor film; a second conductive amorphous semiconductor film on one side of the semiconductor substrate; a first electrode on the first conductive amorphous semiconductor film; and a second conductive amorphous A second electrode on the porous semiconductor film and an insulating layer covering one surface side of the semiconductor substrate, wherein the insulating layer has electrical connection with the first electrode and electrical connection with the second electrode. An opening for providing is provided, and the wiring sheet includes an insulating base material, a first wiring and a second wiring on the insulating base material, and the first electrode and the first wiring are a first conductive layer. The second electrode and the second wiring are photoelectric conversion devices that are electrically connected by a second conductive layer.
 ここで開示された実施形態は、第1導電型または第2導電型の半導体基板の一方の面側に第1導電型非晶質半導体膜を形成する工程と、半導体基板の一方の面側に第2導電型非晶質半導体膜を形成する工程と、第1導電型非晶質半導体膜上の第1電極を形成する工程と、第2導電型非晶質半導体膜上の第2電極を形成する工程と、第1電極を形成する工程および第2電極を形成する工程の後に、半導体基板の一方の面側を覆うように、第1電極との電気的な接続および第2電極との電気的な接続を図るための開口を有する絶縁層を形成する工程とを含む光電変換素子の製造方法である。 The embodiment disclosed herein includes a step of forming a first conductivity type amorphous semiconductor film on one surface side of a semiconductor substrate of a first conductivity type or a second conductivity type, and a step of forming a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate. Forming a second conductive type amorphous semiconductor film; forming a first electrode on the first conductive type amorphous semiconductor film; and forming a second electrode on the second conductive type amorphous semiconductor film. After the step of forming, the step of forming the first electrode, and the step of forming the second electrode, electrical connection with the first electrode and the second electrode so as to cover one surface side of the semiconductor substrate And a step of forming an insulating layer having an opening for electrical connection.
 ここで開示された実施形態は、光電変換素子を作製する工程と、光電変換素子を配線シートに接続する工程と、含み、光電変換素子を作製する工程は、第1導電型または第2導電型の半導体基板の一方の面側に第1導電型非晶質半導体膜を形成する工程と、半導体基板の一方の面側に第2導電型非晶質半導体膜を形成する工程と、第1導電型非晶質半導体膜上の第1電極を形成する工程と、第2導電型非晶質半導体膜上の第2電極を形成する工程と、第1電極を形成する工程および第2電極を形成する工程の後に半導体基板の一方の面側を覆うように第1電極との電気的な接続および第2電極との電気的な接続を図るための開口を有する絶縁層を形成する工程とを含み、配線シートに接続する工程は、第1電極と第1配線とを開口に配置された第1導電層により電気的に接続する工程と、第2電極と第2配線とを開口に配置された第2導電層により電気的に接続する工程とを含む光電変換装置の製造方法である。 Embodiment disclosed here includes the process of producing a photoelectric conversion element, the process of connecting a photoelectric conversion element to a wiring sheet, and the process of producing a photoelectric conversion element is the 1st conductivity type or the 2nd conductivity type Forming a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, forming a second conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and first conductivity Forming a first electrode on the first amorphous semiconductor film, forming a second electrode on the second conductive amorphous semiconductor film, forming the first electrode, and forming the second electrode Forming an insulating layer having an opening for electrical connection with the first electrode and electrical connection with the second electrode so as to cover one surface side of the semiconductor substrate after the step of performing In the step of connecting to the wiring sheet, the first electrode and the first wiring are arranged in the opening. And a step of electrically connecting the second electrode and the second wiring by a second conductive layer disposed in the opening. .
 ここで開示された実施形態によれば、光電変換素子および光電変換装置の信頼性を向上することができる。 According to the embodiment disclosed herein, the reliability of the photoelectric conversion element and the photoelectric conversion device can be improved.
実施形態1のヘテロ接合型バックコンタクトセルの模式的な断面図である。FIG. 3 is a schematic cross-sectional view of the heterojunction back contact cell of Embodiment 1. 実施形態1のヘテロ接合型バックコンタクトセルの裏面側の模式的な平面図である。3 is a schematic plan view of the back side of the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1のヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部について図解する模式的な断面図である。6 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell of Embodiment 1. FIG. 実施形態1の配線シート付きヘテロ接合型バックコンタクトセルの模式的な平面図である。3 is a schematic plan view of a heterojunction back contact cell with a wiring sheet according to Embodiment 1. FIG. 実施形態1の配線シート付きヘテロ接合型バックコンタクトセルに用いられる配線シートの模式的な平面図である。3 is a schematic plan view of a wiring sheet used in the heterojunction back contact cell with a wiring sheet of Embodiment 1. FIG. 実施形態1の配線シート付きヘテロ接合型バックコンタクトセルの第1配線および第2配線の長手方向と直交する方向に沿った模式的な拡大断面図である。FIG. 3 is a schematic enlarged cross-sectional view along the direction orthogonal to the longitudinal direction of the first wiring and the second wiring of the heterojunction back contact cell with a wiring sheet of Embodiment 1. 実施形態1の配線シート付きヘテロ接合型バックコンタクトセルの製造方法の一例の製造工程の一部を図解する模式的な断面図である。FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell with wiring sheet according to the first embodiment. 特許文献1に記載の裏面接合型太陽電池の模式的な断面図である。2 is a schematic cross-sectional view of a back junction solar cell described in Patent Document 1. FIG.
 以下、ここで開示される実施形態の光電変換素子の一例としての実施形態のヘテロ接合型バックコンタクトセルと、実施形態の光電変換装置の一例としての実施形態の配線シート付きヘテロ接合型バックコンタクトセルとについて説明する。なお、実施形態の説明に用いられる図面において、同一の参照符号は、同一部分または相当部分を表わすものとする。 Hereinafter, the heterojunction back contact cell of the embodiment as an example of the photoelectric conversion element of the embodiment disclosed herein, and the heterojunction back contact cell with the wiring sheet of the embodiment as an example of the photoelectric conversion device of the embodiment And will be described. In the drawings used to describe the embodiments, the same reference numerals represent the same or corresponding parts.
 [実施形態1]
 <ヘテロ接合型バックコンタクトセルの構造>
 図1に、実施形態1のヘテロ接合型バックコンタクトセル10の模式的な断面図を示す。実施形態1のヘテロ接合型バックコンタクトセル10は、半導体基板1と、半導体基板1の受光面となる第1の面1aとは反対側の裏面となる第2の面1b上の第1のi型非晶質半導体膜2および第2のi型非晶質半導体膜4と、第1のi型非晶質半導体膜2上の第1導電型非晶質半導体膜3と、第2のi型非晶質半導体膜4上の第2導電型非晶質半導体膜5と、第1導電型非晶質半導体膜3上の第1電極11と、第2導電型非晶質半導体膜5上の第2電極12と、半導体基板1の第2の面1b側を覆う絶縁層13とを備えている。ここで、絶縁層13には、第1電極11との電気的な接続および第2電極12との電気的な接続を図るための開口14が設けられている。
[Embodiment 1]
<Structure of heterojunction back contact cell>
FIG. 1 is a schematic cross-sectional view of the heterojunction back contact cell 10 according to the first embodiment. The heterojunction back contact cell 10 of Embodiment 1 includes a first i on the semiconductor substrate 1 and the second surface 1b which is the back surface opposite to the first surface 1a which is the light receiving surface of the semiconductor substrate 1. Type amorphous semiconductor film 2 and second i type amorphous semiconductor film 4, first conductivity type amorphous semiconductor film 3 on first i type amorphous semiconductor film 2, and second i type amorphous semiconductor film 2 On the second conductive type amorphous semiconductor film 4 on the first conductive type amorphous semiconductor film 5, on the first electrode 11 on the first conductive type amorphous semiconductor film 3, and on the second conductive type amorphous semiconductor film 5 The second electrode 12 and the insulating layer 13 covering the second surface 1b side of the semiconductor substrate 1 are provided. Here, the insulating layer 13 is provided with an opening 14 for electrical connection with the first electrode 11 and electrical connection with the second electrode 12.
 半導体基板1の第1の面1aには凹凸1aが形成されている。半導体基板1の第1の面1a上には非晶質半導体膜6が設けられており、非晶質半導体膜6上には誘電体膜7が設けられている。 On the first surface 1a of the semiconductor substrate 1, irregularities 1a are formed. An amorphous semiconductor film 6 is provided on the first surface 1 a of the semiconductor substrate 1, and a dielectric film 7 is provided on the amorphous semiconductor film 6.
 本実施形態において、半導体基板1はn型単結晶シリコン基板であり、第1のi型非晶質半導体膜2および第2のi型非晶質半導体膜4はそれぞれi型非晶質シリコン膜であり、第1導電型非晶質半導体膜3はp型非晶質シリコン膜であり、第2導電型非晶質半導体膜5はn型非晶質シリコン膜である。また、本実施形態において、非晶質半導体膜6はi型非晶質シリコン膜であり、誘電体膜7は窒化シリコン膜である。 In the present embodiment, the semiconductor substrate 1 is an n-type single crystal silicon substrate, and the first i-type amorphous semiconductor film 2 and the second i-type amorphous semiconductor film 4 are i-type amorphous silicon films, respectively. The first conductive amorphous semiconductor film 3 is a p-type amorphous silicon film, and the second conductive amorphous semiconductor film 5 is an n-type amorphous silicon film. In this embodiment, the amorphous semiconductor film 6 is an i-type amorphous silicon film, and the dielectric film 7 is a silicon nitride film.
 なお、本実施形態において、「i型」は、完全な真性の状態だけでなく、十分に低濃度(n型不純物濃度が1×1015個/cm3未満、かつp型不純物濃度が1×1015個/cm3未満)であればn型またはp型の不純物が混入された状態のものも含む意味である。また、本実施形態において、「n型」は、n型不純物濃度が1×1015個/cm3以上の状態を意味し、「p型」は、p型不純物濃度が1×1015個/cm3以上の状態を意味する。n型不純物濃度およびp型不純物濃度は、たとえば二次イオン質量分析(SIMS)によって測定することができる。 In the present embodiment, “i-type” is not only a completely intrinsic state but also a sufficiently low concentration (n-type impurity concentration is less than 1 × 10 15 / cm 3 and p-type impurity concentration is 1 × (Less than 10 15 / cm 3 ) is meant to include n-type or p-type impurities. In the present embodiment, “n-type” means a state where the n-type impurity concentration is 1 × 10 15 / cm 3 or more, and “p-type” means that the p-type impurity concentration is 1 × 10 15 / cm 3. It means a state of cm 3 or more. The n-type impurity concentration and the p-type impurity concentration can be measured by, for example, secondary ion mass spectrometry (SIMS).
 また、本実施形態において、「非晶質シリコン」には、シリコン原子の未結合手が水素で終端されていない非晶質シリコンだけでなく、水素化非晶質シリコンなどのシリコン原子の未結合手が水素等で終端されたものも含まれるものとする。 In this embodiment, “amorphous silicon” includes not only amorphous silicon in which the dangling bonds of silicon atoms are not terminated with hydrogen, but also dangling of silicon atoms such as hydrogenated amorphous silicon. It also includes those whose hands are terminated with hydrogen or the like.
 図2に、実施形態1のヘテロ接合型バックコンタクトセル10の裏面側の模式的な平面図を示す。図2に示すように、実施形態1のヘテロ接合型バックコンタクトセル10の裏面には、帯状の第1電極11と帯状の第2電極12とが交互に配置されている。また、帯状の第1電極11と帯状の第2電極12とは同一方向に延在しており、隣り合う第1電極11の側壁11aと第2電極12の側壁12aとの間の間隔はGとなっている。なお、本実施形態においては、第1電極11の延在方向と第2電極12の延在方向とが同一である場合について説明するが、第1電極11の延在方向と第2電極12の延在方向とは異なっていてもよい。 FIG. 2 shows a schematic plan view of the back surface side of the heterojunction back contact cell 10 according to the first embodiment. As shown in FIG. 2, strip-shaped first electrodes 11 and strip-shaped second electrodes 12 are alternately arranged on the back surface of the heterojunction back contact cell 10 of the first embodiment. The strip-shaped first electrode 11 and the strip-shaped second electrode 12 extend in the same direction, and the gap between the side wall 11a of the adjacent first electrode 11 and the side wall 12a of the second electrode 12 is G. It has become. In the present embodiment, the case where the extending direction of the first electrode 11 and the extending direction of the second electrode 12 are the same will be described. However, the extending direction of the first electrode 11 and the extending direction of the second electrode 12 are described. It may be different from the extending direction.
 また、図2の平面視に示されるように、第1電極11の形成領域および第2電極12の形成領域のそれぞれに含まれるように帯状の開口14が形成されている。帯状の開口14の延在方向も第1電極11の延在方向および第2電極12の延在方向のそれぞれと同一である。なお、本実施形態においては、開口14の延在方向と、第1電極11および第2電極12のそれぞれの延在方向とが同一である場合について説明するが、開口14の延在方向は第1電極11の延在方向および第2電極12の延在方向の少なくとも一方と異なっていてもよい。 Further, as shown in a plan view of FIG. 2, a strip-shaped opening 14 is formed so as to be included in each of the formation region of the first electrode 11 and the formation region of the second electrode 12. The extending direction of the strip-shaped opening 14 is also the same as the extending direction of the first electrode 11 and the extending direction of the second electrode 12. In the present embodiment, the case in which the extending direction of the opening 14 is the same as the extending direction of each of the first electrode 11 and the second electrode 12 will be described. It may be different from at least one of the extending direction of the first electrode 11 and the extending direction of the second electrode 12.
 <ヘテロ接合型バックコンタクトセルの製造方法>
 以下、図3~図12の模式的断面図を参照して、実施形態1のヘテロ接合型バックコンタクトセル10の製造方法の一例について説明する。まず、図3に示すように、受光面となる第1の面1aに凹凸構造が形成され、当該凹凸構造上に非晶質半導体膜6と誘電体膜7との積層体が設けられた半導体基板1を作製し、当該半導体基板1の裏面となる第2の面1bの全面に接するように第1のi型非晶質半導体膜2を形成する。第1のi型非晶質半導体膜2の形成方法は特に限定されないが、たとえばプラズマCVD(Chemical Vapor Deposition)法を用いることができる。
<Method for manufacturing heterojunction back contact cell>
Hereinafter, an example of a method for manufacturing the heterojunction back contact cell 10 according to Embodiment 1 will be described with reference to schematic cross-sectional views of FIGS. First, as shown in FIG. 3, a semiconductor in which a concavo-convex structure is formed on the first surface 1 a serving as a light receiving surface, and a laminated body of an amorphous semiconductor film 6 and a dielectric film 7 is provided on the concavo-convex structure. The substrate 1 is manufactured, and the first i-type amorphous semiconductor film 2 is formed so as to be in contact with the entire surface of the second surface 1b which is the back surface of the semiconductor substrate 1. The method for forming the first i-type amorphous semiconductor film 2 is not particularly limited. For example, a plasma CVD (Chemical Vapor Deposition) method can be used.
 次に、図4に示すように、第1のi型非晶質半導体膜2の全面に接するように第1導電型非晶質半導体膜3を形成する。第1導電型非晶質半導体膜3の形成方法は特に限定されないが、たとえばプラズマCVD法を用いることができる。 Next, as shown in FIG. 4, a first conductive amorphous semiconductor film 3 is formed so as to be in contact with the entire surface of the first i-type amorphous semiconductor film 2. Although the formation method of the 1st conductivity type amorphous semiconductor film 3 is not specifically limited, For example, plasma CVD method can be used.
 次に、図5に示すように、第1導電型非晶質半導体膜3上に、第1のi型非晶質半導体膜2と第1導電型非晶質半導体膜3との第1の積層体51を厚さ方向にエッチングする箇所に開口部を有するエッチングマスク31を形成する。 Next, as shown in FIG. 5, a first i-type amorphous semiconductor film 2 and a first conductive-type amorphous semiconductor film 3 are formed on the first conductive-type amorphous semiconductor film 3. An etching mask 31 having an opening at a location where the stacked body 51 is etched in the thickness direction is formed.
 次に、図6に示すように、エッチングマスク31をマスクとして、第1の積層体51の一部を厚さ方向にエッチングする。これにより、半導体基板1の第2の面1bの一部を露出させる。その後、図7に示すように、エッチングマスク31をすべて除去する。 Next, as shown in FIG. 6, using the etching mask 31 as a mask, a part of the first stacked body 51 is etched in the thickness direction. As a result, a part of the second surface 1b of the semiconductor substrate 1 is exposed. Thereafter, as shown in FIG. 7, the etching mask 31 is completely removed.
 次に、図8に示すように、半導体基板1の第2の面1bおよび第1の積層体51を覆うように第2のi型非晶質半導体膜4を形成する。第2のi型非晶質半導体膜4の形成方法は特に限定されないが、たとえばプラズマCVD法を用いることができる。 Next, as shown in FIG. 8, the second i-type amorphous semiconductor film 4 is formed so as to cover the second surface 1 b of the semiconductor substrate 1 and the first stacked body 51. The method for forming the second i-type amorphous semiconductor film 4 is not particularly limited, and for example, a plasma CVD method can be used.
 次に、図9に示すように、第2のi型非晶質半導体膜4上に第2導電型非晶質半導体膜5を形成する。第2導電型非晶質半導体膜5の形成方法は特に限定されないが、たとえばプラズマCVD法を用いることができる。 Next, as shown in FIG. 9, a second conductivity type amorphous semiconductor film 5 is formed on the second i-type amorphous semiconductor film 4. Although the formation method of the 2nd conductivity type amorphous semiconductor film 5 is not specifically limited, For example, plasma CVD method can be used.
 次に、図10に示すように、半導体基板1の第2の面1b上の第2のi型非晶質半導体膜4と第2導電型非晶質半導体膜5との第2の積層体52を残す部分にのみエッチングマスク32を形成する。 Next, as shown in FIG. 10, the second stacked body of the second i-type amorphous semiconductor film 4 and the second conductive amorphous semiconductor film 5 on the second surface 1 b of the semiconductor substrate 1. The etching mask 32 is formed only in the portion where the 52 is left.
 次に、エッチングマスク32をマスクとして、第2の積層体52の一部を厚さ方向にエッチングすることによって、図11に示すように、第1導電型非晶質半導体膜3の一部を露出させる。その後、エッチングマスク32を完全に除去する。 Next, using the etching mask 32 as a mask, a part of the second stacked body 52 is etched in the thickness direction so that a part of the first conductive type amorphous semiconductor film 3 is formed as shown in FIG. Expose. Thereafter, the etching mask 32 is completely removed.
 次に、図12に示すように、第1導電型非晶質半導体膜3上に第1電極11を形成し、第2導電型非晶質半導体膜5上に第2電極12を形成する。ここで、第1電極11および第2電極12は、隣り合う第1電極11の側壁11aと第2電極12の側壁12aとの間の間隔がGとなるように形成される。なお、第1電極11および第2電極12の形成方法は特に限定されないが、たとえば蒸着法などを用いることができる。 Next, as shown in FIG. 12, the first electrode 11 is formed on the first conductive type amorphous semiconductor film 3, and the second electrode 12 is formed on the second conductive type amorphous semiconductor film 5. Here, the 1st electrode 11 and the 2nd electrode 12 are formed so that the space | interval between the side wall 11a of the adjacent 1st electrode 11 and the side wall 12a of the 2nd electrode 12 may be set to G. FIG. In addition, although the formation method of the 1st electrode 11 and the 2nd electrode 12 is not specifically limited, For example, a vapor deposition method etc. can be used.
 その後、図1に示すように、半導体基板1の第2の面1b側を覆うように、開口14を有する絶縁層13を形成する。実施形態1のヘテロ接合型バックコンタクトセル10の製造においては、絶縁層13は、第1電極11および第2電極12の形成後の半導体基板1の第2の面1b側の全面を覆うようにスパッタリング法により酸化シリコン膜および/または窒化シリコン膜を形成することによって形成される。その後、絶縁層13の開口14の形成領域に対応する領域にレーザ光を照射することにより絶縁層13の一部を蒸散させることによって開口14を形成する。以上により、実施形態1のヘテロ接合型バックコンタクトセル10が完成する。 Thereafter, as shown in FIG. 1, an insulating layer 13 having an opening 14 is formed so as to cover the second surface 1 b side of the semiconductor substrate 1. In the manufacture of the heterojunction back contact cell 10 according to the first embodiment, the insulating layer 13 covers the entire surface on the second surface 1b side of the semiconductor substrate 1 after the first electrode 11 and the second electrode 12 are formed. It is formed by forming a silicon oxide film and / or a silicon nitride film by a sputtering method. After that, the opening 14 is formed by evaporating a part of the insulating layer 13 by irradiating the region corresponding to the formation region of the opening 14 of the insulating layer 13 with laser light. Thus, the heterojunction back contact cell 10 of Embodiment 1 is completed.
 <配線シート付きヘテロ接合型バックコンタクトセル>
 図13に、実施形態1の配線シート付きヘテロ接合型バックコンタクトセルの模式的な平面図を示す。実施形態1の配線シート付きヘテロ接合型バックコンタクトセルは、たとえば図13に示すように、実施形態1のヘテロ接合型バックコンタクトセル10の複数が配線シート20上に設置されて電気的に直列に接続されることにより構成される。
<Heterojunction back contact cell with wiring sheet>
FIG. 13 is a schematic plan view of the heterojunction back contact cell with a wiring sheet according to the first embodiment. As shown in FIG. 13, for example, the heterojunction back contact cell with wiring sheet according to the first embodiment has a plurality of heterojunction back contact cells 10 according to the first embodiment installed on the wiring sheet 20 and electrically connected in series. It is configured by being connected.
 図14に、実施形態1の配線シート付きヘテロ接合型バックコンタクトセルに用いられる配線シート20の模式的な平面図を示す。配線シート20は、絶縁性基材21と、絶縁性基材21上の第1配線22と第2配線23とを備えている。第1配線22および第2配線23も、それぞれ帯状に形成されており、絶縁性基材21上で互いに間隔を空けて、これらの配線の長手方向が同一の方向となるようにして、交互に配置されている。また、複数の第1配線22の一端および複数の第2配線23の一端は、それぞれ、帯状の集電用配線24に電気的に接続されている。集電用配線24は、第1配線22および第2配線23の長手方向と直交する方向に長手方向を有するように、絶縁性基材21上に配置されている。集電用配線24は、複数の第1配線22または複数の第2配線23から電流を集電するとともに、実施形態1のヘテロ接合型バックコンタクトセル10を電気的に直列に接続する。 FIG. 14 is a schematic plan view of a wiring sheet 20 used in the heterojunction back contact cell with a wiring sheet according to the first embodiment. The wiring sheet 20 includes an insulating base material 21, first wirings 22 and second wirings 23 on the insulating base material 21. The first wirings 22 and the second wirings 23 are also formed in a band shape, and are spaced apart from each other on the insulating base material 21 so that the longitudinal directions of these wirings are the same direction. Has been placed. In addition, one end of the plurality of first wirings 22 and one end of the plurality of second wirings 23 are electrically connected to a strip-shaped current collection wiring 24, respectively. The current collecting wiring 24 is disposed on the insulating base material 21 so as to have a longitudinal direction in a direction orthogonal to the longitudinal directions of the first wiring 22 and the second wiring 23. The current collecting wiring 24 collects current from the plurality of first wirings 22 or the plurality of second wirings 23 and electrically connects the heterojunction back contact cells 10 of the first embodiment in series.
 絶縁性基材21としては、絶縁性の基材を用いることができ、たとえば、ポリエステル、ポリエチレンナフタレートまたはポリイミドなどのフィルムを用いることができる。 As the insulating substrate 21, an insulating substrate can be used. For example, a film of polyester, polyethylene naphthalate, polyimide, or the like can be used.
 第1配線22、第2配線23および集電用配線24としては、導電性材料を用いることができ、たとえば、銅などを用いることができる。なお、第1配線22、第2配線23および集電用配線24は、それぞれ、たとえば、絶縁性基材21の表面の全面に金属膜などの導電膜を形成した後に、その一部をエッチングなどにより除去してパターニングすることによって形成することができる。 As the first wiring 22, the second wiring 23, and the current collecting wiring 24, a conductive material can be used, for example, copper or the like can be used. The first wiring 22, the second wiring 23, and the current collecting wiring 24 are each formed, for example, by forming a conductive film such as a metal film on the entire surface of the insulating base 21 and then etching a part thereof. It can be formed by removing and patterning.
 図15に、実施形態1の配線シート付きヘテロ接合型バックコンタクトセルの第1配線22および第2配線23の長手方向と直交する方向に沿った模式的な拡大断面図を示す。図15に示すように、配線シート20の第1配線22と実施形態1のヘテロ接合型バックコンタクトセル10の第1電極11とは開口14に設けられた第1導電層15により電気的に接続されている。また、配線シート20の第2配線23と実施形態1のヘテロ接合型バックコンタクトセル10の第2電極12とは開口14に設けられた第2導電層16により電気的に接続されている。ここで、第1導電層15としては、たとえば第1電極11と第1配線22との導通を図ることができるとともに、第1電極11と第1配線22との接着が可能である材質を用いることができる。また、第2導電層16としては、たとえば第2電極12と第2配線23との導通を図ることができるとともに、第2電極12と第2配線23との接着が可能である材質を用いることができる。 FIG. 15 shows a schematic enlarged cross-sectional view along a direction orthogonal to the longitudinal direction of the first wiring 22 and the second wiring 23 of the heterojunction back contact cell with wiring sheet of the first embodiment. As shown in FIG. 15, the first wiring 22 of the wiring sheet 20 and the first electrode 11 of the heterojunction back contact cell 10 of Embodiment 1 are electrically connected by the first conductive layer 15 provided in the opening 14. Has been. The second wiring 23 of the wiring sheet 20 and the second electrode 12 of the heterojunction back contact cell 10 of Embodiment 1 are electrically connected by the second conductive layer 16 provided in the opening 14. Here, as the first conductive layer 15, for example, a material capable of achieving conduction between the first electrode 11 and the first wiring 22 and capable of bonding the first electrode 11 and the first wiring 22 is used. be able to. The second conductive layer 16 is made of, for example, a material that can achieve electrical connection between the second electrode 12 and the second wiring 23 and can bond the second electrode 12 and the second wiring 23. Can do.
 なお、実施形態1の配線シート付きヘテロ接合型バックコンタクトセルは、たとえば図16の模式的断面図に示すように、実施形態1のヘテロ接合型バックコンタクトセル10の絶縁層13の開口14に第1導電層15および第2導電層16を設置した後に、第1電極11および第2電極12をそれぞれ第1電極11および第1配線22上に設置することによって作製することができる。 Note that the heterojunction back contact cell with wiring sheet according to the first embodiment is formed in the opening 14 of the insulating layer 13 of the heterojunction back contact cell 10 according to the first embodiment, for example, as shown in the schematic cross-sectional view of FIG. After the first conductive layer 15 and the second conductive layer 16 are installed, the first electrode 11 and the second electrode 12 can be installed on the first electrode 11 and the first wiring 22, respectively.
 <課題解決のメカニズム>
 本実施形態においては、特許文献1のように、レーザ光の照射によって第1電極11と第2電極12との間に狭い幅の分離溝を設けて第1電極11と第2電極12とを分離する必要がないため、第1電極11と第2電極12との間に間隔Gを特許文献1の分離溝の幅G0よりも広くすることができる。これにより、本実施形態においては、第1電極11と第2電極12との間の絶縁距離(間隔G)を特許文献1の場合と比べて長く取ることができる。
<Mechanism of problem solving>
In the present embodiment, as disclosed in Patent Document 1, a separation groove having a narrow width is provided between the first electrode 11 and the second electrode 12 by laser irradiation, and the first electrode 11 and the second electrode 12 are connected. Since there is no need for separation, the gap G between the first electrode 11 and the second electrode 12 can be made wider than the width G 0 of the separation groove in Patent Document 1. Thereby, in this embodiment, the insulation distance (gap G) between the 1st electrode 11 and the 2nd electrode 12 can be taken long compared with the case of patent document 1. FIG.
 また、本実施形態においては、第1電極11と第2電極12との間の間隔Gに絶縁層13を設けていることから、第1電極11と第2電極12との間の電気的な分離をさらに確実なものとすることができる。 In the present embodiment, since the insulating layer 13 is provided in the gap G between the first electrode 11 and the second electrode 12, the electrical connection between the first electrode 11 and the second electrode 12 is performed. Separation can be further ensured.
 以上により、本実施形態においては、ヘテロ接合型バックコンタクトセルおよび配線シート付きヘテロ接合型バックコンタクトセルの信頼性を向上することができる。 As described above, in this embodiment, the reliability of the heterojunction back contact cell and the heterojunction back contact cell with the wiring sheet can be improved.
 なお、ヘテロ接合型バックコンタクトセルおよび配線シート付きヘテロ接合型バックコンタクトセルの信頼性をさらに向上するためには、第1電極11と第2電極12との間の間隔Gが40μm以上であることが好ましく、50μm以上であることがより好ましい。 In order to further improve the reliability of the heterojunction back contact cell and the heterojunction back contact cell with a wiring sheet, the distance G between the first electrode 11 and the second electrode 12 should be 40 μm or more. Is preferable, and it is more preferable that it is 50 micrometers or more.
 また、第1電極11と第2電極12との間の間隔Gを狭くすることによって、ヘテロ接合型バックコンタクトセルおよび配線シート付きヘテロ接合型バックコンタクトセルの特性をさらに向上するためには、第1電極11と第2電極12との間の間隔Gが400μm以下であることが好ましく、200μm以下であることがより好ましい。 In order to further improve the characteristics of the heterojunction back contact cell and the heterojunction back contact cell with a wiring sheet by narrowing the gap G between the first electrode 11 and the second electrode 12, The distance G between the first electrode 11 and the second electrode 12 is preferably 400 μm or less, and more preferably 200 μm or less.
 <変形例>
 なお、上記においては、半導体基板1の導電型がn型である場合について説明したが、半導体基板1の導電型はp型であってもよい。
<Modification>
In the above description, the case where the conductivity type of the semiconductor substrate 1 is n-type has been described. However, the conductivity type of the semiconductor substrate 1 may be p-type.
 また、上記においては、第1導電型がp型であり、第2導電型がn型である場合について説明したが、第1導電型がn型であり、第2導電型がp型であってもよい。 In the above description, the first conductivity type is p-type and the second conductivity type is n-type. However, the first conductivity type is n-type and the second conductivity type is p-type. May be.
 [実施形態2]
 実施形態2においては、絶縁層13の開口14の形成領域に対応する領域にエッチングペーストを塗布した後に加熱することによって開口14を形成していることを特徴としている。
[Embodiment 2]
The second embodiment is characterized in that the opening 14 is formed by applying an etching paste to a region corresponding to the region where the opening 14 of the insulating layer 13 is formed and then heating.
 実施形態2における上記以外の説明は実施形態1と同様であるため、その説明については繰り返さない。 Since the description other than the above in the second embodiment is the same as that in the first embodiment, the description thereof will not be repeated.
 [実施形態3]
 実施形態3においては、開口14を形成すべき箇所に開口14が形成されるように、絶縁層13として有機絶縁樹脂を印刷法により塗布することによって絶縁層13および開口14を形成していることを特徴としている。
[Embodiment 3]
In the third embodiment, the insulating layer 13 and the opening 14 are formed by applying an organic insulating resin as the insulating layer 13 by a printing method so that the opening 14 is formed at a position where the opening 14 is to be formed. It is characterized by.
 実施形態3における上記以外の説明は実施形態1と同様であるため、その説明については繰り返さない。 Since the description other than the above in the third embodiment is the same as that in the first embodiment, the description thereof will not be repeated.
 [実施形態4]
 実施形態4においては、開口14を形成すべき箇所に開口14が形成されるように、絶縁層13として有機絶縁樹脂をインクジェット法により印刷することによって絶縁層13および開口14を形成していることを特徴としている。
[Embodiment 4]
In the fourth embodiment, the insulating layer 13 and the opening 14 are formed by printing an organic insulating resin as the insulating layer 13 by an inkjet method so that the opening 14 is formed at a position where the opening 14 is to be formed. It is characterized by.
 実施形態4における上記以外の説明は実施形態1と同様であるため、その説明については繰り返さない。 Since the description other than the above in the fourth embodiment is the same as that in the first embodiment, the description thereof will not be repeated.
 [実施形態5]
 実施形態5においては、絶縁層13の開口14に対応する領域をマスクするシャドウマスクを用いたスパッタリング法により酸化シリコン膜および/または窒化シリコン膜を形成することによって、開口14を有する絶縁層13を形成することを特徴としている。
[Embodiment 5]
In the fifth embodiment, the insulating layer 13 having the opening 14 is formed by forming a silicon oxide film and / or a silicon nitride film by a sputtering method using a shadow mask that masks a region corresponding to the opening 14 of the insulating layer 13. It is characterized by forming.
 実施形態5における上記以外の説明は実施形態1と同様であるため、その説明については繰り返さない。 Since the description other than the above in the fifth embodiment is the same as that in the first embodiment, the description thereof will not be repeated.
 [付記]
 (1)ここで開示された実施形態は、第1導電型または第2導電型の半導体基板と、半導体基板の一方の面側の第1導電型非晶質半導体膜と、半導体基板の一方の面側の第2導電型非晶質半導体膜と、第1導電型非晶質半導体膜上の第1電極と、第2導電型非晶質半導体膜上の第2電極と、半導体基板の一方の面側を覆う絶縁層とを備え、絶縁層には、第1電極との電気的な接続および第2電極との電気的な接続を図るための開口が設けられている光電変換素子である。これにより、光電変換素子の信頼性を向上することができる。
[Appendix]
(1) An embodiment disclosed herein includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and one of the semiconductor substrates. A second conductive amorphous semiconductor film on the surface side, a first electrode on the first conductive amorphous semiconductor film, a second electrode on the second conductive amorphous semiconductor film, and one of the semiconductor substrates And an insulating layer covering the surface of the photoelectric conversion element, wherein the insulating layer is provided with an opening for electrical connection with the first electrode and electrical connection with the second electrode. . Thereby, the reliability of a photoelectric conversion element can be improved.
 (2)ここで開示された実施形態の光電変換素子においては、第1電極と第2電極との間に絶縁層が位置していることが好ましい。この場合には、光電変換素子の信頼性をより向上することができる。 (2) In the photoelectric conversion element of the embodiment disclosed herein, it is preferable that an insulating layer is located between the first electrode and the second electrode. In this case, the reliability of the photoelectric conversion element can be further improved.
 (3)ここで開示された実施形態の光電変換素子においては、第1電極と第2電極との間の間隔が40μm以上であることが好ましい。この場合には、光電変換素子の信頼性をさらに向上することができる。 (3) In the photoelectric conversion element according to the embodiment disclosed herein, the distance between the first electrode and the second electrode is preferably 40 μm or more. In this case, the reliability of the photoelectric conversion element can be further improved.
 (4)ここで開示された実施形態の光電変換素子においては、第1電極と第2電極との間の間隔が400μm以下であることが好ましい。この場合には、光電変換素子の特性を向上することができる。 (4) In the photoelectric conversion element according to the embodiment disclosed herein, the distance between the first electrode and the second electrode is preferably 400 μm or less. In this case, the characteristics of the photoelectric conversion element can be improved.
 (5)ここで開示された実施形態の光電変換素子は、半導体基板と第1導電型非晶質半導体膜との間に第1のi型非晶質半導体膜をさらに備えていてもよい。この場合にも、光電変換素子の信頼性を向上することができる。 (5) The photoelectric conversion element of the embodiment disclosed herein may further include a first i-type amorphous semiconductor film between the semiconductor substrate and the first conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
 (6)ここで開示された実施形態の光電変換素子において、第1のi型非晶質半導体膜は、半導体基板および第1導電型非晶質半導体膜のそれぞれと接していてもよい。この場合にも、光電変換素子の信頼性を向上することができる。 (6) In the photoelectric conversion element of the embodiment disclosed herein, the first i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the first conductivity type amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
 (7)ここで開示された実施形態の光電変換素子は、半導体基板と第2導電型非晶質半導体膜との間に第2のi型非晶質半導体膜をさらに備えていてもよい。この場合にも、光電変換素子の信頼性を向上することができる。 (7) The photoelectric conversion element of the embodiment disclosed herein may further include a second i-type amorphous semiconductor film between the semiconductor substrate and the second conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
 (8)ここで開示された実施形態の光電変換素子において、第2のi型非晶質半導体膜は、半導体基板および第2導電型非晶質半導体膜のそれぞれと接していてもよい。この場合にも、光電変換素子の信頼性を向上することができる。 (8) In the photoelectric conversion element of the embodiment disclosed herein, the second i-type amorphous semiconductor film may be in contact with each of the semiconductor substrate and the second conductivity-type amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion element can be improved.
 (9)ここで開示された実施形態は、光電変換素子と、配線シートと、を備え、光電変換素子は、第1導電型または第2導電型の半導体基板と、半導体基板の一方の面側の第1導電型非晶質半導体膜と、半導体基板の一方の面側の第2導電型非晶質半導体膜と、第1導電型非晶質半導体膜上の第1電極と、第2導電型非晶質半導体膜上の第2電極と、半導体基板の一方の面側を覆う絶縁層とを備え、絶縁層には、第1電極との電気的な接続および第2電極との電気的な接続を図るための開口が設けられており、配線シートは、絶縁性基材と、絶縁性基材上の第1配線と第2配線とを備え、第1電極と第1配線とは第1導電層により電気的に接続されており、第2電極と第2配線とは第2導電層により電気的に接続されている光電変換装置である。これにより、光電変換装置の信頼性を向上することができる。 (9) Embodiment disclosed here is provided with a photoelectric conversion element and a wiring sheet, and a photoelectric conversion element is a 1st conductivity type or 2nd conductivity type semiconductor substrate, and the one surface side of a semiconductor substrate A first conductive type amorphous semiconductor film, a second conductive type amorphous semiconductor film on one side of the semiconductor substrate, a first electrode on the first conductive type amorphous semiconductor film, and a second conductive type. A second electrode on the type amorphous semiconductor film and an insulating layer covering one surface side of the semiconductor substrate. The insulating layer is electrically connected to the first electrode and electrically connected to the second electrode. The wiring sheet is provided with an insulating base material, a first wiring and a second wiring on the insulating base material, and the first electrode and the first wiring are the first and second wirings. The photoelectric conversion device is electrically connected by one conductive layer, and the second electrode and the second wiring are electrically connected by the second conductive layer. That. Thereby, the reliability of the photoelectric conversion device can be improved.
 (10)ここで開示された実施形態の光電変換装置においては、第1電極と第2電極との間に絶縁層が位置していることが好ましい。この場合には、光電変換装置の信頼性をより向上することができる。 (10) In the photoelectric conversion device of the embodiment disclosed herein, it is preferable that an insulating layer is located between the first electrode and the second electrode. In this case, the reliability of the photoelectric conversion device can be further improved.
 (11)ここで開示された実施形態の光電変換装置においては、第1電極と第2電極との間の間隔が40μm以上であることが好ましい。この場合には、光電変換装置の信頼性をさらに向上することができる。 (11) In the photoelectric conversion device according to the embodiment disclosed herein, the distance between the first electrode and the second electrode is preferably 40 μm or more. In this case, the reliability of the photoelectric conversion device can be further improved.
 (12)ここで開示された実施形態の光電変換装置においては、第1電極と第2電極との間の間隔が400μm以下であることが好ましい。この場合には、光電変換装置の特性をさらに向上することができる。 (12) In the photoelectric conversion device according to the embodiment disclosed herein, the distance between the first electrode and the second electrode is preferably 400 μm or less. In this case, the characteristics of the photoelectric conversion device can be further improved.
 (13)ここで開示された実施形態の光電変換装置は、半導体基板と第1導電型非晶質半導体膜との間に第1のi型非晶質半導体膜をさらに備えていてもよい。この場合にも、光電変換装置の信頼性を向上することができる。 (13) The photoelectric conversion device according to the embodiment disclosed herein may further include a first i-type amorphous semiconductor film between the semiconductor substrate and the first conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion device can be improved.
 (14)ここで開示された実施形態の光電変換装置は、半導体基板と第2導電型非晶質半導体膜との間に第2のi型非晶質半導体膜をさらに備えていてもよい。この場合にも、光電変換装置の信頼性を向上することができる。 (14) The photoelectric conversion device according to the embodiment disclosed herein may further include a second i-type amorphous semiconductor film between the semiconductor substrate and the second conductive amorphous semiconductor film. Also in this case, the reliability of the photoelectric conversion device can be improved.
 (15)ここで開示された実施形態は、第1導電型または第2導電型の半導体基板の一方の面側に第1導電型非晶質半導体膜を形成する工程と、半導体基板の一方の面側に第2導電型非晶質半導体膜を形成する工程と、第1導電型非晶質半導体膜上の第1電極を形成する工程と、第2導電型非晶質半導体膜上の第2電極を形成する工程と、第1電極を形成する工程および第2電極を形成する工程の後に半導体基板の一方の面側を覆うように第1電極との電気的な接続および第2電極との電気的な接続を図るための開口を有する絶縁層を形成する工程とを含む光電変換素子の製造方法である。この場合には、信頼性が向上した光電変換素子を製造することができる。 (15) An embodiment disclosed herein includes a step of forming a first conductivity type amorphous semiconductor film on one surface side of a first conductivity type or second conductivity type semiconductor substrate, and one of the semiconductor substrates. Forming a second conductive type amorphous semiconductor film on the surface side; forming a first electrode on the first conductive type amorphous semiconductor film; and forming a first electrode on the second conductive type amorphous semiconductor film. Electrical connection with the first electrode and the second electrode so as to cover one surface side of the semiconductor substrate after the step of forming the two electrodes, the step of forming the first electrode, and the step of forming the second electrode And a step of forming an insulating layer having an opening for electrical connection. In this case, a photoelectric conversion element with improved reliability can be manufactured.
 (16)ここで開示された実施形態の光電変換素子の製造方法において、開口を形成する工程は、絶縁層の一部にレーザ光を照射する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換素子を製造することができる。 (16) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the opening may include a step of irradiating a part of the insulating layer with laser light. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
 (17)ここで開示された実施形態の光電変換素子の製造方法において、開口を形成する工程は、絶縁層の一部にエッチングペーストを塗布する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換素子を製造することができる。 (17) In the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the step of forming the opening may include a step of applying an etching paste to a part of the insulating layer. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
 (18)ここで開示された実施形態の光電変換素子の製造方法において、絶縁層を形成する工程は、絶縁層として酸化シリコン膜を形成する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換素子を製造することができる。 (18) In the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein, the step of forming the insulating layer may include a step of forming a silicon oxide film as the insulating layer. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
 (19)ここで開示された実施形態の光電変換素子の製造方法において、絶縁層を形成する工程は、絶縁層として窒化シリコン膜を形成する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換素子を製造することができる。 (19) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the insulating layer may include a step of forming a silicon nitride film as the insulating layer. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
 (20)ここで開示された実施形態の光電変換素子の製造方法において、絶縁層を形成する工程は、第1電極と第2電極との間に位置するように絶縁層を形成する工程を含んでいることが好ましい。この場合には、信頼性がより向上した光電変換素子を製造することができる。 (20) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the insulating layer includes a step of forming the insulating layer so as to be positioned between the first electrode and the second electrode. It is preferable that In this case, a photoelectric conversion element with improved reliability can be manufactured.
 (21)ここで開示された実施形態の光電変換素子の製造方法において、第1電極および第2電極は、第1電極と第2電極との間の間隔が40μm以上となるように形成されることが好ましい。この場合には、信頼性がさらに向上した光電変換素子を製造することができる。 (21) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the first electrode and the second electrode are formed such that the distance between the first electrode and the second electrode is 40 μm or more. It is preferable. In this case, a photoelectric conversion element with further improved reliability can be manufactured.
 (22)ここで開示された実施形態の光電変換素子の製造方法において、第1電極および第2電極は、第1電極と第2電極との間の間隔が400μm以下となるように形成されることが好ましい。この場合には、特性がさらに向上した光電変換素子を製造することができる。 (22) In the method for manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the first electrode and the second electrode are formed so that the distance between the first electrode and the second electrode is 400 μm or less. It is preferable. In this case, a photoelectric conversion element with further improved characteristics can be manufactured.
 (23)ここで開示された実施形態の光電変換素子の製造方法において、第1導電型非晶質半導体膜を形成する工程は、半導体基板の一方の面側に第1のi型非晶質半導体膜を形成する工程と、第1のi型非晶質半導体膜上に第1導電型非晶質半導体膜を形成する工程とを含んでいてもよい。この場合にも、信頼性がより向上した光電変換素子を製造することができる。 (23) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the first conductivity type amorphous semiconductor film includes the step of forming a first i-type amorphous on one surface side of the semiconductor substrate. A step of forming a semiconductor film and a step of forming a first conductivity type amorphous semiconductor film on the first i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
 (24)ここで開示された実施形態の光電変換素子の製造方法において、第2導電型非晶質半導体膜を形成する工程は、半導体基板の一方の面側に第2のi型非晶質半導体膜を形成する工程と、第2のi型非晶質半導体膜上に第2導電型非晶質半導体膜を形成する工程とを含んでいてもよい。この場合にも、信頼性がより向上した光電変換素子を製造することができる。 (24) In the method of manufacturing a photoelectric conversion element according to the embodiment disclosed herein, the step of forming the second conductivity type amorphous semiconductor film includes the step of forming a second i-type amorphous on one surface side of the semiconductor substrate. A step of forming a semiconductor film and a step of forming a second conductivity type amorphous semiconductor film on the second i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion element with improved reliability can be manufactured.
 (25)ここで開示された実施形態は、光電変換素子を作製する工程と、光電変換素子を配線シートに接続する工程と、含み、光電変換素子を作製する工程は、第1導電型または第2導電型の半導体基板の一方の面側に第1導電型非晶質半導体膜を形成する工程と、半導体基板の一方の面側に第2導電型非晶質半導体膜を形成する工程と、第1導電型非晶質半導体膜上の第1電極を形成する工程と、第2導電型非晶質半導体膜上の第2電極を形成する工程と、第1電極を形成する工程および第2電極を形成する工程の後に半導体基板の一方の面側を覆うように第1電極との電気的な接続および第2電極との電気的な接続を図るための開口を有する絶縁層を形成する工程とを含み、配線シートに接続する工程は、第1電極と第1配線とを開口に配置された第1導電層により電気的に接続する工程と、第2電極と第2配線とを開口に配置された第2導電層により電気的に接続する工程とを含む光電変換装置の製造方法である。この場合には、信頼性が向上した光電変換装置を製造することができる。 (25) Embodiment disclosed here includes the process of producing a photoelectric conversion element, the process of connecting a photoelectric conversion element to a wiring sheet, and the process of producing a photoelectric conversion element is 1st conductivity type or 1st. Forming a first conductive amorphous semiconductor film on one side of a two-conductivity type semiconductor substrate; forming a second conductive amorphous semiconductor film on one side of the semiconductor substrate; Forming a first electrode on the first conductive amorphous semiconductor film; forming a second electrode on the second conductive amorphous semiconductor film; forming a first electrode; A step of forming an insulating layer having an opening for electrical connection with the first electrode and electrical connection with the second electrode so as to cover one surface side of the semiconductor substrate after the step of forming the electrode The step of connecting to the wiring sheet includes opening the first electrode and the first wiring. A method for manufacturing a photoelectric conversion device, comprising: a step of electrically connecting with a first conductive layer disposed; and a step of electrically connecting a second electrode and a second wiring with a second conductive layer disposed in an opening. It is. In this case, a photoelectric conversion device with improved reliability can be manufactured.
 (26)ここで開示された実施形態の光電変換装置の製造方法において、開口を形成する工程は、絶縁層の一部にレーザ光を照射する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換装置を製造することができる。 (26) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the opening may include a step of irradiating a part of the insulating layer with laser light. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
 (27)ここで開示された実施形態の光電変換装置の製造方法において、開口を形成する工程は、絶縁層の一部にエッチングペーストを塗布する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換装置を製造することができる。 (27) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the opening may include a step of applying an etching paste to a part of the insulating layer. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
 (28)ここで開示された実施形態の光電変換装置の製造方法において、絶縁層を形成する工程は、絶縁層として酸化シリコン膜を形成する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換装置を製造することができる。 (28) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the insulating layer may include a step of forming a silicon oxide film as the insulating layer. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
 (29)ここで開示された実施形態の光電変換装置の製造方法において、絶縁層を形成する工程は、絶縁層として窒化シリコン膜を形成する工程を含んでいてもよい。この場合にも、信頼性が向上した光電変換装置を製造することができる。 (29) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the insulating layer may include a step of forming a silicon nitride film as the insulating layer. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
 (30)ここで開示された実施形態の光電変換装置の製造方法において、絶縁層を形成する工程は、第1電極と第2電極との間に位置するように絶縁層を形成する工程を含むことが好ましい。この場合には、信頼性がより向上した光電変換装置を製造することができる。 (30) In the method for manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the insulating layer includes a step of forming the insulating layer so as to be positioned between the first electrode and the second electrode. It is preferable. In this case, a photoelectric conversion device with improved reliability can be manufactured.
 (31)ここで開示された実施形態の光電変換装置の製造方法において、第1電極および第2電極は、第1電極と第2電極との間の間隔が40μm以上となるように形成されることが好ましい。この場合には、信頼性がさらに向上した光電変換装置を製造することができる。 (31) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the first electrode and the second electrode are formed such that the distance between the first electrode and the second electrode is 40 μm or more. It is preferable. In this case, a photoelectric conversion device with further improved reliability can be manufactured.
 (32)ここで開示された実施形態の光電変換装置の製造方法において、第1電極および第2電極は、第1電極と第2電極との間の間隔が400μm以下となるように形成されることが好ましい。この場合には、特性がより向上した光電変換装置を製造することができる。 (32) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the first electrode and the second electrode are formed so that the distance between the first electrode and the second electrode is 400 μm or less. It is preferable. In this case, a photoelectric conversion device with improved characteristics can be manufactured.
 (33)ここで開示された実施形態の光電変換装置の製造方法において、第1導電型非晶質半導体膜を形成する工程は、半導体基板の一方の面側に第1のi型非晶質半導体膜を形成する工程と、第1のi型非晶質半導体膜上に第1導電型非晶質半導体膜を形成する工程とを含んでいてもよい。この場合にも、信頼性が向上した光電変換装置を製造することができる。 (33) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the first conductivity type amorphous semiconductor film includes the step of forming a first i-type amorphous on one surface side of the semiconductor substrate. A step of forming a semiconductor film and a step of forming a first conductivity type amorphous semiconductor film on the first i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
 (34)ここで開示された実施形態の光電変換装置の製造方法において、第2導電型非晶質半導体膜を形成する工程は、半導体基板の一方の面側に第2のi型非晶質半導体膜を形成する工程と、第2のi型非晶質半導体膜上に第2導電型非晶質半導体膜を形成する工程とを含んでいてもよい。この場合にも、信頼性が向上した光電変換装置を製造することができる。 (34) In the method of manufacturing a photoelectric conversion device according to the embodiment disclosed herein, the step of forming the second conductivity type amorphous semiconductor film includes the step of forming the second i-type amorphous on one surface side of the semiconductor substrate. A step of forming a semiconductor film and a step of forming a second conductivity type amorphous semiconductor film on the second i-type amorphous semiconductor film may be included. Also in this case, a photoelectric conversion device with improved reliability can be manufactured.
 以上のように実施形態について説明を行なったが、上述の各実施形態の構成を適宜組み合わせることも当初から予定している。 Although the embodiment has been described as described above, it is also planned from the beginning to appropriately combine the configurations of the above-described embodiments.
 今回開示された実施形態はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなくて請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。 The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
 ここで開示された実施形態は、光電変換素子、光電変換装置およびこれらの製造方法に利用することができ、特に太陽電池、太陽電池モジュールおよびこれらの製造方法、ヘテロ接合型バックコンタクトセル、配線シート付きヘテロ接合型バックコンタクトセルおよびこれらの製造方法に好適に利用することができる可能性がある。 Embodiment disclosed here can be utilized for a photoelectric conversion element, a photoelectric conversion apparatus, and these manufacturing methods, especially a solar cell, a solar cell module, and these manufacturing methods, a heterojunction type back contact cell, and a wiring sheet There is a possibility that it can be suitably used for the attached heterojunction back contact cell and their manufacturing method.
 1 半導体基板、1a 第1の面、1b 第2の面、2 第1のi型非晶質半導体膜、3 第1導電型非晶質半導体膜、4 第2のi型非晶質半導体膜、5 第2導電型非晶質半導体膜、6 非晶質半導体膜、7 誘電体膜、10 ヘテロ接合型バックコンタクトセル、11 第1電極、11a 側壁、12 第2電極、12a 側壁、13 絶縁層、14 開口、15 第1導電層、16 第2導電層、20 配線シート、21 絶縁性基材、22 第1配線、23 第2配線、24 集電用配線、31,32 エッチングマスク、51 第1の積層体、52 第2の積層体、111 半導体基板、112 第1半導体層、114 第2半導体層、116 絶縁層、118a,118b 透明電極層、120a p側電極層、120b n側電極層、130 分離溝。 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 1a 1st surface, 1b 2nd surface, 1st i-type amorphous semiconductor film, 3rd 1st conductivity type amorphous semiconductor film, 4th 2nd i-type amorphous semiconductor film 5, 2nd conductivity type amorphous semiconductor film, 6 amorphous semiconductor film, 7 dielectric film, 10 heterojunction back contact cell, 11 first electrode, 11a side wall, 12 second electrode, 12a side wall, 13 insulation Layer, 14 opening, 15 first conductive layer, 16 second conductive layer, 20 wiring sheet, 21 insulating substrate, 22 first wiring, 23 second wiring, 24 current collecting wiring, 31, 32 etching mask, 51 1st laminated body, 52 2nd laminated body, 111 semiconductor substrate, 112 1st semiconductor layer, 114 2nd semiconductor layer, 116 insulating layer, 118a, 118b transparent electrode layer, 120a p side electrode layer, 120b Side electrode layer, 130 isolation trench.

Claims (5)

  1.  第1導電型または第2導電型の半導体基板と、
     前記半導体基板の一方の面側の第1導電型非晶質半導体膜と、
     前記半導体基板の前記一方の面側の第2導電型非晶質半導体膜と、
     前記第1導電型非晶質半導体膜上の第1電極と、
     前記第2導電型非晶質半導体膜上の第2電極と、
     前記半導体基板の前記一方の面側を覆う絶縁層と、を備え、
     前記絶縁層には、前記第1電極との電気的な接続および前記第2電極との電気的な接続を図るための開口が設けられている、光電変換素子。
    A semiconductor substrate of a first conductivity type or a second conductivity type;
    A first conductive type amorphous semiconductor film on one side of the semiconductor substrate;
    A second conductive type amorphous semiconductor film on the one surface side of the semiconductor substrate;
    A first electrode on the first conductive type amorphous semiconductor film;
    A second electrode on the second conductive type amorphous semiconductor film;
    An insulating layer covering the one surface side of the semiconductor substrate,
    The photoelectric conversion element, wherein the insulating layer is provided with an opening for electrical connection with the first electrode and electrical connection with the second electrode.
  2.  前記第1電極と前記第2電極との間に前記絶縁層が位置している、請求項1に記載の光電変換素子。 The photoelectric conversion element according to claim 1, wherein the insulating layer is located between the first electrode and the second electrode.
  3.  光電変換素子と、
     配線シートと、を備え、
     前記光電変換素子は、第1導電型または第2導電型の半導体基板と、前記半導体基板の一方の面側の第1導電型非晶質半導体膜と、前記半導体基板の前記一方の面側の第2導電型非晶質半導体膜と、前記第1導電型非晶質半導体膜上の第1電極と、前記第2導電型非晶質半導体膜上の第2電極と、前記半導体基板の前記一方の面側を覆う絶縁層とを備え、前記絶縁層には、前記第1電極との電気的な接続および前記第2電極との電気的な接続を図るための開口が設けられており、
     前記配線シートは、絶縁性基材と、前記絶縁性基材上の第1配線と第2配線とを備え、
     前記第1電極と前記第1配線とは第1導電層により電気的に接続されており、
     前記第2電極と前記第2配線とは第2導電層により電気的に接続されている、光電変換装置。
    A photoelectric conversion element;
    A wiring sheet;
    The photoelectric conversion element includes a semiconductor substrate of a first conductivity type or a second conductivity type, a first conductivity type amorphous semiconductor film on one surface side of the semiconductor substrate, and the one surface side of the semiconductor substrate. A second conductive type amorphous semiconductor film; a first electrode on the first conductive type amorphous semiconductor film; a second electrode on the second conductive type amorphous semiconductor film; An insulating layer covering one surface side, and the insulating layer is provided with an opening for electrical connection with the first electrode and electrical connection with the second electrode,
    The wiring sheet includes an insulating base material, first wiring and second wiring on the insulating base material,
    The first electrode and the first wiring are electrically connected by a first conductive layer,
    The photoelectric conversion device, wherein the second electrode and the second wiring are electrically connected by a second conductive layer.
  4.  第1導電型または第2導電型の半導体基板の一方の面側に第1導電型非晶質半導体膜を形成する工程と、
     前記半導体基板の前記一方の面側に第2導電型非晶質半導体膜を形成する工程と、
     前記第1導電型非晶質半導体膜上の第1電極を形成する工程と、
     前記第2導電型非晶質半導体膜上の第2電極を形成する工程と、
     前記第1電極を形成する工程および前記第2電極を形成する工程の後に前記半導体基板の前記一方の面側を覆うように、前記第1電極との電気的な接続および前記第2電極との電気的な接続を図るための開口を有する絶縁層を形成する工程と、を含む、光電変換素子の製造方法。
    Forming a first conductive type amorphous semiconductor film on one surface side of the first conductive type or second conductive type semiconductor substrate;
    Forming a second conductivity type amorphous semiconductor film on the one surface side of the semiconductor substrate;
    Forming a first electrode on the first conductive type amorphous semiconductor film;
    Forming a second electrode on the second conductive type amorphous semiconductor film;
    Electrical connection with the first electrode and the second electrode so as to cover the one surface side of the semiconductor substrate after the step of forming the first electrode and the step of forming the second electrode Forming an insulating layer having an opening for electrical connection. A method for manufacturing a photoelectric conversion element.
  5.  光電変換素子を作製する工程と、
     前記光電変換素子を配線シートに接続する工程と、含み、
     前記光電変換素子を作製する工程は、第1導電型または第2導電型の半導体基板の一方の面側に第1導電型非晶質半導体膜を形成する工程と、前記半導体基板の前記一方の面側に第2導電型非晶質半導体膜を形成する工程と、前記第1導電型非晶質半導体膜上の第1電極を形成する工程と、前記第2導電型非晶質半導体膜上の第2電極を形成する工程と、前記第1電極を形成する工程および前記第2電極を形成する工程の後に前記半導体基板の前記一方の面側を覆うように、前記第1電極との電気的な接続および前記第2電極との電気的な接続を図るための開口を有する絶縁層を形成する工程とを含み、
     前記配線シートに接続する工程は、前記第1電極と前記第1配線とを前記開口に配置された第1導電層により電気的に接続する工程と、前記第2電極と前記第2配線とを前記開口に配置された第2導電層により電気的に接続する工程とを含む、光電変換装置の製造方法。
    Producing a photoelectric conversion element;
    Connecting the photoelectric conversion element to a wiring sheet,
    The step of manufacturing the photoelectric conversion element includes a step of forming a first conductivity type amorphous semiconductor film on one surface side of a first conductivity type or second conductivity type semiconductor substrate, and the one of the semiconductor substrates. Forming a second conductive amorphous semiconductor film on the surface side; forming a first electrode on the first conductive amorphous semiconductor film; and on the second conductive amorphous semiconductor film. And forming the second electrode, and forming the first electrode and forming the second electrode, so as to cover the one surface side of the semiconductor substrate. And forming an insulating layer having an opening for achieving an electrical connection and an electrical connection with the second electrode,
    The step of connecting to the wiring sheet includes the step of electrically connecting the first electrode and the first wiring by a first conductive layer disposed in the opening, and the second electrode and the second wiring. And a step of electrically connecting the second conductive layers disposed in the openings.
PCT/JP2016/055764 2015-03-06 2016-02-26 Photoelectric conversion element, photoelectric conversion device, method for manufacturing photoelectric conversion element, and method for manufacturing photoelectric conversion device WO2016143547A1 (en)

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