WO2016086384A1

WO2016086384A1 - Signal processing circuit

Info

Publication number: WO2016086384A1
Application number: PCT/CN2014/093013
Authority: WO
Inventors: 赵治磊
Original assignee: 华为技术有限公司
Priority date: 2014-12-04
Filing date: 2014-12-04
Publication date: 2016-06-09
Also published as: CN105900345A; CN105900345B

Abstract

Disclosed in the present invention is a signal processing circuit, comprising: an AD/VD digital front end, a G.fast digital front end, a first switching circuit, a second switching circuit, a first drive circuit, a first hybrid circuit and a first transformer. The AD/VD digital front end and the G.fast digital front end are respectively connected to one end of the first switching circuit and one end of the second switching circuit, and the other end of the first switching circuit is connected to one end of the first drive circuit, and the other end of the first drive circuit is connected to one end of the first hybrid circuit, and the other end of the second switching circuit is connected to the other end of the first hybrid circuit, and the other end of the first hybrid circuit is connected to one end of the first transformer. The circuit can make two different service models of G.fast and VDSL2 to coexist in the same cable, and can use high-frequency and low-frequency to jointly carry the service, improving service efficiency. The circuit has a simple structure and the device is small in quantity and size, and is convenient to arrange.

Description

Signal processing circuit

Technical field

The present invention relates to the field of communications, and in particular, to a signal processing circuit.

Background technique

The spectrum definition range of G.Fast is 2.2M~106M and 2.2M~212M, which is time division multiplexing mode (TDD). The spectrum definition range of VDSL2 is 25k~8.8M/17.664M/30M, which is frequency division multiplexing mode ( FDD). When deploying G.Fast, some users in the same cable may still use VDSL2 services, and because G.fast and VDSL2 are two different service modes, their symbol rate, frequency range, and Tone space. Different, it is impossible to perform Vector cancellation. In the prior art, in order to avoid crosstalk between the two in the same cable, as shown in Figure 1, G.fast needs to remove the frequency band of VDSL2 and only use the high frequency band to carry the service. The way the business rate is greatly reduced.

Summary of the invention

The embodiment of the invention provides a signal processing circuit, which can coexist two different service modes of G.fast and VDSL2 in the same cable, and can jointly use the low frequency and high frequency to carry the service, thereby improving the service efficiency.

In a first aspect, an embodiment of the present invention provides a signal processing circuit, including: an AD/VD digital front end, a G.fast digital front end, a first conversion circuit, a second conversion circuit, a first driving circuit, and a first hybrid circuit, a transformer in which

The AD/VD digital front end and the G.fast digital front end are respectively associated with the first conversion circuit One end is connected to one end of the second conversion circuit, the other end of the first conversion circuit is connected to one end of the first driving circuit, and the other end of the first driving circuit is connected to the other end of the first hybrid circuit The other end of the second conversion circuit is connected to one end of the first hybrid circuit, and the other end of the first hybrid circuit is connected to one end of the first transformer.

In conjunction with the first aspect, in a first possible implementation manner of the first aspect, the first conversion circuit includes: a first low pass filter, a first digital to analog converter, a first variable gain amplifier, and an adder ,among them,

One end of the first low pass filter is connected to the AD/VD digital front end, the other end of the first low pass filter is connected to one end of the adder, and the other end of the adder is One end of the first digital-to-analog converter is connected, one end of the adder is connected to the G.fast digital front end, and one end of the first digital-to-analog converter is further connected to the G.fast digital front end, The other end of a digital to analog converter is coupled to one end of the first digital to analog converter, and the other end of the first digital to analog converter is coupled to one end of the first variable gain amplifier.

With reference to the first aspect, in a second possible implementation manner of the first aspect, the second conversion circuit includes: a second low pass filter, a third low pass filter, a first analog to digital converter, and a second An analog to digital converter, a first programmable gain amplifier, a second programmable gain amplifier, and a first high pass filter, wherein

One end of the second low pass filter is connected to the AD/VD digital front end, and the other end of the second low pass filter is connected to one end of the first analog to digital converter, the first analog to digital conversion The other end of the device is connected to one end of the first programmable gain amplifier, and the other end of the first programmable gain amplifier is connected to the third low pass filter, and one end of the second analog to digital converter is The G.fast digital front end is connected, the other end of the second analog to digital converter is coupled to one end of the second programmable gain amplifier, and the other end of the second programmable gain amplifier is coupled to the first high pass filter One end of the device even.

In conjunction with the first aspect, or the second possible implementation of the first aspect, in a third possible implementation of the first aspect, the second programmable gain amplifier includes: a low noise amplifier, a first resistor /capacitor network, second resistor/capacitor network and third resistor/capacitor network, where:

The low noise amplifier is connected in parallel with the first resistor/capacitor network, one end of the low noise amplifier is connected to the other end of the second analog to digital converter, and the other end of the low noise amplifier is opposite to the second One end of the resistor/capacitor network is connected or connected to one end of the third resistor/capacitor network, and the other end of the second resistor/capacitor network is connected to one end of the first high pass filter, the third resistor The other end of the capacitor network is connected to one end of the first hybrid circuit.

With reference to the first aspect, or the third possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, the other end of the third resistor/capacitance network and one end of the attenuation network Connected, the other end of the attenuation network is connected to the other end of the first hybrid circuit.

With reference to the first aspect, or the first possible implementation manner of the first aspect, in a fifth possible implementation manner of the first aspect, the first conversion circuit further includes: a second digital-to-analog converter, and a second a variable gain amplifier, a fourth low pass filter, and a second high pass filter, wherein

One end of the second digital-to-analog converter is connected to the other end of the first low-pass filter, and the other end of the second digital-to-analog converter is connected to one end of the second variable gain amplifier, The other end of the second variable pass amplifier is connected to one end of the fourth low pass filter, and one end of the second high pass filter is connected to the other end of the first variable gain amplifier, the fourth low pass The other end of the filter is combined with the other end of the second high pass filter.

With reference to the first aspect, and the first possible implementation manner of the first aspect, the sixth possible implementation manner of the first aspect, further includes: a second hybrid circuit, where

The other end of the first high-pass filter is connected to one end of the second hybrid circuit, the other end of the second hybrid circuit is connected to one end of the first transformer, and the other end of the second hybrid circuit is One end of the first hybrid circuit is connected.

With reference to the first aspect, in a seventh possible implementation manner of the first aspect, the method further includes: a second driving circuit, a third hybrid circuit, and a second transformer, where

One end of the second driving circuit is connected to the other end of the first converting circuit, and the other end of the second driving circuit is connected to one end of the third mixing circuit, and the other end of the third hybrid circuit is The second transformer is connected.

In conjunction with the first possible implementation of the first aspect, in an eighth possible implementation manner of the first aspect, the first conversion circuit further includes: a second digital-to-analog converter and a second variable gain amplifier, among them,

One end of the second digital-to-analog converter is connected to the other end of the first low-pass filter, and the other end of the second digital-to-analog converter is connected to one end of the second variable gain amplifier.

In conjunction with the fifth possible implementation of the first aspect, in a ninth possible implementation manner of the first aspect, the method further includes: a second driving circuit, a third hybrid circuit, and a second transformer, where

One end of the second driving circuit is connected to the other end of the fourth low pass filter, the other end of the second driving circuit is connected to one end of the third mixing circuit, and the other end of the third hybrid circuit One end is connected to one end of the second transformer.

In conjunction with the sixth possible implementation of the first aspect, or the eighth possible implementation of the first aspect, in a tenth possible implementation manner of the first aspect, the method further includes: a second driving circuit, a third a hybrid circuit and a second transformer, wherein

One end of the second driving circuit is connected to the other end of the second variable gain amplifier, The other end of the second driving circuit is connected to one end of the third mixing circuit, and the other end of the third mixing circuit is connected to one end of the second transformer.

The signal processing circuit provided by the embodiment of the invention can coexist two different service modes of G.fast and VDSL2 in the same cable, and can jointly use the low frequency and high frequency to carry the service, thereby improving the service efficiency. The circuit structure Simple, small in size and small in size for easy layout.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are Some embodiments of the present invention may also be used to obtain other drawings based on these drawings without departing from the art.

1 is a schematic diagram of a prior art G.fast and VDSL2 frequency band;

2 is a schematic structural diagram of a signal processing circuit according to a first embodiment of the present invention;

3 is a schematic structural diagram of a low pass filter and a high pass filter circuit according to a first embodiment of the present invention;

4 is a schematic structural diagram of a G.fast Only mode circuit according to a first embodiment of the present invention;

FIG. 5 is a schematic structural diagram of another G.fast Only mode circuit according to the first embodiment of the present invention; FIG.

6 is a schematic structural diagram of a signal processing circuit according to a second embodiment of the present invention;

7 is a schematic structural diagram of a signal processing circuit according to a third embodiment of the present invention;

8 is a schematic structural diagram of a signal processing circuit according to a fourth embodiment of the present invention;

9 is a schematic structural diagram of still another signal processing circuit according to a fourth embodiment of the present invention;

FIG. 10 is a schematic structural diagram of a signal processing circuit according to a fifth embodiment of the present invention; FIG.

Figure 11 is a block diagram showing the structure of a signal processing circuit in accordance with a sixth embodiment of the present invention.

Specific embodiment

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

2 is a schematic structural diagram of a signal processing circuit according to a first embodiment of the present invention, comprising: an AD/VD digital front end 10, a G.fast digital front end 20, a first conversion circuit 11, a second conversion circuit 21, and a first driving circuit. 12 and the first hybrid circuit 13, the first transformer 14, wherein

The AD/VD digital front end 10 and the G.fast digital front end 20 are respectively connected to one end of the first conversion circuit 11 and one end of the second conversion circuit 21, and the other end of the first conversion circuit 12 and one end of the first driving circuit 12 are respectively connected. Connected, the other end of the first driving circuit 12 is connected to one end of the first mixing circuit 13, the other end of the second converting circuit 21 is connected to one end of the first mixing circuit 13, and the other end of the first mixing circuit 13 is connected to the first transformer. 14 connected.

The first conversion circuit 11 includes: a first low pass filter, a first digital to analog converter, a first variable gain amplifier, and an adder, where

The second conversion circuit 21 includes: a second low pass filter, a third low pass filter, and a first mode a digital converter, a second analog to digital converter, a first programmable gain amplifier, a second programmable gain amplifier, and a first high pass filter, wherein

One end of the second low pass filter is connected to the AD/VD digital front end, and the other end of the second low pass filter is connected to one end of the first analog to digital converter, the first analog to digital conversion The other end of the device is connected to one end of the first programmable gain amplifier, and the other end of the first programmable gain amplifier is connected to the third low pass filter, and one end of the second analog to digital converter is The G.fast digital front end is connected, the other end of the second analog to digital converter is coupled to one end of the second programmable gain amplifier, and the other end of the second programmable gain amplifier is coupled to the first high pass filter One end of the unit is connected.

It should be understood that the first hybrid circuit 13 has the characteristic of echo cancellation, and the transmission signal is attenuated after passing through the first hybrid circuit 13, so that the filter can simplify the design, the device size of the circuit is small, the number is small, the layout is convenient, and the work of the circuit is reduced. Consumption and cost.

An implementation of the low-pass filter and the high-pass filter is shown in FIG. 3. The resistors R2197/R2198 and R2222/R2223 can be combined with the equivalent impedance of the receiving path of the Hybrid circuit (Chinese name: hybrid circuit) to form a filter. The start impedance, on the other hand, reduces the interaction between the LPF and the HPF. If the frequency of the different mode filters is different, one or more sets of low-pass filters and high-pass filters can be designed for switching selection.

Since the port supporting VDSL2 and G.fast hybrid applications can also support the G.fast Only mode, it is necessary to support the Bypass of the high-pass filter. One implementation that supports HPF Bypass is shown in Figure 4: The second programmable gain The low noise amplifier in the amplifier can select the signal that passes through the high pass filter or the original full band signal that does not pass through the high pass filter.

Of course, in other implementation manners of the embodiments of the present invention, the G.fast Only mode may also be supported. As shown in FIG. 5, FIG. 5 is an attenuation network added to FIG.

Referring to FIG. 6, which is a schematic structural diagram of a signal processing circuit according to a second embodiment of the present invention, FIG. 6 is an optimization of FIG. 2, in addition to the structure shown in FIG.

The first conversion circuit 11 further includes: a second digital-to-analog converter, a second variable gain amplifier, a fourth low-pass filter, and a second high-pass filter, wherein one end of the second digital-to-analog converter The other end of the low pass filter is connected, the other end of the second digital to analog converter is connected to one end of the second variable gain amplifier, and the other end of the second variable gain amplifier is connected to the fourth One end of the low pass filter is connected, one end of the second high pass filter is connected to the other end of the first variable gain amplifier, and the other end of the fourth low pass filter is opposite to the second high pass filter The other end of the road.

Referring to FIG. 7, which is a schematic structural diagram of a signal processing circuit according to a third embodiment of the present invention, the circuit in FIG. 7 is an optimization of the circuit of FIG. 2, and the circuit in FIG. 7 can improve the transmission power of VDSL2, except the structure shown in FIG. In addition, the second mixing circuit 22 includes

The other end of the first high-pass filter is connected to one end of the second hybrid circuit 22, and the other end of the second hybrid circuit 22 is connected to one end of the first transformer, and the second hybrid circuit 22 Another end is connected to one end of the first mixing circuit 13.

Need to know is that the above scheme can support the mixed mode of VDSL2 and G.fast, pure VDSL2 Mode and pure G.fast mode (HPF Bypass). Since G.fast and VDSL2 share the Line Driver, the transmission power of VDSL2 does not meet the standard requirements, but the users who use G.fast are close to the device, so the VDSL2 transmission power is slightly lower to meet the user's bandwidth requirements.

In addition, another scheme for improving the transmission power of the VDSL 2 in the embodiment of the present invention is as shown in FIG. 8 , and further includes: a second driving circuit 15 , a third hybrid circuit 23 , and a second transformer 24 , wherein

One end of the second driving circuit 15 is connected to the other end of the first converting circuit 11, and the other end of the second driving circuit 15 is connected to one end of the third mixing circuit 23, the third hybrid circuit The other end of the 23 is connected to the second transformer 24.

As shown in FIG. 9, when the user needs to work in the pure VDSL2 mode and requires a standard large transmission power, the first programmable gain amplifier in the second conversion circuit 21 is connected to the third hybrid circuit 23, and the standard can be obtained. Transmit power of VDSL2.

10 is a schematic structural diagram of a signal processing circuit according to a fifth embodiment of the present invention. On the basis of the structure of FIG. 6, the second driving circuit 15, the third hybrid circuit 23, and the second transformer 24 are included.

One end of the second driving circuit 15 is connected to the other end of the fourth low pass filter, The other end of the second driving circuit 15 is connected to one end of the third mixing circuit 23, and the other end of the third mixing circuit 23 is connected to one end of the second transformer 24.

FIG. 11 is a schematic structural diagram of a signal processing circuit according to a sixth embodiment of the present invention. On the basis of the structure of FIG. 7, the second driving circuit 15, the third hybrid circuit 23, and the second transformer 24 are included.

One end of the second driving circuit 15 is connected to the other end of the second variable gain amplifier, and the other end of the second driving circuit 15 is connected to one end of the third mixing circuit 23, the third mixing The other end of the circuit 23 is connected to one end of the second transformer 24.

In addition, the first conversion circuit 11 in the embodiment of the present invention needs to include: a second digital-to-analog converter and a second variable gain amplifier, where

It should be understood that the first programmable gain amplifier may be coupled to the third hybrid circuit 23 when the standard large transmit power is required, and the other end of the second programmable gain amplifier is coupled to the second hybrid circuit 22.

It is apparent that those skilled in the art can make various modifications and variations to the invention without departing from the spirit and scope of the invention. These modifications and variations of the present invention are intended to be included within the scope of the appended claims.

Claims

A signal processing circuit, comprising: an AD/VD digital front end, a G.fast digital front end, a first conversion circuit, a second conversion circuit, a first driving circuit, a first hybrid circuit, and a first transformer, wherein

The AD/VD digital front end and the G.fast digital front end are respectively connected to one end of the first conversion circuit and one end of the second conversion circuit, and the other end of the first conversion circuit and the first driving circuit One end of the first driving circuit is connected to one end of the first hybrid circuit, and the other end of the second converting circuit is connected to the other end of the first hybrid circuit, the first mixing The other end of the circuit is connected to one end of the first transformer.
The signal conversion circuit according to claim 1, wherein said first conversion circuit comprises: a first low pass filter, a first digital to analog converter, a first variable gain amplifier, and an adder, wherein

One end of the first low pass filter is connected to the AD/VD digital front end, the other end of the first low pass filter is connected to one end of the adder, and the other end of the adder is One end of the first digital-to-analog converter is connected, one end of the adder is connected to the G.fast digital front end, and one end of the first digital-to-analog converter is further connected to the G.fast digital front end, The other end of a digital to analog converter is coupled to one end of the first digital to analog converter, and the other end of the first digital to analog converter is coupled to one end of the first variable gain amplifier.
A signal conversion circuit according to claim 1, wherein said second conversion circuit The method includes a second low pass filter, a third low pass filter, a first analog to digital converter, a second analog to digital converter, a first programmable gain amplifier, a second programmable gain amplifier, and a first high pass filter. among them,

One end of the second low pass filter is connected to the AD/VD digital front end, and the other end of the second low pass filter is connected to one end of the first analog to digital converter, the first analog to digital conversion The other end of the device is connected to one end of the first programmable gain amplifier, and the other end of the first programmable gain amplifier is connected to the third low pass filter, and one end of the second analog to digital converter is The G.fast digital front end is connected, the other end of the second analog to digital converter is coupled to one end of the second programmable gain amplifier, and the other end of the second programmable gain amplifier is coupled to the first high pass filter One end of the unit is connected.
The signal conversion circuit according to claim 3, wherein said second programmable gain amplifier comprises: a low noise amplifier, a first resistor/capacitor network, a second resistor/capacitor network, and a third resistor/capacitor network ,among them:

The low noise amplifier is connected in parallel with the first resistor/capacitor network, one end of the low noise amplifier is connected to the other end of the second analog to digital converter, and the other end of the low noise amplifier is opposite to the second One end of the resistor/capacitor network is connected or connected to one end of the third resistor/capacitor network, and the other end of the second resistor/capacitor network is connected to one end of the first high pass filter, the third resistor The other end of the capacitor network is connected to one end of the first hybrid circuit.
The signal conversion circuit of claim 4, further comprising:

The other end of the third resistor/capacitor network is coupled to one end of the attenuation network, and the other end of the attenuation network is coupled to the other end of the first hybrid circuit.
The signal conversion circuit according to claim 2, wherein said first conversion circuit further comprises: a second digital-to-analog converter, a second variable gain amplifier, a fourth low-pass filter, and a second high-pass filter ,among them,

One end of the second digital-to-analog converter is connected to the other end of the first low-pass filter, and the other end of the second digital-to-analog converter is connected to one end of the second variable gain amplifier, The other end of the second variable pass amplifier is connected to one end of the fourth low pass filter, and one end of the second high pass filter is connected to the other end of the first variable gain amplifier, the fourth low pass The other end of the filter is combined with the other end of the second high pass filter.
The signal conversion circuit according to claim 1 or 2, further comprising: a second hybrid circuit, wherein

The other end of the first high-pass filter is connected to one end of the second hybrid circuit, the other end of the second hybrid circuit is connected to one end of the first transformer, and the other end of the second hybrid circuit is One end of the first hybrid circuit is connected.
The signal conversion circuit according to claim 1, further comprising: a second driving circuit, a third mixing circuit, and a second transformer, wherein

One end of the second driving circuit is connected to the other end of the first converting circuit, and the other end of the second driving circuit is connected to one end of the third mixing circuit, and the other end of the third hybrid circuit is The second transformer is connected.
The signal conversion circuit according to claim 2, wherein said first conversion circuit further The method includes: a second digital-to-analog converter and a second variable gain amplifier, wherein

One end of the second digital-to-analog converter is connected to the other end of the first low-pass filter, and the other end of the second digital-to-analog converter is connected to one end of the second variable gain amplifier.
The signal conversion circuit according to claim 6, further comprising: a second driving circuit, a third mixing circuit, and a second transformer, wherein

One end of the second driving circuit is connected to the other end of the fourth low pass filter, the other end of the second driving circuit is connected to one end of the third mixing circuit, and the other end of the third hybrid circuit One end is connected to one end of the second transformer.
The signal conversion circuit according to claim 7 or 9, further comprising: a second driving circuit, a third mixing circuit, and a second transformer, wherein

One end of the second driving circuit is connected to the other end of the second variable gain amplifier, the other end of the second driving circuit is connected to one end of the third mixing circuit, and the other end of the third hybrid circuit One end is connected to one end of the second transformer.