WO2016043487A1

WO2016043487A1 - Signal transmitting/receiving method and apparatus

Info

Publication number: WO2016043487A1
Application number: PCT/KR2015/009656
Authority: WO
Inventors: 이대영; 변철우; 손주호; 이정호; 최선규; 최성태
Original assignee: 삼성전자 주식회사
Priority date: 2014-09-15
Filing date: 2015-09-15
Publication date: 2016-03-24
Also published as: EP3206312A4; EP3206312A1; CN107148756B; CN107148756A; US10952169B2; EP3206312B1; US20170257837A1; KR102342740B1; KR20160032729A

Abstract

The present invention relates to a 5th-generation (5G) or pre-5G communication system to be provided in order to support a higher data transmission rate than a beyond 4th-generation (4G) communication system such as long term evolution (LTE). The present invention relates to a signal transmission method of a radio frequency (RF) processing device, the method comprising the steps of: generating a pulse signal including a control signal and a clock signal for obtaining synchronization with another RF processing device, which is connected through an interface; and transmitting, to the another RF processing device, at least one from among the pulse signal, a RF signal for communication with a base station, and a power signal for supplying power to the another RF processing device, wherein the clock signal and the control signal are assigned to different time units, and the pulse signal, the RF signal and the power signal are signals of different frequency bands.

Description

Signal transmission / reception method and apparatus

The present invention relates to a signal transmission / reception method and apparatus.

Fourth-generation (4G, hereinafter referred to as "4G") Telecommunications System Improved 5th-generation (5G, hereinafter "5G") to meet the increasing demand for wireless data traffic after commercialization. Efforts have been made to develop communication systems or pre-5G (pre-5G, hereinafter referred to as "pre-5G") communication systems. For this reason, a 5G communication system or a pre-5G communication system is called a system after a 4G network or a system after a post LTE system.

In order to achieve high data rates, 5G communication systems have been implemented in the millimeter wave (mmWave, hereinafter referred to as "mmWave") band (e.g., in a frequency band such as the 60 giga (60 GHz) band). Is being considered. In order to mitigate the path loss of propagation and increase the propagation distance of radio waves in the ultra-high frequency band, beam forming, massive multi-input multi-output (MIMI) is used in 5G communication systems. massive MIMO) technology, full dimensional multiple input multiple output (FD-MIMO, "FD-MIMO") technology, array antenna technology, analog Analog beam-forming techniques and large scale antenna techniques have been discussed.

In addition, in order to improve the network of the system, 5G communication systems have advanced small cells, advanced small cells, cloud radio access network (cloud RAN), ultra-dense network (ultra-dense network) Device to device (D2D, hereinafter referred to as "D2D") communication, wireless backhaul, moving network, cooperative communication, and coordinated multi-points (CoMP). And technology developments such as reception interference cancellation.

In addition, hybrid frequency shift keying (FSK, hereinafter referred to as "FSK") and orthogonality, which are advanced coding modulation (ACM) methods, hereinafter referred to as "ACM" in 5G systems. Quadrature amplitude modulation (QAM) (hereinafter referred to as "QAM") (hybrid FSK and QAM: FQAM, hereinafter referred to as "FQAM") and sliding window superposition coding (SWSC) And "bank bank multicarrier" (FBMC), an advanced access technology, and non orthogonal multiple access (NOMA). And "NOMA") and sparse code multiple access (SCMA) technologies (hereinafter referred to as "SCMA") have been developed.

The demand for high speed data transmission via wireless cellular communication continues to grow. When carrier aggregation is used in a conventional 4G long term evolution (LTE) wireless communication system, data communication of up to 100 Mbps may be theoretically performed. Enable ubiquitous high speed communication.

Recently, however, there is an increasing demand for high speed data communication of more than Gbps for cloud computing, ultra high definition (UHD) video data transmission, and the like, and as a next generation cellular communication, Techniques for supporting data transfer are being developed.

The current cellular band, below 5GHz, is already saturated and the mmWave band, which was not used for conventional cellular communications, must be used to support broadband communications over Gbps. Since the mmWave band has to be implemented in a completely different direction from the existing cellular communication method due to the high frequency characteristics, a new method different from the existing one must be devised in terms of optimization of the entire system.

On the other hand, a wireless communication unit (including, for example, a radio frequency integrated circuit (RFIC, hereinafter referred to as "RFIC") for communication in the mmWave band in the terminal) due to the issue of a plurality of units It is divided into the two provided in the terminal. In this case, various signals (eg, direct current (DC), hereinafter referred to as “DC”) between the plurality of wireless communication units using a minimum number of cables (or transmission lines) may be used. It is important to allow a clock signal, a control signal, and a radio frequency (RF) / intermediate frequency (IF) signal to be transmitted and received. In the past, a method of classifying and transmitting corresponding signals based on a frequency division method has been used.

However, in this case, the design of a frequency selector for distinguishing each signal based on frequency becomes complicated. That is, it is important that the frequency selector is designed in consideration of the interference between signals, and as the number of signals to be transmitted through the cable increases, the design difficulty and complexity increase exponentially.

In addition, the clock signal that must be transmitted is generally a signal of tens to hundreds of MHz, and the size of the frequency selector is larger than that of the mm-Wave signal. In addition, there is a problem in that jitter increases due to an amplitude phase conversion of the clock signal when the clock signal is divided. Accordingly, a method for more efficiently performing signal transmission and reception between the plurality of wireless communication units is needed.

On the other hand, the above information is only presented as background information to help the understanding of the present invention. No determination is made as to whether any of the above is applicable as the prior art concerning the present invention, and no claims are made.

An embodiment of the present invention proposes a method and apparatus for transmitting / receiving a signal.

In addition, an embodiment of the present invention proposes a signal transmission / reception method and apparatus capable of reducing the complexity of transmitting / receiving by dividing a plurality of signals.

According to an embodiment of the present invention, the control signal and the clock signal are transmitted / received based on a time division multiple access (TDMA) scheme, and a DC power signal and an RF / The present invention proposes a method and apparatus for transmitting / receiving an IF signal based on a frequency division multiple access (FDMA) scheme.

In addition, an embodiment of the present invention reduces the interference with signals transmitted and received through different frequency bands by transmitting a control signal and a clock signal on a pulse basis, and various pulse symbols in consideration of data transmission speed and power consumption. We propose a signal transmission / reception method and apparatus capable of using.

Method according to an embodiment of the present invention; A signal transmission method of a radio frequency (RF) processing apparatus, comprising: generating a pulse signal including a clock signal and a control signal for synchronizing with another RF processing apparatus connected through one interface And transmitting at least one of the pulse signal, an RF signal for communication with a base station, and a power signal for power supply of the other RF processing device to the other RF processing device, wherein the clock signal And the control signal are allocated to different time units, and the pulse signal, the RF signal and the power signal are signals of different frequency bands.

Another method according to an embodiment of the present invention; A signal receiving method of a radio frequency (RF) processing apparatus, comprising: a pulse signal including a clock signal and a control signal for obtaining synchronization with another RF processing apparatus connected through one interface, Receiving at least one of an RF signal for communication with a base station and a power signal for power supply of an RF processing apparatus, wherein the clock signal and the control signal are allocated to different time units; The pulse signal, the RF signal and the power signal are characterized in that the signals of different frequency bands.

An apparatus according to an embodiment of the present invention; In a radio frequency (RF) processing apparatus, a pulse signal generator for generating a pulse signal including a clock signal and a control signal for synchronizing with another RF processing apparatus, which are connected through one interface. And a transmitter for transmitting at least one of the pulse signal, an RF signal for communication with a base station, and a power signal for power supply of the other RF processing device, to the other RF processing device, wherein the clock signal and the control The signals are allocated to different time units, and the pulse signal, the RF signal and the power signal are signals of different frequency bands.

Another apparatus according to an embodiment of the present invention; In a radio frequency (RF) processing apparatus, a pulse signal including a clock signal and a control signal for synchronizing with another RF processing apparatus connected through one interface, and communicating with a base station A receiving unit for receiving at least one of an RF signal and a power signal for power supply of the RF processing apparatus from the other RF processing apparatus, wherein the clock signal and the control signal are allocated to different time units, and the pulse The signal, the RF signal and the power signal are characterized in that the signals of different frequency bands.

Other aspects, benefits, and key features of the present invention will be apparent to those skilled in the art from the following detailed description, taken in conjunction with the accompanying drawings, which disclose preferred embodiments of the present invention.

Before proceeding with the following detailed description of this publication, it may be effective to set definitions for specific words and phrases used throughout this patent document: the terms “include” and “include”. "Comprise" and its derivatives mean unlimited inclusion; The term “or” is inclusive and means “and / or”; The phrases “associated with” and “associated therewith” and their derivatives include, be included within, and interconnected with (interconnect with), contain, be contained within, connect to or with, connect to or connect with or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, Something that is likely or be bound to or with, have, have a property of, etc .; The term “controller” means any device, system, or portion thereof that controls at least one operation, wherein the device is hardware, firmware or software, or some combination of at least two of the hardware, firmware or software. It can be implemented in It should be noted that the functionality associated with any particular controller may be centralized or distributed, and may be local or remote. Definitions for specific words and phrases are provided throughout this patent document, and those skilled in the art will, in many instances, if not most of the cases, define such definitions as well as conventional and such definitions. It should be understood that this also applies to future uses of the syntax.

The wireless communication unit in the terminal may be divided into a component for high frequency processing and a component for intermediate frequency processing, and the components may be connected by one cable. In this case, according to an embodiment of the present invention, the control signal and the clock signal may be transmitted and received based on the TDMA scheme, and the DC power signal and the RF / IF signal may be transmitted and received based on the FDMA scheme. When such a signal transmission / reception scheme is used, the complexity of the design of the frequency selector and the signal classification operation may be reduced, and the problem of jitter increase due to the clock signal may be solved.

In addition, in an embodiment of the present invention, by transmitting a control signal and a clock signal on a pulse basis, interference with signals of other frequency bands may be reduced, and electromagnetic interference (EMI) will be referred to as a problem. Can also be solved. In addition, in an embodiment of the present invention, various pulse symbols can be used in consideration of data transmission speed and power consumption, thereby reducing overhead in the system.

In addition, an embodiment of the present invention has the effect that it is possible to transmit / receive a signal to be able to reduce the complexity of transmitting / receiving by distinguishing a plurality of signals.

According to an embodiment of the present invention, the control signal and the clock signal are transmitted / received based on a time division multiple access (TDMA) scheme, and a DC power signal and an RF / The IF signal has an effect of enabling transmission / reception based on a frequency division multiple access (FDMA) scheme.

In addition, an embodiment of the present invention reduces the interference with signals transmitted and received through different frequency bands by transmitting a control signal and a clock signal on a pulse basis, and various pulse symbols in consideration of data transmission speed and power consumption. There is an effect that it is possible to transmit / receive a signal so that it can be used.

Further aspects, features and benefits as described above of certain preferred embodiments of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings:

1 is a view schematically showing the internal structure of a wireless communication unit of a terminal according to an embodiment of the present invention;

2 schematically illustrates frequency selectors included in RFA and RFB;

3 is a graph showing frequency bands of a DC power signal, a clock signal, a control signal, and an RF / IF signal;

4 is a view schematically showing an internal structure of a signal transmission / reception apparatus according to an embodiment of the present invention;

5 is a diagram showing the internal configuration of the first and second frequency selector according to an embodiment of the present invention,

6 is a graph illustrating frequency bands of a DC power signal, a PPM signal, and an RF / IF signal according to an embodiment of the present invention;

7 is a diagram illustrating an internal configuration of a clock / control signal separator according to an embodiment of the present invention;

8 illustrates a clock signal and a control signal detected from a PPM signal according to an embodiment of the present invention;

9 illustrates an example in which two bits are transmitted as control signals for each time period according to an embodiment of the present invention;

10 illustrates an example of bidirectional transmission performed symmetrically according to an embodiment of the present invention;

11 illustrates an example of bidirectional transmission performed asymmetrically according to an embodiment of the present invention;

12 is a view showing a connection structure between an RFA and an RFB according to an embodiment of the present invention;

13 illustrates a signal transmitted from RFB to RFAs based on a bus structure according to an embodiment of the present invention;

14 is a view showing a waveform of a pulse signal according to an embodiment of the present invention;

15 is a flowchart illustrating a process of determining a waveform of a pulse signal according to an embodiment of the present invention.

Throughout the drawings, it should be noted that like reference numerals are used to depict the same or similar elements, features and structures.

DETAILED DESCRIPTION The following detailed description with reference to the accompanying drawings will assist in the comprehensive understanding of various embodiments of the present disclosure, which are defined by the claims and their equivalents. The following detailed description includes various specific details for the purpose of understanding, but it will be regarded only as an example. Accordingly, those skilled in the art will recognize that various changes and modifications of the various embodiments described herein may be made without departing from the scope and spirit of the present disclosure. In addition, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.

The terms and words used in the following description and claims are not to be limited in their literal meaning, but are merely used to enable a clear and consistent understanding of the present disclosure by the inventors. Accordingly, to those skilled in the art, the following detailed description of various embodiments of the present disclosure is provided for illustrative purposes only and limits the present disclosure as defined by the appended claims and their equivalents. It should be clear that it is not provided to do so.

In addition, it is to be understood that the singular forms “a” and “an”, including “an”, unless the context clearly indicates otherwise, include plural expressions. Thus, as an example, a “component surface” includes one or more component surfaces.

In addition, terms including ordinal numbers such as first and second may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component. The term and / or includes a combination of a plurality of related items or any item of a plurality of related items.

In addition, the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. As used herein, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, action, component, part, or combination thereof described on the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.

In addition, unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be understood to have meanings consistent with those in the context of the related art.

According to various embodiments of the present disclosure, the terminal may include a communication function. For example, the terminal includes a smart phone, a tablet personal computer (PC), a mobile phone, a video phone, and an e-book reader (e- book readers, desktop PCs, laptop PCs, netbook PCs, personal digital assistants (PDAs), and portable multimedia A portable multimedia player (PMP, hereinafter referred to as 'PMP'), an mp3 player, a mobile medical device, a camera, a wearable device (e.g., a head-mounted device) (head-mounted device: HMD, for example 'HMD'), electronic clothing, electronic bracelets, electronic necklaces, electronic accessories, electronic tattoos, or smart watches. And so on.

According to various embodiments of the present disclosure, the terminal may be a smart home appliance having a communication function. For example, the smart home appliance includes a television, a digital video disk (DVD) player, an audio, a refrigerator, an air conditioner, a vacuum cleaner, an oven, and micro-wave oven, a washer and dryer, and air purifier, set-top box (set-top box) and, TV box (For ^{^{example, Samsung HomeSync TM, Apple TV TM}} , or Google TV ^TM) and game console (gaming console), electronic dictionary, camcorder, electronic photo frame, and so on.

According to various embodiments of the present disclosure, a terminal may include a medical device (eg, magnetic resonance angiography (MRA) device), and magnetic resonance imaging (MRI) device. , Referred to as “MRI”), computed tomography (CT) devices, imaging devices, or ultrasound devices), navigation devices, and worldwide A global positioning system (GPS) receiver, an event data recorder (EDR), and a flight data recorder (EDR); FDR, hereinafter referred to as "FER", automotive infotainment device, navigational electronic device (e.g. navigation navigation device, gyroscope) Gyroscopes or compasses, avionics, security devices, industrial or consumer robots, and the like.

According to various embodiments of the present disclosure, a terminal may include a furniture, a part of a building / structure, an electronic board, an electronic signature receiving device, a projector, and various measurement devices (eg, , Electrical, gas or electromagnetic wave measuring devices).

According to various embodiments of the present disclosure, the terminal may be a combination of devices as described above.

In addition, it will be apparent to those skilled in the art that the terminal according to the preferred embodiments of the present invention is not limited to the device as described above.

According to an embodiment of the present invention, the control signal and the clock signal are transmitted / received based on a time division multiple access (TDMA) scheme, and a DC power signal and a radio frequency. (radio frequency: RF, hereinafter referred to as "RF") / intermediate frequency (IF, hereinafter referred to as "IF") signal is a frequency division multiple access (FDMA, hereinafter "FDMA") A method and apparatus for transmitting / receiving based on the " will be referred to "

In addition, an embodiment of the present invention reduces the interference with signals transmitted and received through different frequency bands by transmitting a control signal and a clock signal on a pulse basis, data transmission speed, power consumption, and the like. In view of the above, we propose a signal transmission / reception method and apparatus capable of using various pulse symbols.

Meanwhile, an apparatus and method proposed in an embodiment of the present invention include a long-term evolution (LTE) mobile communication system and a long-term evolution-advanced (long-term evolution). -advanced: LTE-A, hereinafter referred to as LTE-A) mobile communication system, licensed-assisted access (LAA, hereinafter referred to as "LAA")-LTE mobile communication system A high speed downlink packet access (HSDPA) is referred to as a mobile communication system and a high speed uplink packet access (HSUPA) is referred to as an HSUPA. High rate packet data (HRPD) of the mobile communication system and 3rd generation partnership project 2: 3GPP2 (hereinafter referred to as 3GPP2). Transfer bucket The new system, 3GPP2 wideband code division multiple access (WCDMA) mobile communication system, and 3GPP2 code division multiple access (CDMA) CDMA 'mobile communication system, the Institute of Electrical and Electronics Engineers (IEEE), IEEE 802.16ad communication system, IEEE 802.16m communication system, IEEE 802.16e communication system, evolved packet system (EPS), and mobile internet protocol (Mobile IP). Applicable to various communication systems such as

First, an internal structure of a wireless communication unit of a terminal according to an embodiment of the present invention will be described with reference to FIG. 1.

1 is a diagram schematically illustrating an internal structure of a wireless communication unit of a terminal according to an embodiment of the present invention.

Referring to FIG. 1, a wireless communication unit of a terminal converts a high frequency signal into a component that processes a high frequency signal (hereinafter referred to as “RFA”) and a high frequency signal into a low frequency signal, and the low frequency signal. May include a component (hereinafter referred to as "RFB") for processing an IF signal obtained by demodulating corresponding to a preset demodulation scheme.

The terminal may include a plurality of RFAs to use a multi-input multi-output (MIMO) technique, hereinafter referred to as "MIMO" technology. In FIG. 1, for example, the terminal includes two RFAs (ie, a first RFA 110 and a second RFA 120). The first RFA 110 and the second RFA 120 are located apart from each other by a predetermined interval or more. Accordingly, as shown in FIG. 1, the first RFA 110 and the second RFA 120 are located at the upper left corner and the lower right corner of the terminal, consequently, the first RFA 110 and the lower right corner. The second RFA 120 may be located on the diagonal of the terminal.

The first RFA 110 and the second RFA 120 are components for high frequency communication and enable signal transmission and reception through an antenna. The first RFA 110 receives a signal from or receives a signal from the first antenna 112 and the first antenna 112 that serves as an interface with an air medium. A first front end module (FEM, hereinafter referred to as "FEM") 114 for transmitting a first RF module 116 for interfacing with the RFB (130).

In addition, the second RFA 120 may receive a signal from the second antenna 122, the second antenna 122, which serves as an interface with the air medium, or transmit a signal to the second antenna 122. 124 and a second RF unit 126 for interfacing with the RFB 130.

Each of the first antenna 112 and the second antenna 122 may be configured in an array form. In this case, the first FEM 114 and the second FEM 124 may also correspond to each antenna one-to-one. It may be configured in the form of an array.

The RFB 130 is a baseband (BB, hereinafter referred to as "BB") unit 132 and the first IF unit 134 connected to the first RFA 110 and the second RFA 120. And a second IF unit 136. The BB unit 132 generates a digital signal and transfers the generated digital signal to the first IF unit 134 and the second IF unit 136. The first IF unit 134 and the second IF unit 136 respectively convert the received digital signal into an analog signal and modulate the analog signal to facilitate propagation through an air medium. do. The first IF unit 134 and the second IF unit 136 transfer the modulated signal to the first RFA 110 and the second RFA 120, respectively.

The first RFA 110 (or the second RFA 120) and the RFB 130 may be connected to one interface (for example, a case in which a cable or transmission line is connected to the cable). In this case, the RFB 130 is a direct current (DC) power signal for power supply of the first RFA 110 through the one cable, synchronization with the first RFA 110. At least one of a clock signal for the control signal, a control signal for controlling the first RFA 110, and an RF / IF signal (uplink / downlink signal) for communication with the base station; May transmit to the first RFA 110.

In this case, when a general signal transmission / reception method of transmitting and receiving the DC power signal, the clock signal, the control signal, and the RF / IF signal based on the frequency division method is used, the RFA and the RFB are respectively shown in FIG. 2. It may include.

2 is a diagram schematically showing frequency selectors included in RFA and RFB.

Referring to FIG. 2, the RFA and the RFB are connected by one cable 200, and each of a direct current (DC) power signal, a clock signal, a control signal, and an RF / IF signal. It includes a first frequency selector 210 and a second frequency selector 220 including filters capable of distinguishing.

As shown in FIG. 3, when the DC power signal, the clock signal, the control signal and the RF / IF signal are signals of different frequency bands, the first frequency selector 210 may bias the DC power signal. (bias) -T 212, a first band selection filter 214 capable of detecting the RF / IF signal, a second band selection filter 216 capable of detecting the control signal, and the clock signal A third band selection filter 218 may be included. 3 is a graph illustrating frequency bands of a DC power signal, a clock signal, a control signal, and an RF / IF signal.

The second frequency selector 220 detects the bias-T 222 capable of detecting the DC power signal, the fourth band select filter 224 capable of detecting the RF / IF signal, and the control signal. And a fifth band selection filter 226 capable of detecting the clock signal, and a sixth band selection filter 228 capable of detecting the clock signal.

Therefore, when the RFA transmits a signal including at least one of the DC power signal, the clock signal, the control signal, and the RF / IF signal through the cable 200, the bias-T (222) in the RFB. ), A fourth band select filter 224, a fifth band select filter 226, and a sixth band select filter 228, using the DC power signal, the clock signal, the control signal, and At least one of the RF / IF signals may be detected.

In addition, when the RFB transmits a signal including at least one of the DC power signal, the clock signal, the control signal, and the RF / IF signal through the cable 200, the RFA includes the bias-T 212 and the first signal. The DC power signal, the clock signal, the control signal and the RF / IF from the received signal using at least one of the one band selection filter 214, the second band selection filter 216, and the third band selection filter 218. At least one of the signals can be detected.

Meanwhile, in FIG. 2, although the frequency selectors included in the RFA and the RFB are implemented as separate units such as the first frequency selector 210 and the second frequency selector 220, the RFA and the RFB are shown in FIG. 2. Of course, the included frequency selectors may be implemented in one processor.

In addition, in FIG. 2, the first frequency selector 210 is the same as the bias-T 212, the first band selection filter 214, the second band selection filter 216, and the third band selection filter 218. Although illustrated as being implemented in separate units, the first frequency selector 210 may include the bias-T 212, the first band select filter 214, the second band select filter 216, and the third. Of course, at least two of the band selection filter 218 can be implemented in an integrated form. In addition, the first frequency selector 210 may be implemented as one processor.

In addition, in FIG. 2, the second frequency selector 220 is the same as the bias-T 222, the fourth band selection filter 224, the fifth band selection filter 226, and the sixth band selection filter 228. Although illustrated as being implemented in separate units, the second frequency selector 220 may include the bias-T 222, the fourth band select filter 224, and the fifth frequency selector 220. Of course, at least two of the band selection filter 226 and the sixth band selection filter 228 may be implemented in an integrated form. In addition, the second frequency selector 220 may be implemented by one processor.

On the other hand, the method of distinguishing the signals based on the frequency division scheme by transmitting signals of different frequency bands through one cable 200 should minimize the interference between signals, so the design of the frequency selector is larger as the number of signals to be transmitted Difficulty and complexity increase dramatically. For example, when transmitting signals of N frequency bands, the number of interferences to be considered in the frequency selector is 2N.

In addition, clock signals are typically dozens to hundreds of MHz, with a lower frequency than other signals, requiring a large area frequency selector. When detecting the clock signal, jitter increases due to an amplitude phase conversion of the clock signal.

In addition, the filter is designed by considering the interference between each signal when distinguishing a plurality of signals, the control signal is a digital signal having a greater power level than other signals as interference or electromagnetic interference (EMI) Lowering the power level of the control signal should be considered as it causes a problem of " EMI ".

As a result, as shown in FIG. 1, a terminal including RFA and RFB connected by one cable has various limitations when a signal transmission / reception method based on a general frequency division method is used, and thus, there is a limit to actual implementation. .

Accordingly, an embodiment of the present invention proposes a method and apparatus for transmitting and receiving the DC power signal, the clock signal, the control signal, and the RF / IF signal through one cable based on the TDMA method and the FDMA method. In an embodiment of the present invention, the DC power signal and the RF / IF signal may be divided based on the FDMA scheme, and the control signal and the clock signal may be divided and transmitted based on the TDMA scheme.

Next, an internal structure of a signal transmission / reception apparatus according to an embodiment of the present invention will be described with reference to FIG. 4.

4 is a diagram schematically illustrating an internal structure of a signal transmission / reception apparatus according to an embodiment of the present invention.

Referring to FIG. 4, the transmitter 410 and the receiver 420 may be one of RFA and RFB, respectively, and are connected by one cable 400. The transmitter 410 may include a symbol generator 412, a pulse position modulation (PPM), a modulator 414, and a TX line driver. 416 and a first frequency selector 418.

When the control signal and the clock signal are input to the PPM modulator 414, the symbol generator 412 generates a symbol (pulse signal) corresponding to the control signal and the clock signal to the PPM modulator 414. Output

The PPM modulator 414 modulates and outputs the control signal and the clock signal together using a TDMA scheme based on the symbols of the control signal and the clock signal generated by the symbol generator 412. That is, the PPM modulator 414 allocates and outputs the control signal and the clock signal to different time slots so that the control signal and the clock signal are transmitted at different times. Here, the time slot is only an example of a unit time, for example, a time unit, and the time unit may be implemented in various forms such as a subframe, a frame, and a super frame as well as the time slot.

On the other hand, for example, the PPM modulator 414 periodically allocates the clock signal to a preset time slot, and the control signal is assigned to one of the time slots included between the time slots to which the clock signal is assigned. Allocate it and print it out.

The transmission line driver 416 amplifies the modulated signal (hereinafter referred to as a 'PPM signal') and outputs it to the first frequency selector 418. The first frequency selector 418 receives the PPM signal, the RF / IF signal, and the DC power signal, and uses the filters to distinguish the PPM signal, the RF / IF signal, and the DC power signal. / IF signal and DC power signal. The first frequency selector 418 transmits the PPM signal, the RF / IF signal, and the DC power signal to the receiver 420 through the cable 400.

The receiver 420 includes a second frequency selector 422, a received signal amplifier 424, a clock / control signal divider 426, a clock recovery circuit 428, and a PPM demodulator ( 430).

The second frequency selector 422 detects the PPM signal, the RF / IF signal, and the DC power signal from the signal received through the cable 400 based on the FDMA scheme. To this end, the second frequency selector 422 may include a plurality of filters for detecting the PPM signal, the RF / IF signal, and the DC power signal.

Meanwhile, the DC power signal detected by the second frequency selector 422 may be used for power supply of the receiver 420, and the RF / IF signal is transmitted to a separate component although not shown in FIG. 4. Can be demodulated. The PPM signal may be amplified by the received signal amplifier 424 and then input to the clock / control signal separator 426.

The clock / control signal separator 426 distinguishes a clock signal from a control signal based on a pulse timing position of the PPM signal. The clock signal is output to the clock recovery circuit 428, where the clock recovery circuit 428 is a phase locked loop (PLL) or a delay locked loop. The clock signal can be generated as a clock signal having a higher frequency by using a DLL (hereinafter referred to as "DLL"). The control signal output from the clock / control signal separator 426 and the clock signal output from the clock recovery circuit 428 may be demodulated and output by the PPM demodulator 430.

Meanwhile, in FIG. 4, the signal transmission / reception apparatus is illustrated as being implemented in separate units such as the transmitter 410 and the receiver 420, but the signal transmission / reception apparatus may be implemented as one processor. Of course it can.

In addition, in FIG. 4, the transmitter 410 is implemented as separate units such as the symbol generator 412, the PPM modulator 414, the transmission line driver 416, and the first frequency selector 418. Although the transmitter 410 is implemented, at least two of the symbol generator 412, the PPM modulator 414, the transmission line driver 416, and the first frequency selector 418 may be integrated. In addition, of course, the transmitter 410 may be implemented by one processor.

In addition, in FIG. 4, the receiver 420 includes the second frequency selector 422, the reception signal amplifier 424, the clock / control signal separator 426, the clock recovery circuit 428, and the PPM demodulator 430. Although illustrated as a separate unit, the receiver 420 may include the second frequency selector 422, the reception signal amplifier 424, the clock / control signal separator 426, and a clock recovery circuit ( 428 and at least two of the PPM demodulator 430 may be implemented in an integrated form. In addition, of course, the receiver 420 may be implemented as one processor.

In FIG. 4, an internal structure of a signal transmission / reception apparatus according to an exemplary embodiment of the present invention has been described. Next, an interior of the first frequency selector 418 and the second frequency selector 422 is described with reference to FIG. 5. Let's look at the configuration.

5 is a diagram schematically illustrating an internal configuration of the first and second frequency selectors according to an embodiment of the present invention.

Referring to FIG. 5, the first frequency selector 418 includes a first band selection filter 500, a second band selection filter 502, and a bias-T 504. The first band selection filter 500 detects and outputs an RF / IF signal among the signals input to the first frequency selector 418. The second band selection filter 502 detects and outputs a PPM signal among the signals input to the first frequency selector 418. In addition, the bias-T 504 detects and outputs a DC power signal among the signals input to the first frequency selector 418.

As shown in FIG. 6, since the RF / IF signal, the PPM signal, and the DC power signal are signals of different frequency bands, the first band selection filter 500, the second band selection filter 502, and the bias-T ( 504 may detect the corresponding signal using a filter based on a frequency band for each signal to be detected. 6 is a graph illustrating frequency bands of a DC power signal, a PPM signal, and an RF / IF signal according to an embodiment of the present invention. In particular, the DC power signal is a signal of a very low frequency band close to 0 GHz, and the RF / IF signal is a signal of a very high frequency band of 28 GHz to mmWave band, so there is little frequency interference between the DC power signal and the RF / IF signal The design of the filter can be very simple.

The signals output from the first band select filter 500, the second band select filter 502, and the bias-T 504 are transmitted to the second frequency selector 422 of the receiver 420 through the cable 400. Is sent.

The second frequency selector 422 includes a bias-T 506, a third band select filter 508, and a fourth band select filter 510. The bias-T 506 detects and outputs a DC power signal among the signals input to the second frequency selector 422. The third band selection filter 508 detects and outputs an RF / IF signal among the signals input to the second frequency selector 422. The fourth band selection filter 510 detects and outputs a PPM signal among the signals input to the second frequency selector 422.

Similar to the first band select filter 500, the second band select filter 502, and the bias-T 504 described above, the third band select filter 508, the fourth band select filter 510, and the bias The T 506 may detect the corresponding signal using a filter based on a frequency band for each signal to be detected.

Meanwhile, in FIG. 5, the first frequency selector 418 may be implemented as separate units such as the first band selection filter 500, the second band selection filter 502, and the bias-T 504. Although illustrated, the first frequency selector 418 may be implemented in an integrated form of at least two of the first band select filter 500, the second band select filter 502, and the bias-T 504. to be. In addition, the first frequency selector 418 may also be implemented as one processor.

In addition, in FIG. 5, the second frequency selector 422 is implemented as separate units such as the bias-T 506, the third band select filter 508, and the fourth band select filter 510. Although shown, the second frequency selector 422 may be implemented in an integrated form of at least two of the bias-T 506, the third band select filter 508, and the fourth band select filter 510. to be. In addition, the second frequency selector 422 may also be implemented by one processor. Meanwhile, the PPM signal output from the second frequency selector 422 may be amplified to provide a clock / control signal separator. 426 may be entered. Hereinafter, an internal configuration of the clock / control signal separator 426 will be described with reference to FIG. 7.

7 is a diagram schematically illustrating an internal configuration of a clock / control signal separator according to an embodiment of the present invention.

Referring to FIG. 7, clock / control signal divider 426 first includes a pulse detector 700, a sequential select finite state machine 702 using a toggle flip flop, and a clock divider ( divider) 704. When the PPM signal is input, the pulse detector 700 detects a pulse signal from the PPM signal. The pulse detector 700 determines the first generated pulse signal at every time interval (cycle) as a clock signal and the second generated pulse signal at every time interval as a control signal. Since the clock signal is a periodic signal generated at regular intervals, the timing position of the first pulse signal generated every time interval may be the same. Unlike this, the timing position of the second pulse signal generated every time period may be changed, and the control signal may have a value of 0 or 1 depending on the timing position.

The sequential selection finite state machine 702 changes an output value each time a pulse signal corresponding to the clock signal is input from the pulse detector 700. For example, the sequential selection finite state machine 702 outputs 0 (or 1) as a second output value when a pulse signal corresponding to the clock signal is input in a state in which 1 (or 0) is output as a first output value. can do. The output value of the sequential selection finite state machine 702 is used as the value of the clock signal.

When the clock divider 704 outputs a clock signal having a value generated by the sequential selection finite state machine 702, the clock divider 704 detects signals sequentially generated in response to only the rising edge of the clock signal. If a clock signal and two or more data are sent, a finite state machine may select not only a toggle flip-flop but also three or more pulse signals sequentially.

In FIG. 7, the clock / control signal divider 426 is illustrated as being implemented in separate units such as the pulse detector 700, the sequential selection finite state machine 702, and the clock divider 704. The clock / control signal separator 426 may be implemented in an integrated form of at least two of the pulse detector 700, the sequential selection finite state machine 702, and the clock divider 704. In addition, the clock / control signal separator 426 may be implemented by one processor.

In FIG. 7, an internal configuration of the clock / control signal separator according to an embodiment of the present invention has been described. Next, a clock signal and a control signal detected from a PPM signal according to an embodiment of the present invention will be described with reference to FIG. 8. This will be described.

8 illustrates a clock signal and a control signal detected from a PPM signal according to an embodiment of the present invention.

When the PPM signal as shown in (a) of FIG. 8 is input, the clock signal 800 and the control signal 810 are generated by the clock / control signal separator 426 as shown in (b) of FIG. 8. Are distinguished. In detail, in FIG. 8A, the first pulse signal generated every time period is detected as the clock signal 800, and the clock signal 800 may be detected for each preset period TCLK. In addition, the value of the clock signal 800 may be a value in which 0 and 1 (or 1 and 0) are repeated by the toggle flip-flop 702 in the clock / control signal separator 426.

In FIG. 8A, a second pulse signal generated every time period is detected as a control signal 810, and the control signal 810 has a value of 0 or 1. For example, a pulse signal generated after a first time from a time when a pulse signal corresponding to the clock signal 800 occurs in each time period may represent a control signal of 0, and corresponds to the clock signal 800. The pulse signal generated after the second time from the time when the pulse signal is generated may represent a control signal of one. The first time and the second time represent different times, and the first time may be larger or smaller than the second time. 8A and 8B show a case where the first time is smaller than the second time.

In the above description, the control signal is binary encoded. However, in order to increase the data rate, the control signal may be n-ary encoded. In this case, n bits may be transmitted as the value of the control signal for each time period. For example, instead of one bit being transmitted as the value of the control signal for each time period as shown in FIG. 8, two bits are transmitted as the value of the control signal for each time period as shown in FIG. 9. Can be.

8 illustrates a clock signal and a control signal detected from a PPM signal according to an embodiment of the present invention. Next, two bits are controlled for each time period according to an embodiment of the present invention with reference to FIG. 9. An example of transmitting as a signal will be described.

9 is a diagram illustrating an example in which two bits are transmitted as control signals in each time period according to an embodiment of the present invention.

9, a pulse signal generated after a first time, a pulse signal generated after a second time, a pulse signal generated after a third time, and a fourth time after a pulse signal corresponding to a clock signal is generated for each time period. The pulse signal generated after the time may represent control signals of 00, 01, 10, and 11, respectively. The first to fourth hours may represent different times from each other and may be, for example, "first time <second time <third time <fourth time".

In FIG. 9, a control signal having a value of "00, 01, 11, 00" is transmitted as an example. As such, when two bits are transmitted during one time period, the data rate may be improved due to a higher data transmission rate than when one bit is transmitted. In addition, the pulse signal for the PPM signal can be generated more precisely, so the clock / control signal separator 426 detects the clock signal with better performance than when a control signal having one bit value is transmitted. Restoration may be required.

In FIG. 9, an example in which two bits are transmitted as a control signal in each time period according to an embodiment of the present invention has been described. Next, the symmetrical execution according to an embodiment of the present invention will be described with reference to FIG. 10. An example of the bidirectional transmission will be described.

10 illustrates an example of bidirectional transmission performed symmetrically according to an embodiment of the present invention.

Referring to FIG. 10, in one embodiment of the present invention, since a control signal is multiplexed at a time different from the time when the clock signal is transmitted while the clock signal is always transmitted, bidirectional communication is possible. The clock signal may be transmitted periodically and a control signal (or data) may be transmitted regardless of the transmission of the clock signal. For example, a time slot for transmission (TX) and a time slot for reception (RX) are allocated after a time slot to which a clock signal is allocated in each time period, thereby enabling bidirectional transmission of the transmitter and the receiver. Here, it can be seen that both the transmitter and the receiver have the same data rate by transmitting data having a value of 1 bit, and thus bidirectional transmission shown in FIG. 9 is performed symmetrically.

10 illustrates an example of bidirectional transmission performed symmetrically according to an embodiment of the present invention. Next, referring to FIG. 11, a bidirectional transmission performed asymmetrically according to an embodiment of the present invention. An example will be described.

11 illustrates an example of bidirectional transmission performed asymmetrically according to an embodiment of the present invention.

Referring to FIG. 11, when the transmitter and the receiver have different data rates, asymmetric bidirectional transmission may be performed. For example, when the data rate of the transmitter is twice as large as that of the receiver, the transmitter transmits two bits per two time periods and the receiver transmits one bit per one time period. have.

As described above, according to an embodiment of the present invention, bidirectional communication of the transmitter and the receiver is possible, and even when data rates of the transmitter and the receiver are different, it is possible to easily perform the bidirectional communication. In addition, the number of bits that can be transmitted by the transmitter and the receiver may be variously set during one time period, and the time slot is allocated to allow the N transmitter to perform N transmissions after the N transmitters are performed. Various time slot allocation methods can be implemented. In this case, you need a finite state machine that sequentially selects two or more pulse signals rather than a toggle flip-flop.

According to an embodiment of the present invention, the link may be variously designed according to the data transmission speed of the transmitter and the receiver and the performance of a desired clock signal. The optimal time division design depends on the frequency plan and the required data transfer rate. The bit error rate (BER) of the link improves as the interval between the pulse signals increases, but in this case, the maximum data transfer rate is lowered.

Meanwhile, when transmitting a clock signal and a control signal based on the TDMA scheme, the connection structure between the RFA and the RFB in the terminal may be a bus structure. This will be described in detail with reference to FIG. 12.

12 is a diagram illustrating a connection structure between an RFA and an RFB according to an embodiment of the present invention.

When a signal transmission / reception method based on a general frequency division scheme is used, as shown in FIG. 12A, an RFB 1200 transmitting a signal should perform a signal transmission operation as many as the number of RFAs that should receive the signal. do. That is, the RFB 1200 must perform four signal transmission operations through a cable connected to each of the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240. .

However, when a method of multiplexing and transmitting a control signal and a clock signal based on a TDMA scheme according to an embodiment of the present invention is used, the RFB 1200 is based on a bus structure as shown in FIG. Even if one signal transmission operation is performed, it is possible to receive a corresponding signal from each of the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240. The bus structure includes a transmission line of the RFB 1200 connected to a single line to which the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240 are connected. Represents a structure.

The RFB 1200 transmits a clock signal as a signal common to all of the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240, thereby synchronizing between the RFAs. The control signal for each of the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240 may be allocated to different time slots and transmitted. Each of the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240 may be configured to receive a corresponding signal in a time slot allocated thereto.

Next, a signal transmitted from RFB to RFAs will be described based on a bus structure according to an embodiment of the present invention with reference to FIG. 13.

13 illustrates a signal transmitted from RFB to RFAs based on a bus structure according to an embodiment of the present invention.

As shown in FIG. 13A, the RFB 1200, the first RFA 1210, and the second RFA 1220 may be connected in a bus structure. In this case, the RFB 1200 transmits a PPM signal as shown in FIG. 13B to the first RFA 1210 and the second RFA 1220.

Specifically, the clock signal is a signal commonly used in the first RFA 1210 and the second RFA 1220, and the first RFA 1210 and the second RFA 1220 are the clock signals from the PPM signal. Detects and performs a synchronization operation.

In addition, a control signal for each of the first RFA 1210 and the second RFA 1220 is allocated to time slots located after time slots in which the clock signal is transmitted in each time period, thereby allowing the first RFA 1210 to be allocated. And the second RFA 1220 each receive a control signal of a time slot allocated correspondingly thereto. The time slots allocated corresponding to each of the first RFA 1210 and the second RFA 1220 are different from each other. In FIG. 13B, the time slots A corresponding to the first RFA 1210 are allocated. ) Is preceded by the time slot B allocated corresponding to the second RFA 1220.

Meanwhile, in FIG. 13, the RFB 1200, the first RFA 1210, and the second RFA 1220 are connected to each other in a bus structure, but as illustrated in FIG. 12, the RFB 1200 is connected to the RFB 1200. When the first RFA 1210, the second RFA 1220, the third RFA 1230, and the fourth RFA 1240 are connected in a bus structure, the first RFA 1210 in FIG. 13B is connected to each other. ) And time slots allocated corresponding to the third RFA 1230 and the fourth RFA 1240 may be added in addition to the time slots A and B allocated to the second RFA 1220. have.

13 illustrates a signal transmitted from RFB to RFAs based on a bus structure according to an embodiment of the present invention. Next, a waveform of a pulse signal according to an embodiment of the present invention will be described with reference to FIG. 14. Let's explain.

14 is a view showing a waveform of a pulse signal according to an embodiment of the present invention.

The pulse signal used as the unit symbol may have various waveforms according to an application. The frequency component of the PPM signal according to an embodiment of the present invention depends on the waveform of the pulse signal and the pulse repetition frequency (PRF). Therefore, pulse signals having different waveforms may be used depending on the intended use.

For example, when the transmission of the DC power signal is not necessary (i.e., the transmission of the clock signal and the control signal to the region where the frequency is zero), a mono-pulse as shown in Fig. 14A. Pulsed signals with waveforms can be used.

When a DC power signal is required to be transmitted, a DC balanced symbol should be used. As a result, bi-pulse or multi-period pulses as shown in FIGS. 14B and 14C may be used. pulse) waveform can be used.

The waveform of the pulse signal to be used may be determined in consideration of the data transmission rate. In order to increase the data transmission rate, a pulse signal having a mono pulse waveform having a short symbol duration may be used. When the pulse signal having the mono pulse waveform is used, the amount of power consumed can be reduced.

As the width of the pulse signal is narrower, it can be viewed as a wide band signal. Therefore, when multiple signals are mixed or the frequency of the RF signal is low to reduce the bandwidth, a pulse signal having a multi-period pulse waveform may be used.

When a pulse signal having the multi-period pulse waveform is used, the spectrum of the pulse signal is substantially narrowed, so that interference with other signals can be reduced. However, as the generation period of the pulse signal is increased, the overall data rate is lowered and the amount of power consumed is also increased.

As mentioned above, since the pulse signal has different characteristics according to its waveform, it is important to determine a pulse signal having an appropriate waveform according to a given application or purpose of use. This will be described with reference to FIG. 15.

Referring to FIG. 15, in step 1500, the transmitter controls a control signal based on whether to set a frequency limit (eg, the lowest frequency limit) in consideration of whether a DC power signal is transmitted, a carrier frequency of an RF / IF signal, and interference. Determine the maximum bandwidth available for.

The transmitter determines a symbol duration for one bit according to which of the data transmission rate, bidirectional and unidirectional transmission required in step 1502 is performed. The step 1502 may be performed before the 1500 step.

The transmitter determines a waveform of a pulse signal to be used based on the determined maximum bandwidth and symbol duration in step 1504. That is, the transmitter determines one of the mono pulse waveform, the bi pulse waveform, and the multi-period pulse waveform.

The determination method as described above may be performed once initially or adaptively depending on the link situation. In the latter case, the transmitter and receiver are connected by one cable and implemented to use a pulse signal having the mono pulse waveform, the bi pulse waveform, and the multi-period pulse waveform. Having a pulse signal can be selected and used.

For example, when the control speed needs to be high for beam calibration operation and automatic gain control operation, the transmitter may transmit a pulse signal of a waveform having a high data transmission speed and suitable for unidirectional transmission. . The transmitter may transmit a pulse signal having a waveform suitable for the case where the data transmission speed is slow when the control speed needs to be slow due to entering a power saving mode. Since the data transmission speed and the amount of power consumed vary depending on the waveform of each pulse signal, the overhead of the entire system can be reduced when the optimal pulse signal is selected and used.

Meanwhile, although FIG. 15 illustrates a process of determining a waveform of a pulse signal according to an embodiment of the present disclosure, various modifications may be made to FIG. 15. For example, although successive steps are shown in FIG. 15, the steps described in FIG. 15 may overlap, occur in parallel, occur in a different order, or occur multiple times.

Certain aspects of the present invention may also be embodied as computer readable code on a computer readable recording medium. A computer readable recording medium is any data storage device capable of storing data that can be read by a computer system. Examples of the computer readable recording medium include read only memory (ROM), and random access memory (RAM). And, compact disk-read only memory (CD-ROMs), magnetic tapes, floppy disks, optical data storage devices, and carrier wave carrier waves (such as data transmission over the Internet). The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. In addition, functional programs, code, and code segments for achieving the present invention can be easily interpreted by those skilled in the art to which the present invention is applied.

In addition, it will be appreciated that the apparatus and method according to an embodiment of the present invention may be realized in the form of hardware, software, or a combination of hardware and software. Any such software may be, for example, volatile or nonvolatile storage, such as a storage device such as a ROM, whether or not removable or rewritable, or a memory such as, for example, a RAM, a memory chip, a device or an integrated circuit. Or, for example, on a storage medium that is optically or magnetically recordable, such as a compact disk (CD), DVD, magnetic disk or magnetic tape, and which can be read by a machine (eg computer). have. The method according to an embodiment of the present invention may be implemented by a computer or a portable terminal including a control unit and a memory, wherein the memory is suitable for storing a program or programs including instructions for implementing embodiments of the present invention. It will be appreciated that this is an example of a machine-readable storage medium.

Accordingly, the present invention includes a program comprising code for implementing the apparatus or method described in any claim herein and a storage medium readable by a machine (such as a computer) storing such a program. In addition, such a program can be transferred electronically through any medium, such as a communication signal transmitted over a wired or wireless connection, and the invention suitably includes equivalents thereof.

In addition, the apparatus according to an embodiment of the present invention may receive and store the program from a program providing apparatus connected by wire or wirelessly. The program providing apparatus includes a memory for storing a program including instructions for causing the program processing apparatus to perform a preset signal transmission / reception method, information necessary for a signal transmission / reception method, and wired or wireless communication with the graphic processing apparatus. A communication unit for performing and a control unit for automatically transmitting the program or the corresponding program to the request or the graphics processing unit.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the scope of the following claims, but also by the equivalents of the claims.

Claims

In the signal transmission method of the radio frequency (RF) processing apparatus,

Generating a pulse signal including a clock signal and a control signal for synchronizing with another RF processing device connected through one interface;

Transmitting at least one of the pulse signal, an RF signal for communication with a base station, and a power signal for power supply of the other RF processing apparatus to the other RF processing apparatus,

The clock signal and the control signal are allocated to different time units,

And the pulse signal, the RF signal and the power signal are signals of different frequency bands.
The method of claim 1,

The clock signal is periodically assigned to a preset time unit,

The control signal is assigned to one of a plurality of time units based on the value included in the control signal,

And the plurality of time units are time units included between time units to which the clock signal is allocated.
The method of claim 2,

And the control signal is assigned to one of the time units except for the time unit allocated for receiving data from the other RF processing apparatus among the plurality of time units.
The method of claim 1,

When there are a plurality of other RF processing apparatuses, the clock signal is periodically assigned to a predetermined time unit,

The control signal generated corresponding to each of the plurality of other RF processing apparatuses is assigned to a time unit designated for each of the plurality of other RF processing apparatuses among the plurality of time units,

And the plurality of time units includes time units included between time units to which the clock signal is assigned.
The method of claim 4, wherein

A pulse signal including a clock signal and a control signal generated corresponding to each of the plurality of other RF processing apparatuses is transmitted to each of the plurality of other RF processing apparatuses through the one interface,

The one interface comprises a transmission line connected to a single line to which the plurality of other RF processing devices are connected.
The method of claim 1,

The pulse signal has a pulse waveform determined based on a maximum bandwidth available for the control signal and a transmission duration,

Wherein the pulse waveform comprises one of a mono pulse, a bi pulse, and a multi-period pulse.
The method of claim 6,

The maximum bandwidth is determined based on whether to transmit the power signal, the frequency to use to transmit the RF signal, and the lowest frequency that can be used for the control signal,

The transmission duration is determined based on the transmission rate of the control signal, whether the unidirectional transmission is performed by the RF processing apparatus or the bidirectional transmission by the RF processing apparatus and the other RF processing apparatus. Signal transmission method of the processing device.
In the method of receiving a signal of a radio frequency (RF) processing apparatus,

A pulse signal including a clock signal and a control signal for obtaining synchronization with another RF processing device, connected through one interface, an RF signal for communication with a base station, and power for powering an RF processing device. Receiving at least one of the signals from the other RF processing apparatus,

And the clock signal and the control signal are allocated to different time units, and the pulse signal, the RF signal, and the power signal are signals of different frequency bands.
The method of claim 8,

The clock signal is periodically assigned to a preset time unit,

The control signal is assigned to one of a plurality of time units based on the value included in the control signal,

And said plurality of time units comprises time units included between time units to which said clock signal is assigned.
The method of claim 9,

The control signal is a signal of the RF processing device, characterized in that for assigning one of the remaining time units of the plurality of time units, except for the time unit is allocated for transmitting data to the other RF processing device; Receiving method.
The method of claim 8,

The clock signal is periodically assigned to a predetermined time unit and is commonly used for a plurality of RF processing devices connected to the other RF processing device, including the RF processing device.

The control signal is assigned to a time unit designated for the second RF processing apparatus of a plurality of time units,

And said plurality of time units comprises time units included between time units to which said clock signal is assigned.
The method of claim 11,

The pulse signal including the clock signal and a control signal generated corresponding to each of the plurality of RF processing apparatuses is transmitted to each of the plurality of RF processing apparatuses through the one interface,

The one interface includes a transmission line connected to a single line to which the plurality of RF processing devices are connected.
The method of claim 8,

The pulse signal has a pulse waveform determined based on a maximum bandwidth available for the control signal and a transmission duration,

Wherein the pulse waveform is one of a mono pulse, a bi pulse, and a multi-period pulse.
The method of claim 13,

The maximum bandwidth is determined based on whether to transmit the power signal, the frequency to use to transmit the RF signal, and the lowest frequency that can be used for the control signal,

The transmission duration is determined based on the transmission rate of the control signal, whether the unidirectional transmission is performed by the other RF processing device or the bidirectional transmission by the other RF processing device and the RF processing device. Signal receiving method of RF processing apparatus.
In the radio frequency (RF) processing apparatus,

A pulse signal generator for generating a pulse signal including a clock signal and a control signal for synchronizing with another RF processing device, connected through one interface;

A transmitter for transmitting at least one of the pulse signal, an RF signal for communication with a base station, and a power signal for power supply of the other RF processing apparatus to the other RF processing apparatus,

The clock signal and the control signal are allocated to different time units,

And the pulse signal, the RF signal, and the power signal are signals of different frequency bands.
The method of claim 15,

The clock signal is periodically assigned to a preset time unit,

The control signal is assigned to one of a plurality of time units based on the value included in the control signal,

And the plurality of time units includes time units included between time units to which the clock signal is assigned.
The method of claim 16,

And the control signal is assigned to one of the plurality of time units except for the time unit allocated for receiving data from the other RF processing device.
The method of claim 15,

When there are a plurality of other RF processing apparatuses, the clock signal is periodically assigned to a predetermined time unit,

A control signal generated corresponding to each of the plurality of other RF processing devices is assigned to a time unit designated for each of the plurality of other RF processing devices among the plurality of time units,

And the plurality of time units includes time units included between time units to which the clock signal is assigned.
The method of claim 18,

A pulse signal including a clock signal and a control signal generated corresponding to each of the plurality of other RF processing apparatuses is transmitted to each of the plurality of other RF processing apparatuses through the one interface,

And the one interface comprises a transmission line connected to a single line to which the plurality of RF processing devices are connected.
The method of claim 15,

The pulse signal has a pulse waveform determined based on a maximum bandwidth available for the control signal and a transmission duration,

The pulse waveform is one of a mono pulse, a bi pulse, and a multi-period pulse.
The method of claim 20,

The maximum bandwidth is determined based on whether to transmit the power signal, the frequency to use to transmit the RF signal, and the lowest frequency that can be used for the control signal,

The transmission duration is determined based on the transmission rate of the control signal, whether the unidirectional transmission is performed by the RF processing apparatus or the bidirectional transmission by the RF processing apparatus and the other RF processing apparatus. Processing unit.
In the radio frequency (RF) processing apparatus,

A pulse signal including a clock signal and a control signal for synchronizing with another RF processing device, connected through one interface, an RF signal for communication with a base station, and a power supply for the RF processing device. Receiving unit for receiving at least one of the power signal from the other RF processing device,

The clock signal and the control signal are allocated to different time units, and the pulse signal, the RF signal, and the power signal are signals of different frequency bands.
The method of claim 22,

The clock signal is periodically assigned to a preset time unit,

The control signal is assigned to one of a plurality of time units based on the value included in the control signal,

And the plurality of time units includes time units included between time units to which the clock signal is assigned.
The method of claim 23,

And the control signal is assigned to one of the plurality of time units except for the time unit in which the RF processing device is allocated to transmit data to the other RF processing device.
The method of claim 24,

The clock signal is periodically assigned to a predetermined time unit and is commonly used for a plurality of RF processing devices connected to the other RF processing device including the RF processing device.

The control signal is assigned to a time unit designated for the RF processing apparatus among a plurality of time units,

And the plurality of time units includes time units included between time units to which the clock signal is assigned.
The method of claim 25,

The pulse signal including the clock signal and a control signal generated corresponding to each of the plurality of RF processing apparatuses is transmitted to each of the plurality of RF processing apparatuses through the one interface,

And the one interface comprises a transmission line connected to a single line to which the plurality of RF processing devices are connected.
The method of claim 22,

The pulse signal has a pulse waveform determined based on a maximum bandwidth available for the control signal and a transmission duration,

The pulse waveform is one of a mono pulse, a bi pulse, and a multi-period pulse.
The method of claim 27,

The maximum bandwidth is determined based on whether to transmit the power signal, the frequency to use to transmit the RF signal, and the lowest frequency that can be used for the control signal,

The transmission duration is determined based on the transmission rate of the control signal, whether the unidirectional transmission is performed by the other RF processing device or the bidirectional transmission by the other RF processing device and the RF processing device. RF processing unit.