WO2015169049A1 - 一种微波传输的容错性方法和装置、计算机可读存储介质 - Google Patents

一种微波传输的容错性方法和装置、计算机可读存储介质 Download PDF

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Publication number
WO2015169049A1
WO2015169049A1 PCT/CN2014/088228 CN2014088228W WO2015169049A1 WO 2015169049 A1 WO2015169049 A1 WO 2015169049A1 CN 2014088228 W CN2014088228 W CN 2014088228W WO 2015169049 A1 WO2015169049 A1 WO 2015169049A1
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Prior art keywords
data
packet
bitmap
crc code
eth
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PCT/CN2014/088228
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English (en)
French (fr)
Inventor
冯刚
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深圳市中兴微电子技术有限公司
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Application filed by 深圳市中兴微电子技术有限公司 filed Critical 深圳市中兴微电子技术有限公司
Priority to US15/309,559 priority Critical patent/US20170187492A1/en
Priority to EP14891259.5A priority patent/EP3142277B1/en
Publication of WO2015169049A1 publication Critical patent/WO2015169049A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers

Definitions

  • the present invention relates to the field of microwave transmission, and in particular, to a fault tolerance method and apparatus for microwave transmission, and a computer readable storage medium.
  • the payload data in the timeslot data in the radio frame in the conventional microwave transmission system is divided into Time Division Multiplexing (TDM) and Media Access Control Protocol Data Unit (MAC PDU).
  • the MAC PDU represents Ethernet (ETH, Ethernet) data; in addition, the time slot data also contains bitmap data, and the bitmap data is used to indicate the slice structure of the current TDM data; however, when the bitmap data appears In the case of an error, not only the TDM data is affected, but also the header of the MAC PDU cannot be correctly identified. The error will continue in the radio frame and the data cannot be transmitted normally.
  • the embodiments of the present invention mainly provide a fault tolerance method and apparatus for microwave transmission, and a computer readable storage medium.
  • Embodiments of the present invention provide a fault tolerance method for microwave transmission, where the fault tolerance method includes:
  • the check result of the bitmap CRC code is detected, and the service data after the bitmap CRC code is processed according to the check result.
  • the length of the bitmap data is 1 byte, and the value represents a fragment structure of time division multiplexed TDM data in the slot data;
  • the added bitmap CRC code has a length of 1 byte and is used for verifying the bitmap data.
  • the detecting the verification result of the bitmap CRC code, and processing the service data after the bitmap CRC code according to the verification result includes: detecting the bitmap data and the bitmap CRC code, and using the CRC school
  • the verification principle calculates the data composed of the bitmap data and the bitmap CRC code to obtain the verification result of the bitmap CRC code, and when the verification result of the bitmap CRC code is an error, the bitmap data is represented.
  • error all the service data after the bitmap CRC code is treated as Ethernet ETH data; when the check result of the bitmap CRC code is correct, it indicates that the bitmap data is correct, and the service data after the bitmap CRC code is used. Normal backward transmission.
  • the service data after the bitmap CRC code is all treated as ETH data to be processed: when the receiving baseband device detects the bitmap CRC code check error, the first 16 of the bitmap CRC code is followed.
  • Bit data as a media access control header file MAC header in the media access control protocol data unit MAC PDU, parsing the MAC header to obtain fragmentation information of the payload data in the MAC PDU; according to the payload data in each MAC PDU The fragmentation information is grouped, the result of the group packet is stored and reorganized, and the reassembled data packet is output and verified.
  • the MAC PDU includes: a MAC header and payload data;
  • the MAC header has a length of 16 bits.
  • the first 2 bits represent fragmentation information of the payload data, and are used to indicate fragments in an ETH packet to which the payload data belongs.
  • the fragment is: a packet header, a packet. Intermediate, end-of-packet or complete packet; the middle 11 bits of the MAC header indicate the length of the payload data; the last 3 bits of the MAC header indicate other types of services that need to be transmitted over the ETH channel;
  • the payload data is up to 2048 bits.
  • the grouping according to the fragmentation information of the payload data in each MAC PDU is: obtaining each fragment in the ETH data packet according to the fragmentation information, and forming each fragment into a complete ETH data packet, obtaining the The packet length and packet data of the ETH packet.
  • the storing and reorganizing the result of the group packet is: storing the packet length and the packet data of the ETH data packet in two first-in first-out FIFO storage units respectively; and outputting in the FIFO storage unit
  • the terminal reorganizes the data in the FIFO storage unit according to the packet length and the packet data to obtain a complete ETH packet.
  • the outputting and verifying the reassembled data packet is: performing output and CRC check on the ETH data packet obtained by the recombination, and clearing the packet analysis result and the FIFO storage unit when the verification error occurs.
  • the stored data, the output data is cleared, and the MAC header of the header in the ETH packet in the next slot data is detected for packetization.
  • the embodiment of the present invention further provides a fault tolerance device for microwave transmission, where the fault tolerance device includes: a check code adding module and a processing module; wherein
  • a check code adding module configured to add a bitmap cyclic redundancy check CRC code after the bitmap data in the radio frame time slot data
  • the processing module is configured to detect a verification result of the bitmap CRC code, and process the service data after the bitmap CRC code according to the verification result.
  • bitmap CRC code has a length of 1 byte, and is used for verifying the bitmap data.
  • the bitmap data is used to represent a slice structure of time division multiplexed TDM data in the slot data, and has a length of 1 byte.
  • the processing module includes: a CRC detection submodule and a data processing submodule; wherein
  • a CRC detection submodule configured to detect the bitmap data and the bitmap CRC code, and perform calculation on the data composed of the bitmap data and the bitmap CRC code by using a CRC check principle to obtain a calibration of the bitmap CRC code Test result
  • the data processing submodule is configured to: when the verification result of the bitmap CRC code is an error, process the service data after the bitmap CRC code as Ethernet ETH data; when the bitmap CRC code When the verification result is correct, the service data after the bitmap CRC code is normally transmitted backward.
  • the data processing sub-module is configured to: when the bitmap CRC code verification result is incorrect, use the first 16-bit data immediately following the bitmap CRC code as the media access control protocol data unit MAC PDU.
  • the media access control header file MAC header parses the MAC header to obtain fragmentation information of the payload data in the MAC PDU; performs grouping according to the fragmentation information of the payload data in each MAC PDU, and stores the result of the packet And reorganization, output and check the reassembled data packet.
  • the MAC PDU includes: a MAC header and payload data;
  • the MAC header has a length of 16 bits.
  • the first 2 bits represent fragmentation information of the payload data, and are used to indicate fragments in an ETH packet to which the payload data belongs.
  • the fragment is: a packet header, a packet. Intermediate, end-of-package or complete packet; the middle 11 bits of the MAC header indicate the length of the payload data; the last 3 bits of the MAC header indicate other types of services that need to be transmitted through the ETH channel;
  • the payload data is up to 2048 bits.
  • the data processing sub-module is configured to: when grouping packets according to the fragmentation information of the payload data in each MAC PDU, obtain each fragment in the ETH data packet according to the fragmentation information, and divide each fragment.
  • the slices constitute a complete ETH packet, and the packet length and packet data of the ETH packet are obtained.
  • the data processing sub-module is configured to store the packet length and the packet data of the ETH data packet in two first-in first-out FIFO storage units respectively when storing and reorganizing the result of the group packet;
  • the data in the FIFO storage unit is recombined according to the packet length and the packet data at the output end of the FIFO storage unit to obtain a complete ETH data packet.
  • the data processing sub-module is configured to output and check the ETH data packet obtained by the recombination when the reassembled data packet is output and verified, when the verification error occurs.
  • the packet analysis result and the data stored by the FIFO storage unit are cleared, the output data is cleared, and the MAC header of the packet header in the ETH packet in the next slot data is detected to be a packet.
  • the embodiment of the present invention further provides a computer readable storage medium, the storage medium comprising a set of computer executable instructions for performing a fault tolerance method for microwave transmission according to an embodiment of the present invention.
  • the receiving baseband device adds a cyclic redundancy check (CRC, Cyclic) after the bitmap data in the radio frame time slot data.
  • Redundancy Check code detecting the verification result of the bitmap CRC code, and processing the service data after the bitmap CRC code according to the check; thus, as long as the key information of the radio frame in the microwave system is correct, it can be built
  • the chain greatly shortens the link-building time, and with only a small amount of redundancy check, the minimum data loss can be achieved without losing the correct TDM data and ETH data, and only transmitting a wrong time slot data backwards.
  • the ETH packet in.
  • FIG. 1 is a schematic structural diagram of a radio frame according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of one slot data in a conventional radio frame
  • FIG. 3 is a schematic flowchart of a fault tolerance method for microwave transmission according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of time slot data added with a bitmap CRC code according to an embodiment of the present invention
  • FIG. 5 is a schematic structural diagram of a MAC header according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of a state machine when implementing the solution provided by the present invention according to an embodiment of the present invention.
  • FIG. 7 is a schematic flowchart of processing an ETH data according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram of a fault tolerance device for microwave transmission according to an embodiment of the present invention.
  • the receiving baseband device adds the bitmap data in the radio frame time slot data. Adding a bitmap CRC code, detecting the result of the bitmap CRC code, and processing the service data after the bitmap CRC code according to the verification result.
  • the radio frame structure shown in FIG. 1 is that the preamble and the frame number in front of the frame are inserted in the receiving link.
  • the method and apparatus provided by the embodiments of the present invention focus on the slot data behind the preamble and the frame number, in a radio frame. There are multiple time slot data, and the time slot data is followed by a CRC check code. When all the data is not enough for one frame length, the padding data at the end of the frame is used to complement the frame length.
  • FIG. 2 shows the structure of the existing time slot data.
  • the time slot data is divided into TDM data and ETH data (represented by MAC PDU); wherein the TDM data is divided into four types: EOW, E1.
  • AU-4 and SOH in the traffic service, the EOW occupies a fixed bandwidth, and uses one of E1, AU-4, and SOH to transmit TDM data. How much E1, AU-4, or SOH is supported by the TDM data is based on The transmission bandwidth configuration is determined; for example, when the transmission bandwidth is 28M, the system supports up to 75 E1, or 2 AU-4, or 2 SOH; the bitmap data indicates which TDM data is sequentially transmitted in the current slot data.
  • the bitmap data is 10100001, where the value is 1 Indicates the fragment of E1, that is, the first E1 fragment is the first path of the following data, the second E1 fragment is the third way, and the third E1 fragment is the eighth way; if the slot data is excluded
  • the TDM data also has the remaining transmittable data margin, which is used to transmit ETH data (represented by MAC PDU); the MAC PDU is divided into a MAC header and a payload data; Data time slots may have a plurality of MAC PDU, when data is not a fixed slot data length of padding data added.
  • the bitmap data when the bitmap data is wrong, it not only affects the TDM data, but also affects the following ETH data; for example, the correct bitmap data is 10100001, but an error occurs during transmission.
  • 10100100 the original meaning is that the first, third, and eighth roads are TDM data, but now the first, third, and sixth roads are TDM data, which affects the correctness of the TDM data, and the ETH immediately following the TDM data. The data is also not recognized correctly, it was originally used for the table.
  • the error of the bitmap data causes the receiving device to consider the MAC PDU immediately after the 6th TDM data, and the error will be transmitted and cannot be recovered. The data is transmitted correctly.
  • FIG. 3 A schematic flowchart of a fault tolerance method for microwave transmission according to an embodiment of the present invention is shown in FIG. 3, and the fault tolerance method mainly includes the following steps:
  • the receiving baseband device adds a bitmap CRC code after the bitmap data in the radio frame slot data.
  • the length of the bitmap data is 1 byte, and the value represents a fragment structure of time division multiplexed TDM data in the slot data;
  • the added bitmap CRC code has a length of 1 byte, and the bitmap data is verified immediately after the bitmap data;
  • Figure 4 is a schematic diagram showing the structure of the time slot data with the bitmap CRC code added after the bitmap data.
  • the bitmap CRC code is one byte larger than the time slot data shown in Figure 2.
  • the bitmap CRC code is used for calibration. Check the correctness of the bitmap data.
  • Step 302 Receive a baseband device to detect a result of the bitmap CRC code, and process the service data after the bitmap CRC code according to the verification result;
  • the bitmap data and the bitmap CRC code in the received slot data are detected, and the data composed of the bitmap data and the bitmap CRC code is calculated by using a CRC check principle to obtain the bitmap CRC code.
  • the verification result when the verification result of the bitmap CRC code is an error, indicates that the bitmap data is incorrect, and the service data after the bitmap CRC code is all treated as ETH data, that is, regardless of the bitmap CRC code Actually followed by TDM data or MAC PDU, both are treated as ETH data; when the verification result of the bitmap CRC code is correct, the service data after the bitmap CRC code is normally transmitted backward, that is, the bit After the CRC code is actually followed by what data, it is normally transmitted backwards in the corresponding data processing method;
  • the above CRC check principle is specifically: when adding a bitmap CRC code, a generator polynomial is selected, and the bitmap data is shifted to the left by 8 bits (the number of bits of the CRC code is shifted to the left), and the division is divided by the modulo 2 division.
  • the remainder obtained by the polynomial is the CRC code; the 16-bit data composed of the received bitmap data and the bitmap CRC code is divided by the modulo-2 division by the generator polynomial, and can be divided to indicate that the verification result is correct, otherwise, the school is indicated.
  • the test result is wrong;
  • the processing of all the service data behind the bitmap CRC code as ETH data is specifically: when the CRC code check error of the bitmap data is detected, the first 16 bits immediately following the CRC code are entered as the MAC PDU.
  • the MAC header is parsed to obtain the fragmentation information of the payload data in the MAC PDU; the fragmentation information of the payload data in each MAC PDU is grouped, and the result of the packet is stored and reorganized. Output and verify the reassembled data packet;
  • the MAC PDU includes two parts: a MAC header and payload data;
  • the MAC header has a length of 16 bits, wherein the first 2 bits represent fragmentation information of the payload data, and are used to indicate a fragment in an ETH packet to which the payload data belongs.
  • the slice is: header, packet middle, end of packet or complete packet; for example, 00 indicates that the payload data belongs to the header of the ETH packet, 01 indicates that it belongs to the middle of the packet, 10 indicates that it belongs to the end of the packet, and 11 indicates that it is a complete packet;
  • To indicate the length of the payload data that is, the payload data has a maximum of 2048 bits, and the last 3 bits of the MAC header indicate other types of services that need to be transmitted through the ETH channel; for example, the middle 11 bits of the MAC header are 00000001111, indicating the MAC header.
  • the payload data length is 15 bits, that is, the 15 bits of data immediately following the MAC header are the payload data of the current MAC PDU;
  • the grouping according to the fragmentation information of the payload data in each MAC PDU is: obtaining each fragment in the ETH data packet according to the fragmentation information, and forming each fragment into a complete ETH data packet to obtain the ETH data. Packet length and packet data;
  • the payload data in the three different MAC PDUs is the header, the middle of the packet, and the tail of the ETH packet, and the payload data of the three MAC PDUs can be combined to form a complete ETH packet. It is also possible that the header, the end of the packet or the middle of the packet are distributed in different MACs. In the PDU; moreover, an ETH packet may be carried in multiple time slot data, which is determined by the specific situation;
  • the foregoing results of storing and reorganizing the packet are: storing the packet length and the packet data of the ETH packet in two first-in first-out (FIFO) storage units; and outputting the output in the FIFO storage unit according to The packet length and the packet data recombine the data in the FIFO storage unit to obtain a complete ETH data packet;
  • FIFO first-in first-out
  • the outputting and verifying the reassembled data is specifically: outputting and CRC checking the ETH data packet obtained by the recombination, and clearing the packet analysis result and the data stored by the FIFO storage unit when the verification error occurs. And clearing the output data, detecting a MAC header of a packet header in the ETH packet in the next slot data to perform a packet; when the verification is correct, retaining the packet analysis result, the data stored by the FIFO storage unit, and the output data.
  • FIG. 6 is a schematic diagram of a state machine when the solution provided by the embodiment of the present invention is implemented.
  • the state machine includes five states: an initial state S1, a parsed bitmap data state S2, a received TDM data state S3, and a parsed MAC header state S4. And receiving the payload data state S5;
  • the state transition principle is: the state machine starts to be in the initial state S1, the slot data arrives, enters the parsed bitmap data state S2, and receives the bitmap data in the slot data under S2 until the bitmap data is received, the parsed bitmap Data, when there is no TDM data in the subsequent data or the bitmap CRC check result is incorrect, enter the parsing MAC header state S4, and receive the parsed MAC header data in S4.
  • the MAC header is received, and there is no remaining data, return to the initial State S1
  • the MAC header is received, and there is residual data
  • enter the receiving payload data state S5 receive the payload data under S5, until there is no remaining data, return to the initial state S1;
  • the receiving TDM data state S3 After receiving the bitmap data in S2, parsing the bitmap data to obtain subsequent TDM data and the bitmap CRC check is correct, enter the receiving TDM data state S3; receive the TDM data under S3, when the TDM data is received, and subsequent When there is no remaining data, return to the initial state S1; when the TDM data is received, and the remaining data is less than 2 bytes (the length is not enough 2 bytes) In the MAC header), the incoming payload data state S5 is entered; when the TDM data is received, and the subsequent remaining data is greater than or equal to 2 bytes, the parsing MAC header state S4 is entered; the MAC header data is parsed under S4, and the MAC header data is received. When the data is completed and there is no remaining data, the process returns to the initial state S1. When the MAC header data is received and there is remaining data, the received payload data state S5 is entered.
  • FIG. 7 is a schematic diagram of a processing flow of ETH data; the processing flow is specifically as follows: pre-deblocking MAC PDU data; performing packet analysis on the de-framed PDU data to obtain an ETH data packet, according to the packet header of the ETH data packet And the packet tail determines the packet length; the packet length and the ETH data are respectively stored in different FIFO storage units, as shown in the figure, the first FIFO storage unit is used for storing ETH data, and the second FIFO storage unit is used for storing ETH data packets.
  • FIG. 8 is a structural diagram of a fault tolerance device for microwave transmission according to an embodiment of the present invention, where the fault tolerance device includes: a check code adding module 80 and a processing module 81;
  • a check code adding module 80 configured to add a bitmap cyclic redundancy check (CRC) code after the bitmap data in the radio frame time slot data;
  • the processing module 81 is configured to detect a verification result of the bitmap CRC code, and process the service data after the bitmap CRC code according to the verification result;
  • the bitmap data has a length of 1 byte and is used to represent fragmentation of TDM data in slot data. structure;
  • the bitmap CRC code has a length of 1 byte and is used for verifying the bitmap data.
  • the processing module 81 includes: a CRC detection sub-module 90 and a data processing sub-module 91;
  • the CRC detection sub-module 90 is configured to detect the bitmap data and the bitmap CRC code, and perform calculation on the data composed of the bitmap data and the bitmap CRC code by using a CRC check principle to obtain the bitmap CRC code. Calibration result
  • the data processing sub-module 91 is configured to: when the verification result of the bitmap CRC code is an error, process the service data after the bitmap CRC code as ETH data; and when the bitmap CRC code is verified. If it is correct, the service data after the bitmap CRC code is normally transmitted backwards;
  • the data processing sub-module 91 is configured to: when the bitmap CRC code verification result is incorrect, use the first 16-bit data immediately following the bitmap CRC code as the media access control header file MAC header in the MAC PDU.
  • the MAC header is parsed to obtain fragmentation information of the payload data in the MAC PDU; the fragmentation information of the payload data in each MAC PDU is grouped, and the result of the group packet is stored and reorganized, and the reassembled data packet is obtained.
  • output and verification when the bitmap CRC code verification result is correct, the service data after the bitmap CRC code is normally transmitted backward;
  • the above MAC PDU includes: a MAC header and payload data; wherein
  • the MAC header has a length of 16 bits.
  • the first 2 bits represent fragmentation information of the payload data, and are used to indicate fragments in an ETH packet to which the payload data belongs.
  • the fragment is: a packet header, a packet. Intermediate, end-of-package or complete packet; the middle 11 bits of the MAC header indicate the length of the payload data, and the last 3 bits of the MAC header indicate other types of services that need to be transmitted through the ETH channel;
  • the payload data is up to 2048 bits.
  • the data processing sub-module 91 is configured to: when grouping packets according to the fragmentation information of the payload data in each MAC PDU, obtain each fragment in the ETH data packet according to the fragmentation information, and complete each fragment into a complete fragment.
  • ETH data packet obtaining packet length and packet data of the ETH data packet;
  • the data processing sub-module 91 is configured to perform output and CRC check on the ETH data packet obtained by the recombination when outputting and verifying the reassembled data packet, and clear the packet analysis when the verification error occurs. And the data stored by the FIFO storage unit, the output data is cleared, and the MAC header of the packet header in the ETH data packet in the next time slot data is detected to be a packet;
  • the check code adding module 80 may be implemented by a chip having a simple computing capability in the device, such as a single chip microcomputer; or may be implemented by a main processing chip;
  • the processing module 81 can be implemented by a main processing chip in the receiving baseband device and its peripheral circuits, such as an FPGA and peripheral circuits.
  • the embodiment of the present invention further provides a computer readable storage medium, the storage medium comprising a set of computer executable instructions for performing a fault tolerance method for microwave transmission according to an embodiment of the present invention.
  • the fault tolerance method of the microwave transmission according to the embodiment of the present invention may also be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a stand-alone product.
  • a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a stand-alone product.
  • embodiments of the present application can be provided as a method, system, or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application can take the form of a computer program product embodied on one or more computer-usable storage media containing computer usable program code, including but not limited to a USB flash drive, a mobile hard drive, a read only memory (ROM, Read-Only Memory), disk storage, CD-ROM, optical storage, etc.
  • a USB flash drive a mobile hard drive
  • a read only memory ROM, Read-Only Memory
  • disk storage CD-ROM, optical storage, etc.
  • a bitmap cyclic redundancy check CRC code is added after the bitmap data in the radio frame slot data, the check result of the bitmap CRC code is detected, and the bitmap CRC is determined according to the check result.
  • the processing of the service data behind the code not only shortens the link-building time in the microwave transmission process, but also increases the radio frame data by transmitting an ETH data backward when a certain bitmap data is incorrect by adding the bitmap CRC check code. The package, rather than passing the error, the data can no longer resume normal transmission.

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Abstract

公开了一种微波传输的容错性方法，该方法包括：接收基带设备在无线帧时隙数据中的位图数据后添加位图循环冗余校验CRC码，检测所述位图CRC码的校验结果，并根据校验结果对位图CRC码后的业务数据进行处理。还公开了一种微波传输的容错性装置。

Description

一种微波传输的容错性方法和装置、计算机可读存储介质 技术领域
本发明涉及微波传输领域，尤其涉及一种微波传输的容错性方法和装置、计算机可读存储介质。
背景技术
现在大多数微波传输系统是一个无误码点对点的无线通信系统。传统的微波系统是在低密度奇偶校验(LDPC，Low Density Parity Check)输出无误码后才向后传输数据，这样的传输方式虽然能够在一定程度上保证系统的误码率保持在比较低的水平，但是，这种方式会导致建链时间延长。
而且，传统微波传输系统中无线帧中时隙(timeslot)数据中的净荷数据分为时分复用(TDM，Time Division Multiplexing)和媒体访问控制协议数据单元(MAC PDU，Media Access Control Protocol Data Unit)，MAC PDU表示以太网(ETH，Ethernet)数据；此外，时隙数据还包含有位图(bitmap)数据，位图数据用来指示当前TDM数据的分片结构；但是，当位图数据出现错误时，不仅影响TDM数据，还会导致MAC PDU的包头无法正确识别，错误会在无线帧中一直延续下去，再也无法使数据正常传输。
发明内容
为了解决现有存在的技术问题，本发明实施例主要提供一种微波传输的容错性方法和装置、计算机可读存储介质。
本发明实施例的技术方案是这样实现的：
本发明实施例提供了一种微波传输的容错性方法，该容错性方法包括：
接收基带设备在无线帧时隙数据中的位图数据后添加位图循环冗余校验CRC码；
检测所述位图CRC码的校验结果，并根据校验结果对位图CRC码后的业务数据进行处理。
上述方案中，所述位图数据的长度为1字节，取值表示时隙数据中时分复用TDM数据的分片结构；
所述添加的位图CRC码的长度为1字节，用于对所述位图数据进行校验。
上述方案中，所述检测所述位图CRC码的校验结果，根据校验结果对位图CRC码后面的业务数据进行处理包括：检测所述位图数据和位图CRC码，利用CRC校验原理对所述位图数据和位图CRC码组成的数据进行运算，获得所述位图CRC码的校验结果，当所述位图CRC码的校验结果为错误时，表示位图数据错误，将位图CRC码后的业务数据全部当做以太网ETH数据进行处理；当所述位图CRC码的校验结果为正确时，表示位图数据正确，将位图CRC码后的业务数据正常向后传输。
上述方案中，所述将位图CRC码后的业务数据全部当做ETH数据进行处理为：接收基带设备在检测到位图CRC码校验错误时，将所述位图CRC码后面紧跟的前16位数据，作为媒体访问控制协议数据单元MACPDU中的媒体访问控制头文件MAC header，对所述MAC header进行解析，获得MAC PDU中净荷数据的分片信息；根据各个MAC PDU中净荷数据的分片信息进行组包，对组包的结果进行存储和重组，对重组后的数据包进行输出和校验。
上述方案中，所述MAC PDU包括：MAC header和净荷数据；其中，
MAC header长度为16位，前2位表示所述净荷数据的分片信息，用于指示所述净荷数据所属于的一个ETH数据包中的分片，所述分片为：包头、包中间、包尾或完整包；MAC header中间11位表示净荷数据的长度；MAC header的后3位表示其它需要通过ETH通道传输的业务类型；
净荷数据，最大为2048位。
上述方案中，所述根据各个MAC PDU中净荷数据的分片信息进行组包为：根据分片信息获得ETH数据包中的各个分片，将各分片组成完整的ETH数据包，获得所述ETH数据包的包长和包数据。
上述方案中，所述对组包的结果进行存储和重组为：将所述ETH数据包的包长和包数据分别存储在两个先入先出FIFO存储单元中；在所述FIFO存储单元的输出端根据包长和包数据对FIFO存储单元中的数据进行重组，获得完整的ETH数据包。
上述方案中，所述对重组后的数据包进行输出和校验为：对重组获得的ETH数据包进行输出和CRC校验，当校验错误时，清除组包分析结果和所述FIFO存储单元存储的数据，清除输出数据，并检测下一时隙数据中的ETH数据包中包头的MAC header进行组包。
本发明实施例还提供了一种微波传输的容错性装置，该容错性装置包括：校验码添加模块和处理模块；其中，
校验码添加模块，配置为在无线帧时隙数据中的位图数据后添加位图循环冗余校验CRC码；
处理模块，配置为检测所述位图CRC码的校验结果，并根据所述校验结果对位图CRC码后的业务数据进行处理。
上述方案中，所述位图CRC码的长度为1字节，用于对所述位图数据进行校验；
所述位图数据，用于表示时隙数据中时分复用TDM数据的分片结构，长度为1字节。
上述方案中，所述处理模块包括：CRC检测子模块和数据处理子模块；其中，
CRC检测子模块，配置为检测所述位图数据和位图CRC码，利用CRC校验原理对所述位图数据和位图CRC码组成的数据进行运算，获得所述位图CRC码的校验结果；
所述数据处理子模块，配置为当所述位图CRC码的校验结果为错误时，将位图CRC码后的业务数据全部当做以太网ETH数据进行处理；当所述位图CRC码的校验结果为正确时，将位图CRC码后的业务数据正常向后传输。
上述方案中，所述数据处理子模块配置为，在位图CRC码校验结果错误时，将所述位图CRC码后紧跟的前16位数据，作为媒体访问控制协议数据单元MAC PDU中的媒体访问控制头文件MAC header，对所述MACheader进行解析，获得MAC PDU中净荷数据的分片信息；根据各个MACPDU中净荷数据的分片信息进行组包，对组包的结果进行存储和重组，对重组后的数据包进行输出和校验。
上述方案中，所述MAC PDU包括：MAC header和净荷数据；其中，
MAC header长度为16位，前2位表示所述净荷数据的分片信息，用于指示所述净荷数据所属于的一个ETH数据包中的分片，所述分片为：包头、包中间、包尾或完整包；MAC header中间11位表示净荷数据的长度；MAC header后3位表示其它需要通过ETH通道传输的业务类型；
净荷数据，最大为2048位。
上述方案中，所述数据处理子模块配置为，在根据各个MAC PDU中净荷数据的分片信息进行组包时，根据所述分片信息获得ETH数据包中的各个分片，将各分片组成完整的ETH数据包，获得所述ETH数据包的包长和包数据。
上述方案中，所述数据处理子模块配置为，在对组包的结果进行存储和重组时，将所述ETH数据包的包长和包数据分别存储在两个先入先出FIFO存储单元中；在所述FIFO存储单元的输出端根据包长和包数据对FIFO存储单元中的数据进行重组，获得完整的ETH数据包。
上述方案中，所述数据处理子模块配置为，在对重组后的数据包进行输出和校验时，对重组获得的ETH数据包输出和CRC校验，当校验错误 时，清除所述组包分析结果和所述FIFO存储单元存储的数据，清除输出数据，检测下一时隙数据中的ETH数据包中包头的MAC header进行组包。
本发明实施例还提供了一种计算机可读存储介质，所述存储介质包括一组计算机可执行指令，所述指令用于执行本发明实施例所述的微波传输的容错性方法。
本发明实施例所提供的一种微波传输的容错性方法和装置、计算机可读存储介质，接收基带设备通过在无线帧时隙数据中的位图数据后添加循环冗余校验(CRC，Cyclic Redundancy Check)码，检测所述位图CRC码的校验结果，并根据校验对位图CRC码后的业务数据进行处理；如此，只要微波系统中的无线帧的关键信息正确，就可以建链，大大缩短了建链时间，而且，只用少量的冗余校验，就可以达到最小数据损失，而不丢失正确的TDM数据和ETH数据，并且只向后传输了一个错误的时隙数据中的ETH数据包。
附图说明
图1为本发明实施例提供的无线帧的结构示意图；
图2为现有的无线帧中一个时隙数据的结构示意图；
图3所示为本发明实施例提供的微波传输的容错性方法流程示意图；
图4为本发明实施例提供的添加了位图CRC码的时隙数据结构示意图；
图5为本发明实施例提供的MAC header的结构示意图；
图6为本发明实施例提供的实现本发明提供的方案时的状态机示意图；
图7为本发明实施例提供的ETH数据的处理流程示意图；
图8为本发明实施例提供的微波传输的容错性装置结构示意图。
具体实施方式
本发明实施例中，接收基带设备在无线帧时隙数据中的位图数据后添 加位图CRC码，检测所述位图CRC码的结果，并根据校验结果对位图CRC码后的业务数据进行处理。
下面通过附图及具体实施例对本发明做进一步的详细说明。
如图1所示的无线帧结构，帧前面的前导和帧号是接收链路插入的，本发明实施例提供的方法和装置的重点在于前导和帧号后面的时隙数据，一个无线帧中有多个时隙数据，时隙数据后面有CRC校验码，当所有数据不够一个帧长时，帧尾部的填充数据用于补帧长。
图2所示为现有的时隙数据的结构图，如图所示，时隙数据分为TDM数据和ETH数据(用MAC PDU表示)；其中TDM数据分为四种类型：EOW、E1、AU-4和SOH；在话务业务中，EOW占用固定的带宽，并使用E1、AU-4、SOH中的一种传输TDM数据，TDM数据最大支持多少路E1、AU-4或SOH是根据传输带宽配置决定的；例如，传输带宽为28M时，系统最高支持75路E1，或2路AU-4，或2路SOH；位图数据指示当前时隙数据中依次传输的TDM数据具体是哪路，如，当前的时隙数据中有3路E1有数据包传送，分别为第1路、第3路和第8路E1，此种情况下的位图数据为10100001，其中取值为1表示E1的分片，即第1个E1分片是在后面数据的第1路，第2个E1分片是第3路，第3个E1分片是第8路；如果时隙数据中除了TDM数据还有剩余的可传输数据余量，就用来传输ETH数据(用MAC PDU表示)；MAC PDU分为MAC header(MAC头)和净荷数据；一个时隙数据中可以有多个MAC PDU，当数据不够一个时隙数据的固定长度时，使用填充数据补充。
利用图2所示的时隙数据结构传输数据，当位图数据错误时，不仅影响TDM数据，还会影响后面ETH数据；例如，正确的位图数据为10100001，但是传输过程中出错，变为10100100，本来的含义是第1、3、8路为TDM数据，但是现在变为第1、3、6路为TDM数据，影响了TDM数据的正确性，而且，紧跟在TDM数据后的ETH数据也无法正确识别，本来用于表 示ETH数据的MAC PDU紧接在第8路TDM数据后，现在位图数据的错误导致接收设备将MAC PDU认为紧接在第6路TDM数据后，这个错误将一直传递下去，再也无法恢复数据正确传输。
本发明实施例提供的微波传输的容错性方法的流程示意图如图3所示，该容错性方法主要包括以下步骤：
301：接收基带设备在无线帧时隙数据中的位图数据后添加位图CRC码；
其中，所述位图数据的长度为1字节，取值表示时隙数据中时分复用TDM数据的分片结构；
所述添加的位图CRC码的长度为1字节，在紧跟在位图数据的后面，对所述位图数据进行校验；
图4所示为位图数据后添加了位图CRC码的时隙数据结构示意图，比图2所示的时隙数据多了1字节的位图CRC码，该位图CRC码用于校验位图数据的正确性。
步骤302：接收基带设备检测位图CRC码的结果，并根据校验结果对位图CRC码后的业务数据进行处理；
具体的，检测接收到的时隙数据中的位图数据和位图CRC码，利用CRC校验原理对所述位图数据和位图CRC码组成的数据进行运算，获得所述位图CRC码的校验结果，当所述位图CRC码的校验结果为错误时，表示位图数据错误，将位图CRC码后的业务数据全部当做ETH数据进行处理，即，不管位图CRC码后实际紧跟的是TDM数据还是MAC PDU，都作为ETH数据来处理；当所述位图CRC码的校验结果为正确时，将位图CRC码后的业务数据正常向后传输，即，位图CRC码后实际紧跟的是什么数据，就以相应数据的处理方法将其正常向后传输；
上述CRC校验原理具体为：添加位图CRC码时会选择一个生成多项式，将位图数据左移8位(左移CRC码的位数)，用模2除法除以所述生 成多项式所得的余数为CRC码；利用接收到的位图数据和位图CRC码组成的16位数据使用模2除法除以生成多项式，能够除尽，表示校验结果为正确，否则，表示校验结果错误；
所述将位图CRC码后面的业务数据全部当做ETH数据进行处理具体为：当检测到位图数据的CRC码校验错误时，将所述CRC码后面紧跟的前16位进，作为MAC PDU中的MAC header，对所述MAC header进行解析，获得MAC PDU中净荷数据的分片信息；根据各个MAC PDU中净荷数据的分片信息进行组包，对组包的结果进行存储和重组，对重组后的数据包进行输出和校验；
如图2和图4所示，所述MAC PDU包括两部分：MAC header和净荷数据；其中，
如图5所示，MAC header长度为16位，其中，前2位表示净荷数据的分片信息，用于指示所述净荷数据所属于的一个ETH数据包中的分片，所述分片为：包头、包中间、包尾或完整包；例如，00表示净荷数据属于ETH数据包的包头，01表示属于包中间，10表示属于包尾，11表示是完整包；MAC header中间11为表示净荷数据的长度，即，净荷数据的最多有2048位，MAC header后3位表示其它需要通过ETH通道传输的业务类型；例如，MAC header的中间11位为00000001111，则表示MAC header后的净荷数据长度为15位，即，MAC header后面紧跟的15位数据为当前MAC PDU的净荷数据；
上述根据各个MAC PDU中净荷数据的分片信息进行组包为：根据所述分片信息获得ETH数据包中的各个分片，将各分片组成完整的ETH数据包，获得所述ETH数据包的包长和包数据；
例如，3个不同的MAC PDU中的净荷数据分别为ETH数据包的包头、包中间和包尾，将这3个MAC PDU中的净荷数据合起来就可以组成一个完整的ETH数据包；也有可能包头、包尾或包中间分别分布在不同的MAC PDU中；而且，一个ETH数据包可能承载在多个时隙数据中，这些都是由具体情况而定的；
上述的对组包的结果进行存储和重组为：将所述ETH数据包的包长和包数据分别存储在两个先入先出(FIFO)存储单元中；在所述FIFO存储单元的输出端根据包长和包数据对FIFO存储单元中的数据进行重组，获得完整的ETH数据包；
上述对重组后的数据进行输出和校验具体为：对重组获得的ETH数据包进行输出和CRC校验，当校验错误时，清除所述组包分析结果和所述FIFO存储单元存储的数据，清除所述输出数据，检测下一时隙数据中的ETH数据包中包头的MAC header进行组包；当校验正确时，保留组包分析结果、FIFO存储单元存储的数据和输出数据。
图6所示为实现上述本发明实施例提供的方案时的状态机示意图，该状态机包括5个状态：初始状态S1、解析位图数据状态S2、接收TDM数据状态S3、解析MAC header状态S4和接收净荷数据状态S5；
状态转移原理为：状态机开始处于初始状态S1，有时隙数据到达，进入解析位图数据状态S2，在S2下接收时隙数据中的位图数据，直到位图数据接收完毕，经解析位图数据，得到后续数据中无TDM数据或位图CRC校验结果错误时，进入解析MAC header状态S4，在S4下接收解析MACheader数据，当MAC header接收完毕，且后续没有剩余数据时，回到初始状态S1，当MAC header接收完毕，且后续有剩余数据时，进入接收净荷数据状态S5；在S5下接收净荷数据，直到没有剩余数据时，回到初始状态S1；
在S2下位图数据接收完毕，解析位图数据得到后续有TDM数据且位图CRC校验正确时，进入接收TDM数据状态S3；在S3下接收TDM数据，当所述TDM数据接收完毕，且后续没有剩余数据时，回到初始状态S1；当TDM数据接收完毕，且后续剩余数据小于2字节(长度不够为2字节的 MAC header)时，进入接收净荷数据状态S5；当TDM数据接收完毕，且后续剩余数据大于等于2字节时，进入解析MAC header状态S4；在S4下解析MAC header数据，当MAC header数据接收完毕，且后续没有剩余数据时，回到初始状态S1，当MAC header数据接收完毕，且有剩余数据时，进入接收净荷数据状态S5。
图7所示为ETH数据的处理流程示意图；处理流程具体如下：前级解帧MAC PDU数据；对解帧后的PDU数据进行组包分析，获得ETH数据包，根据所述ETH数据包的包头和包尾确定包长；将包长和ETH数据分别存入不同的FIFO存储单元中，如图所示，第一FIFO存储单元用于存储ETH数据，第二FIFO存储单元用于存储ETH数据包长；在所述FIFO存储单元的输出端对ETH数据包进行重组和校验，即，按第二FIFO存储单元中的包长，从第一FIFO存储单元中获取数据，组成完整的ETH数据包；将所述ETH数据包输出给下一级模块，所述下一级模块位于数据链路层的设备中，与本发明实施例所述的位于传输层中的接收基带设备属于不同层次中的不同设备，同时利用ETH数据包中自带的CRC码对该ETH数据包进行校验，当校验结果错误时，清除组包分析获得的ETH数据包和FIFO存储单元中的数据，并立即清除输出数据，再次检测下一时隙数据中的ETH数据包的包头的MAC header进行组包；其中，所述清除输出数据为：使接收基带设备中的输出端口的输出全部为0。
图8为本发明实施例提供的微波传输的容错性装置结构图，该容错性装置包括：校验码添加模块80和处理模块81；其中，
校验码添加模块80，配置为在无线帧时隙数据中的位图数据后添加位图循环冗余校验(CRC)码；
处理模块81，配置为检测所述位图CRC码的校验结果，并根据所述校验结果对位图CRC码后的业务数据进行处理；
所述位图数据，长度为1字节，用于表示时隙数据中TDM数据的分片 结构；
所述位图CRC码，长度为1字节，用于对所述位图数据进行校验；
所述处理模块81包括：CRC检测子模块90和数据处理子模块91；其中，
CRC检测子模块90，配置为检测所述位图数据和位图CRC码，利用CRC校验原理对所述位图数据和位图CRC码组成的数据进行运算，获得所述位图CRC码的校验结果；
所述数据处理子模块91，配置为当位图CRC码的校验结果为错误时，将位图CRC码后的业务数据全部当做ETH数据进行处理；当所述位图CRC码的校验结果为正确时，将位图CRC码后的业务数据正常向后传输；
数据处理子模块91配置为，在所述位图CRC码校验结果错误时，将位图CRC码后紧跟的前16位数据，作为MAC PDU中的媒体访问控制头文件MAC header，对所述MAC header进行解析，获得MAC PDU中净荷数据的分片信息；根据各个MAC PDU中净荷数据的分片信息进行组包，对组包的结果进行存储和重组，对重组后的数据包进行输出和校验；在所述位图CRC码校验结果正确时，将位图CRC码后的业务数据正常向后传输；
上述MAC PDU包括：MAC header和净荷数据；其中，
MAC header长度为16位，前2位表示所述净荷数据的分片信息，用于指示所述净荷数据所属于的一个ETH数据包中的分片，所述分片为：包头、包中间、包尾或完整包；MAC header中间11位表示净荷数据的长度，MAC header后3位表示其它需要通过ETH通道传输的业务类型；
净荷数据，最大为2048位。
所述数据处理子模块91配置为，在根据各个MAC PDU中净荷数据的分片信息进行组包时，根据所述分片信息获得ETH数据包中的各个分片，将各分片组成完整的ETH数据包，获得所述ETH数据包的包长和包数据；
在对组包的结果进行存储和重组时，将所述ETH数据包的包长和包数据分别存储在两个FIFO存储单元中；在所述FIFO存储单元的输出端根据包长和包数据对FIFO存储单元中的数据进行重组，获得完整的ETH数据包；
所述数据处理子模块91配置为，在对重组后的数据包进行输出和校验时，对重组获得的ETH数据包进行输出和CRC校验，当校验错误时，清除所述组包分析结果和所述FIFO存储单元存储的数据，清除所述输出数据，检测下一时隙数据中的ETH数据包中包头的MAC header进行组包；
上述校验码添加模块80可以由设备中具有简单运算能力的芯片来实现，如单片机；也可以由主处理芯片实现；
处理模块81可以由接收基带设备中的主处理芯片和其外围电路来实现，如FPGA和外围电路。
本发明实施例还提供了一种计算机可读存储介质，所述存储介质包括一组计算机可执行指令，所述指令用于执行本发明实施例所述的微波传输的容错性方法。
本发明实施例所述微波传输的容错性方法如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质上实施的计算机程序产品的形式，所述存储介质包括但不限于U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、磁盘存储器、CD-ROM、光学存储器等。
本发明实施例在无线帧时隙数据中的位图数据后添加位图循环冗余校验CRC码，检测所述位图CRC码的校验结果，并根据校验结果对位图CRC 码后面的业务数据进行处理，不仅缩短了微波传输过程中的建链时间，通过位图CRC校验码的添加，使无线帧数据在某一位图数据错误时，只向后传输一个ETH数据包，而不是将错误传递下去，数据再也无法恢复正常传输。
以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (17)

  1. 一种微波传输的容错性方法，包括：
    接收基带设备在无线帧时隙数据中的位图数据后添加位图循环冗余校验CRC码；
    检测所述位图CRC码的校验结果，并根据校验结果对位图CRC码后的业务数据进行处理。
  2. 根据权利要求1所述的容错性方法，其中，所述位图数据的长度为1字节，取值表示时隙数据中时分复用TDM数据的分片结构；
    所述添加的位图CRC码的长度为1字节，用于对所述位图数据进行校验。
  3. 根据权利要求1所述的容错性方法，其中，所述检测所述位图CRC码的校验结果，根据校验结果对位图CRC码后面的业务数据进行处理包括：检测所述位图数据和位图CRC码，利用CRC校验原理对所述位图数据和位图CRC码组成的数据进行运算，获得所述位图CRC码的校验结果，当所述位图CRC码的校验结果为错误时，表示位图数据错误，将位图CRC码后的业务数据全部当做以太网ETH数据进行处理；当所述位图CRC码的校验结果为正确时，表示位图数据正确，将位图CRC码后的业务数据正常向后传输。
  4. 根据权利要求3所述的容错性方法，其中，所述将位图CRC码后的业务数据全部当做ETH数据进行处理为：接收基带设备在检测到位图CRC码校验错误时，将所述位图CRC码后面紧跟的前16位数据，作为媒体访问控制协议数据单元MAC PDU中的媒体访问控制头文件MAC header，对所述MAC header进行解析，获得MAC PDU中净荷数据的分片信息；根据各个MAC PDU中净荷数据的分片信息进行组包，对组包的结果进行存储和重组，对重组后的数据包进行输出和校验。
  5. 根据权利要求4所述的容错性方法，其中，所述MAC PDU包括：MAC header和净荷数据；其中，
    MAC header长度为16位，前2位表示所述净荷数据的分片信息，用于指示所述净荷数据所属于的一个ETH数据包中的分片，所述分片为：包头、包中间、包尾或完整包；MAC header中间11位表示净荷数据的长度；MAC header的后3位表示其它需要通过ETH通道传输的业务类型；
    净荷数据，最大为2048位。
  6. 根据权利要求5所述的容错性方法，其中，所述根据各个MAC PDU中净荷数据的分片信息进行组包为：根据分片信息获得ETH数据包中的各个分片，将各分片组成完整的ETH数据包，获得所述ETH数据包的包长和包数据。
  7. 根据权利要求6所述的容错性方法，其中，所述对组包的结果进行存储和重组为：将所述ETH数据包的包长和包数据分别存储在两个先入先出FIFO存储单元中；在所述FIFO存储单元的输出端根据包长和包数据对FIFO存储单元中的数据进行重组，获得完整的ETH数据包。
  8. 根据权利要求7所述的容错性方法，其中，所述对重组后的数据包进行输出和校验为：对重组获得的ETH数据包进行输出和CRC校验，当校验错误时，清除组包分析结果和所述FIFO存储单元存储的数据，清除输出数据，并检测下一时隙数据中的ETH数据包中包头的MAC header进行组包。
  9. 一种微波传输的容错性装置，包括：校验码添加模块和处理模块；其中，
    校验码添加模块，配置为在无线帧时隙数据中的位图数据后添加位图循环冗余校验CRC码；
    处理模块，配置为检测所述位图CRC码的校验结果，并根据所述校验结果对位图CRC码后的业务数据进行处理。
  10. 根据权利要求9所述的容错性装置，其中，所述位图CRC码的长度为1字节，用于对所述位图数据进行校验；
    所述位图数据，用于表示时隙数据中时分复用TDM数据的分片结构，长度为1字节。
  11. 根据权利要求9所述的容错性装置，其中，所述处理模块包括：CRC检测子模块和数据处理子模块；其中，
    CRC检测子模块，配置为检测所述位图数据和位图CRC码，利用CRC校验原理对所述位图数据和位图CRC码组成的数据进行运算，获得所述位图CRC码的校验结果；
    所述数据处理子模块，配置为当所述位图CRC码的校验结果为错误时，将位图CRC码后的业务数据全部当做以太网ETH数据进行处理；当所述位图CRC码的校验结果为正确时，将位图CRC码后的业务数据正常向后传输。
  12. 根据权利要求11所述的容错性装置，其中，所述数据处理子模块配置为，在位图CRC码校验结果错误时，将所述位图CRC码后紧跟的前16位数据，作为媒体访问控制协议数据单元MAC PDU中的媒体访问控制头文件MAC header，对所述MAC header进行解析，获得MAC PDU中净荷数据的分片信息；根据各个MAC PDU中净荷数据的分片信息进行组包，对组包的结果进行存储和重组，对重组后的数据包进行输出和校验。
  13. 根据权利要求12所述的容错性装置，其中，所述MAC PDU包括：MAC header和净荷数据；其中，
    MAC header长度为16位，前2位表示所述净荷数据的分片信息，用于指示所述净荷数据所属于的一个ETH数据包中的分片，所述分片为：包头、包中间、包尾或完整包；MAC header中间11位表示净荷数据的长度；MAC header后3位表示其它需要通过ETH通道传输的业务类型；
    净荷数据，最大为2048位。
  14. 根据权利要求13所述的装置，其中，所述数据处理子模块配置为，在根据各个MAC PDU中净荷数据的分片信息进行组包时，根据所述分片信息获得ETH数据包中的各个分片，将各分片组成完整的ETH数据包，获得所述ETH数据包的包长和包数据。
  15. 根据权利要求14所述的容错性装置，其中，所述数据处理子模块配置为，在对组包的结果进行存储和重组时，将所述ETH数据包的包长和包数据分别存储在两个先入先出FIFO存储单元中；在所述FIFO存储单元的输出端根据包长和包数据对FIFO存储单元中的数据进行重组，获得完整的ETH数据包。
  16. 根据权利要求15所述的容错性装置，其中，所述数据处理子模块配置为，在对重组后的数据包进行输出和校验时，对重组获得的ETH数据包输出和CRC校验，当校验错误时，清除所述组包分析结果和所述FIFO存储单元存储的数据，清除输出数据，检测下一时隙数据中的ETH数据包中包头的MAC header进行组包。
  17. 一种计算机可读存储介质，所述存储介质包括一组计算机可执行指令，所述指令用于执行权利要求1-8任一项所述的微波传输的容错性方法。
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