WO2015076009A1 - High-frequency device and method for controlling same - Google Patents

High-frequency device and method for controlling same Download PDF

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Publication number
WO2015076009A1
WO2015076009A1 PCT/JP2014/074812 JP2014074812W WO2015076009A1 WO 2015076009 A1 WO2015076009 A1 WO 2015076009A1 JP 2014074812 W JP2014074812 W JP 2014074812W WO 2015076009 A1 WO2015076009 A1 WO 2015076009A1
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Prior art keywords
control device
slave
slave devices
control
signal
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PCT/JP2014/074812
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French (fr)
Japanese (ja)
Inventor
篤 浅香
久夫 早藤
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株式会社村田製作所
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Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to CN201480064082.4A priority Critical patent/CN105993008A/en
Publication of WO2015076009A1 publication Critical patent/WO2015076009A1/en
Priority to US15/155,358 priority patent/US20160259745A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Definitions

  • the present invention relates to a high-frequency device capable of operating a desired device by address designation and a control method for the high-frequency device.
  • Electronic devices equipped with a high-frequency device typified by an RF (Radio Frequency) module for example, portable information terminals, use serial communication for internal data communication in response to requests for higher data communication and lower power consumption. It is becoming mainstream.
  • serial communication is used for internal data communication.
  • a master control device includes a plurality of slave devices (switch circuit, variable capacitance circuit, power Amplifier, etc.) are connected, and the master control device controls the operation of the slave device.
  • a master control device supplies a high frequency signal to the antenna at the time of transmission, and receives and processes the high frequency signal from the antenna at the time of reception.
  • a plurality of slave devices when there are a plurality of slave devices having the same address, a plurality of slave devices operate simultaneously with one signal when the operation is controlled by only one serial interface. Therefore, a plurality of slave devices may operate unintentionally at the same time, and there is a problem that the degree of freedom in circuit design is reduced.
  • the present invention has been made in view of such circumstances, and can be controlled to perform a desired operation even when there are a plurality of slave devices having the same address without adding a serial interface.
  • An object of the present invention is to provide a high-frequency device and a method for controlling the high-frequency device.
  • a high-frequency device is a high-frequency device including a master control device having a serial interface and a plurality of slave devices having a serial interface, and controls operations of the plurality of slave devices.
  • Each control terminal is connected to the control device, and the control device sends the control signal to the control terminal of the slave device according to a data signal from the master control device. To send And butterflies.
  • the serial interface of the master control device is connected to the control device and the serial interfaces of the plurality of slave devices, and each of the slave devices has a control terminal that receives a control signal for controlling whether or not each device is operable. And each control terminal is connected to a control device.
  • the control device transmits a control signal to the control terminal of the slave device in accordance with the data signal from the master control device. Thereby, it is possible to control whether or not the slave device is in an operable state from the control device. For this reason, in order to control the operable state of the slave device, the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a desired slave device can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
  • control device and the plurality of slave devices are mounted on the same substrate.
  • the entire apparatus can be further reduced in size, and the master control device is a single component having a common device address. Since it can be regarded as being, it becomes easy to control the operation of the slave device.
  • the slave device is operable when receiving an on-state control signal.
  • the slave device becomes operable when it receives an on-state control signal, so it can control whether or not it is operable according to the data signal from the master control device. Become.
  • control device has a serial / parallel conversion function for converting a serial signal and a parallel signal.
  • each control terminal of the slave device is connected to the control terminal of the control device having the serial / parallel conversion function, each slave device controls whether or not each of the slave devices is operable by a parallel signal. can do. Therefore, it is possible to control the operations of both the slave device having the serial interface and the slave device having the parallel interface.
  • the high-frequency device includes a plurality of other slave devices different from the slave device, the other slave devices have a parallel interface, and the parallel interface has the serial / parallel conversion function. It is preferable to be connected to a control terminal of the control device.
  • the other slave devices are connected to the control terminal of the control device having a parallel / serial conversion function. Therefore, the operation can be controlled by the parallel signal.
  • the master control device and the control device are integrated.
  • the high-frequency device can be further downsized.
  • the slave device is a high-frequency switch or a power amplifier.
  • the slave device is a high-frequency switch or power amplifier
  • the operation of the high-frequency switch or power amplifier can be controlled in accordance with the data signal from the master control device.
  • a high-frequency device is a high-frequency device including a master control device having a serial interface and a plurality of slave devices having a serial interface.
  • a control device for controlling operation wherein a plurality of slave devices form a group, and a serial interface of the master control device is connected to a serial interface of the control device and the plurality of slave devices;
  • Each of which has a control terminal for receiving a control signal for controlling whether or not it is in an operable state, and each control terminal is connected to the control device, and the control device is connected to the master control.
  • Data from the device And transmitting the control signal to the control terminal of the group unit in accordance with the signal.
  • a group is formed by the plurality of slave devices, and the serial interface of the master control device is connected to the serial interface of the control device and the plurality of slave devices, and are the slave devices operable?
  • Each control terminal has a control terminal for receiving a control signal for controlling whether or not, and each control terminal is connected to a control device.
  • the control device transmits a control signal to the group-unit control terminal according to the data signal from the master control device.
  • whether or not the slave device is operable can be controlled from the control device in units of groups.
  • the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a slave device of a desired group can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
  • a method for controlling a high-frequency device includes a master control device, a plurality of slave devices having a serial interface, and a control device that controls the availability of operation of the slave device.
  • a method for controlling a high-frequency device comprising: a first step in which the master control device transmits a data signal to the control device; and the control device based on the data signal received by the control device
  • the master control device transmits a data signal to the control device, and the control device transmits a control signal for controlling the availability of operation of the plurality of slave devices based on the received data signal to the plurality of slave devices.
  • the plurality of slave devices change the operation availability state according to the control signal, and transmit data signals from the master control device to the plurality of slave devices.
  • the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a desired slave device can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
  • the slave device becomes operable when it receives a control signal in an enabled state.
  • the slave device becomes operable when it receives the control signal in the enabled state, and therefore, it is controlled whether or not the slave device is operable according to the data signal from the master control device. Is possible.
  • control device preferably converts a serial signal and a parallel signal.
  • each slave device since the control terminal of the slave device is connected to the control terminal of the control device having a serial / parallel conversion function, each slave device controls whether or not each device is operable by a parallel signal. Can do. Therefore, it is possible to control the operations of both the slave device having the serial interface and the slave device having the parallel interface.
  • the serial interface of the master control device is connected to the control device and the serial interfaces of the plurality of slave devices, and each slave device receives a control signal for controlling whether or not it is in an operable state.
  • Each control terminal is connected to a control device.
  • the control device transmits a control signal to the control terminal of the slave device in accordance with the data signal from the master control device.
  • the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a desired slave device can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
  • FIG. 1 is a block diagram showing the configuration of a conventional high-frequency device
  • FIG. 2 is a block diagram showing the configuration of the high-frequency device according to Embodiment 1 of the present invention.
  • each high-frequency device includes a master control device (RFIC) 1 and a plurality of slave devices 2 whose operations are controlled based on control signals from the master control device 1.
  • the slave device 2 is, for example, a high frequency switch or a power amplifier.
  • the number of bits that can be assigned to the device address may be limited due to specifications. For example, when the device address bits are limited to 4 bits, the number of device addresses that can be specified is limited to 16.
  • the master control device 1 cannot connect more than 16 slave devices 2 with a single control line.
  • the master control device 1 cannot connect more than 16 slave devices 2 with a single control line.
  • there is a risk of malfunction when there are a plurality of slave devices 2 having the same address in one system, there is a risk of malfunction.
  • a communication line for data communication (hereinafter referred to as a data bus) 3 and a control signal for controlling an operable state (hereinafter referred to as an enable state) of the slave device 2 are used.
  • Communication lines (hereinafter referred to as enable control lines) 4 are provided separately.
  • the master control device 1 includes a control terminal 11 to which an enable control line 4 is connected, in addition to a serial interface 12 to which the data bus 3 is connected.
  • each slave device 2 includes a control terminal 21 to which the enable control line 4 is connected in addition to the serial interface 22 to which the data bus 3 is connected.
  • the “enabled state” means a state in which the slave device 2 can receive a data signal transmitted from the master control device 1 through the data bus 3.
  • the state in which the slave device 2 cannot receive the data signal transmitted from the master control device 1 through the data bus 3 is referred to as “disabled state”.
  • FIG. 3 is a schematic diagram showing the configuration of the slave device 2 of the high-frequency device according to Embodiment 1 of the present invention.
  • the data bus 3 includes a data signal line 31 and a clock signal line 32, and the slave device 2 receives data (signals) including a device address designated by the master control device 1.
  • the data is received by the serial interface 22 via the data signal line 31.
  • the data signal line 31 and the clock signal line 32 are connected to the serial interface 22, and the enable control line 4 is connected to the control terminal 21 separately.
  • the control terminal 21 receives, for example, a Hi / Low signal as a control signal. When a Hi signal is received, it is enabled, and when a Low signal is received, it is disabled.
  • FIG. 4 is an explanatory diagram of an operation control method for the slave device 2 of the high-frequency device according to the first embodiment of the present invention.
  • FIG. 4 shows an example in which a plurality of slave devices 2 having the same 4-bit device address “0010” are connected to one master control device 1.
  • a plurality of slave devices 2A, 2B, 2C having the same device address are connected to one master control device 1.
  • the enable control line 4 is connected to the control terminal 21 of each slave device 2A, 2B, 2C.
  • the master control device 1 transmits a Hi signal only to the slave device 2A and a Low signal to the slave devices 2B and 2C from the control terminal 11 via the enable control line 4. To do.
  • the enable bit of the slave device 2A becomes “1”, and an enable state in which data can be transmitted and received is set.
  • the enable bits of the slave devices 2B and 2C are “0”, a disabled state in which data cannot be transmitted and received is set.
  • the master control device 1 sends the data signal including the address “0010” indicating the slave device 2 to be controlled to all the slave devices via the data bus 3. Send to 2A, 2B, 2C.
  • the enable bit is “0”, the data signal cannot be received. Therefore, even if the device address included in the data signal matches the address of the slave devices 2B and 2C, the slave devices 2B and 2C do not operate.
  • a predetermined interval is provided between the timing at which the control signal is transmitted via the enable control line 4 and the timing at which the data signal is transmitted via the data bus 3.
  • the slave device 2A since the enable bit is “1”, it is determined whether or not the received device address matches the address of the slave device 2A. If the addresses match, the slave device 2A operates.
  • FIG. 5 is a schematic diagram showing a configuration including connection of the high-frequency device according to Embodiment 1 of the present invention.
  • the master control device 1 is connected to the serial interface 22 of each slave device 2A, 2B, 2C via the data bus 3 connected to the serial interface 12 (serial connection).
  • the serial interface 62 of the control device 6 is also connected via the data bus 3.
  • the control device 6 has a plurality of control terminals 61 connected to the slave devices 2A, 2B and 2C via the plurality of enable control lines 4, respectively.
  • the enable control line 4 is connected to the control terminal 21 of each of the slave devices 2A, 2B, and 2C, for example, in parallel connection.
  • the control device 6 sends a Hi signal only to the slave device 2A, and the slave device Low signals are transmitted as control signals to 2B and 2C, respectively.
  • the enable bit of the slave device 2A becomes “1”, and an enable state in which data can be transmitted and received is set.
  • the enable bits of the slave devices 2B and 2C are “0”, a disabled state in which data cannot be transmitted and received is set.
  • the control device 6 has a serial / parallel conversion function for converting a serial signal and a parallel signal.
  • the control device 6 converts the data signal from the master control device from the serial system to the parallel system, so that each slave device 2 can receive the control signal via the enable control line 4.
  • the master control device 1 transmits a data signal including a device address indicating the control device 6 to be controlled to the control device 6 and all the slave devices 2A, 2B, and 2C via the data bus 3. To do.
  • the control device 6 that has received this data signal performs serial / parallel conversion on the data signal and transmits it to the slave devices 2A, 2B, and 2C via the enable control line 4.
  • the Hi signal is transmitted to the slave device 2A
  • the Low signal is transmitted to the slave devices 2B and 2C.
  • the slave devices 2A, 2B, and 2C are in a disabled state when the data signal is transmitted from the master control device 1, the data signal cannot be received. Even if the slave devices 2A, 2B, and 2C are enabled, the address of the control device 6 and the device address of the slave devices 2A, 2B, and 2C are different at this time, so that the slave devices 2A, 2B, and 2C operate. do not do.
  • the slave device 2A that has received the Hi signal has the enable bit set to ‘1’ and is enabled.
  • the slave devices 2B and 2C that have received the Low signal have their enable bits set to '0' and are disabled.
  • the master control device 1 includes a data signal including an address “0010” indicating the slave device 2 to be controlled via the data bus 3 in a state where the enable bits of the slave devices 2A, 2B, and 2C are set. Is transmitted to all slave devices 2A, 2B, 2C. In the slave devices 2B and 2C, since the enable bit is “0”, the data signal cannot be received. Therefore, even if the address included in the data signal matches the device address of the slave devices 2B and 2C, the slave devices 2B and 2C do not operate.
  • the slave device 2A since the enable bit is “1”, it is determined whether or not the address of the received data signal matches the device address of the slave device 2A. In the example of FIG. 5, since the addresses match, the slave device 2A operates.
  • whether or not the slave device 2 is in an operable state can be controlled from the control device 6, so that the high-frequency device including the slave device 2 having the same device address is used.
  • the desired slave device 2 can be operated without making the master control device 1 into a complicated circuit design, and the high-frequency device can be downsized as a whole.
  • the slave device 2A, 2B, 2C When the control device 6 and the slave device 2 have the same device address, when the slave device 2A, 2B, 2C is in a disabled state at the time of transmitting a data signal from the master control device 1, the slave device 2A, 2B and 2C cannot receive the data signal.
  • the control device 6 and the slave device 2 have the same device address, even if the slave devices 2A, 2B, and 2C are in an enabled state when the data signal is transmitted from the master control device 1, the data signal is Since the data format does not control the operation of the slave devices 2A, 2B, and 2C, the slave devices 2A, 2B, and 2C do not operate even when the data signals are received. For this reason, when the control device 6 and the slave device 2 are set to the same address and are configured as one high-frequency device excluding the master control device 1, the master control device 1 provided separately has a common device for the high-frequency device. Since it can be regarded as one component having an address, the operation control of the slave device 2 can be easily performed.
  • control device 6 may be incorporated in the master control device 1 and integrated.
  • FIG. 6 is a schematic diagram showing another configuration including connection of the high-frequency device according to Embodiment 1 of the present invention.
  • the master control device 1 is provided with the function of the control device 6, that is, the function of transmitting a control signal for controlling whether or not the slave device 2 is operable by parallel communication. Therefore, in addition to the data bus 3 being connected to the serial interface 12 of the master control device 1, an enable control line 4 for parallel communication is connected to the control terminal 11.
  • the enable control line 4 is connected to the control terminal 21 of each slave device 2, and the master control device 1 controls whether or not the slave device 2 is in an operable state via the enable control line 4. Since a data signal is transmitted to the slave device 2 to be controlled via the data bus 3, the same effect can be expected.
  • FIG. 7 is a schematic diagram showing a configuration including connection of the high-frequency device according to Embodiment 2 of the present invention.
  • the master control device 1 is connected to each slave device 2 and control device 6 belonging to each group via a data bus 3 (serial connection).
  • the control device 6 has a plurality of control terminals 61 connected to the groups 5A, 5B, and 5C via the plurality of enable control lines 4, respectively.
  • control terminals 21 of the slave devices 2 belonging to the groups 5A, 5B, and 5C in parallel connection are connected to one control terminal 21 via the enable control line 4 in group units. In order to simplify this, it is displayed as being connected to each group 5A, 5B, 5C. At the same time, the serial interfaces 12 and 22 are also omitted.
  • the device addresses of the slave devices 2 in the groups 5A, 5B, and 5C are different from each other, but the slave devices 2 having the same device address may be used in different groups. Therefore, even when the number of device addresses serially connected to the master control device 1 is limited to 16, the slave devices 2 can be connected to more than 16.
  • the control device 6 transmits a Hi signal to the plurality of slave devices 2 in the group 5A and a Low signal to the plurality of slave devices 2 in the other groups 5B and 5C as control signals. .
  • the enable bits of all the slave devices 2 belonging to the group 5A become “1”, and an enable state (operable state) in which data can be transmitted and received is set.
  • the enable bits of all the slave devices 2 belonging to the other groups 5B and 5C are '0', the disabled state in which data cannot be transmitted / received is set.
  • the master control device 1 sends a data signal including a device address indicating the control device 6 to be controlled via the data bus 3 to a slave belonging to the control device 6 and all the groups 5A, 5B, and 5C.
  • the control device 6 that has received the data signal including the device address performs serial / parallel conversion on the data signal and transmits the data signal as a control signal to all the slave devices 2 belonging to the groups 5A, 5B, and 5C.
  • the Hi signal is transmitted to the group 5A
  • the Low signal is transmitted to the groups 5B and 5C.
  • the slave device 2 when the slave device 2 is in a disabled state at the time of transmitting a data signal from the master control device 1, this data signal cannot be received. Even if the slave device 2 is enabled, the address of the control device 6 and the address of the slave device 2 are different at this time, so that the slave device 2 does not operate.
  • the slave device 2 belonging to the group 5A that has received the Hi signal has an enable bit of “1” and is in an enabled state (operable state).
  • the slave devices 2 belonging to the groups 5B and 5C that have received the Low signal have the enable bit set to '0' and are disabled.
  • the master control device 1 again transmits a data signal including the address “0010” indicating the slave device 2 to be controlled via the data bus 3. To do.
  • the slave devices 2 belonging to the groups 5B and 5C since the enable bit is “0”, the data signal cannot be received. Therefore, even if the slave devices 2 have the same address, the slave devices 2 belonging to the groups 5B and 5C do not operate.
  • each slave device 2 belonging to the group 5A since the enable bit is “1”, it is determined whether or not the received address matches the address of each slave device 2. In the example of FIG. 7, since the addresses of the slave devices 2A match, only the slave device 2A operates.
  • whether or not the slave device 2 is in an operable state can be controlled in units of groups, so that the number of addresses that can be designated by serial control is limited. Even in such a case, the slave device 2 can be connected beyond the limit, and the desired slave device 2 can be operated.
  • FIG. 8 is a schematic diagram showing another configuration including connection of the high-frequency device according to Embodiment 2 of the present invention.
  • the master control device 1 is provided with the function of the control device 6, that is, a function of transmitting a control signal for controlling whether or not the slave device 2 is operable by parallel communication. Therefore, in addition to the data bus 3 being connected to the serial interface 12 of the master control device 1, an enable control line 4 for parallel communication is connected to the control terminal 11.
  • the enable control line 4 is connected to the control terminal 21 of each slave device 2, and the master control device 1 determines whether or not the slave device 2 is operable via the control terminal 11 and the enable control line 4. Since the data signal including the address of the slave device 2 to be controlled is transmitted via the data bus 3 after the control, the same effect can be expected.
  • FIG. 9 is a schematic diagram showing a configuration including connection of the high-frequency device according to Embodiment 3 of the present invention.
  • the master control device 1 is connected to each slave device 2 and control device 6 belonging to each group 5A to 5C via a data communication line 3 (serial communication).
  • the control device 6 has a plurality of control terminals 61 connected to the groups 5A to 5C via the plurality of enable control lines 4, respectively.
  • the slave devices (other slave devices) 7D, 7E, and 7F that do not belong to any group are also connected in parallel to the control device 6 via the plurality of enable control lines 4 and the control terminals 61, respectively. .
  • the enable control line 4 is connected to the control terminal 21 of the slave device 2 belonging to each of the groups 5A to 5C by, for example, parallel connection.
  • the group 5B is omitted to simplify the drawing, Displayed as being connected to groups 5A to 5C.
  • the serial interfaces 12 and 22 are also omitted.
  • the addresses of the slave devices 2 in the groups 5A to 5C are different from each other, but the slave devices 2 having the same address may be used in different groups. Therefore, even if the number of addresses serially connected to the master control device 1 is 16, the slave devices 2 can be connected beyond the 16 addresses.
  • the enable control line 4 is connected to the parallel interface 71, and the serial / parallel converted data signal in the control device 6 is transmitted / received by parallel communication.
  • the operations of the slave devices 7D, 7E, and 7F are controlled via the enable control line 4.
  • the operations of the slave devices 7D, 7E, and 7F are controlled by parallel communication. It becomes possible to do.
  • Embodiment 3 it goes without saying that the function of the control device 6 may be incorporated into the master control device 1 and integrated.

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Abstract

　The present invention provides a high-frequency device capable of being controlled so as to perform a desired operation without adding a serial interface, even when there exists a plurality of slave devices having the same address, and a method for controlling the high-frequency device. The high-frequency device according to the present invention is provided with a master control device having a serial interface and a plurality of slave devices having a serial interface. The serial interface of the master control device, provided with a control device for controlling the operation of the plurality of slave devices, is connected to the serial interfaces of the control device and plurality of slave devices, each of the slave devices having a control terminal for receiving a control signal for controlling whether an operational state or not, each of the control terminals being connected to the control device. The control device transmits the control signal to the control terminals of the slave devices in accordance with a data signal from the master control device.

Description

高周波装置及び該高周波装置の制御方法High frequency device and method for controlling the high frequency device
　本発明は、アドレス指定により、所望のデバイスを動作させることが可能な高周波装置及び該高周波装置の制御方法に関する。 The present invention relates to a high-frequency device capable of operating a desired device by address designation and a control method for the high-frequency device.
　ＲＦ（Ｒａｄｉｏ　Ｆｒｅｑｕｅｎｃｙ）モジュールに代表される高周波装置を搭載した電子機器、例えば携帯情報端末は、データ通信の高速化、低消費電力化等の要請により、内部のデータ通信にシリアル通信を用いることが主流となりつつある。例えば特許文献１に開示された差動伝送システムでは、内部のデータ通信にシリアル通信を用いている。 Electronic devices equipped with a high-frequency device typified by an RF (Radio Frequency) module, for example, portable information terminals, use serial communication for internal data communication in response to requests for higher data communication and lower power consumption. It is becoming mainstream. For example, in the differential transmission system disclosed in Patent Document 1, serial communication is used for internal data communication.
　具体的には、例えば携帯電話機等において、アンテナからの受信信号及びアンテナへの送信信号の処理を行うＲＦモジュールでは、マスター制御デバイス（ＲＦＩＣ）に複数のスレーブデバイス（スイッチ回路、可変容量回路、パワーアンプ等）が接続されており、マスター制御デバイスがスレーブデバイスの動作を制御している。このようなＲＦモジュールは、送信時は高周波信号をアンテナへ供給し、受信時は、アンテナから高周波信号を受け取り処理する。 Specifically, in an RF module that processes a signal received from an antenna and a signal transmitted to the antenna in, for example, a mobile phone, a master control device (RFIC) includes a plurality of slave devices (switch circuit, variable capacitance circuit, power Amplifier, etc.) are connected, and the master control device controls the operation of the slave device. Such an RF module supplies a high frequency signal to the antenna at the time of transmission, and receives and processes the high frequency signal from the antenna at the time of reception.
特開２００９－１４１５６１号公報JP 2009-141561 A
　しかし、特許文献１に開示されている差動伝送システム（シリアル制御システム）では、仕様により制御対象となるスレーブデバイスのアドレス数が制限されている場合がある。このため、動作を制御することができるスレーブデバイスの数に限界があるという問題点があった。もちろん、複数のシリアルインタフェースを設けることで問題点を解決することもできるが、その場合にはチップ面積が増大する等、電子機器の小型化の阻害要因となるおそれがある。 However, in the differential transmission system (serial control system) disclosed in Patent Document 1, the number of addresses of slave devices to be controlled may be limited depending on specifications. For this reason, there is a problem that the number of slave devices that can control the operation is limited. Of course, it is possible to solve the problem by providing a plurality of serial interfaces. However, in that case, there is a possibility that the reduction of the size of the electronic device may be hindered, such as an increase in the chip area.
　また、同じアドレスを有するスレーブデバイスが複数存在する場合、一のシリアルインタフェースのみで動作を制御するときには、一の信号で複数のスレーブデバイスが同時に動作する。したがって、複数のスレーブデバイスが意図せずに同時に動作するおそれがあり、回路設計の自由度が低下するという問題点もあった。 In addition, when there are a plurality of slave devices having the same address, a plurality of slave devices operate simultaneously with one signal when the operation is controlled by only one serial interface. Therefore, a plurality of slave devices may operate unintentionally at the same time, and there is a problem that the degree of freedom in circuit design is reduced.
　本発明は斯かる事情に鑑みてなされたものであり、シリアルインタフェースを増設することなく、同じアドレスを有するスレーブデバイスが複数存在する場合であっても、所望の動作をするよう制御することが可能な高周波装置及び該高周波装置の制御方法を提供することを目的とする。 The present invention has been made in view of such circumstances, and can be controlled to perform a desired operation even when there are a plurality of slave devices having the same address without adding a serial interface. An object of the present invention is to provide a high-frequency device and a method for controlling the high-frequency device.
　上記目的を達成するために本発明に係る高周波装置は、シリアルインタフェースを有するマスター制御デバイスと、シリアルインタフェースを有する複数のスレーブデバイスとを備える高周波装置であって、複数の前記スレーブデバイスの動作を制御する制御デバイスを備え、前記マスター制御デバイスのシリアルインタフェースは、前記制御デバイス及び複数の前記スレーブデバイスのシリアルインタフェースと接続され、前記スレーブデバイスは、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子を有し、それぞれの該制御端子が前記制御デバイスと接続され、前記制御デバイスは、前記マスター制御デバイスからのデータ信号に応じて前記制御信号を前記スレーブデバイスの前記制御端子へ送信することを特徴とする。 To achieve the above object, a high-frequency device according to the present invention is a high-frequency device including a master control device having a serial interface and a plurality of slave devices having a serial interface, and controls operations of the plurality of slave devices. A control signal for controlling whether the serial interface of the master control device is connected to the serial interface of the control device and the plurality of slave devices, and each of the slave devices is in an operable state. Each control terminal is connected to the control device, and the control device sends the control signal to the control terminal of the slave device according to a data signal from the master control device. To send And butterflies.
　上記構成では、マスター制御デバイスのシリアルインタフェースは、制御デバイス及び複数のスレーブデバイスのシリアルインタフェースと接続され、スレーブデバイスは、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子を有し、それぞれの制御端子が制御デバイスと接続されている。制御デバイスは、マスター制御デバイスからのデータ信号に応じて制御信号をスレーブデバイスの制御端子へ送信する。これにより、スレーブデバイスが動作可能状態であるか否かを制御デバイスから制御することができる。このため、マスター制御デバイスは、スレーブデバイスの動作可能状態を制御するために、制御デバイスのみにスレーブデバイスのアドレスに関する情報と当該スレーブデバイスを動作可能状態とするかどうかに関する情報を送信すれば良い。したがって、マスター制御デバイスを複雑な回路設計にすることなく所望のスレーブデバイスを動作させることができ、全体として高周波装置を小型化することが可能となる。 In the above configuration, the serial interface of the master control device is connected to the control device and the serial interfaces of the plurality of slave devices, and each of the slave devices has a control terminal that receives a control signal for controlling whether or not each device is operable. And each control terminal is connected to a control device. The control device transmits a control signal to the control terminal of the slave device in accordance with the data signal from the master control device. Thereby, it is possible to control whether or not the slave device is in an operable state from the control device. For this reason, in order to control the operable state of the slave device, the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a desired slave device can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
　また、本発明に係る高周波装置は、前記制御デバイスと複数の前記スレーブデバイスとが、同一の基板に実装されていることが好ましい。 In the high-frequency device according to the present invention, it is preferable that the control device and the plurality of slave devices are mounted on the same substrate.
　上記構成では、制御デバイスと複数のスレーブデバイスとが、同一の基板に実装されているので、装置全体としてより小型化することができ、マスター制御デバイスからは共通のデバイスアドレスを有する一つの部品であるとみなすことができるので、スレーブデバイスの動作を制御することが容易となる。 In the above configuration, since the control device and the plurality of slave devices are mounted on the same board, the entire apparatus can be further reduced in size, and the master control device is a single component having a common device address. Since it can be regarded as being, it becomes easy to control the operation of the slave device.
　また、本発明に係る高周波装置は、前記スレーブデバイスは、オン状態の制御信号を受信した場合に動作可能状態となることが好ましい。 In the high-frequency device according to the present invention, it is preferable that the slave device is operable when receiving an on-state control signal.
　上記構成では、スレーブデバイスは、オン状態の制御信号を受信した場合に動作可能状態となるので、マスター制御デバイスからのデータ信号に応じて動作可能状態であるか否かを制御することが可能となる。 In the above configuration, the slave device becomes operable when it receives an on-state control signal, so it can control whether or not it is operable according to the data signal from the master control device. Become.
　また、本発明に係る高周波装置は、前記制御デバイスは、シリアル信号とパラレル信号とを変換するシリアル／パラレル変換機能を有することが好ましい。 In the high-frequency device according to the present invention, it is preferable that the control device has a serial / parallel conversion function for converting a serial signal and a parallel signal.
　上記構成では、スレーブデバイスのそれぞれの制御端子は、シリアル／パラレル変換機能を有する制御デバイスの制御端子と接続されているので、スレーブデバイスは、それぞれ動作可能状態であるか否かをパラレル信号により制御することができる。したがって、シリアルインタフェースを有するスレーブデバイスと、パラレルインタフェースを有するスレーブデバイスとの両方の動作を制御することも可能となる。 In the above configuration, since each control terminal of the slave device is connected to the control terminal of the control device having the serial / parallel conversion function, each slave device controls whether or not each of the slave devices is operable by a parallel signal. can do. Therefore, it is possible to control the operations of both the slave device having the serial interface and the slave device having the parallel interface.
　また、本発明に係る高周波装置は、前記スレーブデバイスとは異なる複数の他のスレーブデバイスを備え、該他のスレーブデバイスはパラレルインタフェースを有し、該パラレルインタフェースは、前記シリアル／パラレル変換機能を有する前記制御デバイスの制御端子と接続されていることが好ましい。 The high-frequency device according to the present invention includes a plurality of other slave devices different from the slave device, the other slave devices have a parallel interface, and the parallel interface has the serial / parallel conversion function. It is preferable to be connected to a control terminal of the control device.
　上記構成では、スレーブデバイスとは異なる複数の他のスレーブデバイスを備えている場合であっても、他のスレーブデバイスは、パラレルインタフェースがシリアル／パラレル変換機能を有する制御デバイスの制御端子と接続されているので、パラレル信号により動作を制御することが可能となる。 In the above configuration, even when a plurality of other slave devices different from the slave device are provided, the other slave devices are connected to the control terminal of the control device having a parallel / serial conversion function. Therefore, the operation can be controlled by the parallel signal.
　また、本発明に係る高周波装置は、前記マスター制御デバイスと前記制御デバイスとが一体化されていることが好ましい。 In the high-frequency device according to the present invention, it is preferable that the master control device and the control device are integrated.
　上記構成では、マスター制御デバイスと制御デバイスとが一体化されているので、高周波装置をより小型化することが可能となる。 In the above configuration, since the master control device and the control device are integrated, the high-frequency device can be further downsized.
　また、本発明に係る高周波装置は、前記スレーブデバイスは、高周波スイッチ又はパワーアンプであることが好ましい。 In the high-frequency device according to the present invention, it is preferable that the slave device is a high-frequency switch or a power amplifier.
　上記構成では、スレーブデバイスは、高周波スイッチ又はパワーアンプであるので、高周波スイッチ又はパワーアンプの動作を、マスター制御デバイスからのデータ信号に応じて制御することが可能となる。 In the above configuration, since the slave device is a high-frequency switch or power amplifier, the operation of the high-frequency switch or power amplifier can be controlled in accordance with the data signal from the master control device.
　次に、上記目的を達成するために本発明に係る高周波装置は、シリアルインタフェースを有するマスター制御デバイスと、シリアルインタフェースを有する複数のスレーブデバイスとを備える高周波装置であって、複数の前記スレーブデバイスの動作を制御する制御デバイスを備え、複数の前記スレーブデバイスでグループが形成されており、前記マスター制御デバイスのシリアルインタフェースは、前記制御デバイス及び複数の前記スレーブデバイスのシリアルインタフェースと接続され、前記スレーブデバイスが、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子を前記グループ単位で有し、それぞれの該制御端子が前記制御デバイスと接続され、前記制御デバイスは、前記マスター制御デバイスからのデータ信号に応じて前記制御信号を前記グループ単位の前記制御端子へ送信することを特徴とする。 Next, in order to achieve the above object, a high-frequency device according to the present invention is a high-frequency device including a master control device having a serial interface and a plurality of slave devices having a serial interface. A control device for controlling operation, wherein a plurality of slave devices form a group, and a serial interface of the master control device is connected to a serial interface of the control device and the plurality of slave devices; Each of which has a control terminal for receiving a control signal for controlling whether or not it is in an operable state, and each control terminal is connected to the control device, and the control device is connected to the master control. Data from the device And transmitting the control signal to the control terminal of the group unit in accordance with the signal.
　上記構成では、複数の前記スレーブデバイスでグループが形成されており、マスター制御デバイスのシリアルインタフェースは、制御デバイス及び複数のスレーブデバイスのシリアルインタフェースと接続され、スレーブデバイスは、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子をグループ単位で有し、それぞれの制御端子が制御デバイスと接続されている。制御デバイスは、マスター制御デバイスからのデータ信号に応じて制御信号をグループ単位の制御端子へ送信する。これにより、スレーブデバイスが動作可能状態であるか否かを制御デバイスからグループ単位で制御することができる。このため、マスター制御デバイスは、スレーブデバイスの動作可能状態を制御するために、制御デバイスのみにスレーブデバイスのアドレスに関する情報と当該スレーブデバイスを動作可能状態とするかどうかに関する情報を送信すれば良い。したがって、マスター制御デバイスを複雑な回路設計にすることなく所望のグループのスレーブデバイスを動作させることができ、全体として高周波装置を小型化することが可能となる。 In the above configuration, a group is formed by the plurality of slave devices, and the serial interface of the master control device is connected to the serial interface of the control device and the plurality of slave devices, and are the slave devices operable? Each control terminal has a control terminal for receiving a control signal for controlling whether or not, and each control terminal is connected to a control device. The control device transmits a control signal to the group-unit control terminal according to the data signal from the master control device. As a result, whether or not the slave device is operable can be controlled from the control device in units of groups. For this reason, in order to control the operable state of the slave device, the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a slave device of a desired group can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
　次に、上記目的を達成するために本発明に係る高周波装置の制御方法は、マスター制御デバイスと、シリアルインタフェースを有する複数のスレーブデバイスと、該スレーブデバイスの動作の可否状態を制御する制御デバイスとを備える高周波装置の制御方法であって、前記高周波装置は、前記マスター制御デバイスが、前記制御デバイスにデータ信号を送信する第１のステップと、前記制御デバイスが、受信した前記データ信号に基づいて、複数の前記スレーブデバイスの動作の可否状態を制御する制御信号を、複数の前記スレーブデバイスへ送信する第２のステップと、前記複数のスレーブデバイスが、前記制御信号に応じて動作の可否状態を変化させる第３のステップと、前記マスター制御デバイスから複数の前記スレーブデバイスにデータ信号を送信する第４のステップとを含むことを特徴とする。 Next, in order to achieve the above object, a method for controlling a high-frequency device according to the present invention includes a master control device, a plurality of slave devices having a serial interface, and a control device that controls the availability of operation of the slave device. A method for controlling a high-frequency device comprising: a first step in which the master control device transmits a data signal to the control device; and the control device based on the data signal received by the control device A second step of transmitting, to the plurality of slave devices, a control signal for controlling the operation enable / disable states of the plurality of slave devices, and the plurality of slave devices determining the operation enable / disable states according to the control signals. A third step of changing, and a plurality of slave devices from the master control device Characterized in that it comprises a fourth step of transmitting the data signal.
　上記構成では、マスター制御デバイスが、制御デバイスにデータ信号を送信し、制御デバイスが、受信したデータ信号に基づいて、複数のスレーブデバイスの動作の可否状態を制御する制御信号を、複数のスレーブデバイスへ送信する。複数のスレーブデバイスが、制御信号に応じて動作可否状態を変化させ、マスター制御デバイスから複数のスレーブデバイスにデータ信号を送信する。これにより、スレーブデバイスが動作可能状態であるか否かを制御デバイスから制御することができる。このため、マスター制御デバイスは、スレーブデバイスの動作可能状態を制御するために、制御デバイスのみにスレーブデバイスのアドレスに関する情報と当該スレーブデバイスを動作可能状態とするかどうかに関する情報を送信すれば良い。したがって、マスター制御デバイスを複雑な回路設計にすることなく所望のスレーブデバイスを動作させることができ、全体として高周波装置を小型化することが可能となる。 In the above configuration, the master control device transmits a data signal to the control device, and the control device transmits a control signal for controlling the availability of operation of the plurality of slave devices based on the received data signal to the plurality of slave devices. Send to. The plurality of slave devices change the operation availability state according to the control signal, and transmit data signals from the master control device to the plurality of slave devices. Thereby, it is possible to control whether or not the slave device is in an operable state from the control device. For this reason, in order to control the operable state of the slave device, the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a desired slave device can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
　また、本発明に係る高周波装置の制御方法は、前記スレーブデバイスは、イネーブル状態の制御信号を受信した場合に動作可能状態となることが好ましい。 In the method for controlling a high-frequency device according to the present invention, it is preferable that the slave device becomes operable when it receives a control signal in an enabled state.
　上記構成では、スレーブデバイスは、イネーブル状態の制御信号を受信した場合に動作可能状態となるので、マスター制御デバイスからのデータ信号に応じてスレーブデバイスが動作可能状態であるか否かを制御することが可能となる。 In the above configuration, the slave device becomes operable when it receives the control signal in the enabled state, and therefore, it is controlled whether or not the slave device is operable according to the data signal from the master control device. Is possible.
　また、本発明に係る高周波装置の制御方法は、前記制御デバイスは、シリアル信号とパラレル信号とを変換することが好ましい。 Further, in the method for controlling a high frequency device according to the present invention, the control device preferably converts a serial signal and a parallel signal.
　上記構成では、スレーブデバイスの制御端子は、シリアル／パラレル変換機能を有する制御デバイスの制御端子と接続されているので、スレーブデバイスは、それぞれ動作可能状態であるか否かをパラレル信号により制御することができる。したがって、シリアルインタフェースを有するスレーブデバイスと、パラレルインタフェースを有するスレーブデバイスとの両方の動作を制御することも可能となる。 In the above configuration, since the control terminal of the slave device is connected to the control terminal of the control device having a serial / parallel conversion function, each slave device controls whether or not each device is operable by a parallel signal. Can do. Therefore, it is possible to control the operations of both the slave device having the serial interface and the slave device having the parallel interface.
　上記構成によれば、マスター制御デバイスのシリアルインタフェースは、制御デバイス及び複数のスレーブデバイスのシリアルインタフェースと接続され、スレーブデバイスは、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子を有し、それぞれの制御端子が制御デバイスと接続されている。制御デバイスは、マスター制御デバイスからのデータ信号に応じて制御信号をスレーブデバイスの制御端子へ送信する。これにより、スレーブデバイスが動作可能状態であるか否かを制御デバイスから制御することができる。このため、マスター制御デバイスは、スレーブデバイスの動作可能状態を制御するために、制御デバイスのみにスレーブデバイスのアドレスに関する情報と当該スレーブデバイスを動作可能状態とするかどうかに関する情報を送信すれば良い。したがって、マスター制御デバイスを複雑な回路設計にすることなく所望のスレーブデバイスを動作させることができ、全体として高周波装置を小型化することが可能となる。 According to the above configuration, the serial interface of the master control device is connected to the control device and the serial interfaces of the plurality of slave devices, and each slave device receives a control signal for controlling whether or not it is in an operable state. Each control terminal is connected to a control device. The control device transmits a control signal to the control terminal of the slave device in accordance with the data signal from the master control device. Thereby, it is possible to control whether or not the slave device is in an operable state from the control device. For this reason, in order to control the operable state of the slave device, the master control device only needs to transmit information relating to the address of the slave device and information relating to whether or not to make the slave device operable. Therefore, a desired slave device can be operated without making the master control device into a complicated circuit design, and the high-frequency device can be downsized as a whole.
従来の高周波装置の構成を示すブロック図である。It is a block diagram which shows the structure of the conventional high frequency apparatus. 本発明の実施の形態１に係る高周波装置の構成を示すブロック図である。It is a block diagram which shows the structure of the high frequency apparatus which concerns on Embodiment 1 of this invention. 本発明の実施の形態１に係る高周波装置のスレーブデバイスの構成を示す模式図である。It is a schematic diagram which shows the structure of the slave device of the high frequency apparatus which concerns on Embodiment 1 of this invention. 本発明の実施の形態１に係る高周波装置のスレーブデバイスの動作制御方法の説明図である。It is explanatory drawing of the operation control method of the slave device of the high frequency apparatus which concerns on Embodiment 1 of this invention. 本発明の実施の形態１に係る高周波装置の結線を含む構成を示す模式図である。It is a schematic diagram which shows the structure containing the connection of the high frequency apparatus which concerns on Embodiment 1 of this invention. 本発明の実施の形態１に係る高周波装置の結線を含む他の構成を示す模式図である。It is a schematic diagram which shows the other structure including the connection of the high frequency apparatus which concerns on Embodiment 1 of this invention. 本発明の実施の形態２に係る高周波装置の結線を含む構成を示す模式図である。It is a schematic diagram which shows the structure containing the connection of the high frequency apparatus which concerns on Embodiment 2 of this invention. 本発明の実施の形態２に係る高周波装置の結線を含む他の構成を示す模式図である。It is a schematic diagram which shows the other structure including the connection of the high frequency apparatus which concerns on Embodiment 2 of this invention. 本発明の実施の形態３に係る高周波装置の結線を含む構成を示す模式図である。It is a schematic diagram which shows the structure containing the connection of the high frequency apparatus which concerns on Embodiment 3 of this invention.
　以下、本発明の実施の形態について、図面を参照しながら詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
　（実施の形態１）
　図１は、従来の高周波装置の構成を示すブロック図であり、図２は、本発明の実施の形態１に係る高周波装置の構成を示すブロック図である。図１及び図２に示すように、いずれの高周波装置も、マスター制御デバイス（ＲＦＩＣ）１と、マスター制御デバイス１からの制御信号に基づいて動作が制御される複数のスレーブデバイス２とで構成されている。本実施の形態１では、スレーブデバイス２は、例えば高周波スイッチ、パワーアンプ等である。 (Embodiment 1)
FIG. 1 is a block diagram showing the configuration of a conventional high-frequency device, and FIG. 2 is a block diagram showing the configuration of the high-frequency device according to Embodiment 1 of the present invention. As shown in FIGS. 1 and 2, each high-frequency device includes a master control device (RFIC) 1 and a plurality of slave devices 2 whose operations are controlled based on control signals from the master control device 1. ing. In the first embodiment, the slave device 2 is, for example, a high frequency switch or a power amplifier.
　従来の高周波装置では、デバイスアドレスをデータ信号内で指定することにより、データ信号を送信したいスレーブアドレスを特定して、シリアル通信を行う。 In conventional high-frequency devices, by specifying a device address in a data signal, a slave address to which a data signal is to be transmitted is specified, and serial communication is performed.
　しかし、シリアル通信では、仕様上デバイスアドレスに当てることができるビット数が制限される場合がある。例えば、デバイスアドレスビットが４ビットに制限された場合、指定することができるデバイスアドレス数は１６個に制限される。 However, in serial communication, the number of bits that can be assigned to the device address may be limited due to specifications. For example, when the device address bits are limited to 4 bits, the number of device addresses that can be specified is limited to 16.
　このため、マスター制御デバイス１においては、一系統の制御線で１６個を超えるスレーブデバイス２を接続することができない。また、一系統中に同じアドレスを有する複数のスレーブデバイス２が存在する場合、誤動作するおそれが残されている。 For this reason, the master control device 1 cannot connect more than 16 slave devices 2 with a single control line. In addition, when there are a plurality of slave devices 2 having the same address in one system, there is a risk of malfunction.
　そこで、本実施の形態１では、図２に示すように、データ通信用の通信線（以下、データバス）３と、スレーブデバイス２を動作可能状態（以下、イネーブル状態）を制御する制御信号用の通信線（以下、イネーブル制御線）４とを別個に設けている。マスター制御デバイス１には、データバス３が接続されるシリアルインタフェース１２の他、イネーブル制御線４が接続される制御端子１１を備えている。同様に、各スレーブデバイス２には、データバス３が接続されるシリアルインタフェース２２の他、イネーブル制御線４が接続される制御端子２１を備えている。なお、本実施の形態１において、「イネーブル状態」とは、スレーブデバイス２が、データバス３によりマスター制御デバイス１から送信されてくるデータ信号を受信することが可能である状態を意味する。これに対して、スレーブデバイス２が、データバス３によりマスター制御デバイス１から送信されてくるデータ信号を受信することが不可能である状態を「ディスエーブル状態」という。 Therefore, in the first embodiment, as shown in FIG. 2, a communication line for data communication (hereinafter referred to as a data bus) 3 and a control signal for controlling an operable state (hereinafter referred to as an enable state) of the slave device 2 are used. Communication lines (hereinafter referred to as enable control lines) 4 are provided separately. The master control device 1 includes a control terminal 11 to which an enable control line 4 is connected, in addition to a serial interface 12 to which the data bus 3 is connected. Similarly, each slave device 2 includes a control terminal 21 to which the enable control line 4 is connected in addition to the serial interface 22 to which the data bus 3 is connected. In the first embodiment, the “enabled state” means a state in which the slave device 2 can receive a data signal transmitted from the master control device 1 through the data bus 3. On the other hand, the state in which the slave device 2 cannot receive the data signal transmitted from the master control device 1 through the data bus 3 is referred to as “disabled state”.
　実際には、データバス３は、データ信号線とクロック信号線とで構成されている。図３は、本発明の実施の形態１に係る高周波装置のスレーブデバイス２の構成を示す模式図である。 Actually, the data bus 3 is composed of a data signal line and a clock signal line. FIG. 3 is a schematic diagram showing the configuration of the slave device 2 of the high-frequency device according to Embodiment 1 of the present invention.
　図３に示すように、データバス３は、データ信号線３１とクロック信号線３２とで構成されており、スレーブデバイス２は、マスター制御デバイス１で指定されたデバイスアドレスを含むデータ（信号）をデータ信号線３１を介してシリアルインタフェース２２で受信する。データ信号線３１及びクロック信号線３２はシリアルインタフェース２２に接続され、イネーブル制御線４は、別途制御端子２１に接続されている。制御端子２１では、制御信号として例えばＨｉ／Ｌｏｗ信号を受信する。Ｈｉ信号を受信した場合にはイネーブル状態になり、Ｌｏｗ信号を受信した場合にはディスエーブル状態となる。 As shown in FIG. 3, the data bus 3 includes a data signal line 31 and a clock signal line 32, and the slave device 2 receives data (signals) including a device address designated by the master control device 1. The data is received by the serial interface 22 via the data signal line 31. The data signal line 31 and the clock signal line 32 are connected to the serial interface 22, and the enable control line 4 is connected to the control terminal 21 separately. The control terminal 21 receives, for example, a Hi / Low signal as a control signal. When a Hi signal is received, it is enabled, and when a Low signal is received, it is disabled.
　図４は、本発明の実施の形態１に係る高周波装置のスレーブデバイス２の動作制御方法の説明図である。図４では、同じ４ビットのデバイスアドレス‘００１０’を有する複数のスレーブデバイス２が一のマスター制御デバイス１に接続されている場合を例に挙げている。 FIG. 4 is an explanatory diagram of an operation control method for the slave device 2 of the high-frequency device according to the first embodiment of the present invention. FIG. 4 shows an example in which a plurality of slave devices 2 having the same 4-bit device address “0010” are connected to one master control device 1.
　図４に示すように、一のマスター制御デバイス１に、同じデバイスアドレスを有する複数のスレーブデバイス２Ａ、２Ｂ、２Ｃが接続されている。イネーブル制御線４は、各スレーブデバイス２Ａ、２Ｂ、２Ｃの制御端子２１に接続されている。例えば、スレーブデバイス２Ａを動作させる場合、マスター制御デバイス１は、制御端子１１からイネーブル制御線４を介して、スレーブデバイス２ＡのみにＨｉ信号を、スレーブデバイス２Ｂ、２ＣにはＬｏｗ信号を、それぞれ送信する。これにより、スレーブデバイス２Ａのイネーブルビットが‘１’となり、データを送受信することが可能なイネーブル状態となる。一方、スレーブデバイス２Ｂ、２Ｃのイネーブルビットは‘０’となるので、データを送受信することができないディスエーブル状態となる。 As shown in FIG. 4, a plurality of slave devices 2A, 2B, 2C having the same device address are connected to one master control device 1. The enable control line 4 is connected to the control terminal 21 of each slave device 2A, 2B, 2C. For example, when operating the slave device 2A, the master control device 1 transmits a Hi signal only to the slave device 2A and a Low signal to the slave devices 2B and 2C from the control terminal 11 via the enable control line 4. To do. As a result, the enable bit of the slave device 2A becomes “1”, and an enable state in which data can be transmitted and received is set. On the other hand, since the enable bits of the slave devices 2B and 2C are “0”, a disabled state in which data cannot be transmitted and received is set.
　スレーブデバイス２Ａのみがイネーブル状態となっている状態で、マスター制御デバイス１は、データバス３を介して、制御対象となるスレーブデバイス２を示すアドレス‘００１０’を含むデータ信号を、全てのスレーブデバイス２Ａ、２Ｂ、２Ｃへ送信する。スレーブデバイス２Ｂ、２Ｃでは、イネーブルビットが‘０’となっているので、データ信号を受信できない。したがって、データ信号に含まれるデバイスアドレスがスレーブデバイス２Ｂ、２Ｃのアドレスと一致している場合であってもスレーブデバイス２Ｂ、２Ｃは動作しない。なお、イネーブル制御線４を介して制御信号を送信するタイミングと、データバス３を介してデータ信号を送信するタイミングとの間には、所定の間隔を設けている。 In a state where only the slave device 2A is enabled, the master control device 1 sends the data signal including the address “0010” indicating the slave device 2 to be controlled to all the slave devices via the data bus 3. Send to 2A, 2B, 2C. In the slave devices 2B and 2C, since the enable bit is “0”, the data signal cannot be received. Therefore, even if the device address included in the data signal matches the address of the slave devices 2B and 2C, the slave devices 2B and 2C do not operate. A predetermined interval is provided between the timing at which the control signal is transmitted via the enable control line 4 and the timing at which the data signal is transmitted via the data bus 3.
　スレーブデバイス２Ａでは、イネーブルビットが‘１’となっているので、受信したデバイスアドレスとスレーブデバイス２Ａのアドレスとが一致するか否かを判断する。アドレスが一致する場合には、スレーブデバイス２Ａが動作する。 In the slave device 2A, since the enable bit is “1”, it is determined whether or not the received device address matches the address of the slave device 2A. If the addresses match, the slave device 2A operates.
　実際には、マスター制御デバイス１は制御デバイスと接続されており、制御デバイスは、スレーブデバイス２が動作可能状態であるか否かを制御する。図５は、本発明の実施の形態１に係る高周波装置の結線を含む構成を示す模式図である。 Actually, the master control device 1 is connected to the control device, and the control device controls whether or not the slave device 2 is operable. FIG. 5 is a schematic diagram showing a configuration including connection of the high-frequency device according to Embodiment 1 of the present invention.
　図５に示すように、マスター制御デバイス１は、シリアルインタフェース１２と接続されたデータバス３を介して、各スレーブデバイス２Ａ、２Ｂ、２Ｃのシリアルインタフェース２２と接続されている（シリアル接続）。また、制御デバイス６のシリアルインタフェース６２とも、データバス３を介して接続されている。一方、制御デバイス６は、複数のイネーブル制御線４を介してそれぞれスレーブデバイス２Ａ、２Ｂ、２Ｃと接続された、複数の制御端子６１を有している。 As shown in FIG. 5, the master control device 1 is connected to the serial interface 22 of each slave device 2A, 2B, 2C via the data bus 3 connected to the serial interface 12 (serial connection). The serial interface 62 of the control device 6 is also connected via the data bus 3. On the other hand, the control device 6 has a plurality of control terminals 61 connected to the slave devices 2A, 2B and 2C via the plurality of enable control lines 4, respectively.
　イネーブル制御線４は、例えばパラレル接続で各スレーブデバイス２Ａ、２Ｂ、２Ｃの制御端子２１に接続されており、図５の例では、制御デバイス６は、スレーブデバイス２ＡのみにＨｉ信号を、スレーブデバイス２Ｂ、２ＣにはＬｏｗ信号を、それぞれ制御信号として送信している。これにより、スレーブデバイス２Ａのイネーブルビットが‘１’となり、データを送受信することが可能なイネーブル状態となる。一方、スレーブデバイス２Ｂ、２Ｃのイネーブルビットは‘０’となるので、データを送受信することができないディスエーブル状態となる。また、制御デバイス６は、シリアル信号とパラレル信号とを変換するシリアル／パラレル変換機能を有している。制御デバイス６が、マスター制御デバイスからのデータ信号をシリアル方式からパラレル方式へと変換することにより、各スレーブデバイス２がイネーブル制御線４を介して、制御信号を受信することができる。 The enable control line 4 is connected to the control terminal 21 of each of the slave devices 2A, 2B, and 2C, for example, in parallel connection. In the example of FIG. 5, the control device 6 sends a Hi signal only to the slave device 2A, and the slave device Low signals are transmitted as control signals to 2B and 2C, respectively. As a result, the enable bit of the slave device 2A becomes “1”, and an enable state in which data can be transmitted and received is set. On the other hand, since the enable bits of the slave devices 2B and 2C are “0”, a disabled state in which data cannot be transmitted and received is set. The control device 6 has a serial / parallel conversion function for converting a serial signal and a parallel signal. The control device 6 converts the data signal from the master control device from the serial system to the parallel system, so that each slave device 2 can receive the control signal via the enable control line 4.
　具体的には、まずマスター制御デバイス１は、データバス３を介して制御対象となる制御デバイス６を示すデバイスアドレスを含むデータ信号を、制御デバイス６及び全てのスレーブデバイス２Ａ、２Ｂ、２Ｃへ送信する。このデータ信号を受信した制御デバイス６は、データ信号をシリアル／パラレル変換して、イネーブル制御線４を介してスレーブデバイス２Ａ、２Ｂ、２Ｃへ送信する。上述のように、図５の例では、スレーブデバイス２ＡにＨｉ信号を、スレーブデバイス２Ｂ、２ＣにＬｏｗ信号を、それぞれ送信する。 Specifically, first, the master control device 1 transmits a data signal including a device address indicating the control device 6 to be controlled to the control device 6 and all the slave devices 2A, 2B, and 2C via the data bus 3. To do. The control device 6 that has received this data signal performs serial / parallel conversion on the data signal and transmits it to the slave devices 2A, 2B, and 2C via the enable control line 4. As described above, in the example of FIG. 5, the Hi signal is transmitted to the slave device 2A, and the Low signal is transmitted to the slave devices 2B and 2C.
　なお、マスター制御デバイス１からデータ信号を送信する時点で、スレーブデバイス２Ａ、２Ｂ、２Ｃがディスエーブル状態である場合には、このデータ信号を受信することはできない。また、スレーブデバイス２Ａ、２Ｂ、２Ｃがイネーブル状態であっても、この時点では制御デバイス６のアドレスとスレーブデバイス２Ａ、２Ｂ、２Ｃのデバイスアドレスとが異なるので、スレーブデバイス２Ａ、２Ｂ、２Ｃは動作しない。 If the slave devices 2A, 2B, and 2C are in a disabled state when the data signal is transmitted from the master control device 1, the data signal cannot be received. Even if the slave devices 2A, 2B, and 2C are enabled, the address of the control device 6 and the device address of the slave devices 2A, 2B, and 2C are different at this time, so that the slave devices 2A, 2B, and 2C operate. do not do.
　Ｈｉ信号を受信したスレーブデバイス２Ａは、イネーブルビットが‘１’となり、イネーブル状態となる。Ｌｏｗ信号を受信したスレーブデバイス２Ｂ、２Ｃは、イネーブルビットが‘０’となり、ディスエーブル状態となる。 The slave device 2A that has received the Hi signal has the enable bit set to ‘1’ and is enabled. The slave devices 2B and 2C that have received the Low signal have their enable bits set to '0' and are disabled.
　次に、マスター制御デバイス１は、スレーブデバイス２Ａ、２Ｂ、２Ｃのイネーブルビットが設定された状態で、データバス３を介して、制御対象となるスレーブデバイス２を示すアドレス‘００１０’を含むデータ信号を全てのスレーブデバイス２Ａ、２Ｂ、２Ｃへ送信する。スレーブデバイス２Ｂ、２Ｃでは、イネーブルビットが‘０’となっているので、データ信号を受信することができない。したがって、データ信号に含まれるアドレスがスレーブデバイス２Ｂ、２Ｃのデバイスアドレスと一致してもスレーブデバイス２Ｂ、２Ｃは動作しない。 Next, the master control device 1 includes a data signal including an address “0010” indicating the slave device 2 to be controlled via the data bus 3 in a state where the enable bits of the slave devices 2A, 2B, and 2C are set. Is transmitted to all slave devices 2A, 2B, 2C. In the slave devices 2B and 2C, since the enable bit is “0”, the data signal cannot be received. Therefore, even if the address included in the data signal matches the device address of the slave devices 2B and 2C, the slave devices 2B and 2C do not operate.
　スレーブデバイス２Ａでは、イネーブルビットが‘１’となっているので、受信したデータ信号のアドレスとスレーブデバイス２Ａのデバイスアドレスとが一致するか否かを判断する。図５の例では、アドレスが一致しているので、スレーブデバイス２Ａが動作する。 In the slave device 2A, since the enable bit is “1”, it is determined whether or not the address of the received data signal matches the device address of the slave device 2A. In the example of FIG. 5, since the addresses match, the slave device 2A operates.
　以上のように本実施の形態１では、スレーブデバイス２が動作可能状態であるか否かを制御デバイス６から制御することができるので、同じデバイスアドレスを有するスレ―ブデバイス２を含む高周波装置であっても、動作可能状態であるスレーブデバイス２のみを動作させることができる。したがって、マスター制御デバイス１を複雑な回路設計にすることなく所望のスレーブデバイス２を動作させることができ、全体として高周波装置を小型化することが可能となる。 As described above, according to the first embodiment, whether or not the slave device 2 is in an operable state can be controlled from the control device 6, so that the high-frequency device including the slave device 2 having the same device address is used. However, only the slave device 2 in the operable state can be operated. Therefore, the desired slave device 2 can be operated without making the master control device 1 into a complicated circuit design, and the high-frequency device can be downsized as a whole.
　なお、制御デバイス６とスレーブデバイス２とが同じデバイスアドレスを有する場合、マスター制御デバイス１からデータ信号を送信する時点で、スレーブデバイス２Ａ、２Ｂ、２Ｃがディスエーブル状態であるときには、スレーブデバイス２Ａ、２Ｂ、２Ｃは該データ信号を受信することができない。 When the control device 6 and the slave device 2 have the same device address, when the slave device 2A, 2B, 2C is in a disabled state at the time of transmitting a data signal from the master control device 1, the slave device 2A, 2B and 2C cannot receive the data signal.
　また、制御デバイス６とスレーブデバイス２とが同じデバイスアドレスを有する場合、マスター制御デバイス１からデータ信号を送信する時点で、スレーブデバイス２Ａ、２Ｂ、２Ｃがイネーブル状態であっても、該データ信号はスレーブデバイス２Ａ、２Ｂ、２Ｃの動作を制御するデータ形式ではないので、スレーブデバイス２Ａ、２Ｂ、２Ｃが該データ信号を受信しても動作しない。このため、制御デバイス６とスレーブデバイス２とを同じアドレスに設定し、マスター制御デバイス１を除く一の高周波装置として構成した場合、別途設けられたマスター制御デバイス１からは当該高周波装置が共通のデバイスアドレスを有する一つの部品であると見なすことができるので、スレーブデバイス２の動作制御を容易に行うことができる。 Further, when the control device 6 and the slave device 2 have the same device address, even if the slave devices 2A, 2B, and 2C are in an enabled state when the data signal is transmitted from the master control device 1, the data signal is Since the data format does not control the operation of the slave devices 2A, 2B, and 2C, the slave devices 2A, 2B, and 2C do not operate even when the data signals are received. For this reason, when the control device 6 and the slave device 2 are set to the same address and are configured as one high-frequency device excluding the master control device 1, the master control device 1 provided separately has a common device for the high-frequency device. Since it can be regarded as one component having an address, the operation control of the slave device 2 can be easily performed.
　なお、マスター制御デバイス１内に制御デバイス６を組み込んで一体化しても良い。図６は、本発明の実施の形態１に係る高周波装置の結線を含む他の構成を示す模式図である。 Note that the control device 6 may be incorporated in the master control device 1 and integrated. FIG. 6 is a schematic diagram showing another configuration including connection of the high-frequency device according to Embodiment 1 of the present invention.
　図６に示すように、マスター制御デバイス１に制御デバイス６の機能、すなわちパラレル通信により、スレーブデバイス２が動作可能状態であるか否かを制御する制御信号を送信する機能を設けてある。そのため、マスター制御デバイス１のシリアルインタフェース１２にデータバス３が接続されているのに加えて、制御端子１１にパラレル通信するためのイネーブル制御線４が接続されている。イネーブル制御線４は、各スレーブデバイス２の制御端子２１に接続されており、マスター制御デバイス１は、イネーブル制御線４を介してスレーブデバイス２が動作可能状態であるか否かを制御した後、データバス３を介して、制御対象となるスレーブデバイス２へデータ信号を送信するので、同様の効果が期待できる。 As shown in FIG. 6, the master control device 1 is provided with the function of the control device 6, that is, the function of transmitting a control signal for controlling whether or not the slave device 2 is operable by parallel communication. Therefore, in addition to the data bus 3 being connected to the serial interface 12 of the master control device 1, an enable control line 4 for parallel communication is connected to the control terminal 11. The enable control line 4 is connected to the control terminal 21 of each slave device 2, and the master control device 1 controls whether or not the slave device 2 is in an operable state via the enable control line 4. Since a data signal is transmitted to the slave device 2 to be controlled via the data bus 3, the same effect can be expected.
　このように、すべての制御機能をマスター制御デバイス１に集約することで、より小型化された高周波装置を提供することが可能となる。 Thus, by consolidating all control functions in the master control device 1, it is possible to provide a more compact high-frequency device.
　（実施の形態２）
　本実施の形態２に係る高周波装置の基本的な構成は、実施の形態１と同様であることから、同一の符号を付することにより詳細な説明は省略する。本実施の形態２は、複数のスレーブデバイス２でグループを形成し、イネーブル制御線４がグループ単位で接続されている点で実施の形態１とは相違する。図７は、本発明の実施の形態２に係る高周波装置の結線を含む構成を示す模式図である。 (Embodiment 2)
Since the basic configuration of the high-frequency device according to the second embodiment is the same as that of the first embodiment, detailed description thereof is omitted by attaching the same reference numerals. The second embodiment is different from the first embodiment in that a plurality of slave devices 2 form a group and the enable control lines 4 are connected in units of groups. FIG. 7 is a schematic diagram showing a configuration including connection of the high-frequency device according to Embodiment 2 of the present invention.
　図７に示すように、マスター制御デバイス１は、データバス３を介して各グループに属する各スレーブデバイス２及び制御デバイス６と接続されている（シリアル接続）。一方、制御デバイス６は、複数のイネーブル制御線４を介して、それぞれグループ５Ａ、５Ｂ、５Ｃと接続された、複数の制御端子６１を有している。 As shown in FIG. 7, the master control device 1 is connected to each slave device 2 and control device 6 belonging to each group via a data bus 3 (serial connection). On the other hand, the control device 6 has a plurality of control terminals 61 connected to the groups 5A, 5B, and 5C via the plurality of enable control lines 4, respectively.
　パラレル接続で各グループ５Ａ、５Ｂ、５Ｃに属するスレーブデバイス２のそれぞれの制御端子２１は、グループ単位で一つの制御端子２１にイネーブル制御線４を介して接続されているが、図７では、図を簡素化するために各グループ５Ａ、５Ｂ、５Ｃに接続されているように表示している。同時に、シリアルインタフェース１２、２２も省略している。 The control terminals 21 of the slave devices 2 belonging to the groups 5A, 5B, and 5C in parallel connection are connected to one control terminal 21 via the enable control line 4 in group units. In order to simplify this, it is displayed as being connected to each group 5A, 5B, 5C. At the same time, the serial interfaces 12 and 22 are also omitted.
　そして、各グループ５Ａ、５Ｂ、５Ｃ内のスレーブデバイス２のデバイスアドレスは互いに相違しているのに対して、異なるグループには同じデバイスアドレスを有するスレーブデバイス２を用いても良い。したがって、マスター制御デバイス１とシリアル接続するデバイスアドレス数が１６個に制限される場合であっても、１６個を超えてスレーブデバイス２を接続することができる。 The device addresses of the slave devices 2 in the groups 5A, 5B, and 5C are different from each other, but the slave devices 2 having the same device address may be used in different groups. Therefore, even when the number of device addresses serially connected to the master control device 1 is limited to 16, the slave devices 2 can be connected to more than 16.
　図７の例では、制御デバイス６は、グループ５Ａの複数のスレーブデバイス２にＨｉ信号を、他のグループ５Ｂ、５Ｃの複数のスレーブデバイス２にはＬｏｗ信号を、それぞれ制御信号として送信している。これにより、グループ５Ａに属するすべてのスレーブデバイス２のイネーブルビットが‘１’となり、データを送受信することが可能なイネーブル状態（動作可能状態）となる。一方、他のグループ５Ｂ、５Ｃに属するすべてのスレーブデバイス２のイネーブルビットは‘０’となるので、データを送受信することができないディスエーブル状態となる。 In the example of FIG. 7, the control device 6 transmits a Hi signal to the plurality of slave devices 2 in the group 5A and a Low signal to the plurality of slave devices 2 in the other groups 5B and 5C as control signals. . As a result, the enable bits of all the slave devices 2 belonging to the group 5A become “1”, and an enable state (operable state) in which data can be transmitted and received is set. On the other hand, since the enable bits of all the slave devices 2 belonging to the other groups 5B and 5C are '0', the disabled state in which data cannot be transmitted / received is set.
　具体的には、まずマスター制御デバイス１は、データバス３を介して制御対象となる制御デバイス６を示すデバイスアドレスを含むデータ信号を、制御デバイス６及び全てのグループ５Ａ、５Ｂ、５Ｃに属するスレーブデバイス２へ送信する。このデバイスアドレスを含むデータ信号を受信した制御デバイス６は、当該データ信号をシリアル／パラレル変換して、グループ５Ａ、５Ｂ、５Ｃに属するすべてのスレーブデバイス２へ制御信号として送信する。上述のように、図７の例では、グループ５ＡにＨｉ信号を、グループ５Ｂ、５ＣにＬｏｗ信号を、それぞれ送信する。 Specifically, first, the master control device 1 sends a data signal including a device address indicating the control device 6 to be controlled via the data bus 3 to a slave belonging to the control device 6 and all the groups 5A, 5B, and 5C. Send to device 2. The control device 6 that has received the data signal including the device address performs serial / parallel conversion on the data signal and transmits the data signal as a control signal to all the slave devices 2 belonging to the groups 5A, 5B, and 5C. As described above, in the example of FIG. 7, the Hi signal is transmitted to the group 5A, and the Low signal is transmitted to the groups 5B and 5C.
　なお、マスター制御デバイス１からデータ信号を送信する時点で、スレーブデバイス２がディスエーブル状態である場合には、このデータ信号を受信することはできない。また、スレーブデバイス２がイネーブル状態であっても、この時点では制御デバイス６のアドレスとスレーブデバイス２のアドレスとが異なるので、スレーブデバイス２は動作しない。 Note that when the slave device 2 is in a disabled state at the time of transmitting a data signal from the master control device 1, this data signal cannot be received. Even if the slave device 2 is enabled, the address of the control device 6 and the address of the slave device 2 are different at this time, so that the slave device 2 does not operate.
　Ｈｉ信号を受信したグループ５Ａに属するスレーブデバイス２は、イネーブルビットが‘１’となり、イネーブル状態（動作可能状態）となる。Ｌｏｗ信号を受信したグループ５Ｂ、５Ｃに属するスレーブデバイス２は、イネーブルビットが‘０’となり、ディスエーブル状態となる。 The slave device 2 belonging to the group 5A that has received the Hi signal has an enable bit of “1” and is in an enabled state (operable state). The slave devices 2 belonging to the groups 5B and 5C that have received the Low signal have the enable bit set to '0' and are disabled.
　グループ５Ａに属するスレーブデバイス２のみがイネーブル状態となっている状態で、マスター制御デバイス１は、再度データバス３を介して制御対象となるスレーブデバイス２を示すアドレス‘００１０’を含むデータ信号を送信する。グループ５Ｂ、５Ｃに属するスレーブデバイス２では、イネーブルビットが‘０’となっているので、データ信号を受信することができない。したがって、アドレスが一致しているスレーブデバイス２であってもグループ５Ｂ、５Ｃに属するスレーブデバイス２は動作しない。 In a state where only the slave device 2 belonging to the group 5A is enabled, the master control device 1 again transmits a data signal including the address “0010” indicating the slave device 2 to be controlled via the data bus 3. To do. In the slave devices 2 belonging to the groups 5B and 5C, since the enable bit is “0”, the data signal cannot be received. Therefore, even if the slave devices 2 have the same address, the slave devices 2 belonging to the groups 5B and 5C do not operate.
　一方、グループ５Ａに属するそれぞれのスレーブデバイス２では、イネーブルビットが‘１’となっているので、受信したアドレスとそれぞれのスレーブデバイス２のアドレスとが一致するか否かを判断する。図７の例では、スレーブデバイス２Ａのアドレスが一致しているので、スレーブデバイス２Ａのみが動作する。 On the other hand, in each slave device 2 belonging to the group 5A, since the enable bit is “1”, it is determined whether or not the received address matches the address of each slave device 2. In the example of FIG. 7, since the addresses of the slave devices 2A match, only the slave device 2A operates.
　以上のように本実施の形態２では、スレーブデバイス２が動作可能状態であるか否かをグループ単位で制御することができるので、シリアル制御で指定することができるアドレス数が制限される場合であっても、制限を超えてスレーブデバイス２を接続することができ、所望のスレーブデバイス２を動作させることが可能となる。 As described above, according to the second embodiment, whether or not the slave device 2 is in an operable state can be controlled in units of groups, so that the number of addresses that can be designated by serial control is limited. Even in such a case, the slave device 2 can be connected beyond the limit, and the desired slave device 2 can be operated.
　なお、マスター制御デバイス１内に制御デバイス６を組み込んで一体化しても良い。図８は、本発明の実施の形態２に係る高周波装置の結線を含む他の構成を示す模式図である。 Note that the control device 6 may be incorporated in the master control device 1 and integrated. FIG. 8 is a schematic diagram showing another configuration including connection of the high-frequency device according to Embodiment 2 of the present invention.
　図８に示すように、マスター制御デバイス１に制御デバイス６の機能、すなわちパラレル通信により、スレーブデバイス２が動作可能状態であるか否かを制御する制御信号を送信する機能を設けてある。そのため、マスター制御デバイス１のシリアルインタフェース１２にデータバス３が接続されているのに加えて、制御端子１１にパラレル通信するためのイネーブル制御線４が接続されている。イネーブル制御線４は、各スレーブデバイス２の制御端子２１に接続されており、マスター制御デバイス１は、制御端子１１及びイネーブル制御線４を介してスレーブデバイス２が動作可能状態であるか否かを制御した後、データバス３を介して、制御対象となるスレーブデバイス２のアドレスを含むデータ信号を送信するので、同様の効果が期待できる。 As shown in FIG. 8, the master control device 1 is provided with the function of the control device 6, that is, a function of transmitting a control signal for controlling whether or not the slave device 2 is operable by parallel communication. Therefore, in addition to the data bus 3 being connected to the serial interface 12 of the master control device 1, an enable control line 4 for parallel communication is connected to the control terminal 11. The enable control line 4 is connected to the control terminal 21 of each slave device 2, and the master control device 1 determines whether or not the slave device 2 is operable via the control terminal 11 and the enable control line 4. Since the data signal including the address of the slave device 2 to be controlled is transmitted via the data bus 3 after the control, the same effect can be expected.
　このように、すべての制御機能をマスター制御デバイス１に集約することで、より小型化された高周波装置を提供することが可能となる。 Thus, by consolidating all control functions in the master control device 1, it is possible to provide a more compact high-frequency device.
　（実施の形態３）
　本実施の形態３に係る高周波装置の基本的な構成は、実施の形態１及び２と同様であることから、同一の符号を付することにより詳細な説明は省略する。本実施の形態３は、制御デバイス６からのパラレル通信のみで動作を制御されるスレーブデバイス７Ｄ、７Ｅ、７Ｆを備える点で実施の形態１及び２とは相違する。図９は、本発明の実施の形態３に係る高周波装置の結線を含む構成を示す模式図である。 (Embodiment 3)
Since the basic configuration of the high-frequency device according to Embodiment 3 is the same as that of Embodiments 1 and 2, detailed description thereof is omitted by attaching the same reference numerals. The third embodiment is different from the first and second embodiments in that slave devices 7D, 7E, and 7F whose operations are controlled only by parallel communication from the control device 6 are provided. FIG. 9 is a schematic diagram showing a configuration including connection of the high-frequency device according to Embodiment 3 of the present invention.
　図９に示すように、マスター制御デバイス１は、データ通信線３を介して各グループ５Ａ～５Ｃに属する各スレーブデバイス２及び制御デバイス６と接続されている（シリアル通信）。一方、制御デバイス６は、複数のイネーブル制御線４を介して、それぞれグループ５Ａ～５Ｃと接続された、複数の制御端子６１を有している。そして、いずれのグループにも属していないスレーブデバイス（他のスレーブデバイス）７Ｄ、７Ｅ、７Ｆも、それぞれ複数のイネーブル制御線４と制御端子６１とを介して、制御デバイス６とパラレル接続されている。 As shown in FIG. 9, the master control device 1 is connected to each slave device 2 and control device 6 belonging to each group 5A to 5C via a data communication line 3 (serial communication). On the other hand, the control device 6 has a plurality of control terminals 61 connected to the groups 5A to 5C via the plurality of enable control lines 4, respectively. The slave devices (other slave devices) 7D, 7E, and 7F that do not belong to any group are also connected in parallel to the control device 6 via the plurality of enable control lines 4 and the control terminals 61, respectively. .
　イネーブル制御線４は、例えばパラレル接続で各グループ５Ａ～５Ｃに属するスレーブデバイス２の制御端子２１に接続されているが、図９では、図を簡素化するためにグループ５Ｂを省略するとともに、各グループ５Ａ～５Ｃに接続されているように表示している。同時に、シリアルインタフェース１２、２２も省略している。 The enable control line 4 is connected to the control terminal 21 of the slave device 2 belonging to each of the groups 5A to 5C by, for example, parallel connection. In FIG. 9, the group 5B is omitted to simplify the drawing, Displayed as being connected to groups 5A to 5C. At the same time, the serial interfaces 12 and 22 are also omitted.
　そして、各グループ５Ａ～５Ｃ内のスレーブデバイス２のアドレスは互いに相違しているのに対して、異なるグループには同じアドレスを有するスレーブデバイス２を用いても良い。したがって、マスター制御デバイス１とシリアル接続するアドレス数が１６個である場合であっても、１６個を超えてスレーブデバイス２を接続することができる。 The addresses of the slave devices 2 in the groups 5A to 5C are different from each other, but the slave devices 2 having the same address may be used in different groups. Therefore, even if the number of addresses serially connected to the master control device 1 is 16, the slave devices 2 can be connected beyond the 16 addresses.
　また、他のスレーブデバイス７Ｄ、７Ｅ、７Ｆは、イネーブル制御線４がパラレルインタフェース７１に接続されており、制御デバイス６においてシリアル／パラレル変換されたデータ信号がパラレル通信により送受信される。スレーブデバイス７Ｄ、７Ｅ、７Ｆは、イネーブル制御線４を介して動作が制御される。 Further, in the other slave devices 7D, 7E, and 7F, the enable control line 4 is connected to the parallel interface 71, and the serial / parallel converted data signal in the control device 6 is transmitted / received by parallel communication. The operations of the slave devices 7D, 7E, and 7F are controlled via the enable control line 4.
　グループに属するスレーブデバイス２の制御については、実施の形態２と同様であることから、同一の符号を付することにより詳細な説明は省略する。 Since the control of the slave devices 2 belonging to the group is the same as that of the second embodiment, the detailed description is omitted by attaching the same reference numerals.
　以上のように本実施の形態３では、グループに属していない他のスレーブデバイス７Ｄ、７Ｅ、７Ｆを備えている場合であっても、スレーブデバイス７Ｄ、７Ｅ、７Ｆの動作を、パラレル通信により制御することが可能となる。 As described above, in the third embodiment, even when other slave devices 7D, 7E, and 7F that do not belong to the group are provided, the operations of the slave devices 7D, 7E, and 7F are controlled by parallel communication. It becomes possible to do.
　その他、上述した実施の形態は、本発明の趣旨を逸脱しない範囲で変更することができることは言うまでもない。例えば実施の形態３において、マスター制御デバイス１内に制御デバイス６の機能を組み込んで一体化しても良いことは言うまでもない。 In addition, it goes without saying that the embodiment described above can be changed without departing from the spirit of the present invention. For example, in Embodiment 3, it goes without saying that the function of the control device 6 may be incorporated into the master control device 1 and integrated.
　１　マスター制御デバイス
　２、２Ａ、２Ｂ、２Ｃ　スレーブデバイス
　３　データバス
　４　イネーブル制御線
　５Ａ、５Ｂ、５Ｃ　グループ（モジュール）
　７Ｄ、７Ｅ、７Ｆ　スレーブデバイス（他のスレーブデバイス）
　１１、２１、６１　制御端子
　１２、２２、６２　シリアルインタフェース
　７１　パラレルインタフェース 1 Master control device 2, 2A, 2B, 2C Slave device 3 Data bus 4 Enable control line 5A, 5B, 5C Group (module)
7D, 7E, 7F Slave device (other slave devices)
11, 21, 61 Control terminal 12, 22, 62 Serial interface 71 Parallel interface

Claims (11)

  1. 　シリアルインタフェースを有するマスター制御デバイスと、
    　シリアルインタフェースを有する複数のスレーブデバイスと
    　を備える高周波装置であって、
    　複数の前記スレーブデバイスの動作を制御する制御デバイスを備え、
    　前記マスター制御デバイスのシリアルインタフェースは、前記制御デバイス及び複数の前記スレーブデバイスのシリアルインタフェースと接続され、
    　前記スレーブデバイスは、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子を有し、それぞれの該制御端子が前記制御デバイスと接続され、
    　前記制御デバイスは、前記マスター制御デバイスからのデータ信号に応じて前記制御信号を前記スレーブデバイスの前記制御端子へ送信することを特徴とする高周波装置。     A master control device having a serial interface;
    A high-frequency device comprising a plurality of slave devices having a serial interface,
    A control device for controlling the operation of the plurality of slave devices;
    The serial interface of the master control device is connected to the serial interface of the control device and the plurality of slave devices,
    Each of the slave devices has a control terminal that receives a control signal for controlling whether or not each of the slave devices is operable, and each of the control terminals is connected to the control device,
    The high-frequency apparatus, wherein the control device transmits the control signal to the control terminal of the slave device in accordance with a data signal from the master control device.
  2. 　前記制御デバイスと複数の前記スレーブデバイスとが、同一の基板に実装されていることを特徴とする請求項１に記載の高周波装置。 The high-frequency apparatus according to claim 1, wherein the control device and the plurality of slave devices are mounted on the same substrate.
  3. 　前記スレーブデバイスは、オン状態の制御信号を受信した場合に動作可能状態となることを特徴とする請求項１又は２に記載の高周波装置。 The high-frequency device according to claim 1 or 2, wherein the slave device is in an operable state when receiving an on-state control signal.
  4. 　前記制御デバイスは、シリアル信号とパラレル信号とを変換するシリアル／パラレル変換機能を有することを特徴とする請求項１乃至３のいずれか一項に記載の高周波装置。 4. The high-frequency device according to claim 1, wherein the control device has a serial / parallel conversion function for converting a serial signal and a parallel signal.
  5. 　前記スレーブデバイスとは異なる複数の他のスレーブデバイスを備え、
    　該他のスレーブデバイスはパラレルインタフェースを有し、該パラレルインタフェースは、前記シリアル／パラレル変換機能を有する前記制御デバイスの制御端子と接続されていることを特徴とする請求項４に記載の高周波装置。     A plurality of other slave devices different from the slave device,
    5. The high frequency apparatus according to claim 4, wherein the other slave device has a parallel interface, and the parallel interface is connected to a control terminal of the control device having the serial / parallel conversion function.
  6. 　前記マスター制御デバイスと前記制御デバイスとが一体化されていることを特徴とする請求項１乃至５のいずれか一項に記載の高周波装置。 The high frequency apparatus according to any one of claims 1 to 5, wherein the master control device and the control device are integrated.
  7. 　前記スレーブデバイスは、高周波スイッチ又はパワーアンプであることを特徴とする請求項１乃至６のいずれか一項に記載の高周波装置。 The high-frequency device according to any one of claims 1 to 6, wherein the slave device is a high-frequency switch or a power amplifier.
  8. 　シリアルインタフェースを有するマスター制御デバイスと、
    　シリアルインタフェースを有する複数のスレーブデバイスと
    　を備える高周波装置であって、
    　複数の前記スレーブデバイスの動作を制御する制御デバイスを備え、
    　複数の前記スレーブデバイスでグループが形成されており、
    　前記マスター制御デバイスのシリアルインタフェースは、前記制御デバイス及び複数の前記スレーブデバイスのシリアルインタフェースと接続され、
    　前記スレーブデバイスが、それぞれ動作可能状態であるか否かを制御する制御信号を受信する制御端子を前記グループ単位で有し、それぞれの該制御端子が前記制御デバイスと接続され、
    　前記制御デバイスは、前記マスター制御デバイスからのデータ信号に応じて前記制御信号を前記グループ単位の前記制御端子へ送信することを特徴とする高周波装置。     A master control device having a serial interface;
    A high-frequency device comprising a plurality of slave devices having a serial interface,
    A control device for controlling the operation of the plurality of slave devices;
    A plurality of slave devices form a group;
    The serial interface of the master control device is connected to the serial interface of the control device and the plurality of slave devices,
    Each of the slave devices has a control terminal that receives a control signal for controlling whether or not each of the slave devices is operable, and each of the control terminals is connected to the control device,
    The high-frequency apparatus, wherein the control device transmits the control signal to the control terminal in the group unit in response to a data signal from the master control device.
  9. 　マスター制御デバイスと、
    　シリアルインタフェースを有する複数のスレーブデバイスと、
    　該スレーブデバイスの動作の可否状態を制御する制御デバイスと
    　を備える高周波装置の制御方法であって、
    　前記高周波装置は、
    　前記マスター制御デバイスが、前記制御デバイスにデータ信号を送信する第１のステップと、
    　前記制御デバイスが、受信した前記データ信号に基づいて、複数の前記スレーブデバイスの動作の可否状態を制御する制御信号を、複数の前記スレーブデバイスへ送信する第２のステップと、
    　前記複数のスレーブデバイスが、前記制御信号に応じて動作の可否状態を変化させる第３のステップと、
    　前記マスター制御デバイスから複数の前記スレーブデバイスにデータ信号を送信する第４のステップと
    　を含むことを特徴とする高周波装置の制御方法。     A master control device;
    A plurality of slave devices having a serial interface;
    A control method of a high-frequency device comprising: a control device that controls whether or not the slave device can operate.
    The high-frequency device is
    A first step in which the master control device transmits a data signal to the control device;
    A second step in which the control device transmits, based on the received data signal, a control signal for controlling the availability of operation of the plurality of slave devices to the plurality of slave devices;
    A third step in which the plurality of slave devices change an operation availability state according to the control signal;
    And a fourth step of transmitting data signals from the master control device to the plurality of slave devices.
  10. 　前記スレーブデバイスは、イネーブル状態の制御信号を受信した場合に動作可能状態となることを特徴とする請求項９に記載の高周波装置の制御方法。 10. The method of controlling a high-frequency device according to claim 9, wherein the slave device is in an operable state when receiving an enable control signal.
  11. 　前記制御デバイスは、シリアル信号とパラレル信号とを変換することを特徴とする請求項９又は１０に記載の高周波装置の制御方法。 The method for controlling a high-frequency device according to claim 9 or 10, wherein the control device converts a serial signal and a parallel signal.
PCT/JP2014/074812 2013-11-25 2014-09-19 High-frequency device and method for controlling same WO2015076009A1 (en)

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