WO2014078311A3 - Frequency synthesis using a phase locked loop - Google Patents

Frequency synthesis using a phase locked loop Download PDF

Info

Publication number
WO2014078311A3
WO2014078311A3 PCT/US2013/069691 US2013069691W WO2014078311A3 WO 2014078311 A3 WO2014078311 A3 WO 2014078311A3 US 2013069691 W US2013069691 W US 2013069691W WO 2014078311 A3 WO2014078311 A3 WO 2014078311A3
Authority
WO
WIPO (PCT)
Prior art keywords
locked loop
phase locked
phase
frequency synthesis
divider chain
Prior art date
Application number
PCT/US2013/069691
Other languages
French (fr)
Other versions
WO2014078311A2 (en
WO2014078311A4 (en
Inventor
Ismail Lakkis
Original Assignee
Adeptence, Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Adeptence, Llc filed Critical Adeptence, Llc
Publication of WO2014078311A2 publication Critical patent/WO2014078311A2/en
Publication of WO2014078311A3 publication Critical patent/WO2014078311A3/en
Publication of WO2014078311A4 publication Critical patent/WO2014078311A4/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B25/00Simultaneous generation by a free-running oscillator of oscillations having different frequencies
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B19/00Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A phase locked loop circuit comprises a phase/frequency detector, a voltage-controlled oscillator (VCO), and a divider chain in a feedback path coupling the VCO output to the phase/frequency detector. The divider chain comprises a plurality of sequentially connected divider circuits and a plurality of local oscillator outputs interspersed at different locations within the divider chain, which enables the circuit to simultaneously output multiple oscillator signals having different frequencies.
PCT/US2013/069691 2012-11-14 2013-11-12 Frequency synthesis using a phase locked loop WO2014078311A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261726166P 2012-11-14 2012-11-14
US61/726,166 2012-11-14

Publications (3)

Publication Number Publication Date
WO2014078311A2 WO2014078311A2 (en) 2014-05-22
WO2014078311A3 true WO2014078311A3 (en) 2014-08-21
WO2014078311A4 WO2014078311A4 (en) 2014-10-23

Family

ID=50731811

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2013/069691 WO2014078311A2 (en) 2012-11-14 2013-11-12 Frequency synthesis using a phase locked loop

Country Status (2)

Country Link
TW (1) TWI650948B (en)
WO (1) WO2014078311A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104868911B (en) * 2015-05-13 2017-08-25 中国电子科技集团公司第四十一研究所 broadband phase locking frequency synthesis circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986007219A1 (en) * 1985-05-22 1986-12-04 Plessey Overseas Limited Phase modulators
US4686488A (en) * 1985-02-06 1987-08-11 Plessey Overseas Limited Fractional N frequency synthesizer with modulation compensation
US4758802A (en) * 1985-02-21 1988-07-19 Plessey Overseas Limited Fractional N synthesizer
US4800342A (en) * 1985-02-21 1989-01-24 Plessey Overseas Limited Frequency synthesizer of the fractional type

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7522898B2 (en) * 2005-06-01 2009-04-21 Wilinx Corporation High frequency synthesizer circuits and methods
KR100712527B1 (en) * 2005-08-18 2007-04-27 삼성전자주식회사 Spread spectrum clock generator reducing jitter problem
US7538625B2 (en) * 2007-02-27 2009-05-26 International Business Machines Corporation Method and enhanced phase locked loop circuits for implementing effective testing
US7859344B2 (en) * 2008-04-29 2010-12-28 Renesas Electronics Corporation PLL circuit with improved phase difference detection

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4686488A (en) * 1985-02-06 1987-08-11 Plessey Overseas Limited Fractional N frequency synthesizer with modulation compensation
US4758802A (en) * 1985-02-21 1988-07-19 Plessey Overseas Limited Fractional N synthesizer
US4800342A (en) * 1985-02-21 1989-01-24 Plessey Overseas Limited Frequency synthesizer of the fractional type
WO1986007219A1 (en) * 1985-05-22 1986-12-04 Plessey Overseas Limited Phase modulators

Also Published As

Publication number Publication date
TWI650948B (en) 2019-02-11
WO2014078311A2 (en) 2014-05-22
WO2014078311A4 (en) 2014-10-23
TW201444296A (en) 2014-11-16

Similar Documents

Publication Publication Date Title
WO2014018444A3 (en) Synthesizer method utilizing variable frequency comb lines
WO2015160413A3 (en) Stabilized microwave-frequency source
IN2014CN03747A (en)
TWI346461B (en) Phase frequency detector and phase-locked loop
WO2008022347A3 (en) Loop bandwidth enhancement technique for a digital pll and a hf divider that enables this technique
WO2013130866A3 (en) Frequency synthesizer architecture in a time-division duplex mode for a wireless device
WO2011153096A3 (en) Methods and apparatuses for delay-locked loops and phase-locked loops
WO2011088368A3 (en) Frequency and phase acquisition of a clock and data recovery circuit without an external reference clock
WO2012031684A8 (en) Circuit arrangement for producing radio-frequency output signals formed by a broadband frequency ramp
EP3701631B8 (en) Digital-to-time converter (dtc) assisted all digital phase locked loop (adpll) circuit
WO2012023826A3 (en) Digital phase locked loop device and method in wireless communication system
WO2007079098A3 (en) A novel method of frequency synthesis for fast switching
WO2007130750A3 (en) Phase-slipping phase-locked loop
WO2008036389A3 (en) Frequency synthesizer using two phase locked loops
PH12017502159A1 (en) Frequency divider, phase-locked loop, transceiver, radio station and method of frequency dividing
EP3493405A3 (en) Chirp signal synthesizer using plls
TW200709572A (en) Clock loop circuit with community counters and method thereof
WO2009034881A1 (en) Phase comparator and phase locked loop
WO2014130913A8 (en) Phase lock loop lock indicator
WO2018175194A3 (en) Precision high frequency phase adders
WO2014078311A3 (en) Frequency synthesis using a phase locked loop
RU2006114266A (en) DEVICE FOR CREATING INTERFERENCE INTERFERENCE TO RADAR STATIONS
WO2017116559A3 (en) Stable differential crystal oscillator with active super diodes
WO2013052186A3 (en) Jitter suppression in type i delay-locked loops
WO2013138713A3 (en) Generating and routing a sub-harmonic of a local oscillator signal

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13855731

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13855731

Country of ref document: EP

Kind code of ref document: A2

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)