WO2014000299A1

WO2014000299A1 - Serial port redirection processing method, device, and system

Info

Publication number: WO2014000299A1
Application number: PCT/CN2012/077990
Authority: WO
Inventors: 蔡世顺; 彭林
Original assignee: 华为技术有限公司
Priority date: 2012-06-30
Filing date: 2012-06-30
Publication date: 2014-01-03
Also published as: CN102884515B; CN102884515A

Abstract

Embodiments of the present invention provide a serial port redirection processing method, device, and system. A method comprises: A motherboard calls a redirection program, writes, according to the physical address and memory size of a shared memory, the input information received by the motherboard into the input buffer of the shared memory as the serial port input information, and reads the information in the output buffer of the shared memory as the serial port output information; the shared memory is used for serial port management between the motherboard and a peripheral component interconnect express (PCIE) device inserted on the mother board. The embodiments of the present invention conserve serial port connection wires, and require no manual on-site debugging, thereby enhancing debugging efficiency.

Description

Serial port redirection processing method, device and system

The present invention relates to a serial port technology, and in particular, to a serial port redirection processing method, device, and system. Background technique

The Peripheral Component Interconnect Express (PCIE) standard is the latest bus and interface standard and represents the next generation of Input/Output (I/O) interface standards. PCIE uses the popular point-to-point serial connection in the industry to increase the data rate to a very high frequency. Developers based on PCIE offer many PCIE devices with PCIE interfaces, such as accelerator cards, graphics cards, sound cards, and more. With the intelligence of PCIE devices, debugging of PCIE devices is becoming more and more important. The most basic and most common method for debugging PCIE devices is to directly use the serial port to input/output system information.

FIG. 1 is a schematic diagram of a PCIE device debugging directly using a serial port in the prior art. As shown in Figure 1, the PCIE device is installed on each server. When debugging the PCIE device, first connect one end of the serial cable to the serial port of the PCIE device, and the other end to the serial port of the computer, and then Turn on the console on your computer, configure the baud rate, and input and output from the console to debug the PCIE device.

In the prior art, when debugging a PCIE device, it is not only necessary to use a serial cable in the equipment room, but also to arrange a person to perform the plugging and unplugging operation of the serial cable in the field, especially when debugging and maintaining multiple devices at the same time, multiple serial ports are needed at the site. Line, the debugging process is very inconvenient, inefficient, and it takes a lot of manpower. Summary of the invention

The embodiment of the invention provides a serial port redirection processing method, device and system, which are used to save the serial port line and avoid manual debugging to the site, thereby improving debugging efficiency.

In one aspect, the embodiment of the present invention provides a serial port redirection processing method, including: a motherboard calling redirection program, and writing input information received by the motherboard according to a physical address and a memory size of the shared memory; The input buffer of the shared memory is input as a serial port. Entering information, and reading information in the output buffer of the shared memory as serial port output information; the shared memory is used for the motherboard and the fast peripheral component device inserted on the motherboard Serial port management.

The embodiment of the invention further provides another serial port redirection processing method, including:

The fast peripheral component device reads the information in the input buffer of the shared memory as the serial port input information according to the physical address and the memory size of the shared memory, and writes the serial port output information to the output buffer of the shared memory. The shared memory is used for serial port management between the motherboard and the fast peripheral component device inserted on the motherboard.

In another aspect, an embodiment of the present invention further provides a motherboard, including:

a first writing module, configured to write input information received by the motherboard to an input buffer of the shared memory according to a physical address and a memory size of the shared memory after the motherboard invokes the redirecting program Input information as a serial port in the area;

a first reading module, configured to read information in an output buffer of the shared memory as a serial port output information;

The shared memory is used for serial port management between the motherboard and a fast peripheral component device inserted on the motherboard.

The embodiment of the invention further provides a fast peripheral component device, including:

a second reading module, configured to read information in the input buffer of the shared memory as serial port input information according to a physical address and a memory size of the shared memory;

a second writing module, configured to write serial port output information into an output buffer area of the shared memory;

The shared memory is used for serial port management between the motherboard and the fast peripheral component device inserted on the motherboard.

In another aspect, an embodiment of the present invention further provides a serial port redirection processing system, including the motherboard and the fast peripheral component device as described above.

The serial port redirection processing method, device and system provided by the embodiments of the present invention perform serial port management between the motherboard and the fast peripheral component device inserted on the motherboard through the shared memory, so that the motherboard and the fast peripheral component device can be Read and write information in shared memory to implement the motherboard The information exchange with the fast peripheral component device. When the debugger remotely logs in to the motherboard to invoke the redirector, the information of the motherboard and the fast peripheral components can be exchanged to realize debugging of the PCIE device, and the debugging and maintenance are overcome quickly. The peripheral component device requires the problem of the serial cable and the computer connected to the serial cable, which avoids the problem of arranging personnel to go to the site for the serial port insertion and removal operation, which saves time, improves efficiency, and saves labor and cost. DRAWINGS

BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are required to be used in the description of the prior art, are briefly described. It is obvious that the drawings in the following description are some embodiments of the present invention, and no one would be creative to those skilled in the art Other drawings can also be obtained from these drawings on the premise of labor.

1 is a schematic diagram of a PCIE device debugging using a serial port in the prior art; FIG. 2 is a schematic flowchart of a serial port redirection processing method according to an embodiment of the present invention; FIG. 3 is a serial port redirection process according to another embodiment of the present invention; FIG. 4 is a schematic diagram of a serial port redirection processing method according to an embodiment of the present invention; FIG.

FIG. 5 is a schematic structural diagram of a motherboard according to an embodiment of the present invention; FIG.

6 is a schematic structural view of a motherboard according to another embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a fast peripheral component device according to an embodiment of the present invention; FIG. 8 is a schematic structural diagram of a fast peripheral component device according to another embodiment of the present invention. The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. The embodiments are a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

FIG. 2 is a schematic flowchart of a method for processing a serial port redirection according to an embodiment of the present invention. The main body of the embodiment is a motherboard. As shown in FIG. 2, the serial port redirection processing method provided in this embodiment may include:

Step 101: The motherboard calls a redirector; Step 102: According to the physical address and the memory size of the shared memory, input the input information received by the motherboard into the input buffer of the shared memory as the serial port input information, and use the information in the output buffer of the shared memory as Serial output information is read;

Among them, the shared memory is used for serial port management between the motherboard and the fast peripheral component devices inserted on the motherboard.

Specifically, in step 101, the redirecting program may be a pre-developed application, and the redirecting program runs on the motherboard as a serial port redirection tool, and presents a serial port console to the user, so that the user can be in the motherboard system. The operation interface performs input and output.

In step 102, after the motherboard calls the redirector, the motherboard can process the input buffer and the output buffer information in the shared memory in real time, and write the input information in the input buffer of the shared memory. As the serial port input information, the information in the output buffer is read as the serial port output information. Specifically, the motherboard can write information for debugging the fast peripheral component device in the input buffer of the shared memory, and at the same time, the motherboard also reads the information in the output buffer of the shared memory, that is, the motherboard. Read the feedback information of the fast peripheral component device to the debugging information, so that the debugger can maintain and debug the fast peripheral component device.

The shared memory is serially managed between the motherboard and the fast peripheral component device inserted in the motherboard. The motherboard can read the feedback information of the debugging information of the fast peripheral component device in the shared memory, and the fast peripheral component device also The debugging information in the shared memory can be read, thereby completing the information interaction between the motherboard and the shared memory and between the shared memory and the fast peripheral component device, and finally realizing the information interaction between the motherboard and the fast peripheral component device. . In the technical solution of the embodiment, the serial port management is performed between the motherboard and the fast peripheral component by calling the redirecting program through the motherboard, and sharing the memory between the motherboard and the fast peripheral component device inserted on the motherboard. Information exchange. Therefore, it is only necessary to remotely run the redirection program on the motherboard to realize the operation of the PCIE device through the information exchange between the motherboard and the fast peripheral components, thereby overcoming the need for a serial cable when debugging and maintaining the fast peripheral component device. The computer problem with the serial port line avoids the problem of arranging personnel to go to the site for serial port plugging and unplugging operation, which saves time, improves efficiency, and saves labor and cost.

Optionally, when the motherboard loads the driver of the fast peripheral component device, the shared memory is determined, and the physical address and memory size of the shared memory are sent to the fast peripheral component device. Specifically, when the driver of the fast peripheral component device is loaded on the motherboard, the driver of the fast peripheral component device The program applies for shared memory, and sends the physical address and memory size information of the shared memory to the fast peripheral component device, so that the fast peripheral component device can know the physical address and memory size of the shared memory, so that the fast peripheral component device and the mother The driver on the board can access the shared memory and establish a memory map.

Alternatively, the shared memory can be a contiguous physical memory or a number of registers of the fast peripheral component device, or a contiguous physical memory of the motherboard. One of ordinary skill in the art will recognize that the shared memory can also be determined by the fast peripheral component device and that the physical address and memory size of the shared memory are sent to the motherboard. Specifically, the fast peripheral component device itself is a small system including separate processors, memory, registers, and the like. Thus, when the motherboard loads the fast peripheral component device plugged into the motherboard, the driver of the fast peripheral component device applies for shared memory, which may be a continuous physical memory of the fast peripheral component device, or A number of registers of a fast peripheral component device, or a continuous piece of physical memory on the motherboard.

In the technical solution of the embodiment, since the shared memory is a continuous physical memory or a plurality of registers of the fast peripheral component device, or a continuous physical memory of the motherboard, the user can ensure the overall requirements of the system according to the debugging requirements. Make a choice of shared memory with the best performance.

Optionally, the motherboard call redirector includes: obtaining a physical address and a memory size of the shared memory from the fast peripheral component device driver, and mapping the shared memory from the kernel state to the user state.

When the user runs the redirector on the motherboard, the process created by the program runs in user mode, and the shared memory is in kernel mode. In the operating system, the kernel state and user mode are at two different run levels, and the low-level user state cannot access the high-level kernel-mode address space, including the address and code. Therefore, if users need to access shared memory in kernel mode, they need to map shared memory from kernel mode to user mode. After the mapping, the redirector can directly access the shared memory. For example, under the Linux operating system, the shared memory can be mapped from the kernel state to the user state using the memory mapping mechanism provided by the operating system.

At the same time, the motherboard can also start two threads in the redirector. The above two threads can be created by the redirector. Among them, one thread is used to write the input information received by the motherboard into the input buffer of the shared memory as the serial port input information. Specifically, the input information received by the motherboard may be a character input through a keyboard. Another thread is used to output the shared memory The information in the buffer is read as the serial output. Specifically, another thread can print the characters of the read output buffer to the screen.

The technical solution of this embodiment maps the shared memory from the kernel state to the user state, so that the user can process the information of the input buffer and the output buffer on the shared memory in real time.

In the above embodiments, the serial port redirection processing method further includes the user remotely logging in to the motherboard, and testing the fast peripheral component device through the motherboard. Specifically, the user can directly send a remote login request to the motherboard through the Secure Shell (Ssh), and the motherboard receives the request to complete the remote login of the user. Then, the motherboard runs the redirector under the shell. The shell, commonly known as the shell, is software that provides the user to use the interface, can receive user commands, and invoke the corresponding application. Specifically, the motherboard can be logged in to the motherboard according to the IP address of the motherboard, and the corresponding fast peripheral component device can be debugged according to the slot number of the fast peripheral component device on the motherboard or the model of the fast peripheral component device. It can be understood by those skilled in the art that the method for implementing remote login can be applied to the serial port redirection processing method provided by the embodiment of the present invention, and is not particularly limited herein.

The redirecting program is called by the motherboard, and as a serial port redirection tool, the user can provide a serial port console, and direct the input and output information of the serial port of the fast peripheral component device to the serial port console of the motherboard, and remotely log in to the motherboard, that is, Control of the PCIE device can be completed. At the same time, the redirector supports multiple users to view the serial port information at the same time, that is, the information of the fast peripheral component device. Each user logs in to the motherboard, and the serial port information can be seen through the shell running redirect program, which facilitates the multi-user to the fast periphery. Joint debugging of component devices.

FIG. 3 is a schematic flowchart of a method for processing a serial port redirection according to another embodiment of the present invention. The embodiment of the present embodiment is a fast peripheral component device. As shown in FIG. 3, the serial port redirection processing method provided in this embodiment may include:

Step 201: The fast peripheral component device reads the information in the input buffer of the shared memory as the serial port input information according to the physical address and the memory size of the shared memory, and writes the serial port output information into the output buffer of the shared memory. ;

Specifically, in step 201, the input buffer of the shared memory can be used as an input source, and the fast peripheral component device queries the shared memory input buffer for debugging information input in real time, if Yes, the fast peripheral component device uses the input debugging information as the serial port input information of the fast peripheral component device according to the physical address and memory size of the shared memory; the output buffer of the shared memory can be used as an output source, and the fast peripheral component device will The feedback information of the debug information is input to the output buffer.

The shared memory is serially managed between the motherboard and the fast peripheral component device inserted in the motherboard. The fast peripheral component device can read the debugging information in the shared memory, and the motherboard can also share the peripheral component device in the shared memory. The feedback information of the debugging information is read, thereby completing the information interaction between the shared memory and the fast peripheral component device and between the motherboard and the shared memory, and finally realizing the information interaction between the fast peripheral component device and the motherboard.

The technical solution of the embodiment can complete the motherboard management by reading the information in the shared memory by the fast peripheral component device, and performing serial port management between the motherboard and the fast peripheral component device inserted on the motherboard. The information exchange with the fast peripheral components, therefore, only need to remotely run the redirection program on the motherboard, the information exchange between the motherboard and the fast peripheral components can realize the operation of the PCIE device, thereby overcoming the debugging. When the fast peripheral component device is maintained, the computer problem of the serial cable and the serial cable is required, and the problem of arranging the personnel to go to the site for the serial port insertion and removal operation is avoided, which saves time, improves efficiency, and saves labor and cost.

Optionally, the fast peripheral component device receives the physical address and the memory size of the shared memory sent by the motherboard, and the shared memory is determined by the motherboard when the driver of the fast peripheral component device is loaded. The shared memory is a contiguous physical memory or registers of a fast peripheral component device, or a contiguous physical memory of the motherboard.

In the technical solution provided by the embodiment, the fast peripheral component device receives the physical address and the memory size of the shared memory sent by the motherboard, and can obtain the physical address and the memory size of the shared memory. Enables fast peripheral component devices to access shared memory, creating a memory map of fast peripheral component devices and motherboards. Users can also choose between shared memory based on debugging needs and ensuring optimal overall performance across all aspects of the system.

FIG. 4 is a schematic diagram of a method for processing a serial port redirection according to an embodiment of the present invention. As shown in Figure 4, there are four main steps in receiving input information from the motherboard and then reading the output information from the motherboard:

Step 301: The motherboard writes the input information received in the input buffer of the shared memory according to the enabled thread;

Step 302: The fast peripheral component device reads the information in the input buffer of the shared memory to The serial port of the fast peripheral component device;

Step 303: The fast peripheral component device writes the information output by the serial port to the output buffer of the shared memory;

Step 304: The motherboard reads the information in the output buffer of the shared memory according to another thread that is enabled.

Specifically, the thread enabled in step 301 is mainly responsible for receiving characters input by the remote computer keyboard and writing characters to the input buffer of the shared memory. In step 304, another thread enabled by the motherboard is mainly responsible for reading the shared memory output. The characters in the punch area are printed on the screen of the remote computer.

Specifically, in a debugging process, the fast peripheral component device may first read the debugging information input from the remote computer to the input buffer in the shared memory to the serial port of the peripheral component device, and the peripheral component device debugs the information through step 302. The feedback information can be written to the output buffer of the shared memory by step 303. That is, the information obtained by the serial port from the input buffer is debugging information, and the information output from the serial port to the output buffer can be feedback information of the debugging information of the fast peripheral component device.

Those skilled in the art can understand that in the specific debugging process, the above steps have no strict timing relationship, and the steps cooperate with each other to complete the redirection of the serial port.

In the above embodiments, the physical address of the shared memory is used to indicate a starting position for writing information to or reading information from the shared memory. The mother board or fast peripheral component device can judge whether the storage space is sufficient according to the memory size of the shared memory before writing the information. If it is enough, it can be directly written. If it is not enough, the method of batch writing can be used first, that is, first Write a part, wait for the peer to read; then write another part. When the motherboard or fast peripheral component device reads information from the shared memory, it can read all the information in the shared memory according to the indication of the memory size according to the starting position; of course, it is also possible to pre-determine the termination position of the information, and then share The information in the memory from the start position to the end position is read out (this way can be independent of the memory size), and so on.

Through the above steps, the information is completed from the motherboard to the input buffer, then to the fast peripheral component device, and the fast peripheral component device outputs information to the output buffer, and then to the motherboard, the mother is completed. The board interacts with information from fast peripheral component devices. When the user remotely logs in to the motherboard through ssh, the input information in step 301 may be an input letter of the remote computer keyboard. The mother board in step 304 can read the information and print it to the screen of the remote computer for the user to analyze and process the data, thereby avoiding the use of a large number of serial lines, and overcoming the dispatch of people to the computer room to the fast periphery. Component equipment is debugged and maintained, which saves time and cost and increases efficiency.

FIG. 5 is a schematic structural diagram of a motherboard according to an embodiment of the present invention. The first board is configured to: The physical address and memory size of the shared memory, the input information received by the motherboard is written in the input buffer of the shared memory as the serial port input information; the first read ear block 402 is used to output the shared memory buffer The information in the information is read as a serial output. Shared memory is used for serial port management between the motherboard and the fast peripheral components that are plugged into the motherboard. The board of the peripheral component device slot. The server can be a workgroup server, a departmental server or an enterprise server. The enterprise server has the highest hardware configuration and the strongest system reliability. It is used for networked computers with more than hundreds of devices, and has high processing speed and data security requirements. Large network. Embodiments of the present invention are equally applicable to tower servers of different configurations, rack servers and blade servers.

The motherboard provided by the embodiment of the present invention writes the debugging information received by the motherboard to the shared memory through the first writing module 401, and the fast peripheral component pair in the shared memory can be read through the first reading module 402 motherboard. The feedback information of the debugging information is completed, thereby completing the information interaction between the motherboard and the shared memory. Through serial port management of shared memory, information interaction between the motherboard and the shared memory and between the shared memory and the fast peripheral component device can be realized, thereby realizing information interaction between the motherboard and the fast peripheral component device. Therefore, it is only necessary to remotely run the redirection program on the motherboard to realize the operation of the PCIE device through the information exchange between the motherboard and the fast peripheral components, thereby overcoming the need for a serial cable when debugging and maintaining the fast peripheral component device. The computer problem with the serial port line avoids the problem of arranging personnel to go to the site for serial port plugging and unplugging operation, which saves time, improves efficiency, and saves labor and cost.

FIG. 6 is a schematic structural diagram of a motherboard according to another embodiment of the present invention. As shown in FIG. 6, in addition to the first writing module 401 and the first reading module 402, the motherboard provided by the embodiment of the present invention further includes a determining module 403, when the motherboard loads the driver of the fast peripheral component device. Determine within the share Save, and send the physical address and memory size of the shared memory to the fast peripheral component device.

The shared memory of the embodiment of the present invention described above may be a continuous physical memory of the motherboard.

A person skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working process of the foregoing motherboard may refer to the corresponding process in the foregoing method embodiments, and details are not described herein again.

FIG. 7 is a schematic structural diagram of a fast peripheral component device according to an embodiment of the present invention. As shown in FIG. 7, the fast peripheral component device provided by the embodiment of the present invention includes: a second read module 501 and a second write module 502, wherein the second read module 501 is configured to use a physical address and a memory according to the shared memory. The size, the information in the input buffer of the shared memory is read as the serial port input information; the second write module 502 is used to write the serial port output information into the output buffer of the shared memory; the shared memory is used for the motherboard and The serial port management is performed between the fast peripheral component devices inserted on the motherboard.

According to the embodiment of the present invention, the debugging information of the fast peripheral component device in the shared memory can be read by the second read module 501, and the debugging information fed back by the fast peripheral component device is written by the second write module 502. Go to shared memory to complete the information interaction between fast peripheral component devices and shared memory. Through the serial port management of the shared memory, the information exchange between the fast peripheral component device and the shared memory and between the motherboard and the shared memory is realized, thereby realizing the information interaction between the fast peripheral component device and the motherboard. Therefore, it is only necessary to remotely call the redirection program on the motherboard to realize the operation of the PCIE device through the information exchange between the motherboard and the fast peripheral components, thereby overcoming the need for a serial cable when debugging and maintaining the fast peripheral component device. The computer problem with the serial port line avoids the problem of arranging personnel to go to the site for serial port plugging and unplugging operation, which saves time, improves efficiency, and saves labor and cost.

FIG. 8 is a schematic structural diagram of a fast peripheral component device according to another embodiment of the present invention. As shown in FIG. 8, the fast peripheral component device provided by this embodiment is further than the second read module 501 and the second write module 502. The receiving module 503 is configured to receive a physical address and a memory size of the shared memory sent by the motherboard, where the shared memory is determined by the motherboard when the driver of the fast peripheral component device is loaded.

The above shared memory can be a continuous physical memory or a number of registers of a fast peripheral component device. Optionally, the fast peripheral component device provided in this embodiment may be a peripheral component interconnection standard.

(Peripheral Component Interconnect, PCI for short), PCIE, or PCI-X device. Specifically, it can be a fast peripheral component device that can be plugged into the PCI, PCIE, and PCI-X slots of the motherboard for devices that conform to PCI, PCIE, and PCI-X peripheral component interconnection standards or other similar devices. Among them, PCI-X is an updated version of PCI, which still uses PCI bus technology, but has a larger number of wiring pins, and has an expandable frequency, which can vary with the device. In the embodiment of the present invention, the fast peripheral component device may be an intelligent network card, an encryption card, a protocol uninstall card, a video acceleration card, etc., and is not particularly limited herein.

A person skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working process of the above-mentioned fast peripheral component device can refer to the corresponding process in the foregoing method embodiment, and details are not described herein again.

The embodiment of the present invention further provides a serial port redirection processing system, which includes the motherboard shown in any of FIG. 5 and FIG. 6 and the fast peripheral component device shown in any of FIGS. 7 to 8.

The serial port redirection processing system provided in this embodiment corresponds to the serial port redirection processing method provided by the embodiment of the present invention, and is an execution system of the serial port redirection processing method, and the specific process of the serial port redirection processing method can be referred to the present invention. The embodiment of the serial port redirection processing method is not described here.

A person skilled in the art can understand that all or part of the steps of implementing the above method embodiments may be completed by using hardware related to program instructions, and the foregoing program may be stored in a computer readable storage medium, and the program is executed when executed. The foregoing steps include the steps of the foregoing method embodiments; and the foregoing storage medium includes: a medium that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

It should be noted that the above embodiments are only for explaining the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that: The technical solutions described in the foregoing embodiments are modified, or some of the technical features are equivalently replaced. The modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

claims

1. A serial port redirection processing method, characterized by including:

The motherboard calls the redirection program, writes the input information received by the motherboard into the input buffer of the shared memory as serial port input information according to the physical address and memory size of the shared memory, and writes the shared The information in the output buffer of the memory is read as serial port output information; the shared memory is used for serial port management between the motherboard and the fast peripheral component device inserted on the motherboard.

2. The method according to claim 1, characterized in that, the method includes: when the motherboard loads the driver of the fast peripheral component device, determine the shared memory, and save the shared memory. The physical address and memory size are sent to the Rapid Peripheral Device.

3. The method according to claim 1 or 2, characterized in that the shared memory is a continuous physical memory or several registers of the fast peripheral component device, or a continuous physical memory of the motherboard. Memory.

4. The method according to claim 1 or 2, characterized in that the motherboard calls a redirection program including:

Obtain the physical address and memory size of the shared memory from the fast peripheral component device driver, and map the shared memory from the kernel state to the user state.

5. The method according to claim 1 or 2, characterized in that the method further includes: after the motherboard receives the user's remote login request, test the fast peripheral component device.

6. A serial port redirection processing method, characterized by including:

The fast peripheral component device reads the information in the input buffer of the shared memory as the serial port input information according to the physical address and memory size of the shared memory, and writes the serial port output information to the output buffer of the shared memory. ; The shared memory is used for serial port management between the motherboard and the fast peripheral component device inserted on the motherboard.

7. The method according to claim 6, wherein the method includes: the fast peripheral component device receiving the physical address and memory size of the shared memory sent by the motherboard, and the shared memory is the The motherboard is determined when loading the driver of the fast peripheral component device.

8. The method according to claim 6 or 7, characterized in that the shared memory is a continuous physical memory or several registers of the fast peripheral component device, or a continuous physical memory of the motherboard. Memory.

9. A motherboard, characterized in that it includes:

The first writing module is configured to write the input information received by the motherboard into the input buffer of the shared memory according to the physical address and memory size of the shared memory after the motherboard calls the redirection program. The area is used as a serial port to input information;

The first reading module is used to read the information in the output buffer of the shared memory as serial port output information;

The shared memory is used for serial port management between the motherboard and fast peripheral component devices inserted on the motherboard.

10. The motherboard according to claim 9, further comprising:

A determining module, configured to determine the shared memory when the motherboard loads the driver of the fast peripheral component device, and send the physical address and memory size of the shared memory to the fast peripheral component device.

11. The motherboard according to claim 9 or 10, characterized in that the shared memory is a continuous physical memory of the motherboard.

12. A fast peripheral component device, characterized by including:

The second reading module is used to read the information in the input buffer of the shared memory as serial port input information according to the physical address and memory size of the shared memory;

The second writing module is used to write the serial port output information into the output buffer of the shared memory;

13. The fast peripheral component device according to claim 12, further comprising:

A receiving module, configured to receive the physical address and memory size of the shared memory sent by the motherboard, where the shared memory is determined by the motherboard when loading the driver of the fast peripheral component device.

14. The fast peripheral component device according to claim 12 or 13, characterized in that, The shared memory is a continuous physical memory or several registers of the fast peripheral component device.

15. The fast peripheral component device according to claim 12 or 13, characterized in that the fast peripheral component device is a PCI, PCIE or PCI-X device.

16. A serial port redirection processing system, characterized in that it includes the motherboard according to any one of claims 9-11, and the fast peripheral component device according to any one of claims 12-15.