WO2013152657A1 - Method for manufacturing gan-based light-emitting element with vertical structure - Google Patents

Method for manufacturing gan-based light-emitting element with vertical structure Download PDF

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WO2013152657A1
WO2013152657A1 PCT/CN2013/072855 CN2013072855W WO2013152657A1 WO 2013152657 A1 WO2013152657 A1 WO 2013152657A1 CN 2013072855 W CN2013072855 W CN 2013072855W WO 2013152657 A1 WO2013152657 A1 WO 2013152657A1
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epitaxial layer
light
emitting
gallium nitride
layer
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PCT/CN2013/072855
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French (fr)
Chinese (zh)
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黄少华
曾晓强
吴志强
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厦门市三安光电科技有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Definitions

  • the present invention relates to a method of fabricating a semiconductor light emitting device, and more particularly to a method of fabricating a vertical structure gallium nitride based light emitting device.
  • GaN gallium nitride
  • GaN gallium nitride
  • a vertical structure GaN-based light-emitting diode chip technology based on substrate transfer has been developed, for example, epitaxial deposition of GaN on a sapphire substrate.
  • the luminescent epitaxial layer is then bonded or bonded to the semiconductor substrate or the metal substrate by wafer bonding or electroplating, and the sapphire substrate is removed by laser stripping, grinding or etching.
  • Figure 1 ⁇ 6 shows the fabrication process of a conventional vertical structure GaN-based LED device.
  • the fabrication method is as follows:
  • MOCVD is used to sequentially grow on the temporary substrate 100 (for example, sapphire or silicon carbide).
  • the temporary substrate 100 for example, sapphire or silicon carbide.
  • a high-reflection electrode 230 is formed on the separated core particles by using a yellow lithography technique and a vacuum electron beam evaporation coating as P Type gallium nitride based ohmic contact electrode;
  • a layer of bonding metal 240 is deposited by vacuum electron beam evaporation coating. Bonding the epitaxial layer on the temporary substrate to the conductive substrate 102 using a wafer bonding apparatus, and peeling the growth substrate by laser lift-off technique;
  • the N-type gallium nitride-based epitaxial layer is roughened by KOH liquid, and an N-type gallium nitride-based ohmic contact electrode is formed thereon, and N polarity wire electrode;
  • the conductive substrate is thinned and a back metal is deposited on the back side of the device by vacuum electron beam evaporation coating as P Wire the wire electrode, then cut the conductive substrate to separate the core particles.
  • the above conventional vertical structure GaN The base light-emitting diode chip has a complicated process and low process yield, and has the following main points: first, the bonding yield is low due to uneven bonding interface; second, due to the gap between the core particle and the core particle isolation region, The result is that the edge of the semiconductor layer is broken when the laser is peeled off the growth substrate; thirdly, the multi-channel yellow light lithography process results in a lower overall yield.
  • the invention aims to provide a method for fabricating a vertical structure gallium nitride based light-emitting element, which uses ion implantation, laser lift-off and the like to complete the main process steps.
  • ion implantation technology in p
  • the isolation region between the core particles and the core particles is formed on the gallium nitride-based epitaxial layer, but the isolation region is only passivated and insulated by ion implantation, and there is no loss on the epitaxial material, which can ensure the surface of the epitaxial layer is flat.
  • the use of this method to form the isolation region can simplify the overall process and effectively solve the above-mentioned conventional vertical structure gallium nitride based LED chip processing yield is low.
  • a method for fabricating a vertical structure gallium nitride-based light-emitting device comprising the steps of: providing a temporary substrate on which a gallium nitride-based light-emitting epitaxial layer is epitaxially grown, and the gallium nitride-based light-emitting epitaxial layer is bottom-up include: N-type layer, luminescent layer and p a layer; an insulating region is defined on the luminescent epitaxial layer, and the luminescent epitaxial layer of the insulating region is passivated and insulated by ion implantation; a metal mirror and a metal bonding layer are sequentially formed on the luminescent epitaxial layer; a conductive substrate bonded to the light-emitting epitaxial layer on the temporary substrate; the temporary substrate is removed to expose a surface of the light-emitting epitaxial layer; and a dicing street is defined on the surface of the exposed light-emitting epitaxial layer The dicing street is located in
  • the temporary substrate is made of one or a combination of sapphire, silicon carbide, silicon, aluminum nitride, gallium nitride;
  • the conductive substrate is made of silicon, silicon carbide, zinc oxide, germanium, copper, nickel, cobalt, One or a combination of tungsten; to reach n
  • the patterned layer is the lowest implantation depth, and the optimal implantation depth is the overall epitaxial depth.
  • the luminescent epitaxial layer of the insulating region is purified and insulated by ion implantation; a metal mirror is formed on the entire upper surface of the luminescent epitaxial layer; The area of the dicing street is smaller than the area of the insulating region, and the sidewall of the formed core particle is protected by the passivated insulating luminescent epitaxial layer; in order to improve the extraction efficiency, after the temporary substrate is removed, the exposed luminescent epitaxial layer may also be The surface is roughened.
  • the light-emitting epitaxial layer of the scribe line portion is first insulated to make the PN of the scribe line portion The junction is isolated and the surface of the epitaxial layer is flattened, and the chip is not short-circuited or leaked during the subsequent fabrication steps.
  • 1 to 6 are schematic cross-sectional views showing a process of fabricating a conventional vertical structure of a gallium nitride-based light-emitting device.
  • FIG. 7 to 13 are schematic cross-sectional views showing a process of fabricating a vertical structure gallium nitride based light-emitting device according to a preferred embodiment of the present invention.
  • 100, 200 temporary substrate; 101, 201: conductive substrate; 111, 211: n-type layer; 112, 212: luminescent layer; 113, 213: p-type layer; 120, 220: photoresist material; 130, 230: high-emitting p-type electrode; 140, 240: bonded metal layer; 131, 231: n electrode; 132, 232: back gold electrode; 250: insulating region; 251: insulating layer; :The protective layer.
  • a method for fabricating a vertical structure gallium nitride-based light-emitting device the specific steps of which are as follows:
  • a temporary substrate 200 is provided on which a GaN-based light-emitting epitaxial layer is epitaxially grown. Included in the temporary substrate 200 The n-type layer 211, the multiple quantum well ( MQW ) light-emitting layer 212, and the p-type layer 213 are sequentially epitaxially grown by metal organic chemical vapor deposition (MOCVD). .
  • the temporary substrate may be made of sapphire, silicon carbide, silicon, aluminum nitride, gallium nitride or the like.
  • an insulating region is defined on the p-type layer 213.
  • the light-emitting epitaxial layer of the insulating region is passivated and insulated by ion implantation.
  • the specific process is as follows: an insulating region 250 is defined on the P-type layer by a yellow lithography technique, and the width of the single insulating region 250 is 50 ⁇ 100 ⁇ m, the area outside the insulating area is covered with photoresist material 220, the photoresist thickness is not less than 2 ⁇ m m , and the optimum thickness is 3 ⁇ m .
  • Phosphorus is selected as the ion source, and the epitaxial layer of the insulating region 250 is passivated and insulated by ion implantation to form an insulating portion 251. Reach with ions The type of layer is the lowest implant depth, and the optimum implant depth is the overall epitaxy depth.
  • the photoresist is removed and the P-type layer of the entire wafer is 213 by vacuum electron beam evaporation.
  • a mirror layer as a high-reflection electrode 230, the high-reflection electrode comprising one or more of Ag, Ni, Al, Pt, Au, Ti, and having an overall thickness of not less than 3 kA
  • the optimum thickness is 5kA
  • the vapor deposition surface is the entire epitaxial surface of the P-type layer containing the non-ion implantation and ion implantation isolation regions.
  • Annealing the high-reflection electrode, the optimal annealing temperature is controlled at 380 Around °C to obtain good electrical contact and high reflectivity.
  • a bonding metal layer 240 is deposited on the high reflective electrode layer 230, and the bonding metal layer may include One or more of Cr, Al, Pt, Au, and Ti. Selecting a conductive substrate 201 and using a vacuum electron beam evaporation coating on the conductive substrate 201 The above-mentioned bonded metal layer is deposited, and the epitaxial layer on the temporary substrate is bonded to the conductive substrate by a wafer bonding apparatus.
  • the conductive substrate is one of silicon, silicon carbide, zinc oxide, antimony, copper, nickel, cobalt, and tungsten.
  • the temporary substrate 200 is removed while remaining on the conductive substrate 201.
  • sapphire is used as a temporary substrate, and the substrate is peeled off by a 248 nm KrF gas laser, and the laser energy density is set to 800 to 1000 mJ/cm 2 .
  • the n-type layer is roughened with KOH solution and electron beam vacuum coating is used in N
  • An n-electrode is deposited on the semiconductor.
  • the thinned conductive substrate is ground and the back gold electrode is vapor-deposited on the back side of the conductive substrate.
  • Defining a scribe line on the surface of the luminescent epitaxial layer first using a laser along the scribe line from the N of the luminescent epitaxial layer The epitaxial layer is divided into core unit, and the core particles are separated from the back surface of the conductive substrate by a diamond knife.
  • the area of the dicing street is smaller than the area of the insulating region, and the sidewall of the formed core particle is made of a passivated insulating luminescent epitaxial layer 260 Protection.
  • the isolation region fabricated by ion implantation has no depth loss in the epitaxial layer, so that the surface of the wafer is always in a flat state, such a bonding surface is flat, and subsequently KOH coarsening N
  • the type of gallium nitride-based epitaxial layer does not need to consider the problem of roughening and protecting the sidewall of the core, and the overall process yield can be greatly improved.
  • the final fabricated core sidewall forms an electrically isolated region that is homogenous to the epitaxial layer, as compared to a conventional vertical structure GaN-based luminescent device. SiO2/Si4N3 or other organic colloids act as a sidewall protective layer.
  • the vertical structure of the GaN-based light-emitting device produced by this method has higher stability.
  • the fabrication process of the vertical structure gallium nitride-based light-emitting device using the present invention is omitted compared to the conventional vertical structure gallium nitride-based light-emitting device.
  • the high-reflection electrode and the yellowing lithography process steps such as roughening protection greatly simplify the process.

Abstract

Disclosed is a method for manufacturing a GaN-based light-emitting element with a vertical structure, which comprises the steps of: providing a temporary substrate on which a GaN-based light-emitting epitaxial layer epitaxially grows, the GaN-based light-emitting epitaxial layer comprising an n-type layer, a light-emitting layer and a p-type layer from bottom to top; defining an insulation zone on the light-emitting epitaxial layer, and passivating and insulating the light-emitting epitaxial layer of the insulation zone using an ion-implantation method; forming a metal mirror and a metal bonding layer on the light-emitting epitaxial layer in sequence; providing a conducting substrate, and bonding same to the light-emitting epitaxial layer on the temporary substrate; removing the temporary substrate to expose the surface of the light-emitting epitaxial layer; and defining a cutting channel on the exposed surface of the light-emitting epitaxial layer, the cutting channel being located in the insulation zone, and dividing the light-emitting epitaxial layer into a series of units along the cutting channel using a laser scriber to split same from the back surface of the conducting substrate to form core grains.

Description

一种垂直结构氮化镓基发光元件的制作方法  Method for manufacturing vertical structure gallium nitride based light-emitting element
本申请要求于 2012 年4月9 日 提交中国专利局、申请号为201210100853.3、发明名称为“一种垂直结构氮化镓基发光元件的制作方法 ”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。 This application claims priority to Chinese Patent Application No. 201210100853.3 , entitled " A Method for Fabricating a Vertical Structure Gallium Nitride Based Light-Emitting Element ", filed on April 9, 2012, the entire contents of which are hereby incorporated by reference. The citations are incorporated herein by reference.
技术领域 Technical field
本发明涉及一种半导体发光元件的制作方法，更具体地是一种垂直结构氮化镓基发光元件的制作方法。 The present invention relates to a method of fabricating a semiconductor light emitting device, and more particularly to a method of fabricating a vertical structure gallium nitride based light emitting device.
背景技术  Background technique
近年来，为了提高氮化镓（ GaN ）基发光二极管的发光功率和效率，在传统水平结构 GaN 基发光二极管芯片技术的基础上，发展了基于衬底转移的垂直结构 GaN 基发光二极管芯片技术，例如在蓝宝石衬底上外延沉积 GaN 基发光外延层，然后把发光外延层通过晶圆键合或电镀技术键合或者黏结到半导体基板或金属基板上，再把蓝宝石衬底用激光剥离、研磨或者蚀刻方式去除。这样一方面可以通过在 GaN 基发光外延层和基板之间加一个反射镜来提高反射率，另一方面由于 GaN 基材料的氮极性面容易通过化学腐蚀方法获取粗糙的出光面构造，以上两方面使垂直结构 GaN 基发光二极管具有更高的出光效率，同时衬底转移后的基板具有优良的导热特性，因此转移到散热基板上的垂直结构 GaN 基发光二极管在大电流应用上具有较大的优势。 In recent years, in order to improve the light-emitting power and efficiency of gallium nitride (GaN)-based light-emitting diodes, GaN has been used in conventional horizontal structures. Based on the basic light-emitting diode chip technology, a vertical structure GaN-based light-emitting diode chip technology based on substrate transfer has been developed, for example, epitaxial deposition of GaN on a sapphire substrate. The luminescent epitaxial layer is then bonded or bonded to the semiconductor substrate or the metal substrate by wafer bonding or electroplating, and the sapphire substrate is removed by laser stripping, grinding or etching. This way you can pass A mirror is added between the GaN-based light-emitting epitaxial layer and the substrate to increase the reflectivity. On the other hand, since the nitrogen polar surface of the GaN-based material is easily obtained by a chemical etching method, a rough light-emitting surface structure is obtained, and the above two aspects make the vertical structure GaN-based light-emitting diodes have higher light-emitting efficiency, and the substrate after substrate transfer has excellent thermal conductivity, so the vertical structure transferred to the heat-dissipating substrate is GaN. Base light emitting diodes have great advantages in high current applications.
图 1~6 展示了一种传统垂直结构 GaN 基发光二极管元件制作过程，其制作方法具体如下：Figure 1~6 shows the fabrication process of a conventional vertical structure GaN-based LED device. The fabrication method is as follows:
如图 1 所示，利用 MOCVD 在临时衬底 100 上（例如蓝宝石或碳化硅）上依次成长 n 型氮化镓基半导体层 111 ，发光层 112 及 p 型氮化镓基半导体层 113 ； As shown in Fig. 1, MOCVD is used to sequentially grow on the temporary substrate 100 (for example, sapphire or silicon carbide). a gallium nitride based semiconductor layer 111, a light emitting layer 112 and a p-type gallium nitride based semiconductor layer 113;
如图 2 所示，利用黄光微影技术及电感耦合等离子体干蚀刻技术（ ICP ）将芯粒与芯粒间的外延打穿，形成电学隔离区； As shown in Figure 2, using yellow lithography and inductively coupled plasma dry etching (ICP) Breaking through the epitaxial between the core particles and the core particles to form an electrical isolation region;
如图 3 所示，利用黄光微影技术及真空电子束蒸发镀膜在分离后的芯粒上制作高反射电极 230 ，作为 P 型氮化镓基欧姆接触电极； As shown in Fig. 3, a high-reflection electrode 230 is formed on the separated core particles by using a yellow lithography technique and a vacuum electron beam evaporation coating as P Type gallium nitride based ohmic contact electrode;
如图 4 所示，利用真空电子束蒸发镀膜沉积一层键合金属 240 ，利用晶元键合设备将临时衬底上的外延层与导电衬底 102 键合，以及利用激光剥离技术将生长衬底剥离； As shown in Figure 4, a layer of bonding metal 240 is deposited by vacuum electron beam evaporation coating. Bonding the epitaxial layer on the temporary substrate to the conductive substrate 102 using a wafer bonding apparatus, and peeling the growth substrate by laser lift-off technique;
如图 5 所示，利用 KOH 液粗化 N 型氮化镓基外延层，并在其上制作 N 型氮化镓基欧姆接触电极，并作为 N 极性焊线电极； As shown in FIG. 5, the N-type gallium nitride-based epitaxial layer is roughened by KOH liquid, and an N-type gallium nitride-based ohmic contact electrode is formed thereon, and N polarity wire electrode;
如图 6 所示，减薄导电衬底，并利用真空电子束蒸发镀膜在元件背面沉积一层背面金属，以作为 P 型焊线电极，然后切割导电衬底，分开芯粒。  As shown in Fig. 6, the conductive substrate is thinned and a back metal is deposited on the back side of the device by vacuum electron beam evaporation coating as P Wire the wire electrode, then cut the conductive substrate to separate the core particles.
上述传统垂直结构 GaN 基发光二极管芯片制程复杂，制程良率低，主要有以下几点：第一，由于键合界面不平整导致键合良率低；第二，由于芯粒与芯粒间的隔离区存在缝隙，导致激光剥离生长衬底时发生半导体层边缘破裂等状况；第三，多道黄光微影工艺，导致整体良率较低。The above conventional vertical structure GaN The base light-emitting diode chip has a complicated process and low process yield, and has the following main points: first, the bonding yield is low due to uneven bonding interface; second, due to the gap between the core particle and the core particle isolation region, The result is that the edge of the semiconductor layer is broken when the laser is peeled off the growth substrate; thirdly, the multi-channel yellow light lithography process results in a lower overall yield.
发明内容 Summary of the invention
本发明旨在提供一种垂直结构氮化镓基发光元件的制作方法，其采用离子注入、激光剥离等手段完成主要工艺步骤。其中，利用离子注入技术在 p 型氮化镓基外延层上形成芯粒与芯粒间的隔离区，但此隔离区域仅是利用离子注入使其钝化绝缘，并无外延材料上的损失，可保证外延层表面的平整。利用此方法形成隔离区，可使整体制程简化，能有效解决上述传统垂直结构氮化镓基 LED 芯片制程良率低的问题。 The invention aims to provide a method for fabricating a vertical structure gallium nitride based light-emitting element, which uses ion implantation, laser lift-off and the like to complete the main process steps. Among them, using ion implantation technology in p The isolation region between the core particles and the core particles is formed on the gallium nitride-based epitaxial layer, but the isolation region is only passivated and insulated by ion implantation, and there is no loss on the epitaxial material, which can ensure the surface of the epitaxial layer is flat. The use of this method to form the isolation region can simplify the overall process and effectively solve the above-mentioned conventional vertical structure gallium nitride based LED chip processing yield is low.
一种垂直结构氮化镓基发光元件的制作方法，包括步骤：提供一临时衬底，在其上外延生长氮化镓基发光外延层，并且所述氮化镓基发光外延层自下而上包括： n 型层，发光层和 p 型层；在所述发光外延层上定义绝缘区，利用离子注入法将所述绝缘区的发光外延层钝化绝缘；在所述发光外延层上依次形成金属反射镜、金属键合层；提供一导电衬底，将其与临时衬底上的发光外延层键合；移除所述临时衬底，露出一发光外延层的表面；在所述露出的发光外延层表面上定义切割道，所述切割道位于绝缘区内，利用激光划片沿所述切割道将发光外延层分割为一系列单元，从导电衬底的背面劈裂形成芯粒。 A method for fabricating a vertical structure gallium nitride-based light-emitting device, comprising the steps of: providing a temporary substrate on which a gallium nitride-based light-emitting epitaxial layer is epitaxially grown, and the gallium nitride-based light-emitting epitaxial layer is bottom-up include: N-type layer, luminescent layer and p a layer; an insulating region is defined on the luminescent epitaxial layer, and the luminescent epitaxial layer of the insulating region is passivated and insulated by ion implantation; a metal mirror and a metal bonding layer are sequentially formed on the luminescent epitaxial layer; a conductive substrate bonded to the light-emitting epitaxial layer on the temporary substrate; the temporary substrate is removed to expose a surface of the light-emitting epitaxial layer; and a dicing street is defined on the surface of the exposed light-emitting epitaxial layer The dicing street is located in the insulating region, and the luminescent epitaxial layer is divided into a series of cells along the dicing street by laser dicing, and the core particles are cleaved from the back surface of the conductive substrate.
在本发明中，临时衬底采用蓝宝石、碳化硅、硅、氮化铝、氮化镓其中的一种或者组合；导电衬底采用硅、碳化硅、氧化锌、锗、铜、镍、钴、钨其中的一种或者组合；以到达 n 型层为最低注入深度，最佳注入深度为整体外延深度，利用离子注入法将所述绝缘区的发光外延层纯化绝缘；在所述发光外延层的整个上表面上形成金属反射镜；所述切割道的面积小于绝缘区的面积，所述形成的芯粒的侧壁由钝化绝缘的发光外延层保护；为了提高萃取效率，在移除临时衬底之后，还可以在露出的发光外延层表面做粗化处理。 In the present invention, the temporary substrate is made of one or a combination of sapphire, silicon carbide, silicon, aluminum nitride, gallium nitride; the conductive substrate is made of silicon, silicon carbide, zinc oxide, germanium, copper, nickel, cobalt, One or a combination of tungsten; to reach n The patterned layer is the lowest implantation depth, and the optimal implantation depth is the overall epitaxial depth. The luminescent epitaxial layer of the insulating region is purified and insulated by ion implantation; a metal mirror is formed on the entire upper surface of the luminescent epitaxial layer; The area of the dicing street is smaller than the area of the insulating region, and the sidewall of the formed core particle is protected by the passivated insulating luminescent epitaxial layer; in order to improve the extraction efficiency, after the temporary substrate is removed, the exposed luminescent epitaxial layer may also be The surface is roughened.
在本发明的垂直结构氮化镓基发光元件的制作方法中，先将切割道部分的发光外延层绝缘化，使得切割道部分的 PN 结被隔离，并保证外延层表面的平整，在后续制作步骤中针对切割道的处理，都不会造成芯片短路或者漏电。 In the method of fabricating the vertical structure gallium nitride based light-emitting device of the present invention, the light-emitting epitaxial layer of the scribe line portion is first insulated to make the PN of the scribe line portion The junction is isolated and the surface of the epitaxial layer is flattened, and the chip is not short-circuited or leaked during the subsequent fabrication steps.
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。 Other features and advantages of the invention will be set forth in the description which follows, The objectives and other advantages of the invention may be realized and obtained by means of the structure particularly pointed in the appended claims.
虽然在下文中将结合一些示例性实施及使用方法来描述本发明，但本领域技术人员应当理解，并不旨在将本发明限制于这些实施例。反之，旨在覆盖包含在所附的权利要求书所定义的本发明的精神与范围内的所有替代品、修正及等效物。While the invention will be described in conjunction with the exemplary embodiments and the methods of the invention, it is understood that the invention is not intended to limit the invention. Rather, the invention is to cover all alternatives, modifications, and equivalents of the scope of the invention as defined by the appended claims.
附图说明 DRAWINGS
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例一起用于解释本发明，并不构成对本发明的限制。此外，附图数据是描述概要，不是按比例绘制。 The drawings are intended to provide a further understanding of the invention, and are intended to be a In addition, the drawing figures are a summary of the description and are not drawn to scale.
图 1~ 6 为常规垂直结构的氮化镓基发光元件制作过程的截面示意图。 1 to 6 are schematic cross-sectional views showing a process of fabricating a conventional vertical structure of a gallium nitride-based light-emitting device.
图 7~ 13 是本发明优选实施例的垂直结构氮化镓基发光元件制作过程的截面示意图。 7 to 13 are schematic cross-sectional views showing a process of fabricating a vertical structure gallium nitride based light-emitting device according to a preferred embodiment of the present invention.
图中各标号表示 ： The numbers in the figure indicate:
100 ， 200 ：临时衬底； 101 ， 201 ：导电衬底； 111 ， 211 ： n 型层； 112 ， 212 ：发光层； 113 ， 213 ： p 型层； 120 ， 220 ：光阻材料； 130 ， 230 ：高发射 p 型电极； 140 ， 240 ：键合金属层； 131 ， 231 ： n 电极； 132 ， 232 ：背金电极； 250 ：绝缘区； 251 ：绝缘层； 260 ：保护层。 100, 200: temporary substrate; 101, 201: conductive substrate; 111, 211: n-type layer; 112, 212: luminescent layer; 113, 213: p-type layer; 120, 220: photoresist material; 130, 230: high-emitting p-type electrode; 140, 240: bonded metal layer; 131, 231: n electrode; 132, 232: back gold electrode; 250: insulating region; 251: insulating layer; :The protective layer.
具体实施方式 detailed description
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。 The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, in which the present invention can be applied to the technical problems, and the implementation of the technical effects can be fully understood and implemented. It should be noted that the various embodiments of the present invention and the various features of the various embodiments may be combined with each other, and the technical solutions formed are all within the scope of the present invention.
一种垂直结构氮化镓基发光元件制作方法，其具体步骤如下： A method for fabricating a vertical structure gallium nitride-based light-emitting device, the specific steps of which are as follows:
如图 7 所示，提供一临时衬底 200 ，在其上外延生长 GaN 基发光外延层。包括在临时衬底 200 上采用金属有机化学气相沉积（ MOCVD ）依次外延生长 n 型层 211 、多量子阱（ MQW ）发光层 212 、 p 型层 213 。临时衬底可采用蓝宝石、碳化硅、硅、氮化铝、氮化镓等材料。 As shown in Fig. 7, a temporary substrate 200 is provided on which a GaN-based light-emitting epitaxial layer is epitaxially grown. Included in the temporary substrate 200 The n-type layer 211, the multiple quantum well ( MQW ) light-emitting layer 212, and the p-type layer 213 are sequentially epitaxially grown by metal organic chemical vapor deposition (MOCVD). . The temporary substrate may be made of sapphire, silicon carbide, silicon, aluminum nitride, gallium nitride or the like.
如图 8 所示，在 p 型层 213 上定义绝缘区 250 ，利用离子注入法将所述绝缘区的发光外延层钝化绝缘。具体工艺如下：利用黄光微影技术在 P 型层上定义出绝缘区 250 ，单个绝缘区 250 的宽度为 50~100 μ m ，绝缘区外的区域覆盖光阻材料 220 ，光阻厚度不小于 2 μ m m ，最佳厚度为 3 μ m 。选择磷作为离子源，利用离子注入法将绝缘区 250 的外延层钝化绝缘，形成绝缘部 251 。以离子到达 n 型层为最低注入深度，最佳注入深度为整体外延深度。 As shown in FIG. 8, an insulating region is defined on the p-type layer 213. The light-emitting epitaxial layer of the insulating region is passivated and insulated by ion implantation. The specific process is as follows: an insulating region 250 is defined on the P-type layer by a yellow lithography technique, and the width of the single insulating region 250 is 50~100 μ m, the area outside the insulating area is covered with photoresist material 220, the photoresist thickness is not less than 2 μ m m , and the optimum thickness is 3 μ m . Phosphorus is selected as the ion source, and the epitaxial layer of the insulating region 250 is passivated and insulated by ion implantation to form an insulating portion 251. Reach with ions The type of layer is the lowest implant depth, and the optimum implant depth is the overall epitaxy depth.
如图 9 所示，移除光刻胶，利用真空电子束蒸发镀膜在整个晶片的 P 型层 213 上沉积镜面层，作为高反射电极 230 ，该高反射电极包含 Ag 、 Ni 、 Al 、 Pt 、 Au 、 Ti 的一种或者多种，其总体厚度不小于 3kA ，最佳厚度为 5kA ，蒸镀面为 P 型层中包含未离子注入和离子注入隔离区域的整个外延表面。对高反射电极进行退火操作，最佳退火温度控制在 380 ℃左右以获得良好的电性接触和高反射率。 As shown in Figure 9, the photoresist is removed and the P-type layer of the entire wafer is 213 by vacuum electron beam evaporation. Depositing a mirror layer as a high-reflection electrode 230, the high-reflection electrode comprising one or more of Ag, Ni, Al, Pt, Au, Ti, and having an overall thickness of not less than 3 kA The optimum thickness is 5kA, and the vapor deposition surface is the entire epitaxial surface of the P-type layer containing the non-ion implantation and ion implantation isolation regions. Annealing the high-reflection electrode, the optimal annealing temperature is controlled at 380 Around °C to obtain good electrical contact and high reflectivity.
如图 10 所示，在高反射电极层 230 上沉积一层键合金属层 240 ，该键合金属层可包含 Cr 、 Al 、 Pt 、 Au 、 Ti 的一种或者多种。选择一导电衬底 201 ，利用真空电子束蒸发镀膜在导电基板上 201 沉积上述键合金属层，利用晶元键合设备将临时衬底上的外延层与导电衬底键合。导电衬底采用硅、碳化硅、氧化锌、锗、铜、镍、钴、钨其中的一种。 As shown in FIG. 10, a bonding metal layer 240 is deposited on the high reflective electrode layer 230, and the bonding metal layer may include One or more of Cr, Al, Pt, Au, and Ti. Selecting a conductive substrate 201 and using a vacuum electron beam evaporation coating on the conductive substrate 201 The above-mentioned bonded metal layer is deposited, and the epitaxial layer on the temporary substrate is bonded to the conductive substrate by a wafer bonding apparatus. The conductive substrate is one of silicon, silicon carbide, zinc oxide, antimony, copper, nickel, cobalt, and tungsten.
如图 11 所示，移除临时衬底 200 ，而保留于导电衬底 201 上。在本发明的优选实施例，采用蓝宝石作为临时衬底，利用 248nmKrF 气体激光器剥离衬底，激光能量密度设定 800-1000mJ/cm2 。As shown in FIG. 11, the temporary substrate 200 is removed while remaining on the conductive substrate 201. In a preferred embodiment of the present invention, sapphire is used as a temporary substrate, and the substrate is peeled off by a 248 nm KrF gas laser, and the laser energy density is set to 800 to 1000 mJ/cm 2 .
如图 12 所示，利用 KOH 溶液粗化 n 型层，并利用电子束真空镀膜方式在 N 型半导体上沉积 n 电极。 As shown in Figure 12, the n-type layer is roughened with KOH solution and electron beam vacuum coating is used in N An n-electrode is deposited on the semiconductor.
如图 13 所示，研磨减薄导电衬底，并在导电衬底的背面蒸镀背金电极 232 ；在发光外延层的表面上定义切割道，先采用激光沿着切割道从发光外延层的 N 面将外延层分成芯粒单元，再利用钻石刀从导电衬底的背面劈裂分开芯粒。切割道的面积小于绝缘区的面积，所述形成的芯粒的侧壁由钝化绝缘的发光外延层 260 保护。 As shown in FIG. 13, the thinned conductive substrate is ground and the back gold electrode is vapor-deposited on the back side of the conductive substrate. Defining a scribe line on the surface of the luminescent epitaxial layer, first using a laser along the scribe line from the N of the luminescent epitaxial layer The epitaxial layer is divided into core unit, and the core particles are separated from the back surface of the conductive substrate by a diamond knife. The area of the dicing street is smaller than the area of the insulating region, and the sidewall of the formed core particle is made of a passivated insulating luminescent epitaxial layer 260 Protection.
在本发明中，采用离子注入方式制作的隔离区域因外延层无深度上的损失，而使得晶片表面始终处于平坦状态，这样的键合表面平整，且后续在 KOH 粗化 N 型氮化镓基外延层时无需考虑粗化保护芯粒侧壁的问题，整体制程良率因此可获得极大的提升。而最后制成的芯粒侧壁形成与外延层同质的电学隔离区域，相较于传统垂直结构氮化镓基发光元件采用 SiO2/Si4N3 或者其他有机胶体作为侧壁保护层，此方法制作的垂直结构氮化镓基发光元件的成品稳定性更高。 In the present invention, the isolation region fabricated by ion implantation has no depth loss in the epitaxial layer, so that the surface of the wafer is always in a flat state, such a bonding surface is flat, and subsequently KOH coarsening N The type of gallium nitride-based epitaxial layer does not need to consider the problem of roughening and protecting the sidewall of the core, and the overall process yield can be greatly improved. The final fabricated core sidewall forms an electrically isolated region that is homogenous to the epitaxial layer, as compared to a conventional vertical structure GaN-based luminescent device. SiO2/Si4N3 or other organic colloids act as a sidewall protective layer. The vertical structure of the GaN-based light-emitting device produced by this method has higher stability.
此外，利用本发明制作垂直结构氮化镓基发光元件相比传统垂直结构氮化镓基发光元件制作过程，省略了 P 面高反射电极和粗化保护等黄光微影工艺步骤，极大程度上简化了制程难度。In addition, the fabrication process of the vertical structure gallium nitride-based light-emitting device using the present invention is omitted compared to the conventional vertical structure gallium nitride-based light-emitting device. The high-reflection electrode and the yellowing lithography process steps such as roughening protection greatly simplify the process.
很明显地，本发明的说明不应理解为仅仅限制在上述实施例，而是包括利用本发明构思的全部实施方式。 It is apparent that the description of the present invention should not be construed as being limited to the above-described embodiments, but rather to all embodiments that utilize the inventive concept.

Claims (9)

  1. 一种垂直结构氮化镓基发光元件的制作方法，包括步骤： A method for fabricating a vertical structure gallium nitride based light-emitting element comprises the steps of:
    提供一临时衬底，在其上外延生长氮化镓基发光外延层，并且所述氮化镓基发光外延层自下而上包括： n 型层，发光层和 p 型层；Providing a temporary substrate on which a gallium nitride-based light-emitting epitaxial layer is epitaxially grown, and the gallium nitride-based light-emitting epitaxial layer comprises: an n-type layer, a light-emitting layer, and p Type layer
    在所述发光外延层上定义绝缘区，利用离子注入法将所述绝缘区的发光外延层钝化绝缘；An insulating region is defined on the luminescent epitaxial layer, and the luminescent epitaxial layer of the insulating region is passivated and insulated by an ion implantation method;
    在所述发光外延层上依次形成金属反射镜、金属键合层；Forming a metal mirror and a metal bonding layer on the luminescent epitaxial layer;
    提供一导电衬底，将其与临时衬底上的发光外延层键合；Providing a conductive substrate bonded to the light emitting epitaxial layer on the temporary substrate;
    移除所述临时衬底，露出一发光外延层的表面；Removing the temporary substrate to expose a surface of a light emitting epitaxial layer;
    在所述露出的发光外延层表面上定义切割道，所述切割道位于绝缘区内，利用激光划片沿所述切割道将发光外延层分割为一系列单元，从导电衬底的背面劈裂形成芯粒。A dicing street is defined on a surface of the exposed luminescent epitaxial layer, the dicing street is located in the insulating region, and the luminescent epitaxial layer is divided into a series of cells along the dicing street by a laser dicing, and is cleaved from the back surface of the conductive substrate A core particle is formed.
  2. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：所述临时衬底采用蓝宝石、碳化硅、硅、氮化铝、氮化镓其中的一种或者组合。According to claim 1 The method for fabricating a vertical structure gallium nitride-based light-emitting device is characterized in that the temporary substrate is one or a combination of sapphire, silicon carbide, silicon, aluminum nitride, or gallium nitride.
  3. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：利用离子注入法将所述绝缘区的 n 型层之上的发光外延层纯化绝缘。The method for fabricating a vertical structure gallium nitride based light-emitting device according to claim 1, wherein the insulating region is n by ion implantation The luminescent epitaxial layer over the layer is purified and insulated.
  4. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：利用离子注入法将所述绝缘区的全部发光外延层纯化绝缘。According to claim 1 The method for fabricating a vertical structure gallium nitride based light-emitting device is characterized in that all of the light-emitting epitaxial layers of the insulating region are purified and insulated by ion implantation.
  5. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：所述绝缘区的宽度为 50~100 μ m ，将发光外延层分隔了一系列发光单元。The method for fabricating a vertical structure gallium nitride based light-emitting device according to claim 1, wherein the insulating region has a width of 50 to 100 μm The luminescent epitaxial layer is separated by a series of illuminating units.
  6. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：在所述发光外延层的整个上表面上形成金属反射镜。According to claim 1 The method for fabricating a vertical structure gallium nitride-based light-emitting device according to the invention is characterized in that a metal mirror is formed on the entire upper surface of the light-emitting epitaxial layer.
  7. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：所述导电衬底采用硅、碳化硅、氧化锌、锗、铜、镍、钴、钨其中的一种或其组合。According to claim 1 The method for fabricating a vertical structure gallium nitride-based light-emitting device, wherein the conductive substrate is one of silicon, silicon carbide, zinc oxide, antimony, copper, nickel, cobalt, tungsten or combination.
  8. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：切割道的面积小于绝缘区的面积，所述形成的芯粒的侧壁由钝化绝缘的发光外延层保护。 According to claim 1 The method for fabricating a vertical structure gallium nitride-based light-emitting device is characterized in that the area of the dicing street is smaller than the area of the insulating region, and the sidewall of the formed core particle is protected by a passivated insulating luminescent epitaxial layer.
  9. 根据权利要求 1 所述的一种垂直结构氮化镓基发光元件的制作方法，其特征在于：还包括在：在移除临时衬底之后，在露出的发光外延层表面做粗化处理。According to claim 1 The method for fabricating a vertical structure gallium nitride-based light-emitting device, further comprising: performing a roughening treatment on a surface of the exposed light-emitting epitaxial layer after removing the temporary substrate.
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