WO2013046442A1 - Substrate and method for manufacturing same - Google Patents

Substrate and method for manufacturing same Download PDF

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Publication number
WO2013046442A1
WO2013046442A1 PCT/JP2011/072589 JP2011072589W WO2013046442A1 WO 2013046442 A1 WO2013046442 A1 WO 2013046442A1 JP 2011072589 W JP2011072589 W JP 2011072589W WO 2013046442 A1 WO2013046442 A1 WO 2013046442A1
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Prior art keywords
insulating
hole
conductive layer
substrate
layer
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PCT/JP2011/072589
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French (fr)
Japanese (ja)
Inventor
秀吉 瀧井
典明 種子
道脇 茂
満帆 黒須
佑一郎 名屋
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株式会社メイコー
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Priority to PCT/JP2011/072589 priority Critical patent/WO2013046442A1/en
Priority to CN201180073816.1A priority patent/CN103828494A/en
Priority to TW101134092A priority patent/TW201330715A/en
Publication of WO2013046442A1 publication Critical patent/WO2013046442A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0104Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013Inkjet printing, e.g. for printing insulating material or resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor

Definitions

  • the present invention relates to a substrate having a through hole and a manufacturing method thereof.
  • a through hole penetrating an insulating layer and an insulating base material patterned on both surfaces is formed, and plating is performed in the through hole. Conduction is achieved by connecting the inner surface of the conductive layer formed as a through hole and plating. Thereby, an electrical interlayer connection is possible through plating in the through hole.
  • This through hole is often formed using a drill bit. Therefore, immediately after processing, chips (smear) are generated in the through hole, and the chips adhere to the through hole due to heat during processing. is doing. If this smear is not removed, poor plating connection may occur during the plating process to the through hole, and a smear removal step called desmear treatment is necessary. That is, if the smear remains attached to the inner surface of the conductive layer, a connection failure occurs between the conductive layer and the plating.
  • chips smear
  • permanganic acid permanganic acid, chromic acid or the like is used.
  • pretreatment it may be washed with an alkali detergent containing a surfactant and dried (for example, see Patent Document 1).
  • the desmear process requires a chemical solution for smear decomposition as described above, and has a high environmental load.
  • the present invention is a substrate and method for manufacturing the same that can reliably achieve interlayer connection without performing desmearing when plating through holes.
  • an insulating base material a conductive layer that is patterned on both surfaces of the insulating base material, and a back surface is in close contact with the insulating base material, a through hole that penetrates the insulating base material and the conductive layer,
  • a substrate comprising a plating film formed continuously on the inner surface of the through hole and on the respective surfaces of the conductive layer on both surfaces.
  • a conductive layer forming step of forming the conductive layer by partially removing the metal film with respect to the insulating base having the metal film attached to both surfaces, and each of the insulating base and the conductive layer A through-hole forming step for forming a through-hole penetrating through, an insulating layer forming step for forming an insulating layer by applying a first insulating resin to each of both surfaces of the insulating base, and at the same time as the insulating layer forming step or A via hole forming step of forming a via hole exposing the surface of the conductive layer in which the through hole is formed; and the via hole exposed at least on the inner surface of the through hole and on both surfaces of the insulating base.
  • a method for manufacturing a substrate comprising: a plating step of continuously forming a plating film on each of the surfaces of the conductive layer.
  • the first insulating resin is applied by an inkjet method, and the via hole is formed simultaneously with the application of the first insulating resin.
  • the plating film is formed on the surface of each conductive layer patterned on both surfaces of the insulating substrate. For this reason, even if it is in the state in which the smear adhered in the through-hole, the electrical connection between both surfaces through an insulating base material can be ensured. That is, since the interlayer connection can be realized without going through the desmear process, the manufacturing process is simplified and the productivity is improved. Moreover, the chemical solution for the desmear process becomes unnecessary, and the environmental load can be reduced.
  • a via hole can be formed simultaneously with the formation of the insulating layer. This eliminates the need for a step of forming a separate via hole with a laser or the like, makes it relatively inexpensive, and simplifies the manufacturing process.
  • FIG. 1 is an enlarged schematic view of a substrate according to the present invention. It is the schematic which shows the manufacturing method of the board
  • the surface of the conductive layer 16 (the surface with respect to the back surface in close contact with the insulating base material 2) is exposed, so that a part of the plating film 12 is exposed to the exposed surface 16a of the conductive layer 16. Is also formed.
  • the plating film 12 is formed on the surface of each conductive layer 16 patterned on both surfaces of the insulating substrate 2.
  • the electrical conductivity through the relatively smooth surface of the conductive layer 16 and the plating film 12 is increased. Connection is possible. For this reason, even if it is in the state which the smear adhered in the through hole 11, the electrical connection between both surfaces through the insulating base material 2 can be ensured. Thereby, the interlayer connection can be realized without going through the desmear process, so that the manufacturing process is simplified and the productivity is improved. Moreover, the chemical solution for the desmear process becomes unnecessary, and the environmental load can be reduced.
  • a conductive layer forming step is performed.
  • an insulating base material 2 having metal films 1 attached on both sides is prepared.
  • the metal film 1 is, for example, a copper foil.
  • the metal film 1 is partially removed to form a patterned inner layer circuit 3 (the conductive layer 16 described above).
  • a through hole forming process is performed.
  • a through hole 11 penetrating each of the insulating base material 2 and the inner layer circuit 3 is formed.
  • the through hole 11 is formed using, for example, a drill bit.
  • the insulating layer 5 is formed by applying the first insulating resin 4 to both surfaces of the insulating base material 2 by the ink jet method.
  • the first insulating resin 4 is ejected from the nozzle 7 of the ejection device 8 using a known ink jet device, and is impacted on the insulating substrate 2 (or the inner layer circuit 3).
  • the nozzle 7 moves in one direction with respect to the insulating substrate 2 (in the direction of arrow A in FIG. 5).
  • the first insulating resin 4 is selectively impacted on the insulating base 2 and simultaneously the via hole 6 is formed.
  • the via hole 6 is formed at a position where the inner layer circuit 3 is partially exposed. Therefore, the via hole 6 is formed at the same time as the insulating layer 5 is formed by applying the first insulating resin.
  • the insulating layer 5 is formed by the ink jet method, a process of forming the via hole 6 separately by a laser or the like is not necessary, and the manufacturing process can be simplified because the cost becomes relatively low.
  • the insulating layer 5 is formed on one side of the insulating base 2 and finally formed on both sides. After this step, as shown in FIG. 6, the insulating layer 5 in which the via hole 6 is formed is formed. Thus, if an ink jet system is adopted, a via hole forming process can be performed simultaneously.
  • the insulating layer 5 may be formed by screen printing. In this case, after the insulating layer 5 is once formed, a via hole 6 is separately formed as a via hole forming step.
  • the via hole 6 formed in the via hole forming step is formed so that the surface 3a of the inner layer circuit 3 is exposed, regardless of whether it is formed by the above-described ink jet or by processing after screen printing.
  • the first insulating resin 4 to be applied by injection is of a viscosity that can be used in an ink jet apparatus.
  • wetting and spreading properties when the first insulating resin 4 forming the insulating layer 5 has landed on both the insulating base material 2 and the inner layer circuit 3 are important. If the wetting and spreading property is large, the first insulating resin 4 flows out into the via hole 6 to be formed or the outside of the insulating base material 2 and becomes a factor of degrading the resolution. Or control of application
  • the wettability of the insulating base material 2 to which the first insulating resin 4 is applied may be optimized.
  • This optimization may be performed by performing corona treatment, low-pressure UV irradiation treatment, or plasma treatment on the surface of the insulating substrate 2 on which the inner layer circuit 3 is formed after the inner layer circuit forming step and before the insulating layer forming step.
  • Corona treatment is preferable in consideration of the price and running cost of the apparatus.
  • the inkjet device further includes an irradiation device 9 for irradiating ultraviolet rays, and this irradiation device 9 can move following the ejection device 8 in the movement direction A.
  • the irradiation device 9 is mounted on the extension of the ink jet head of the ink jet device, and when the ink jet head moves, the irradiation device 9 moves at the same time. If the first insulating resin 4 is an ultraviolet curable resin, the impact position is irradiated with the ultraviolet light P immediately after the first insulating resin 4 is impacted on the surface of the insulating base 2. Accordingly, the first insulating resin 4 is cured or semi-cured, and the first insulating resin 4 can be prevented from spreading more than necessary.
  • the first insulating resin 4 is an ultraviolet ray and a thermosetting resin, and the first insulating resin 4 is cured by performing a heat treatment after the insulating layer 5 is formed.
  • the inner layer circuit 3 is formed on the insulating base material 2 in the insulating layer forming step, it has an uneven shape. When screen printing or the like is performed on such a portion, uneven shapes remain on the printed surface. If an inkjet system is used, more resin can be applied aiming at the concave and convex portions, so that the surface can be made uniform.
  • the first insulating resin 4 is landed in a flying manner and dried, and the second coating is aimed at these gaps.
  • the required insulating layer thickness is 1 It cannot be obtained only by one application.
  • a method of applying the second and subsequent times after holding is preferable.
  • a plating process is performed.
  • the surface of the insulating layer 5, the inner surface of the through hole 11, the inner surface of the via hole 6, and the exposed surface 3a of the inner layer circuit 3 are shown in FIG.
  • a plating film 12 is formed on the exposed surface 16a) of the conductive layer.
  • the plating film 12 is made of a conductive metal, for example, copper. Then, the plating film 12 is partially removed using etching or the like, and an outer layer circuit 13 is formed on the surface of the insulating layer 5 as shown in FIG.
  • the plating film 12 is formed on the exposed surface 3a of the inner layer circuit 3, even when smear is generated on the inner surface of the conductive layer 16 on the through hole 11 side during the formation of the through hole 11, the comparison is made. Electrical connection through the surface 3a of the inner smooth circuit 3 and the plating film 12 becomes possible. For this reason, even if it is in the state which the smear adhered in the through hole 11, the electrical connection between both surfaces through the insulating base material 2 can be ensured. Thereby, the interlayer connection can be realized without going through the desmear process, so that the manufacturing process is simplified and the productivity is improved. Moreover, the chemical solution for the desmear process becomes unnecessary, and the environmental load can be reduced.
  • the second insulating resin 14 is selectively applied to the outer layer circuit 13 by an ink jet method. Generally, it is applied leaving at least the via hole 6 and the through hole 11.
  • the second insulating resin 14 is applied on the outer layer circuit 13 to form a resist layer 15.
  • the resist layer 15 can also be formed by using an ink jet method to form a resist layer (solder resist) 15 having an opening in the via hole, and a process for opening the via hole in the resist separately. It becomes unnecessary.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

This substrate is provided with: an insulating base material (2); conductive layers (16) which are pattern-formed on both the surfaces of the insulating base material (2), and have respective rear surfaces in close contact with the insulating base material (2); a through hole (11) that penetrates the insulating base material (2) and the conductive layers (16); and plating films (12), which are respectively formed continuously on the inner surface of the through hole (11) and the front surfaces of the conductive layers (16) on both the surfaces.

Description

基板及びその製造方法Substrate and manufacturing method thereof
 本発明は、スルーホールを有する基板及びその製造方法に関する。 The present invention relates to a substrate having a through hole and a manufacturing method thereof.
 従来、多層基板の層間における電気的な接続を図るため、両面にパターン成形された絶縁層及び絶縁基材を貫通するスルーホールを形成し、このスルーホール内にめっき処理を施していた。導通は、スルーホールとして形成された導電層の内面とめっきが接続することで図られている。これにより、スルーホール内のめっきを介して電気的な層間接続が可能となっている。 Conventionally, in order to achieve electrical connection between layers of a multilayer substrate, a through hole penetrating an insulating layer and an insulating base material patterned on both surfaces is formed, and plating is performed in the through hole. Conduction is achieved by connecting the inner surface of the conductive layer formed as a through hole and plating. Thereby, an electrical interlayer connection is possible through plating in the through hole.
 このスルーホールは、ドリルビットを用いて形成されることが多く、したがって加工直後はスルーホール内に切り屑(スミア)が発生し、しかもこの切り屑は加工の際の熱によってスルーホール内に付着している。このスミアを除去しなければ、スルーホールへのめっき処理に際するめっきの接続不良が生じうるため、デスミア処理と称されるスミアの除去工程が必要であった。すなわち、スミアが導電層の内面に付着したままだと、導電層とめっきとの間で接続不良が生じてしまう。 This through hole is often formed using a drill bit. Therefore, immediately after processing, chips (smear) are generated in the through hole, and the chips adhere to the through hole due to heat during processing. is doing. If this smear is not removed, poor plating connection may occur during the plating process to the through hole, and a smear removal step called desmear treatment is necessary. That is, if the smear remains attached to the inner surface of the conductive layer, a connection failure occurs between the conductive layer and the plating.
 デスミア処理としては、過マンガン酸やクロム酸等が用いられている。その前処理として界面活性剤を含有するアルカリ洗浄剤で洗浄し、乾燥させてもよい(例えば特許文献1参照)。 As the desmear treatment, permanganic acid, chromic acid or the like is used. As the pretreatment, it may be washed with an alkali detergent containing a surfactant and dried (for example, see Patent Document 1).
 しかしながら、デスミア処理工程が不要となれば、製造工程が簡略化し、生産性が向上することになる。特にデスミア処理は、上述したようなスミア分解のための薬液が必要であり、環境負荷が高いものとなっている。 However, if the desmear process is not required, the manufacturing process is simplified and the productivity is improved. In particular, the desmear process requires a chemical solution for smear decomposition as described above, and has a high environmental load.
特開平5-37137号公報JP-A-5-37137
 本発明は、スルーホールにめっき処理をする際にデスミア処理をしなくても、確実に層間接続を図ることができる基板及びその製造方法である。 DETAILED DESCRIPTION OF THE INVENTION The present invention is a substrate and method for manufacturing the same that can reliably achieve interlayer connection without performing desmearing when plating through holes.
 本発明では、絶縁基材と、該絶縁基材の両面にパターン形成され、裏面が前記絶縁基材に密着している導電層と、前記絶縁基材及び前記導電層を貫通するスルーホールと、該スルーホールの内面及び両面の前記導電層のそれぞれの表面に連続して形成されためっき膜とを備えたことを特徴とする基板を提供する。 In the present invention, an insulating base material, a conductive layer that is patterned on both surfaces of the insulating base material, and a back surface is in close contact with the insulating base material, a through hole that penetrates the insulating base material and the conductive layer, There is provided a substrate comprising a plating film formed continuously on the inner surface of the through hole and on the respective surfaces of the conductive layer on both surfaces.
 また、両面に金属膜が貼り付けられた前記絶縁基材に対して前記金属膜を部分的に除去して前記導電層を形成する導電層形成工程と、前記絶縁基材及び前記導電層のそれぞれを貫通するスルーホールを形成するスルーホール形成工程と、前記絶縁基材の両面それぞれに第1の絶縁樹脂を塗布して絶縁層を形成する絶縁層形成工程と、該絶縁層形成工程と同時又は後に、前記スルーホールが形成された前記導電層の前記表面を露出させたビアホールを形成するビアホール形成工程と、少なくとも前記スルーホールの内面及び前記絶縁基材両面の前記ビアホール内に露出している前記導電層の前記表面のそれぞれに連続してめっき膜を形成するめっき工程とを備えたことを特徴とする基板の製造方法を提供する。 In addition, a conductive layer forming step of forming the conductive layer by partially removing the metal film with respect to the insulating base having the metal film attached to both surfaces, and each of the insulating base and the conductive layer A through-hole forming step for forming a through-hole penetrating through, an insulating layer forming step for forming an insulating layer by applying a first insulating resin to each of both surfaces of the insulating base, and at the same time as the insulating layer forming step or A via hole forming step of forming a via hole exposing the surface of the conductive layer in which the through hole is formed; and the via hole exposed at least on the inner surface of the through hole and on both surfaces of the insulating base. There is provided a method for manufacturing a substrate, comprising: a plating step of continuously forming a plating film on each of the surfaces of the conductive layer.
 好ましくは、前記絶縁層形成工程にて、前記第1の絶縁樹脂をインクジェット方式によって塗布し、前記第1の絶縁樹脂を塗布すると同時に前記ビアホールを形成する。 Preferably, in the insulating layer forming step, the first insulating resin is applied by an inkjet method, and the via hole is formed simultaneously with the application of the first insulating resin.
 本発明によれば、絶縁基材の両面にパターン形成されたそれぞれの導電層の表面にめっき膜が形成される。このため、スルーホール内にスミアが付着した状態であっても、絶縁基材を介した両面間の電気的な接続を確実にすることができる。すなわち、デスミア工程を経ることなく層間接続を実現できるので、製造工程が簡略化し、生産性が向上することになる。また、デスミア処理のための薬液が不要となり、環境負荷を低減できる。 According to the present invention, the plating film is formed on the surface of each conductive layer patterned on both surfaces of the insulating substrate. For this reason, even if it is in the state in which the smear adhered in the through-hole, the electrical connection between both surfaces through an insulating base material can be ensured. That is, since the interlayer connection can be realized without going through the desmear process, the manufacturing process is simplified and the productivity is improved. Moreover, the chemical solution for the desmear process becomes unnecessary, and the environmental load can be reduced.
 また、インクジェット方式によって絶縁層を形成すれば、絶縁層の形成と同時にビアホールを形成することができる。これにより、レーザ等により別途ビアホールを形成する工程が不要となり、比較的安価となり、製造工程を簡略化することができる。 Further, if the insulating layer is formed by an ink jet method, a via hole can be formed simultaneously with the formation of the insulating layer. This eliminates the need for a step of forming a separate via hole with a laser or the like, makes it relatively inexpensive, and simplifies the manufacturing process.
本発明に係る基板の拡大概略図である。1 is an enlarged schematic view of a substrate according to the present invention. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order. 本発明に係る基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the board | substrate concerning this invention in order.
 図1に示すように、本発明に係る基板は、絶縁基材2と、この絶縁基材の両面にパターン形成された導電層16とを有している。すなわち、導電層16(後述する内層回路3)は、その裏面が絶縁基材2に密着している。なお、導電層16の上(パターン形成されていない部位については絶縁基材2の上)には絶縁層5が形成されている。絶縁基材2及び導電層16には、これらを貫通するスルーホール11が設けられている。また、絶縁層5にはスルーホール11に連通するようにビアホール6が形成されている。そして、めっき処理することで、スルーホール11の内面やビアホール6の内面、さらには絶縁層5の表面にめっき膜が連続して形成されている。 As shown in FIG. 1, the substrate according to the present invention has an insulating base material 2 and conductive layers 16 patterned on both surfaces of the insulating base material. That is, the back surface of the conductive layer 16 (inner layer circuit 3 described later) is in close contact with the insulating substrate 2. Note that the insulating layer 5 is formed on the conductive layer 16 (on the insulating base material 2 for a portion where no pattern is formed). The insulating substrate 2 and the conductive layer 16 are provided with through holes 11 penetrating them. A via hole 6 is formed in the insulating layer 5 so as to communicate with the through hole 11. A plating film is continuously formed on the inner surface of the through hole 11, the inner surface of the via hole 6, and the surface of the insulating layer 5 by plating.
 ここで、ビアホール6形成の際、導電層16の表面(絶縁基材2に密着している裏面に対する表面)が露出されるので、めっき膜12の一部は導電層16の露出した表面16aにも形成されている。 Here, when the via hole 6 is formed, the surface of the conductive layer 16 (the surface with respect to the back surface in close contact with the insulating base material 2) is exposed, so that a part of the plating film 12 is exposed to the exposed surface 16a of the conductive layer 16. Is also formed.
 このように、絶縁基材2の両面にパターン形成されたそれぞれの導電層16の表面にめっき膜12が形成されている。すなわち、スルーホール11形成の際に、導電層16のスルーホール11側の内面にスミアが発生していたとしても、比較的平滑な導電層16の表面とめっき膜12とを介した電気的な接続が可能となる。このため、スルーホール11内にスミアが付着した状態であっても、絶縁基材2を介した両面間の電気的な接続を確実にすることができる。これにより、デスミア工程を経ることなく層間接続を実現できるので、製造工程が簡略化し、生産性が向上することになる。また、デスミア処理のための薬液が不要となり、環境負荷を低減できる。 As described above, the plating film 12 is formed on the surface of each conductive layer 16 patterned on both surfaces of the insulating substrate 2. In other words, even when smear is generated on the inner surface of the conductive layer 16 on the through hole 11 side when the through hole 11 is formed, the electrical conductivity through the relatively smooth surface of the conductive layer 16 and the plating film 12 is increased. Connection is possible. For this reason, even if it is in the state which the smear adhered in the through hole 11, the electrical connection between both surfaces through the insulating base material 2 can be ensured. Thereby, the interlayer connection can be realized without going through the desmear process, so that the manufacturing process is simplified and the productivity is improved. Moreover, the chemical solution for the desmear process becomes unnecessary, and the environmental load can be reduced.
 以下に、本発明に係る基板の製造方法について説明する。
 本発明に係る基板の製造方法は、まず導電層形成工程を行う。導電層形成工程は、まず図2に示すように、両面に金属膜1が貼り付けられた絶縁基材2を準備する。金属膜1は例えば銅箔である。そして、図3に示すように、金属膜1を部分的に除去してパターン形成された内層回路3(上述した導電層16)を形成する。
Below, the manufacturing method of the board | substrate which concerns on this invention is demonstrated.
In the method for manufacturing a substrate according to the present invention, first, a conductive layer forming step is performed. In the conductive layer forming step, first, as shown in FIG. 2, an insulating base material 2 having metal films 1 attached on both sides is prepared. The metal film 1 is, for example, a copper foil. Then, as shown in FIG. 3, the metal film 1 is partially removed to form a patterned inner layer circuit 3 (the conductive layer 16 described above).
 次に、スルーホール形成工程を行う。このスルーホール形成工程では、図4に示すように、絶縁基材2及び内層回路3のそれぞれを貫通するスルーホール11が形成される。スルーホール11は、例えばドリルビット等を用いて形成される。 Next, a through hole forming process is performed. In this through hole forming step, as shown in FIG. 4, a through hole 11 penetrating each of the insulating base material 2 and the inner layer circuit 3 is formed. The through hole 11 is formed using, for example, a drill bit.
 次に、絶縁層形成工程を行う。絶縁層形成工程では、例えば図5に示すように、絶縁基材2の両面それぞれに第1の絶縁樹脂4をインクジェット方式によって塗布して絶縁層5が形成される。第1の絶縁樹脂4は、公知のインクジェット装置を用いて噴出装置8のノズル7から噴出され、絶縁基材2(又は内層回路3)上に弾着する。ノズル7は絶縁基材2に対して一方向に移動する(図5の矢印A方向)。このとき、インクジェット方式の特性を利用して、第1の絶縁樹脂4は選択的に絶縁基材2上に弾着され、同時にビアホール6が形成される。このビアホール6は、内層回路3を部分的に露出する位置に形成される。したがって、第1の絶縁樹脂を塗布して絶縁層5を形成すると同時にビアホール6が形成される。このように、インクジェット方式によって絶縁層5を形成すれば、レーザ等により別途ビアホール6を形成する工程が不要となり、比較的安価となり、製造工程を簡略化することができる。この絶縁層5は絶縁基材2の片面ごとに形成され、最終的に両面に形成される。この工程を経ると、図6に示すように、ビアホール6が形成された絶縁層5が形成される。このように、インクジェット方式を採用すれば、ビアホール形成工程も同時に行うことができる。 Next, an insulating layer forming step is performed. In the insulating layer forming step, for example, as shown in FIG. 5, the insulating layer 5 is formed by applying the first insulating resin 4 to both surfaces of the insulating base material 2 by the ink jet method. The first insulating resin 4 is ejected from the nozzle 7 of the ejection device 8 using a known ink jet device, and is impacted on the insulating substrate 2 (or the inner layer circuit 3). The nozzle 7 moves in one direction with respect to the insulating substrate 2 (in the direction of arrow A in FIG. 5). At this time, using the characteristics of the ink jet system, the first insulating resin 4 is selectively impacted on the insulating base 2 and simultaneously the via hole 6 is formed. The via hole 6 is formed at a position where the inner layer circuit 3 is partially exposed. Therefore, the via hole 6 is formed at the same time as the insulating layer 5 is formed by applying the first insulating resin. As described above, if the insulating layer 5 is formed by the ink jet method, a process of forming the via hole 6 separately by a laser or the like is not necessary, and the manufacturing process can be simplified because the cost becomes relatively low. The insulating layer 5 is formed on one side of the insulating base 2 and finally formed on both sides. After this step, as shown in FIG. 6, the insulating layer 5 in which the via hole 6 is formed is formed. Thus, if an ink jet system is adopted, a via hole forming process can be performed simultaneously.
 なお、スクリーン印刷により絶縁層5を形成してもよい。この場合は、いったん絶縁層5を形成した後、ビアホール形成工程として、別途ビアホール6を形成する。 Note that the insulating layer 5 may be formed by screen printing. In this case, after the insulating layer 5 is once formed, a via hole 6 is separately formed as a via hole forming step.
 ここで、ビアホール形成工程で形成されるビアホール6は、上記インクジェットによって形成されたものであってもスクリーン印刷後の加工によるものであっても、内層回路3の表面3aが露出するように形成される。 Here, the via hole 6 formed in the via hole forming step is formed so that the surface 3a of the inner layer circuit 3 is exposed, regardless of whether it is formed by the above-described ink jet or by processing after screen printing. The
 絶縁層形成工程にインクジェットを用いた場合、ビアホール6を精度よく、あるいは小径のビアホール6を形成するには、インクジェット方式による第1の絶縁樹脂4の液滴を小さくして解像度を上げることが必要である。この方法としては、インクジェットヘッドのノズルピッチを単純に小さくする方法がある。あるいは、複数のノズルヘッドを組み合わせてノズル位置をずらして配置するか、ヘッドをヘッドの進行方向に対して斜めに取付けて実質のノズルピッチを小さくする方法等がある。このような方法を用いる場合は、液滴の射出タイミングをずらして弾着させる必要があるため、装置を制御するコンピュータ及びそのプログラムで対応可能とする必要がある。 When inkjet is used in the insulating layer forming step, in order to accurately form the via hole 6 or to form the small diameter via hole 6, it is necessary to increase the resolution by reducing the droplet of the first insulating resin 4 by the inkjet method. It is. As this method, there is a method of simply reducing the nozzle pitch of the inkjet head. Alternatively, there are a method of reducing the substantial nozzle pitch by combining a plurality of nozzle heads and shifting the nozzle position, or attaching the heads obliquely with respect to the head moving direction. In the case of using such a method, it is necessary to shift the ejection timing of the liquid droplets for landing, and therefore it is necessary to be able to cope with the computer that controls the apparatus and its program.
 また、インクジェット方式に対応するため、射出塗布される第1の絶縁樹脂4は、インクジェット装置で使用できる粘度ものを用いる。特に、絶縁層5を形成する第1の絶縁樹脂4が絶縁基材2及び内層回路3の両方に着弾した際の濡れ広がり性が重要である。濡れ広がり性が大きいと、第1の絶縁樹脂4が形成すべきビアホール6内や絶縁基材2の外側に流れ出てしまい、解像度を劣化させる要因となる。あるいは、塗布厚みの制御が困難になる。濡れ広がり性が小さいと、極端な場合液滴が玉状に残存したまま硬化されたり、液をはじいたりしてしまう。 Also, in order to support the ink jet system, the first insulating resin 4 to be applied by injection is of a viscosity that can be used in an ink jet apparatus. In particular, wetting and spreading properties when the first insulating resin 4 forming the insulating layer 5 has landed on both the insulating base material 2 and the inner layer circuit 3 are important. If the wetting and spreading property is large, the first insulating resin 4 flows out into the via hole 6 to be formed or the outside of the insulating base material 2 and becomes a factor of degrading the resolution. Or control of application | coating thickness becomes difficult. If the wettability is small, in an extreme case, the liquid droplets may be cured while remaining in a ball shape or repel the liquid.
 この濡れ広がり性を最適にするには、第1の絶縁樹脂4が塗布される絶縁基材2の濡れ性を最適化すればよい。特に、本発明が前提としている樹脂(絶縁基材2)と銅(内層回路3)が混在しているような絶縁基材2に対してはこのような濡れ性の最適化を行うことは有用である。この最適化は、内層回路形成工程後であって絶縁層形成工程前に、内層回路3が形成された絶縁基材2の表面にコロナ処理又は低圧UV照射処理又はプラズマ処理を施せばよい。これにより、絶縁基材2の表面改質を行い、第1の絶縁樹脂4に対する濡れ性を最適化することができる。装置の価格やランニングコスト等を考慮するとコロナ処理が好ましい。 In order to optimize the wettability, the wettability of the insulating base material 2 to which the first insulating resin 4 is applied may be optimized. In particular, it is useful to optimize such wettability for the insulating base material 2 in which the resin (insulating base material 2) and copper (inner layer circuit 3) on which the present invention is based are mixed. It is. This optimization may be performed by performing corona treatment, low-pressure UV irradiation treatment, or plasma treatment on the surface of the insulating substrate 2 on which the inner layer circuit 3 is formed after the inner layer circuit forming step and before the insulating layer forming step. Thereby, the surface modification of the insulating base material 2 can be performed and the wettability with respect to the 1st insulating resin 4 can be optimized. Corona treatment is preferable in consideration of the price and running cost of the apparatus.
 また、インクジェット装置にはさらに紫外線を照射するための照射装置9が備わり、この照射装置9は移動方向Aに対して噴出装置8に追従して移動可能である。具体的には、インクジェット装置のインクジェットヘッドの延長上に照射装置9を取付け、インクジェットヘッドが動く構造の場合、同時に照射装置9も動く構造とする。第1の絶縁樹脂4を紫外線硬化性樹脂とすれば、第1の絶縁樹脂4が絶縁基材2の表面に弾着した直後にこの弾着位置に紫外線Pが照射されることになる。これにより、第1の絶縁樹脂4は硬化あるいは半硬化し、第1の絶縁樹脂4が必要以上に濡れ広がることを防止できる。この硬化は、少なくとも樹脂4が流れない程度に固まっていればよい。このように、樹脂4を弾着直後に硬化させることで、絶縁基材2に対して片面ずつ塗布する場合必要となるプリキュア工程が不要となる。なお、第1の絶縁樹脂4を紫外線及び熱硬化性の樹脂とし、絶縁層5を形成した後熱処理を行って第1の絶縁樹脂4を硬化させれば好ましい。 Further, the inkjet device further includes an irradiation device 9 for irradiating ultraviolet rays, and this irradiation device 9 can move following the ejection device 8 in the movement direction A. Specifically, the irradiation device 9 is mounted on the extension of the ink jet head of the ink jet device, and when the ink jet head moves, the irradiation device 9 moves at the same time. If the first insulating resin 4 is an ultraviolet curable resin, the impact position is irradiated with the ultraviolet light P immediately after the first insulating resin 4 is impacted on the surface of the insulating base 2. Accordingly, the first insulating resin 4 is cured or semi-cured, and the first insulating resin 4 can be prevented from spreading more than necessary. This hardening should just be hardened to the extent that the resin 4 does not flow. In this way, by curing the resin 4 immediately after impacting, the pre-curing step that is necessary when applying the single side to the insulating base 2 is not necessary. In addition, it is preferable that the first insulating resin 4 is an ultraviolet ray and a thermosetting resin, and the first insulating resin 4 is cured by performing a heat treatment after the insulating layer 5 is formed.
 また、絶縁層形成工程にて、上述したように、絶縁基材2には内層回路3が形成されているため、凹凸形状となっている。このような箇所にスクリーン印刷等を行うと、印刷後の表面にも凹凸形状が残ってしまう。インクジェット方式を用いれば、凹凸形状の凹部分を狙ってより多くの樹脂を塗布できるので、表面の均一化が可能である。 Further, as described above, since the inner layer circuit 3 is formed on the insulating base material 2 in the insulating layer forming step, it has an uneven shape. When screen printing or the like is performed on such a portion, uneven shapes remain on the printed surface. If an inkjet system is used, more resin can be applied aiming at the concave and convex portions, so that the surface can be made uniform.
 また、第1の絶縁樹脂4の塗布方法としては、1回目の塗布で飛び飛びに着弾させてこれを乾燥し、2回目の塗布でこれらの隙間を狙って着弾させる方法もある。 Also, as a method for applying the first insulating resin 4, there is a method in which the first insulating resin 4 is landed in a flying manner and dried, and the second coating is aimed at these gaps.
 ビルドアップ絶縁層のように、ある程度の厚み(40μm~80μm程度)の樹脂層を形成する場合であって、特に解像度を上げるために液滴を小さくした場合には、必要な絶縁層厚は1回の塗布だけでは得られない。この場合は、複数回の塗布を行うか、又はヘッドを複数搭載して必要な厚みを得る方法があるが、塗布しない開口部の形状を保つには1回塗布したら紫外線等である程度硬化させ形状を保持させてから2回目以降を塗布する方法がよい。 When a resin layer having a certain thickness (about 40 μm to 80 μm) is formed as in the build-up insulating layer, particularly when the droplets are made small to increase the resolution, the required insulating layer thickness is 1 It cannot be obtained only by one application. In this case, there is a method of applying a plurality of times or obtaining a required thickness by mounting a plurality of heads. However, in order to keep the shape of the opening not to be applied, once it is applied, it is cured to some extent with ultraviolet rays or the like. A method of applying the second and subsequent times after holding is preferable.
 上述した絶縁層形成工程の後、めっき工程を行う。このめっき工程は、めっき処理を行い、図7に示すように、絶縁層5の表面、スルーホール11の内面、ビアホール6の内表面及び内層回路3の露出している表面3a(図1で示した導電層の露出した表面16a)にめっき膜12を形成する。このめっき膜12は、導電性金属からなり、例えば銅である。そして、エッチング等を用いてめっき膜12を部分的に除去し、図8に示すように、絶縁層5の表面に外層回路13を形成する。 After the insulating layer forming process described above, a plating process is performed. In this plating process, as shown in FIG. 7, the surface of the insulating layer 5, the inner surface of the through hole 11, the inner surface of the via hole 6, and the exposed surface 3a of the inner layer circuit 3 are shown in FIG. A plating film 12 is formed on the exposed surface 16a) of the conductive layer. The plating film 12 is made of a conductive metal, for example, copper. Then, the plating film 12 is partially removed using etching or the like, and an outer layer circuit 13 is formed on the surface of the insulating layer 5 as shown in FIG.
 このように、内層回路3の露出した表面3aにめっき膜12を形成するため、スルーホール11形成の際に、導電層16のスルーホール11側の内面にスミアが発生していたとしても、比較的平滑な内層回路3の表面3aとめっき膜12とを介した電気的な接続が可能となる。このため、スルーホール11内にスミアが付着した状態であっても、絶縁基材2を介した両面間の電気的な接続を確実にすることができる。これにより、デスミア工程を経ることなく層間接続を実現できるので、製造工程が簡略化し、生産性が向上することになる。また、デスミア処理のための薬液が不要となり、環境負荷を低減できる。 Thus, since the plating film 12 is formed on the exposed surface 3a of the inner layer circuit 3, even when smear is generated on the inner surface of the conductive layer 16 on the through hole 11 side during the formation of the through hole 11, the comparison is made. Electrical connection through the surface 3a of the inner smooth circuit 3 and the plating film 12 becomes possible. For this reason, even if it is in the state which the smear adhered in the through hole 11, the electrical connection between both surfaces through the insulating base material 2 can be ensured. Thereby, the interlayer connection can be realized without going through the desmear process, so that the manufacturing process is simplified and the productivity is improved. Moreover, the chemical solution for the desmear process becomes unnecessary, and the environmental load can be reduced.
 そして、レジスト層形成工程を行う。このレジスト層形成工程は、図9に示すように、第2の絶縁樹脂14をインクジェット方式によって外層回路13に対し、選択的に塗布するものである。一般的には、少なくともビアホール6やスルーホール11を残して塗布される。この第2の絶縁樹脂14が外層回路13上に塗布され、レジスト層15が形成される。このようにレジスト層15の形成にもインクジェット方式を用いることで、ビアホール部分が開口したレジスト層(ソルダレジスト)15を形成することができ、別途レジストに対してビアホール部分を開口させるための工程が不要となる。インクジェット方式での第2の絶縁樹脂14の塗布については、上述した第1の絶縁樹脂4と同様の方法を用いることができ、同様の効果を得ることができる。レジスト層15が全て形成されると、図10に示すような基板が形成される。 Then, a resist layer forming process is performed. In this resist layer forming step, as shown in FIG. 9, the second insulating resin 14 is selectively applied to the outer layer circuit 13 by an ink jet method. Generally, it is applied leaving at least the via hole 6 and the through hole 11. The second insulating resin 14 is applied on the outer layer circuit 13 to form a resist layer 15. In this manner, the resist layer 15 can also be formed by using an ink jet method to form a resist layer (solder resist) 15 having an opening in the via hole, and a process for opening the via hole in the resist separately. It becomes unnecessary. About the application | coating of the 2nd insulating resin 14 by an inkjet system, the method similar to the 1st insulating resin 4 mentioned above can be used, and the same effect can be acquired. When all the resist layers 15 are formed, a substrate as shown in FIG. 10 is formed.
1 金属膜
2 絶縁基材
3 内層回路
4 第1の絶縁樹脂
5 絶縁層
6 ビアホール
7 ノズル
8 噴出装置
9 照射装置
11 スルーホール
12 めっき膜
13 外層回路
14 第2の絶縁樹脂
15 レジスト層
16 導電層
P 紫外線
DESCRIPTION OF SYMBOLS 1 Metal film 2 Insulating base material 3 Inner layer circuit 4 1st insulating resin 5 Insulating layer 6 Via hole 7 Nozzle 8 Ejecting device 9 Irradiating device 11 Through hole 12 Plating film 13 Outer layer circuit 14 Second insulating resin 15 Resist layer 16 Conductive layer P UV

Claims (3)

  1.  絶縁基材と、
     該絶縁基材の両面にパターン形成され、裏面が前記絶縁基材に密着している導電層と、
     前記絶縁基材及び前記導電層を貫通するスルーホールと、
     該スルーホールの内面及び両面の前記導電層のそれぞれの表面に連続して形成されためっき膜と
    を備えたことを特徴とする基板。
    An insulating substrate;
    A conductive layer that is patterned on both sides of the insulating substrate, and whose back surface is in close contact with the insulating substrate;
    A through hole penetrating the insulating substrate and the conductive layer;
    A substrate comprising: a plating film formed continuously on the inner surface of the through hole and on the respective surfaces of the conductive layer on both sides.
  2.  両面に金属膜が貼り付けられた前記絶縁基材に対して前記金属膜を部分的に除去して前記導電層を形成する導電層形成工程と、
     前記絶縁基材及び前記導電層のそれぞれを貫通するスルーホールを形成するスルーホール形成工程と、
     前記絶縁基材の両面それぞれに第1の絶縁樹脂を塗布して絶縁層を形成する絶縁層形成工程と、
     該絶縁層形成工程と同時又は後に、前記スルーホールが形成された前記導電層の前記表面を露出させたビアホールを形成するビアホール形成工程と、
     少なくとも前記スルーホールの内面及び前記絶縁基材両面の前記ビアホール内に露出している前記導電層の前記表面のそれぞれに連続してめっき膜を形成するめっき工程と
    を備えたことを特徴とする請求項1に記載の基板の製造方法。
    A conductive layer forming step of forming the conductive layer by partially removing the metal film with respect to the insulating base material on which metal films are attached on both sides;
    A through hole forming step of forming a through hole penetrating each of the insulating base and the conductive layer;
    An insulating layer forming step of forming an insulating layer by applying a first insulating resin to each of both surfaces of the insulating base;
    A via hole forming step of forming a via hole exposing the surface of the conductive layer in which the through hole is formed simultaneously with or after the insulating layer forming step;
    And a plating step of continuously forming a plating film on each of the surfaces of the conductive layer exposed in at least the inner surface of the through hole and the via hole on both surfaces of the insulating base. Item 2. A method for manufacturing a substrate according to Item 1.
  3.  前記絶縁層形成工程にて、前記第1の絶縁樹脂をインクジェット方式によって塗布し、前記第1の絶縁樹脂を塗布すると同時に前記ビアホールを形成することを特徴とする請求項2に記載の基板の製造方法。 3. The substrate manufacturing method according to claim 2, wherein in the insulating layer forming step, the first insulating resin is applied by an ink jet method, and the via hole is formed simultaneously with the application of the first insulating resin. Method.
PCT/JP2011/072589 2011-09-30 2011-09-30 Substrate and method for manufacturing same WO2013046442A1 (en)

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JPWO2019198190A1 (en) * 2018-04-12 2020-10-22 株式会社Fuji Printed circuit board forming method and printed circuit board forming device
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