WO2012163172A1

WO2012163172A1 - Clock synchronization method and device

Info

Publication number: WO2012163172A1
Application number: PCT/CN2012/073487
Authority: WO
Inventors: 赵洪广; 瞿艳霞; 宋玲玲
Original assignee: 中兴通讯股份有限公司
Priority date: 2011-05-31
Filing date: 2012-04-01
Publication date: 2012-12-06
Also published as: CN102215101A; CN102215101B

Abstract

A clock synchronization method is provided in the present invention, which comprises: a Boundary Clock (BC) device receives an announce message carrying Grandmaster Clock (GM) identification information; when determining that it needs a state switch of the communication port at the current time, and determining that the GM identification information carried in the parent's announce message received at the current time is different from the GM identification information carried in the parent's announce message received at the previous time, the BC device controls the communication port of itself in the non-master state at the current time to switch directly to the master state; the present invention also provides a clock synchronization device. With the solutions of the present invention, in the PTP clock synchronization network, it can reduce the time required by the state switch of the communication port to each device and ensure the stability of the clock synchronization network.

Description

Clock synchronization method and device

The present invention relates to synchronous communication network technologies, and in particular, to a clock synchronization method and device. Background technique

In the communication network, the time synchronization network is an indispensable component, and different services have different requirements for time synchronization. Among them, the most stringent demand comes from wireless communication networks, and the development of wireless technologies is increasingly demanding high-precision time synchronization for wireless communication networks. With the rapid development of 3G networks, the bearer network, which is the basic network of wireless communication networks, has begun to evolve from traditional circuit switching to packet switching. In the packet network, the transmission of frequency synchronization signals and time synchronization signals is realized. Technology: One is based on the synchronization technology of the physical layer, such as the synchronous Ethernet (syncE) technology of ITU-T G.8261; the other is the packet-based synchronization technology, such as IEEE 1588 V2. syncE can only support the transmission of frequency synchronization signals, and does not support the transmission of time synchronization signals. Therefore, the simple syncE scheme is only applicable to scenarios that do not require time synchronization. IEEE 1588V2 is a precision time synchronization protocol (PTP). PTP can realize frequency synchronization and time synchronization at the same time, and the synchronization precision is high, up to sub-microsecond level, and theoretically can meet the requirements of time synchronization of the wireless communication network. Therefore, the PTP time synchronization protocol has received more and more attention and wide application in the communication network. Domestic and foreign operators continue to use the PTP protocol for time synchronization, and gradually replace the time using the Global Positioning System (GPS). The way to synchronize.

When using IEEE 1588V2 for frequency synchronization, although frequency synchronization can be achieved independently of syncE, PTP has a longer convergence time than syncE. Therefore, the prior art proposes a time-synchronous Ethernet solution, that is, a combination mode of syncE and PTP, first using syncE to achieve high-precision frequency synchronization, and on this basis, using PTP to implement time synchronization, synchronous Ethernet The use of strong guarantees the convergence time of the PTP protocol. In this application scenario, frequency synchronization is not required by sending fast-frequency packets. It is only necessary to calculate the time offset between adjacent devices by sending slow packets, which substantially simplifies the process. The purpose is to abandon the more complicated frequency synchronization function, but only use its time synchronization function; time synchronization is different from frequency synchronization, no high frequency is needed to detect the frequency, on the basis of syncE frequency synchronization, as long as The packet delay delay (PDV, Package Delay Deviation) of the wireless communication network is detected normally, and the time synchronization only needs 1-2 interactions to correct the deviation back to the normal range.

In the PTP time synchronization network, the access point device clock is the standard clock source outside the network, and the other device clocks in the PTP time synchronization network are consistent with the access point device clock. The access point device clock is also known as the primary clock or the grandmother clock. The clock in the PTP time synchronization network is divided into normal clock (OC, Ordinary Clock) and boundary clock (BC, Boundary Clock) according to the working mode. The device in the OC working mode is called OC device, only one communication port; working in BC A device in mode is called a BC device and has more than one communication port. The communication port of the BC device and the OC device has a port state, and the communication port states include: a master state (Master, M), a slave state (Slave, S), and a passive state (Passive, P), and the port state is a master communication port. As the master port, the master port sends the grandmother's clock information to the downstream device through the advertisement. The slave port is consistent with the grandmother's clock according to the received announce message. To ensure the stability of the PTP time synchronization network, two access point devices are usually set up during networking. One is the primary access point device and the other is the standby access point device. The clock of the primary access point device is the primary grandmother clock. The clock of the alternate access point is the standby grandmother clock, wherein the priority of the grandmother's clock is higher than that of the standby grandmother's clock. As shown in FIG. 1 , it is a schematic topology diagram of a PTP time synchronization network, where the OC1 device clock is the master grandmother clock of the PTP time synchronization network, and the OC2 device clock is the standby grandmother clock of the PTP time synchronization network. When the master grandmother's clock is working normally, the clock source is the master's clock. The OC1 device transmits its own clock information to the BC1 device through the announce message. The BC1 device adjusts its own clock and OC1 according to the received announce message. The device is consistent, and its own clock information is transmitted to the BC2 device through the announce message. The BC1 device is called the upstream device of the BC2 device, the BC2 device is called the downstream device of the BC1 device, and so on, until the time of synchronizing the network device is completed. Synchronize. When the time synchronization network structure is a non-linear structure, since the announce message is broadcasted, any BC device may receive the announce message sent by multiple upstream devices. If the device receives multiple announcement messages at the current time, the BC device receives the announce message. The BC device selects the device clock trace with the best clock level from the received announce message, and the selected device is called the parent of the BC device. When the time synchronization network is a linear network, the upstream device is its parent. At this time, the solid line direction shown in Figure 1 is the direction of the announce message, the port status of the solid arrow is Slave, and the port status of the solid arrow is Master; when the master grandmother loses the clock or the master grandmother's clock quality deteriorates. The clock source is switched to the backup grandmother clock. As shown in Figure 1, the OC2 device transmits the announce message according to the direction of the dotted line. In this case, for each BC device, the port status will be switched, that is, the original master port status is switched. In the Slave state, the original Slave port state is switched to the Master state. In Figure 1, the port state of the dotted arrow is Slave, and the port state of the dotted arrow is Master. In the process of switching the status of the slave port to the master state, in order to prevent the ring from being synchronized in the PTP time synchronization network, a pre-master state is added before the state of the slave port is switched to the master state, that is, after the BC device receives the announce message. , instead of performing port state switching immediately, it waits for a certain period of time before performing port state switching. Due to the existence of the Pre-Master state, in the PTP time synchronization network, each device takes too long to perform state transition of the communication port, which is not conducive to the stability of the PTP time synchronization network. Summary of the invention

In view of the above, the embodiments of the present invention provide a clock synchronization method and device, which are used to reduce the time for each device to perform communication port state switching in a PTP time synchronization network, and ensure the stability of the PTP time synchronization network.

The embodiment of the invention provides a clock synchronization method, including: The BC device receives the notification announce message carrying the identification information of the grandmother's clock GM; the BC device determines the identification information of the GM carried in the parent-announced message received at the current time and the parent-announced message received at the previous moment. When the identification information of the carried GM is different, the communication port that controls the current time in the non-Master state is directly switched to the master state.

An embodiment of the present invention provides a clock synchronization device, including: a receiving module and a first switching module;

a receiving module, configured to receive an announce message carrying the identification information of the grandmother clock GM; the first switching module is configured to: when confirming that the device needs to perform the communication port state switching at the current moment, and determine the parent announcement received at the current time When the GM information carried in the packet is different from the GM information carried in the parent-announce message received at the previous time, the communication port in the device that is not in the master state is directly switched to the master state.

The clock synchronization method and device provided by the embodiment of the present invention, the BC device determines, according to the GM identification information carried in the parent-announce message received at the current time, the GM identifier carried in the parent-announce message received at the current time. When the information is different from the GM information carried in the parent's announcement message received at the previous time, the communication port whose current state is not in the master state is skipped from the pre-Master state and directly switched to the master state. When the GM information carried in the announce message received by the BC device is different from the GM identification information carried in the received message received at the previous time, the original GM information has been cleared from the current network. Therefore, After the pre-Master state waits, the ring is not introduced. In this way, the time for the PTP time synchronization network to perform the state switching of the communication port of the BC device is reduced, and the stability of the PTP time synchronization network is ensured.

Other features and advantages of the invention will be set forth in the description which follows, and The object of the present invention and The advantages can be realized and obtained by the structures specified in the written description, the claims, and the drawings. DRAWINGS

1 is a schematic diagram of a possible topology structure of a PTP time synchronization network in the prior art; FIG. 2 is a schematic flowchart of a time synchronization method implementation process according to an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a time synchronization device according to an embodiment of the present invention. detailed description

In the PTP time synchronization network, the time-consuming and long-term operation of the communication port state is not long, which is disadvantageous to the stability of the PTP time synchronization network. The embodiment of the present invention provides a clock synchronization method and device, and the basic idea is that The border clock BC device receives the announce message carrying the grandmother's clock GM identification information; the BC device confirms that it needs to perform the communication port state switching at the current time, and determines the GM carried in the parent-announce message received at the current time. When the identification information is different from the GM information carried in the parent-announce message received at the previous time, the communication port whose current time is in the non-master master state is directly switched to the master state.

The clock synchronization method and device provided by the embodiments of the present invention are applicable to the case where the topology of the PTP time synchronization network is linear, and also applies to a network segment when the topology of the PTP time synchronization network is nonlinear. For convenience of description, in the embodiment of the present invention, the topology of the PTP time synchronization network is linear as an example for description.

The inventor found that: In the PTP time synchronization network, when the current link fails, the device at the fault cannot transfer the announce message to the downstream device, which will cause changes in the network topology structure, for example, BC2 in FIG. The link between the device and the BC3 device is faulty. The BC3 device cannot receive the announce message from the BC2 device, so that the GN clock information cannot be obtained. At this time, the BC3 device considers that the GM is lost and goes to its own downstream device BC4. BC5, BC6 and BC7 pass the GM loss message, and the GM is selected by starting the BMC algorithm, and the selected GM is the device with the best clock quality in the current network. At this time, the OC2 device clock in FIG. 1 is selected as the GM. The selected OC2 device transmits its own clock information to the BC7 device connected to itself, and transmits its own clock information, so that the BC7 is consistent with its own clock. At this point, the BC7 device will enter the communication port state switching phase. Since BC7 is the end device in the original network topology, the communication port state of the BC7 device is Slave. For BC7, the current Slave port status needs to be switched to the Master status. If there is a loop in the current link, the BC7 may still receive the announce message sent by the upstream device at the current time. The announce message carries the original GM identification information, but the GM has actually failed due to the link failure. Failure, may cause BC7 to track the wrong GM. In order to solve the above problem, when the communication port of the BC7 in the Slave state performs state switching, the pre-Master state is added for transition to avoid the existence of a ring in the network. That is, when the BC7 performs communication port state switching, the Slave state is not immediately switched to In the master state, the pre-Master state is entered first, and the pre-Master state continues for a certain period of time before entering the master state. The PTP protocol specifies the duration of the pre-Master state as follows: = where ^ is the interval for sending the announce packet, as determined in the following manner: When the device that sends the announce message is the primary GM device or the standby GM device, the OC is the OC. For the device, /3⁄4 = () ; When the device that sends the announce message is the intermediate device, that is, the BC device, = r + 1 , r is the hop count of the device sending the announce message to the primary GM device or the standby GM device. . For example, for the BC3 device in Figure 1, when the primary GM is switched to the standby GM, its pre-Master state duration is: Γ = (3 + 1).

As shown in Figure 1, the ΡΤΡ time synchronization network has a total of 7 BC devices, assuming that the announcement interval is 2s. In the most extreme case, if each device performs communication port state switching, then each device has If you need to enter the pre-Master state first, the pre-Master state consumes the time during the communication port state transition during the entire synchronization time: [ ( 1+1 ) +(2+1)+(3+1)+ ... + ( 7+1 ) ]*2s=70s. In this way, the time synchronization network is stabilized. The waiting time required is too long.

Based on this, an embodiment of the present invention provides a clock synchronization method and device. The preferred embodiments of the present invention are described in conjunction with the accompanying drawings, and the preferred embodiments described herein are only to illustrate and explain the present invention, and are not intended to limit the present invention, and The flowchart of the implementation of the clock synchronization method provided by the embodiment of the present invention includes the following steps:

5201, BC (Boundary Clock) device receives the announce message carrying the identification information of the GM (Grandmother Clock);

In the specific implementation, the BC device receives the announce message sent by the upstream device, and the announce message carries the identifier information of the GM.

When the BC device determines that the GM information carried in the parent-announce message received by the current time is different from the GM information carried in the parent-announce message received at the current time, the current time in the control itself is not the master. The communication port in the (main) state is directly switched from the non-Master state to the Master state.

Specifically, when the BC device detects that the current GM is lost, or the BC device detects that the topology of the network where the BC device is changed, it confirms that it needs to perform communication port state switching. In addition, when the BC device senses that the current GM device clock quality is degraded, it can also confirm that it needs to perform communication port state switching.

Specifically, the non-Master state involved in the embodiment of the present invention includes, but is not limited to, a Slave state,

Passive status and listening status, etc.

Specifically, when the BC device determines that the identifier information of the GM device carried in the received parent-announce message is different from the identifier information of the GM device carried in the parent-announce message received at the previous time, the current local network is original. The identification information of the GM device has been cleared. At this time, the communication port in the non-Master state can be controlled to be immediately switched. The status of the master and the communication port in the master state are switched from the master state to the slave state.

In a specific implementation, the time synchronization method may further include:

If the BC device determines that the GM information carried in the parent-announce message received by the current time is the same as the GM information carried in the parent-announce message received at the previous time, the communication port in the non-Master state is controlled in the current time. Enter the Pre-master state.

In a specific implementation, the clock synchronization method may further include:

The BC device detects whether the length of the communication port in the Pre-master state is in the Pre-master state has reached the set value;

When the set value is reached, the BC device controls its own communication port in the pre-Master state to be switched from the pre-Master state to the Master state.

In the embodiment of the present invention, the set value can be determined as follows: r = (« + l) * t , where:

Γ is the pre-Master state duration; w is the hop count of the BC device to the clock source device; ί is the interval at which the announcement is sent.

It should be understood that the clock synchronization method provided by the embodiment of the present invention may also include that when the port of the GM device in the PTP network enters the master state, the GM device tracks the clock source outside the PTP time synchronization network, and therefore does not need to go through the pre-Master state. .

In the implementation of the present invention, the BC device determines the GM identity information carried in the parent-announce message and the GM carried in the parent-announce message received at the previous time. When the identification information is different, it indicates that the GM information of the previous moment has been cleared in the current local network. At this time, even if the pre-Master state of the intermediate transition is not added, the BC device does not track the wrong clock source. Therefore, When performing communication port state switching, the pre-Master state of the intermediate transition can be skipped. Since the pre-Master state of the intermediate transition is skipped, the time for the communication port state switching of each device is reduced in the PTP time synchronization network, thereby reducing the stability of the PTP time synchronization network. Time, to ensure the stability of the PTP time synchronization network.

Based on the same inventive concept, a time synchronization device is also provided in the embodiment of the present invention. Since the time synchronization device solves the problem is similar to the time synchronization method, the implementation of the device can refer to the implementation of the method, and the repetition is no longer Narration.

As shown in FIG. 3, a possible structural diagram of a time synchronization device provided by the implementation of the present invention includes:

The receiving module 301 is configured to receive an announce message carrying the grandmother clock GM identification information;

The first switching module 302 is configured to determine, when the device needs to perform the state transition of the communication port at the current moment, and determine the identifier information of the GM carried in the parent-announce message received at the current time and the parent announce received at the previous moment. If the GM information in the packet is different, the communication port in the device that is not in the master state is directly switched to the master state.

Specifically, the first switching module 302 can be used to confirm that the device needs to perform communication port state switching when detecting that the current GM of the device is lost, or when detecting that the topology of the network where the device is located changes. In addition, when the first switching module 302 senses that the current GM device clock quality is degraded, it can also confirm that the device needs to perform communication port state switching.

In a specific implementation, the time synchronization device may further include:

The pre-replacement module is configured to control the current time in the parent to be in the non-Master state when the GM information carried in the parent-announce message received by the current time is the same as the GM information carried in the parent-announce message received at the previous time. The communication port enters the Pre-master state.

a detecting module, configured to detect whether a duration of the communication port in the Pre-master state is in a Pre-master state reaches a set value; The second switching module is configured to control the communication port in the pre-Master state of the device to be switched from the pre-Master state to the master state when the duration of the Pre-master state is reached.

Specifically, the detection module can determine the preset value of the pre-Master state duration as follows: Γ = (Μ + 1) * ί , where: Γ is the pre-Master state duration; w is the hop of the BC device to the clock source device Number; t is the interval at which the announce message is sent.

Those skilled in the art will appreciate that embodiments of the present invention can be provided as a method, system, or computer program product. Thus, the present invention can take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.

The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations. a combination of processes and/or boxes. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. Means for implementing the functions specified in one or more of the flow or in a block or blocks of the flow chart.

The computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device. The apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device. The instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

Although the preferred embodiment of the invention has been described, it will be apparent to those of Therefore, it is intended that the appended claims be interpreted as including

It is apparent that those skilled in the art can make various modifications and variations to the invention without departing from the spirit and scope of the invention. Thus, it is intended that the present invention cover the modifications and modifications of the invention

Claims

Claim

A clock synchronization method, characterized in that the method comprises:

Boundary Clock The BC device receives a notification announce message carrying the grandmother's clock GM identification information;

The BC device confirms that it needs to perform the communication port state switching at the current time, and determines the GM identification information carried in the parent announcement 4 message received at the current time and the GM carried in the parent anniversary message received at the previous time. When the identification information is different, the communication port that controls the current time in the non-master master state is directly switched to the master state.

2. The method of claim 1, wherein the method further comprises:

The BC device determines that the GM information carried by the parent-announce message received at the current time is the same as the GM information carried in the parent-announce message received at the previous time, and controls the communication in the non-Master state at the current time. The port enters the Pre-master state.

3. The method of claim 2, wherein the method further comprises:

The BC device detects whether the length of the communication port in the Pre-master state is in the Pre-master state reaches the set value;

When the set value is reached, the BC device controls the communication port whose current time is in the pre-Master state to be switched from the pre-Master state to the Master state.

4. The method according to claim 3, wherein the set value is determined as follows: T = (n + l) * t ,

among them:

T is the pre-Master state duration;

n is the hop count of the BC device to the clock source device;

t is the interval at which the announcement is sent.

5. The method of claim 1 wherein: said BC device confirms itself At this moment, the status of the communication port needs to be switched to:

The BC device detects that the current GM is lost, or the BC device confirms that it needs to perform communication port state switching when detecting the topology change of its own network.

A clock synchronization device, the device comprising: a receiving module and a first switching module; wherein

The receiving module is configured to receive an announce message carrying the grandmother's clock GM identification information; the first switching module is configured to: when confirming that the device needs to perform the communication port state switching at the current moment, and determine the parent annual announce message received at the current time When the GM information carried in the message is different from the GM information carried in the parent-announce message received at the previous time, the communication port in the device that is not in the master state is directly switched to the master state.

The device according to claim 6, wherein the device further comprises:

8. The device according to claim 7, wherein the device further comprises:

a detecting module, configured to detect whether the length of the communication port in the Pre-master state is in the Pre-master state reaches the set value;

The second switching module is configured to control the communication port in the pre-Master state of the device to be switched from the pre-Master state to the master state when the duration of the Pre-master state reaches the set value.

9. Apparatus according to claim 8 wherein the set value of the pre-Master state duration is determined as follows: T = (n + l) * t ,

among them: T is the pre-Master state duration;

n is the hop count of the BC device to the clock source device;

t is the interval at which the announcement is sent.

10. The device according to claim 6, wherein the first switching module confirms that the device needs to perform a state transition of the communication port at the current moment:

After detecting that the current GM of the device is lost, or when detecting the topology change of the network where the device is located, confirm that the device needs to perform communication port state switching.