WO2012143947A3 - Multi-host peripheral controller - Google Patents

Multi-host peripheral controller Download PDF

Info

Publication number
WO2012143947A3
WO2012143947A3 PCT/IN2012/000280 IN2012000280W WO2012143947A3 WO 2012143947 A3 WO2012143947 A3 WO 2012143947A3 IN 2012000280 W IN2012000280 W IN 2012000280W WO 2012143947 A3 WO2012143947 A3 WO 2012143947A3
Authority
WO
WIPO (PCT)
Prior art keywords
host
peripheral controller
bus architecture
host peripheral
system bus
Prior art date
Application number
PCT/IN2012/000280
Other languages
French (fr)
Other versions
WO2012143947A2 (en
Inventor
Balaji Kanigicherla
Krishna Mohan Tandaboina
Siva Raghuram VOLETI
Chandra Kumar CHETTIAR
Surya Narayana DOMMETI
Kishor ARUMILLI
Original Assignee
Ineda Systems Pvt. Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ineda Systems Pvt. Ltd filed Critical Ineda Systems Pvt. Ltd
Publication of WO2012143947A2 publication Critical patent/WO2012143947A2/en
Publication of WO2012143947A3 publication Critical patent/WO2012143947A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/105—Program control for peripheral devices where the programme performs an input/output emulation function

Abstract

Described herein is a multi-host peripheral controller configured to allow a plurality of host processors to simultaneously access the I/O devices through one of a per-host dedicated system bus architecture and common system bus architecture. Such a bus architecture is one of AXI, AHB, PCI, PCIe, OCP, etc. The multi-host peripheral controller allows operating systems, running on the plurality of host processors, to operate asynchronously with minimal or no inter operating system dependency. For addressability, either address based or sideband signal based demarcation may be used.
PCT/IN2012/000280 2011-04-18 2012-04-18 Multi-host peripheral controller WO2012143947A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN1334CH2011 2011-04-18
IN1334/CHE/2011 2011-04-18

Publications (2)

Publication Number Publication Date
WO2012143947A2 WO2012143947A2 (en) 2012-10-26
WO2012143947A3 true WO2012143947A3 (en) 2013-01-03

Family

ID=47041990

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IN2012/000280 WO2012143947A2 (en) 2011-04-18 2012-04-18 Multi-host peripheral controller

Country Status (1)

Country Link
WO (1) WO2012143947A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9164938B2 (en) * 2013-01-02 2015-10-20 Intel Corporation Method to integrate ARM ecosystem IPs into PCI-based interconnect
RU2571575C1 (en) * 2014-06-20 2015-12-20 Александр Сергеевич Зубачев Public computer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090276773A1 (en) * 2008-05-05 2009-11-05 International Business Machines Corporation Multi-Root I/O Virtualization Using Separate Management Facilities of Multiple Logical Partitions
US20100312943A1 (en) * 2009-06-04 2010-12-09 Hitachi, Ltd. Computer system managing i/o path and port
US20110055433A1 (en) * 2009-08-18 2011-03-03 Kishore Karagada R Communicating Between Host Computers and Peripheral Resources in an Input/Output (I/O) Virtualization System

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090276773A1 (en) * 2008-05-05 2009-11-05 International Business Machines Corporation Multi-Root I/O Virtualization Using Separate Management Facilities of Multiple Logical Partitions
US20100312943A1 (en) * 2009-06-04 2010-12-09 Hitachi, Ltd. Computer system managing i/o path and port
US20110055433A1 (en) * 2009-08-18 2011-03-03 Kishore Karagada R Communicating Between Host Computers and Peripheral Resources in an Input/Output (I/O) Virtualization System

Also Published As

Publication number Publication date
WO2012143947A2 (en) 2012-10-26

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