WO2012008197A1 - Transmitter-receiver apparatus - Google Patents

Transmitter-receiver apparatus Download PDF

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Publication number
WO2012008197A1
WO2012008197A1 PCT/JP2011/060030 JP2011060030W WO2012008197A1 WO 2012008197 A1 WO2012008197 A1 WO 2012008197A1 JP 2011060030 W JP2011060030 W JP 2011060030W WO 2012008197 A1 WO2012008197 A1 WO 2012008197A1
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WO
WIPO (PCT)
Prior art keywords
phase
signal
loop
loop band
detection circuit
Prior art date
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PCT/JP2011/060030
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French (fr)
Japanese (ja)
Inventor
伊東 正治
直行 折橋
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日本電気株式会社
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Priority to JP2012524473A priority Critical patent/JPWO2012008197A1/en
Publication of WO2012008197A1 publication Critical patent/WO2012008197A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1072Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the charge pump, e.g. changing the gain
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth

Definitions

  • the present invention relates to a transmitter / receiver provided with a plurality of transmitter / receiver blocks.
  • a plurality of antennas are required to realize a spatial diversity method and a beam steering method, and a baseband signal is converted into an RF (Radio Frequency) signal, or an RF signal is converted into a baseband signal.
  • RF Radio Frequency
  • a transceiver block and an antenna with a shortest distance in order to reduce a loss due to wiring.
  • the transceiver block is also arranged apart.
  • the number of antennas and the number of transmitter / receiver blocks may be increased in order to increase the gain by the antenna.
  • the number of antennas and the number of transmitter / receiver blocks may be increased in order to increase the gain by the antenna.
  • the size of the IC becomes too large.
  • the manufacturing yield may be reduced.
  • each transmitter / receiver block is usually formed by an individual IC. Even if each transmitter / receiver block is formed of individual ICs, the LO signal phase is synchronized for each transmitter / receiver block when the LO signal generated by one LO signal (local oscillation signal) source is distributed to each IC. There is a problem that it is difficult to cause the distribution loss to increase. For this reason, in a radio communication system of the spatial diversity method or the beam steering method, a plurality of transmitter / receiver blocks are formed by individual ICs, and LO signal sources are provided in the respective transmitter / receiver blocks, and phase synchronization is performed by these LO signal sources. A configuration for generating each LO signal is adopted.
  • FIG. 1 shows a configuration example of a background art receiving apparatus including two receiver blocks 1a and 1b.
  • the receiving apparatus shown in FIG. 1 has two receiver blocks 1a and 1b, two antennas 2a and 2b, and a signal source 5 that oscillates a signal having a constant frequency with high stability.
  • the receiver block 1a includes a low-noise amplifier 3a, a mixer 4a, and a phase-locked oscillator (hereinafter referred to as PLO (Phase Locked Oscillator)) 6a which is an LO signal source.
  • the receiver block 1b includes a low noise amplifier 3b, a mixer 4b, and a PLO 6b.
  • a well-known PLL (Phase Locked Loop) circuit is used for the PLOs 6a and 6b.
  • the PLO (PLL circuit) used in the wireless communication system is also described in Patent Document 1 and Patent Document 2, for example.
  • the RF signals received by the antennas 2a and 2b are amplified by the low noise amplifiers 3a and 3b.
  • the PLOs 6a and 6b generate LO signals whose phases are synchronized with the signals output from the signal source 5, respectively.
  • the RF signals output from the low noise amplifiers 3a and 3b are mixed with the LO signals generated by the PLOs 6a and 6b and down-converted by the mixers 4a and 4b.
  • the signals output from the two mixers 4a and 4b are combined on the wiring path and output from the output terminal 7 as a baseband signal.
  • FIG. 2 shows a signal waveform (130 MHz) of a baseband signal appearing at the output terminal 7 when an RF signal (sine wave) of 60.61 GHz is input to the receiving apparatus shown in FIG. 1 (the frequency of the LO signal is 60.48 GHz). Sine wave) measurement results.
  • the output signal (baseband signal) of the receiving apparatus shown in FIG. 1 has a large jitter and contains many unnecessary frequency components.
  • PLOs 6a and 6b having sufficiently small phase noise may be used.
  • the present invention provides a transmitter / receiver that includes a plurality of transmitter / receiver blocks and can reduce jitter of a signal obtained by synthesizing the output signals of the transmitter / receiver blocks even in a high frequency band where an LO signal source with sufficiently small phase noise cannot be realized.
  • the purpose is to provide.
  • the transmitting / receiving apparatus of the present invention generates a phase oscillation signal for generating a local oscillation signal for down-converting each RF signal received by a plurality of antennas or a local oscillation signal for up-converting a baseband signal.
  • a loop band detection circuit that detects a difference in loop band of the phase-locked oscillator provided for each transceiver block and generates a control signal for matching the loop band of the phase-locked oscillator; and
  • FIG. 1 is a block diagram illustrating a configuration of a background art receiving apparatus including a plurality of receiver blocks.
  • FIG. 2 is a waveform diagram illustrating an example of a signal waveform of a baseband signal output from the receiving apparatus illustrated in FIG.
  • FIG. 3 is a graph showing the frequency spectrum of the output signal of each receiver block included in the receiving apparatus shown in FIG.
  • FIG. 4 is a graph showing a state when the frequency spectrums of the output signals of the respective receiver blocks included in the receiving apparatus shown in FIG. 1 are matched.
  • FIG. 5 is a waveform diagram showing an example of a signal waveform of a baseband signal output from the receiving apparatus in the state shown in FIG. FIG.
  • FIG. 6A is a diagram illustrating a configuration example of the transmission / reception device according to the first embodiment, and is a block diagram illustrating an overall configuration of the reception device.
  • FIG. 6B is a block diagram illustrating a configuration example of the PLO illustrated in FIG. 6A.
  • FIG. 7A is a block diagram showing another configuration example of the PLO shown in FIG. 6A.
  • FIG. 7B is a circuit diagram showing a configuration example of the loop filter shown in FIG. 7A.
  • FIG. 8 is a block diagram illustrating a configuration example of the loop band detection circuit illustrated in FIG. 6A.
  • FIG. 9 is a block diagram illustrating a configuration example of the PLO for improving the detection sensitivity of the power sensor illustrated in FIG.
  • FIG. 10 is a block diagram illustrating a configuration example of the receiving apparatus according to the second embodiment.
  • FIG. 3 shows frequency spectra of output signals of the respective receiver blocks 1a and 1b when the two receiver blocks 1a and 1b provided in the receiving apparatus shown in FIG. 1 are individually operated.
  • the frequency spectrum of the output signal of the receiver block 1a is significantly different from the frequency spectrum of the output signal of the receiver block 1b. This is because the phase noises output from the PLOs 6a and 6b are different due to the performance variations of the PLOs 6a and 6b, which are PLL circuits, in particular, the loop bands of the PLO 6a and the PLO 6b are different.
  • FIG. 4 shows a state when the frequency spectra of the output signals of the two receiver blocks 1a and 1b shown in FIG. 1 are matched.
  • FIG. 5 shows the signal waveform of the baseband signal output from the receiving apparatus when the frequency spectra of the receiver blocks 1a and 1b are matched as shown in FIG.
  • FIG. 4 shows the result of adjustment to widen the loop band of the PLO (PLL circuit) 6a in order to match the frequency spectrum of the output signal of the reception block 1b with the frequency spectrum of the output signal of the reception block 1a.
  • PLO PLO
  • the phase noise of the LO signal includes (1) fluctuation of a reference frequency of a crystal oscillator, (2) fluctuation of a power supply voltage supplied from an external power supply, (3) jitter existing in a PLL circuit such as a phase comparator, (4 ) Generated by thermal noise or 1 / f noise of the voltage controlled oscillator of the PLL circuit.
  • (1) and (2) are considered to have the same influence on a plurality of PLOs, that is, the same origin of phase noise.
  • the jitters pointed out in (3) there is no correlation with random jitter, but there is a case where there is a correlation with regular jitter called deterministic jitter. That is, the phase noise of LO signals generated by a plurality of PLOs may be synchronized.
  • the LO signals generated by the respective PLOs are similarly modulated by the phase noise when the loop bands are matched. Therefore, it is considered that the jitter (fluctuation) of the baseband signal that is a signal obtained by synthesizing the output signals of the plurality of receiver blocks is reduced.
  • FIG. 6A shows the overall configuration of the receiving apparatus
  • FIG. 6B shows an example of the configuration of the PLO shown in FIG. 6A
  • 7A is a block diagram showing another configuration example of the PLO shown in FIG. 6A
  • FIG. 7B is a circuit diagram showing a configuration example of the loop filter shown in FIG. 7A.
  • the receiving apparatus includes two receiver blocks 1a and 1b, two antennas 2a and 2b, and a signal source that oscillates a signal having a constant frequency (hereinafter referred to as a reference signal) with high stability. 5 and a loop band detection circuit 16 that detects a difference between the loop bands of the PLOs included in the receiver blocks 1a and 1b and adjusts the loop bands to coincide with each other.
  • a reference signal a signal having a constant frequency
  • the receiver block 1a includes a low noise amplifier 3a, a mixer 4a, and a PLO 6a.
  • the receiver block 1b includes a low noise amplifier 3b, a mixer 4b, and a PLO 6b.
  • the signals received by the antennas 2a and 2b are amplified by the low noise amplifiers 3a and 3b.
  • the PLOs 6a and 6b generate LO signals whose phases are synchronized with the reference signal output from the signal source 5, respectively.
  • the output signals of the low noise amplifiers 3a and 3b are mixed by the LO signals generated by the PLOs 6a and 6b with the mixers 4a and 4b and down-converted.
  • the signals output from the mixers 4a and 4b are combined in the wiring path and output from the output terminal 7 as a baseband signal.
  • each of the PLOs 6a and 6b includes a voltage controlled oscillator 8, a frequency divider (DIV) 9, a phase comparator (PFD) 10, a charge pump (CP) 11, and a loop filter 12, respectively.
  • This is a PLL (Phased Locked Loop) circuit.
  • FIG. 6B shows an example in which a low-pass filter (LPF) is used as the loop filter 12.
  • LPF low-pass filter
  • FIG. 6B shows a configuration example for adjusting the loop bandwidth of the PLOs 6a and 6b by changing the output current amount of the charge pump (CP) 11.
  • the reference signal generated by the signal source 5 is input to the phase comparator 10 via the input terminal 13.
  • the phase comparator 10 compares the phase of the reference signal with the phase of the output signal of the frequency divider 9 and outputs a signal corresponding to the phase difference between them.
  • the charge pump 11 outputs a current having a value corresponding to the output signal of the phase comparator 10.
  • the loop filter 12 converts the output current of the charge pump 11 into a voltage signal and blocks a high frequency signal component of the voltage signal.
  • the voltage controlled oscillator 8 oscillates a signal having a frequency corresponding to the input voltage.
  • the frequency divider 9 divides the oscillation frequency of the voltage controlled oscillator 8 and feeds it back to the phase comparator 10.
  • the feedback loop operates so that the frequency of the reference signal matches the frequency of the output signal of the frequency divider 9. Therefore, an LO signal having a desired frequency can be obtained from the voltage controlled oscillator 8 based on the frequency of the reference signal and the frequency division ratio of the frequency divider 9.
  • the LO signal output from the voltage controlled oscillator 8 is output from the output terminal 14.
  • the loop bands of the PLOs 6a and 6b are determined by the gain of the phase comparator 10, the output current amount of the charge pump 11, and the band of the loop filter 12.
  • the LO signals generated by the PLOs 6a and 6b are input to the loop band detection circuit 16, respectively.
  • the loop band detection circuit 16 detects a difference between the loop bands of the PLOs 6a and 6b from the LO signals generated by the PLOs 6a and 6b, and supplies a control signal for matching the loop bands to the PLOs 6a and 6b.
  • the loop band detection circuit 16 matches the loop bands of the PLOs 6a and 6b by changing the amount of current of the charge pump 11 included in the PLOs 6a and 6b, for example, by changing the voltage applied to the current source, according to the control signal.
  • the loop band detection circuit 16 uses the control signal to charge the PLO 6a.
  • the current amount of the pump 11 is decreased or the current amount of the charge pump 11 of the PLO 6b is increased.
  • the loop band detection circuit 16 matches the loop bands of the PLOs 6a and 6b that generate the LO signal. As a result, the jitter of the baseband signal output from the output terminal 7 of the receiving device is reduced.
  • the loop band of the PLOs 6a and 6b can be adjusted by changing the filter characteristics of the loop filter 12.
  • a low-pass filter including capacitive elements 19a and 19b whose capacitance value can be changed by an input voltage or a resistive element 20 whose resistance value can be changed by an input voltage.
  • the loop band detection circuit 16 may match the loop bands of the PLOs 6a and 6b by changing the capacitance values of the capacitive elements 19a and 19b or the resistance value of the resistive element 20 according to the control signal.
  • the PLOs 6a and 6b have the configuration shown in FIG. 7A.
  • the loop band detection circuit 16 can be realized, for example, with the configuration shown in FIG.
  • FIG. 8 is a block diagram showing an example of the configuration of the loop band detection circuit shown in FIG. 6A.
  • the loop band detection circuit 16 includes a mixer 21, a power sensor 22 that detects a power value of a signal output from the mixer 21, and a control unit 28.
  • the LO signals generated by the PLOs 6a and 6b are input to the mixer 21 via the input terminals 23a and 23b.
  • the signal output from the mixer 21 is the difference between the LO signals generated by the PLOs 6a and 6b, and becomes a frequency spectrum having a peak in the low frequency region (usually several MHz or less).
  • the power value of the difference in phase noise power at the high detuning frequency of the voltage controlled oscillator 8 provided in the PLOs 6a and 6b appears.
  • the phase noise power of the voltage controlled oscillator 8 is originally very small and the power value of the difference between the phase noise powers is also small, this value need not be considered.
  • the power value of the signal output from the mixer 21 is equal to the difference between the loop bands of the PLOs 6a and 6b. Therefore, if the control signal is supplied to the PLOs 6a and 6b so that the power value (detected value) detected by the power sensor 22 is minimized, the loop bands of the PLOs 6a and 6b can be made to substantially coincide.
  • the control unit 28 generates a control signal for adjusting the loop band of the PLOs 6a and 6b so as to minimize the detection value of the power sensor 22, and outputs the control signal from the output terminals 24a and 24b.
  • the control unit 28 may be any circuit as long as the detection value of the power sensor 22 can be arithmetically processed, and includes a combinational circuit, a sequential circuit, a DSP, a CPU, an FPGA, a memory, an A / D converter, a D / A converter, and the like. It can be realized by a known information processing apparatus.
  • the control signal generation method by the control unit 28 includes the following methods.
  • a control signal for expanding one of the PLOs 6a and 6b is output, and a change in the detection value of the power sensor 22 is observed.
  • a control signal for expanding the loop band of the PLO 6a is output from the output terminal 24a.
  • the control unit 28 reduces the loop band of the PLO (in this case, PLO 6a) that has been changed until the detection value of the power sensor 22 becomes sufficiently small.
  • a control signal for narrowing is output.
  • a control signal for widening the loop band of the PLO that has not been changed first is output.
  • the control unit 28 increases the loop bandwidth of the PLO (in this case, PLO 6a) that has been changed until the detection value of the power sensor 22 becomes sufficiently small. Outputs a control signal for spreading. Alternatively, a control signal for narrowing the loop band of the PLO that has not been changed first (in this case, PLO 6b) is output.
  • the detection sensitivity of the power sensor 22 included in the loop band detection circuit 16 is not so high, the detection sensitivity can be improved by the following method.
  • one end of the switch 25 is connected to a connection node between the phase comparators 10 of the PLOs 6 a and 6 b and the charge pump 11, and the other end of the switch 25 is connected to the input terminal 26.
  • the control unit 28 inputs a pilot signal from the input terminal 26 and makes the switch 25 conductive.
  • the frequency of the pilot signal is set to a frequency slightly higher than at least one of the loop bands of the PLOs 6a and 6b.
  • a peak appears at a frequency separated from the center frequency by the frequency of the pilot signal in the frequency spectrum of the LO signal generated by the PLOs 6a and 6b.
  • the level of the peak due to the pilot signal differs depending on the difference between the frequency of the loop band of the PLOs 6a and 6b and the frequency of the pilot signal. That is, since the difference between the loop bands of the PLOs 6a and 6b appears as a peak value, if the peak value is detected using the power sensor 22, the difference between the loop bands of the PLOs 6a and 6b can be detected.
  • the configuration and method for matching the loop bandwidth of the PLO included in each receiver block have been described using the receiver as an example.
  • the low noise amplifier 3a instead of 3b, if a power amplifier for supplying the RF signals output from the mixers 4a and 4b to the antennas 2a and 2b is provided, and an up-conversion mixer is used as the mixers 4a and 4b, the technique shown in this embodiment is
  • the present invention can also be applied to a transmission apparatus having a plurality of transmitter blocks having a PLO.
  • the configuration example in which the receiver includes the two receiver blocks 1a and 1b has been described.
  • the number of receiver blocks is not limited to two, and three or more receiver blocks are provided. May be.
  • the PLO loop band included in any one of the receiver blocks is used as a reference, and the PLO loop band included in the other receiver block is determined as the reference PLO loop band. Should be matched to each.
  • the loop band detection circuit 16 can match the loop bands of the PLOs 6a and 6b included in the receiver blocks 1a and 1b. Therefore, in a receiving device including a plurality of receiver blocks, jitter of the signal waveform of the baseband signal can be reduced even in a high frequency band where an LO signal source with sufficiently small phase noise cannot be realized.
  • FIG. 10 is a block diagram illustrating a configuration example of the receiving apparatus according to the second embodiment.
  • the receiving apparatus includes a jitter detection circuit 27 that detects the power of the jitter component of the baseband signal that is output from the receiver blocks 1a and 1b and is synthesized.
  • the bandwidth detection circuit 16 is different from the reception device shown in the first embodiment in that the loop bandwidth of the PLO included in each receiver block is adjusted in consideration of the power of the jitter component detected by the jitter detection circuit 27. ing. Since other configurations and operations are the same as those of the receiving apparatus according to the first embodiment, description thereof is omitted. Since the second embodiment is configured to detect the power of the jitter component of the baseband signal, it can be applied only to the receiving apparatus.
  • the jitter of the baseband signal output from the receiving device largely depends on the relationship of the loop bandwidth of the PLO included in each receiver block.
  • the power of the jitter component detected by the jitter detection circuit 27 is minimized while the loop band detection circuit 16 adjusts the loop bands of the PLOs 6a and 6b to coincide. Further, the loop band of the PLOs 6a and 6b is further adjusted.
  • the jitter detection circuit 27 may acquire the power of the jitter component included in the baseband signal by using, for example, the following methods (1) to (3).
  • a jitter component is extracted from the baseband signal output from the receiving device by filtering, and the power of the extracted jitter component is measured by a power sensor.
  • a jitter component is extracted from the baseband signal output from the receiving device by FFT processing, and the power of the extracted jitter component is measured by a power sensor.
  • the power of the output signal of the receiver block 1a and the power of the output signal of the receiver block 1b are respectively measured by the power sensor, and a first detection value obtained by adding these values is obtained.
  • the second detection value obtained by measuring the power of the baseband signal output from the receiving apparatus that is, the power of the signal output from the receiver blocks 1a and 1b and synthesized by the wiring path, with the power sensor is acquired.
  • the electric power of a jitter component is acquired by calculating
  • the jitter detection circuit 27 executes the above filter processing, FFT processing, arithmetic processing, and the like in addition to the power sensor.
  • Combination circuit, sequential circuit, DSP, CPU, FPGA, memory, A / D converter, D / A conversion This can be realized by a well-known information processing apparatus equipped with a container.
  • the jitter band 27 is adjusted by the loop band detection circuit 16 so that the loop bands of the PLOs 6a and 6b match, and the jitter component power included in the baseband signal is detected by the jitter detection circuit 27. Since the loop band of the PLOs 6a and 6b is adjusted so that the power of the jitter component is minimized, the jitter of the signal waveform of the baseband signal can be reduced as compared with the receiving apparatus of the first embodiment.

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A transmitter-receiver apparatus comprises a plurality of transmitter-receiver blocks including respective phase sync oscillators for generating local oscillation signals used for down-converting respective RF signals received by a plurality of antennas or local oscillation signals used for up-converting baseband signals. The transmitter-receiver apparatus further comprises a loop band detector circuit that detects the difference between the loop bands of the phase sync oscillators included in the respective transmitter-receiver blocks and that generates a control signal used for causing the loop bands of the respective phase sync oscillators to coincide with each other.

Description

送受信装置Transceiver
 本発明は複数の送受信器ブロックを備えた送受信装置に関する。 The present invention relates to a transmitter / receiver provided with a plurality of transmitter / receiver blocks.
 無線通信システムにおいて、空間ダイバーシティ方式やビームステアリング方式を実現するには、複数のアンテナが必要であり、ベースバンド信号からRF(Radio Frequency)信号に変換する、またはRF信号からベースバンド信号に変換する、各アンテナに対応した複数の送受信器ブロックが必要である。 In a wireless communication system, a plurality of antennas are required to realize a spatial diversity method and a beam steering method, and a baseband signal is converted into an RF (Radio Frequency) signal, or an RF signal is converted into a baseband signal. A plurality of transceiver blocks corresponding to each antenna are required.
 一般に、ミリ波帯等の高周波帯で用いる無線通信システムでは、配線による損失を低減するために、送受信器ブロックとアンテナとは最短距離で接続することが望ましい。上記空間ダイバーシティ方式では、各アンテナが離れて配置されるため、送受信器ブロックも離れて配置される。 Generally, in a radio communication system used in a high frequency band such as a millimeter wave band, it is desirable to connect a transceiver block and an antenna with a shortest distance in order to reduce a loss due to wiring. In the space diversity system, since the antennas are arranged apart from each other, the transceiver block is also arranged apart.
 また、上記ビームステアリング方式では、アンテナによる利得を高めるために、アンテナ数や送受信器ブロック数を増やすことがある。その場合、複数の送受信器ブロックを、例えば1つのIC(Integrated Circuit)に収容すると、該ICのサイズが大きくなりすぎる問題がある。さらに、多くの送受信器ブロックを収容するICでは、製造上の歩留まりが低下することも考えられる。 In the beam steering system, the number of antennas and the number of transmitter / receiver blocks may be increased in order to increase the gain by the antenna. In that case, if a plurality of transceiver blocks are accommodated in, for example, one IC (Integrated Circuit), there is a problem that the size of the IC becomes too large. Furthermore, in an IC that accommodates many transceiver blocks, the manufacturing yield may be reduced.
 このような問題を避けため、通常、各送受信器ブロックは、個別のICでそれぞれ形成されている。なお、各送受信器ブロックを個別のICで形成する構成でも、1つのLO信号(局部発振信号)源で生成されたLO信号を各ICへ分配すると、送受信器ブロック毎にLO信号の位相を同期させるのが困難であり、分配損失も大きくなる問題がある。そのため、空間ダイバーシティ方式やビームステアリング方式の無線通信システムでは、複数の送受信器ブロックをそれぞれ個別のICで形成すると共に、各送受信器ブロックにそれぞれLO信号源を設け、それらLO信号源にて位相同期したLO信号をそれぞれ生成させる構成が採用されている。 In order to avoid such a problem, each transmitter / receiver block is usually formed by an individual IC. Even if each transmitter / receiver block is formed of individual ICs, the LO signal phase is synchronized for each transmitter / receiver block when the LO signal generated by one LO signal (local oscillation signal) source is distributed to each IC. There is a problem that it is difficult to cause the distribution loss to increase. For this reason, in a radio communication system of the spatial diversity method or the beam steering method, a plurality of transmitter / receiver blocks are formed by individual ICs, and LO signal sources are provided in the respective transmitter / receiver blocks, and phase synchronization is performed by these LO signal sources. A configuration for generating each LO signal is adopted.
 図1は、2つの受信器ブロック1a,1bを備えた背景技術の受信装置の構成例を示している。 FIG. 1 shows a configuration example of a background art receiving apparatus including two receiver blocks 1a and 1b.
 図1に示す受信装置は、2つの受信器ブロック1a,1bと、2つのアンテナ2a,2bと、周波数が一定の信号を高安定に発振する信号源5とを有する構成である。 The receiving apparatus shown in FIG. 1 has two receiver blocks 1a and 1b, two antennas 2a and 2b, and a signal source 5 that oscillates a signal having a constant frequency with high stability.
 受信器ブロック1aは、低雑音増幅器3a、ミキサ4a及びLO信号源である位相同期発振器(以下、PLO(Phase Locked Oscillator)と称す)6aを備えている。受信器ブロック1bは、低雑音増幅器3b、ミキサ4b及びPLO6bを備えている。PLO6a,6bには、周知のPLL(Phase Locked Loop)回路が用いられる。無線通信システムで用いるPLO(PLL回路)については、例えば特許文献1や特許文献2にも記載されている。 The receiver block 1a includes a low-noise amplifier 3a, a mixer 4a, and a phase-locked oscillator (hereinafter referred to as PLO (Phase Locked Oscillator)) 6a which is an LO signal source. The receiver block 1b includes a low noise amplifier 3b, a mixer 4b, and a PLO 6b. A well-known PLL (Phase Locked Loop) circuit is used for the PLOs 6a and 6b. The PLO (PLL circuit) used in the wireless communication system is also described in Patent Document 1 and Patent Document 2, for example.
 このような構成において、アンテナ2a,2bで受信されたRF信号は、低雑音増幅器3a,3bで増幅される。PLO6a,6bは、信号源5から出力された信号に位相を同期させたLO信号をそれぞれ生成する。低雑音増幅器3a,3bから出力されたRF信号は、ミキサ4a,4bにより、PLO6a,6bで生成されたLO信号と混合されてダウンコンバートされる。2つのミキサ4a,4bから出力された信号は、配線路で合成されて出力端子7からベースバンド信号として出力される。 In such a configuration, the RF signals received by the antennas 2a and 2b are amplified by the low noise amplifiers 3a and 3b. The PLOs 6a and 6b generate LO signals whose phases are synchronized with the signals output from the signal source 5, respectively. The RF signals output from the low noise amplifiers 3a and 3b are mixed with the LO signals generated by the PLOs 6a and 6b and down-converted by the mixers 4a and 4b. The signals output from the two mixers 4a and 4b are combined on the wiring path and output from the output terminal 7 as a baseband signal.
 図2は、図1に示した受信装置に60.61GHzのRF信号(正弦波)を入力したとき(LO信号の周波数は60.48GHz)、出力端子7に現れるベースバンド信号の信号波形(130MHzのサイン波)の測定結果を示している。図2に示すように、図1に示した受信装置の出力信号(ベースバンド信号)は、ジッターが大きく、多くの不要な周波数成分を含んでいることが分かる。 2 shows a signal waveform (130 MHz) of a baseband signal appearing at the output terminal 7 when an RF signal (sine wave) of 60.61 GHz is input to the receiving apparatus shown in FIG. 1 (the frequency of the LO signal is 60.48 GHz). Sine wave) measurement results. As shown in FIG. 2, it can be seen that the output signal (baseband signal) of the receiving apparatus shown in FIG. 1 has a large jitter and contains many unnecessary frequency components.
 受信装置から出力されるベースバンド信号のジッターを低減するには、位相ノイズが十分に小さいPLO6a、6bを用いればよい。しかしながら、ミリ波帯等の高周波数帯で使用できる、位相ノイズが十分に小さいLO信号源を実現するのは未だ困難である。 In order to reduce the jitter of the baseband signal output from the receiving device, PLOs 6a and 6b having sufficiently small phase noise may be used. However, it is still difficult to realize an LO signal source that can be used in a high frequency band such as a millimeter wave band and has sufficiently small phase noise.
特開2003-78410号公報JP 2003-78410 A 特開2007-251571号公報JP 2007-251571 A
 そこで本発明は、複数の送受信器ブロックを備え、位相ノイズが十分に小さいLO信号源を実現できない高周波数帯においても、各送受信器ブロックの出力信号を合成した信号のジッターを低減できる送受信装置を提供することを目的とする。 Therefore, the present invention provides a transmitter / receiver that includes a plurality of transmitter / receiver blocks and can reduce jitter of a signal obtained by synthesizing the output signals of the transmitter / receiver blocks even in a high frequency band where an LO signal source with sufficiently small phase noise cannot be realized. The purpose is to provide.
 上記目的を達成するため本発明の送受信装置は、複数のアンテナで受信したRF信号をそれぞれダウンコンバートするための局部発振信号、またはベースバンド信号をアップコンバートするための局部発振信号を生成する位相同期発振器を備えた複数の送受信器ブロックと、
 前記送受信器ブロック毎に備える前記位相同期発振器のループ帯域の差を検出し、前記位相同期発振器毎のループ帯域を一致させるための制御信号を生成するループ帯域検出回路と、
を有する。
In order to achieve the above object, the transmitting / receiving apparatus of the present invention generates a phase oscillation signal for generating a local oscillation signal for down-converting each RF signal received by a plurality of antennas or a local oscillation signal for up-converting a baseband signal. A plurality of transceiver blocks with oscillators;
A loop band detection circuit that detects a difference in loop band of the phase-locked oscillator provided for each transceiver block and generates a control signal for matching the loop band of the phase-locked oscillator; and
Have
図1は、複数の受信器ブロックを備えた背景技術の受信装置の構成を示すブロック図である。FIG. 1 is a block diagram illustrating a configuration of a background art receiving apparatus including a plurality of receiver blocks. 図2は、図1に示した受信装置から出力されるベースバンド信号の信号波形の一例を示す波形図である。FIG. 2 is a waveform diagram illustrating an example of a signal waveform of a baseband signal output from the receiving apparatus illustrated in FIG. 図3は、図1に示した受信装置が備える各受信器ブロックの出力信号の周波数スペクトルを示すグラフである。FIG. 3 is a graph showing the frequency spectrum of the output signal of each receiver block included in the receiving apparatus shown in FIG. 図4は、図1に示した受信装置が備える各受信器ブロックの出力信号の周波数スペクトルを一致させたときの様子を示すグラフである。FIG. 4 is a graph showing a state when the frequency spectrums of the output signals of the respective receiver blocks included in the receiving apparatus shown in FIG. 1 are matched. 図5は、図4に示した状態で受信装置から出力されるベースバンド信号の信号波形の一例を示す波形図である。FIG. 5 is a waveform diagram showing an example of a signal waveform of a baseband signal output from the receiving apparatus in the state shown in FIG. 図6Aは、第1の実施の形態の送受信装置の一構成例を示す図であり、受信装置の全体構成を示すブロック図である。FIG. 6A is a diagram illustrating a configuration example of the transmission / reception device according to the first embodiment, and is a block diagram illustrating an overall configuration of the reception device. 図6Bは、図6Aに示したPLOの一構成例を示すブロック図である。FIG. 6B is a block diagram illustrating a configuration example of the PLO illustrated in FIG. 6A. 図7Aは、図6Aに示したPLOの他の構成例を示すブロック図である。FIG. 7A is a block diagram showing another configuration example of the PLO shown in FIG. 6A. 図7Bは、図7Aに示したループフィルタの構成例を示す回路図である。FIG. 7B is a circuit diagram showing a configuration example of the loop filter shown in FIG. 7A. 図8は、図6Aに示したループ帯域検出回路の一構成例を示すブロック図である。FIG. 8 is a block diagram illustrating a configuration example of the loop band detection circuit illustrated in FIG. 6A. 図9は、図8に示した電力センサの検出感度を向上させる、PLOの構成例を示すブロック図である。FIG. 9 is a block diagram illustrating a configuration example of the PLO for improving the detection sensitivity of the power sensor illustrated in FIG. 図10は、第2の実施の形態の受信装置の一構成例を示すブロック図である。FIG. 10 is a block diagram illustrating a configuration example of the receiving apparatus according to the second embodiment.
 次に本発明について図面を用いて説明する。 Next, the present invention will be described with reference to the drawings.
 図3は、図1に示した受信装置が備える2つの受信器ブロック1a,1bを個別に動作させたときの、各受信器ブロック1a,1bの出力信号の周波数スペクトルを示している。 FIG. 3 shows frequency spectra of output signals of the respective receiver blocks 1a and 1b when the two receiver blocks 1a and 1b provided in the receiving apparatus shown in FIG. 1 are individually operated.
 図3に示すように、図1に示した受信装置では、受信器ブロック1aの出力信号の周波数スペクトルと、受信器ブロック1bの出力信号の周波数スペクトルとが大きく異なっている。これは、PLL回路であるPLO6a,6bの性能ばらつき、特にPLO6aとPLO6bのループ帯域が異なることで、PLO6a,6bから出力される位相ノイズが異なることに起因する。 As shown in FIG. 3, in the receiving apparatus shown in FIG. 1, the frequency spectrum of the output signal of the receiver block 1a is significantly different from the frequency spectrum of the output signal of the receiver block 1b. This is because the phase noises output from the PLOs 6a and 6b are different due to the performance variations of the PLOs 6a and 6b, which are PLL circuits, in particular, the loop bands of the PLO 6a and the PLO 6b are different.
 図4は、図1に示した2つの受信器ブロック1a,1bの出力信号の周波数スペクトルを一致させたときの様子を示している。図5は、受信器ブロック1a,1bの周波数スペクトルを図4に示すように一致させたときの、受信装置から出力されるベースバンド信号の信号波形を示している。なお、図4は、受信ブロック1bの出力信号の周波数スペクトルと受信ブロック1aの出力信号の周波数スペクトルとを一致させるため、PLO(PLL回路)6aのループ帯域を広げるように調整した結果を示している。 FIG. 4 shows a state when the frequency spectra of the output signals of the two receiver blocks 1a and 1b shown in FIG. 1 are matched. FIG. 5 shows the signal waveform of the baseband signal output from the receiving apparatus when the frequency spectra of the receiver blocks 1a and 1b are matched as shown in FIG. FIG. 4 shows the result of adjustment to widen the loop band of the PLO (PLL circuit) 6a in order to match the frequency spectrum of the output signal of the reception block 1b with the frequency spectrum of the output signal of the reception block 1a. Yes.
 図5に示すように、受信器ブロック1a,1bの出力信号の周波数スペクトルを一致させると、受信器ブロック1aのループ帯域を広げて位相ノイズが悪化する方向へ調整しているにも関わらず、受信装置から出力されるベースバンド信号のジッターは低減している。このような現象は位相ノイズが十分に小さいPLO6a、6bを用いれば起きないと考えられるが、上述したようにミリ波帯等の高周波数帯で使用できる、位相ノイズが十分に小さいLO信号源を実現するのは未だ困難である。このような現象が起きる理由は、明確ではないが、現象面から類推すると、2つのPLO6a、6bの位相ノイズの起源が同じであることに起因する可能性がある。 As shown in FIG. 5, when the frequency spectrums of the output signals of the receiver blocks 1a and 1b are matched, the loop band of the receiver block 1a is widened and adjusted in the direction in which the phase noise is worsened. The jitter of the baseband signal output from the receiving device is reduced. Such a phenomenon is considered not to occur if PLOs 6a and 6b having sufficiently small phase noise are used. However, as described above, an LO signal source having sufficiently small phase noise that can be used in a high frequency band such as a millimeter wave band is used. It is still difficult to realize. The reason why such a phenomenon occurs is not clear, but it can be attributed to the fact that the origins of the phase noise of the two PLOs 6a and 6b are the same when analogized from the viewpoint of the phenomenon.
 LO信号の位相ノイズは、(1)水晶発振器等の基準周波数のゆらぎ、(2)外部電源から供給される電源電圧のゆらぎ、(3)位相比較器等のPLL回路に存在するジッター、(4)PLL回路が有する電圧制御発振器の熱ノイズや1/fノイズ等で発生する。このうち、(1)や(2)は、複数のPLOに共通に影響を与える、すなわち位相ノイズの起源として同一のものと考えられる。また、(3)で指摘したジッターのうち、ランダム・ジッターには相関がないが、ディタミニスティック・ジッターと呼ばれる規則的なジッターには相関がある場合もある。つまり、複数のPLOで生成されたLO信号の位相ノイズは同期している可能性がある。 The phase noise of the LO signal includes (1) fluctuation of a reference frequency of a crystal oscillator, (2) fluctuation of a power supply voltage supplied from an external power supply, (3) jitter existing in a PLL circuit such as a phase comparator, (4 ) Generated by thermal noise or 1 / f noise of the voltage controlled oscillator of the PLL circuit. Of these, (1) and (2) are considered to have the same influence on a plurality of PLOs, that is, the same origin of phase noise. Of the jitters pointed out in (3), there is no correlation with random jitter, but there is a case where there is a correlation with regular jitter called deterministic jitter. That is, the phase noise of LO signals generated by a plurality of PLOs may be synchronized.
 複数のPLOで生成されたLO信号の位相ノイズが同期している場合、ループ帯域を一致させると、各PLOで生成されたLO信号は位相ノイズによって同じような変調を受ける。そのため、複数の受信器ブロックの出力信号を合成した信号であるベースバンド信号のジッター(ゆらぎ)が少なくなると考えられる。 When the phase noise of the LO signals generated by a plurality of PLOs is synchronized, the LO signals generated by the respective PLOs are similarly modulated by the phase noise when the loop bands are matched. Therefore, it is considered that the jitter (fluctuation) of the baseband signal that is a signal obtained by synthesizing the output signals of the plurality of receiver blocks is reduced.
 したがって、複数の受信器ブロックを備え、位相ノイズが十分に小さいLO信号源を実現できない高周波数帯で用いる受信装置では、各受信器ブロックが備えるPLOのループ帯域を一致させることが望ましい。 Therefore, in a receiving apparatus that includes a plurality of receiver blocks and that is used in a high frequency band where an LO signal source with sufficiently small phase noise cannot be realized, it is desirable to match the loop bands of the PLOs included in each receiver block.
 なお、複数の送信器ブロックを備えた送信装置においても、複数の送信器ブロックからアンテナを介して放射された電波(RF信号)は空間上で合成され、該合成された電波が受信用のアンテナへ到来する。そのため、複数の送信器ブロックを備えた送信装置においても、受信装置と同様に各送信器ブロックが備えるPLOのループ帯域を一致させておくことが望ましい。
(第1の実施の形態)
 図6A、Bは、第1の実施の形態の送受信装置の一構成例を示すブロック図である。
Note that even in a transmission device including a plurality of transmitter blocks, radio waves (RF signals) radiated from the plurality of transmitter blocks via the antenna are combined in space, and the combined radio waves are received by the receiving antenna. To come. For this reason, it is desirable to match the loop band of the PLO included in each transmitter block in the transmission apparatus including a plurality of transmitter blocks as in the reception apparatus.
(First embodiment)
6A and 6B are block diagrams illustrating a configuration example of the transmission / reception apparatus according to the first embodiment.
 図6Aは受信装置の全体構成を示し、図6Bは図6Aに示したPLOの一構成例を示している。図7Aは図6Aに示したPLOの他の構成例を示すブロック図であり、図7Bは図7Aに示したループフィルタの構成例を示す回路図である。 FIG. 6A shows the overall configuration of the receiving apparatus, and FIG. 6B shows an example of the configuration of the PLO shown in FIG. 6A. 7A is a block diagram showing another configuration example of the PLO shown in FIG. 6A, and FIG. 7B is a circuit diagram showing a configuration example of the loop filter shown in FIG. 7A.
 図6Aに示すように、受信装置は、2つの受信器ブロック1a,1bと、2つのアンテナ2a,2bと、周波数が一定の信号(以下、基準信号と称す)を高安定に発振する信号源5と、受信器ブロック1a,1bが備えるPLOのループ帯域の差を検出し、該ループ帯域が一致するように調整するループ帯域検出回路16とを有する構成である。 As shown in FIG. 6A, the receiving apparatus includes two receiver blocks 1a and 1b, two antennas 2a and 2b, and a signal source that oscillates a signal having a constant frequency (hereinafter referred to as a reference signal) with high stability. 5 and a loop band detection circuit 16 that detects a difference between the loop bands of the PLOs included in the receiver blocks 1a and 1b and adjusts the loop bands to coincide with each other.
 受信器ブロック1aは、低雑音増幅器3a、ミキサ4a及びPLO6aを備えている。受信器ブロック1bは、低雑音増幅器3b、ミキサ4b及びPLO6bを備えている。 The receiver block 1a includes a low noise amplifier 3a, a mixer 4a, and a PLO 6a. The receiver block 1b includes a low noise amplifier 3b, a mixer 4b, and a PLO 6b.
 このような構成において、アンテナ2a,2bで受信された信号は、低雑音増幅器3a,3bで増幅される。PLO6a,6bは、信号源5から出力された基準信号に位相を同期させたLO信号をそれぞれ生成する。低雑音増幅器3a,3bの出力信号は、PLO6a,6bで生成されたLO信号とミキサ4a,4bで混合されてダウンコンバートされる。ミキサ4a,4bから出力された信号は、配線路で合成されて出力端子7からベースバンド信号として出力される。 In such a configuration, the signals received by the antennas 2a and 2b are amplified by the low noise amplifiers 3a and 3b. The PLOs 6a and 6b generate LO signals whose phases are synchronized with the reference signal output from the signal source 5, respectively. The output signals of the low noise amplifiers 3a and 3b are mixed by the LO signals generated by the PLOs 6a and 6b with the mixers 4a and 4b and down-converted. The signals output from the mixers 4a and 4b are combined in the wiring path and output from the output terminal 7 as a baseband signal.
 図6Bに示すように、PLO6a,6bは、電圧制御発振器8、分周器(DIV)9、位相比較器(PFD)10、チャージポンプ(CP)11及びループフィルタ12をそれぞれ備えた、周知のPLL(Phased Locked Loop)回路である。なお、図6Bは、ループフィルタ12として、低域通過型フィルタ(LPF:Low Pass Filter)を用いる例を示している。また、図6Bでは、チャージポンプ(CP)11の出力電流量を変えることでPLO6a,6bのループ帯域を調整するための構成例を示している。 As shown in FIG. 6B, each of the PLOs 6a and 6b includes a voltage controlled oscillator 8, a frequency divider (DIV) 9, a phase comparator (PFD) 10, a charge pump (CP) 11, and a loop filter 12, respectively. This is a PLL (Phased Locked Loop) circuit. FIG. 6B shows an example in which a low-pass filter (LPF) is used as the loop filter 12. FIG. 6B shows a configuration example for adjusting the loop bandwidth of the PLOs 6a and 6b by changing the output current amount of the charge pump (CP) 11.
 位相比較器10には、信号源5で生成された基準信号が入力端子13を介して入力される。位相比較器10は、基準信号の位相と分周器9の出力信号の位相とを比較し、それらの位相差に相当する信号を出力する。チャージポンプ11は位相比較器10の出力信号に対応する値の電流を出力する。ループフィルタ12は、チャージポンプ11の出力電流を電圧信号に変換すると共に、該電圧信号の高周波信号成分を遮断する。電圧制御発振器8は、入力電圧に対応する周波数の信号を発振する。分周器9は、電圧制御発振器8の発振周波数を分周して位相比較器10へ帰還する。 The reference signal generated by the signal source 5 is input to the phase comparator 10 via the input terminal 13. The phase comparator 10 compares the phase of the reference signal with the phase of the output signal of the frequency divider 9 and outputs a signal corresponding to the phase difference between them. The charge pump 11 outputs a current having a value corresponding to the output signal of the phase comparator 10. The loop filter 12 converts the output current of the charge pump 11 into a voltage signal and blocks a high frequency signal component of the voltage signal. The voltage controlled oscillator 8 oscillates a signal having a frequency corresponding to the input voltage. The frequency divider 9 divides the oscillation frequency of the voltage controlled oscillator 8 and feeds it back to the phase comparator 10.
 このような構成では、帰還ループにより基準信号の周波数と分周器9の出力信号の周波数とが一致するように動作する。そのため、基準信号の周波数と分周器9の分周比とにより、電圧制御発振器8から所望の周波数のLO信号を得ることができる。電圧制御発振器8から出力されたLO信号は出力端子14から出力される。 In such a configuration, the feedback loop operates so that the frequency of the reference signal matches the frequency of the output signal of the frequency divider 9. Therefore, an LO signal having a desired frequency can be obtained from the voltage controlled oscillator 8 based on the frequency of the reference signal and the frequency division ratio of the frequency divider 9. The LO signal output from the voltage controlled oscillator 8 is output from the output terminal 14.
 PLO6a,6bのループ帯域は、位相比較器10の利得、チャージポンプ11の出力電流量、ループフィルタ12の帯域によって決定される。PLO6a,6bで生成されたLO信号は、ループ帯域検出回路16にそれぞれ入力される。 The loop bands of the PLOs 6a and 6b are determined by the gain of the phase comparator 10, the output current amount of the charge pump 11, and the band of the loop filter 12. The LO signals generated by the PLOs 6a and 6b are input to the loop band detection circuit 16, respectively.
 ループ帯域検出回路16は、PLO6a,6bで生成されたLO信号からPLO6a,6bのループ帯域の差を検出し、それらのループ帯域を一致させるための制御信号をPLO6a,6bに供給する。ループ帯域検出回路16は、制御信号により、例えばPLO6a,6bが備えるチャージポンプ11の電流量をそれぞれ変化させることで(電流源に与える電圧を変化させることで)、PLO6a,6bのループ帯域を一致させる。 The loop band detection circuit 16 detects a difference between the loop bands of the PLOs 6a and 6b from the LO signals generated by the PLOs 6a and 6b, and supplies a control signal for matching the loop bands to the PLOs 6a and 6b. The loop band detection circuit 16 matches the loop bands of the PLOs 6a and 6b by changing the amount of current of the charge pump 11 included in the PLOs 6a and 6b, for example, by changing the voltage applied to the current source, according to the control signal. Let
 具体的には、PLO6a,6bから入力されたLO信号を基に、PLO6bよりもPLO6aのループ帯域の方が広いことを検出した場合、ループ帯域検出回路16は、制御信号により、PLO6aが備えるチャージポンプ11の電流量を減少させる、あるいはPLO6bのチャージポンプ11の電流量を増大させる。このようにして、ループ帯域検出回路16は、LO信号を生成するPLO6a、6bのループ帯域を一致させる。その結果、受信装置の出力端子7から出力されるベースバンド信号のジッターが低減される。 Specifically, when it is detected that the loop band of the PLO 6a is wider than the PLO 6b based on the LO signals input from the PLOs 6a and 6b, the loop band detection circuit 16 uses the control signal to charge the PLO 6a. The current amount of the pump 11 is decreased or the current amount of the charge pump 11 of the PLO 6b is increased. In this way, the loop band detection circuit 16 matches the loop bands of the PLOs 6a and 6b that generate the LO signal. As a result, the jitter of the baseband signal output from the output terminal 7 of the receiving device is reduced.
 なお、上述したように、PLO6a,6bのループ帯域は、ループフィルタ12のフィルタ特性を変えることでも調整できる。例えば、図7Bに示すように、ループフィルタ12として、容量値を入力電圧で変更できる容量素子19a,19b、または抵抗値を入力電圧で変更できる抵抗素子20を備えた、低域通過型フィルタを構成する。この場合、ループ帯域検出回路16は、制御信号により、容量素子19a,19bの容量値、または抵抗素子20の抵抗値を変化させることで、PLO6a,6bのループ帯域を一致させればよい。その場合、PLO6a,6bは、図7Aに示した構成となる。 As described above, the loop band of the PLOs 6a and 6b can be adjusted by changing the filter characteristics of the loop filter 12. For example, as shown in FIG. 7B, as the loop filter 12, a low-pass filter including capacitive elements 19a and 19b whose capacitance value can be changed by an input voltage or a resistive element 20 whose resistance value can be changed by an input voltage. Constitute. In this case, the loop band detection circuit 16 may match the loop bands of the PLOs 6a and 6b by changing the capacitance values of the capacitive elements 19a and 19b or the resistance value of the resistive element 20 according to the control signal. In that case, the PLOs 6a and 6b have the configuration shown in FIG. 7A.
 ループ帯域検出回路16は、例えば図8に示す構成で実現できる。 The loop band detection circuit 16 can be realized, for example, with the configuration shown in FIG.
 図8は、図6Aに示したループ帯域検出回路の一構成例を示すブロック図である。 FIG. 8 is a block diagram showing an example of the configuration of the loop band detection circuit shown in FIG. 6A.
 図8に示すように、ループ帯域検出回路16は、ミキサ21、ミキサ21から出力される信号の電力値を検出する電力センサ22及び制御部28を有する構成である。 As shown in FIG. 8, the loop band detection circuit 16 includes a mixer 21, a power sensor 22 that detects a power value of a signal output from the mixer 21, and a control unit 28.
 PLO6a,6bで生成されたLO信号は、入力端子23a,23bを介してミキサ21に入力される。ミキサ21から出力される信号は、PLO6a,6bで生成されたLO信号の差であり、低周波数領域(通常、数MHz以下)でピークを有する周波数スペクトルとなる。ここで、ミキサ21から出力される信号の高周波数領域には、PLO6a,6bが備える電圧制御発振器8の高離調周波数における位相ノイズ電力の差の電力値が現れる。しかしながら、電圧制御発振器8の位相ノイズ電力は、元々非常に小さく、位相ノイズ電力の差の電力値も小さいため、この値は考慮しなくてよい。 The LO signals generated by the PLOs 6a and 6b are input to the mixer 21 via the input terminals 23a and 23b. The signal output from the mixer 21 is the difference between the LO signals generated by the PLOs 6a and 6b, and becomes a frequency spectrum having a peak in the low frequency region (usually several MHz or less). Here, in the high frequency region of the signal output from the mixer 21, the power value of the difference in phase noise power at the high detuning frequency of the voltage controlled oscillator 8 provided in the PLOs 6a and 6b appears. However, since the phase noise power of the voltage controlled oscillator 8 is originally very small and the power value of the difference between the phase noise powers is also small, this value need not be considered.
 したがって、ミキサ21から出力される信号の電力値は、PLO6a,6bのループ帯域の差に等しいと見なすことができる。よって、電力センサ22で検出された電力値(検出値)が最小となるように、PLO6a,6bに制御信号を供給すれば、PLO6a,6bのループ帯域をほぼ一致させることができる。 Therefore, it can be considered that the power value of the signal output from the mixer 21 is equal to the difference between the loop bands of the PLOs 6a and 6b. Therefore, if the control signal is supplied to the PLOs 6a and 6b so that the power value (detected value) detected by the power sensor 22 is minimized, the loop bands of the PLOs 6a and 6b can be made to substantially coincide.
 制御部28は、このように電力センサ22の検出値が最小となるように、PLO6a,6bのループ帯域を調整するための制御信号を生成し、出力端子24a,24bから出力する。制御部28は、電力センサ22の検出値を演算処理できればどのような回路でもよく、組み合わせ回路、順序回路、DSP、CPU、FPGA、メモリ、A/D変換器、D/A変換器等を備えた周知の情報処理装置によって実現できる。 The control unit 28 generates a control signal for adjusting the loop band of the PLOs 6a and 6b so as to minimize the detection value of the power sensor 22, and outputs the control signal from the output terminals 24a and 24b. The control unit 28 may be any circuit as long as the detection value of the power sensor 22 can be arithmetically processed, and includes a combinational circuit, a sequential circuit, a DSP, a CPU, an FPGA, a memory, an A / D converter, a D / A converter, and the like. It can be realized by a known information processing apparatus.
 制御部28による制御信号の生成方法としては、以下の方法がある。 The control signal generation method by the control unit 28 includes the following methods.
 まず、PLO6a,6bのうち、いずれか一方のループ帯域を広げるための制御信号を出力し、電力センサ22の検出値の変化を観測する。例えば、PLO6aのループ帯域を広げるための制御信号を出力端子24aから出力する。 First, a control signal for expanding one of the PLOs 6a and 6b is output, and a change in the detection value of the power sensor 22 is observed. For example, a control signal for expanding the loop band of the PLO 6a is output from the output terminal 24a.
 ここで、電力センサ22の検出値が大きくなった場合、制御部28は、電力センサ22の検出値が十分に小さくなるまで、先に変化させたPLO(この場合は、PLO6a)のループ帯域を狭くするための制御信号を出力する。あるいは、先に変化させていないPLO(この場合は、PLO6b)のループ帯域を広げるための制御信号を出力する。 Here, when the detection value of the power sensor 22 becomes large, the control unit 28 reduces the loop band of the PLO (in this case, PLO 6a) that has been changed until the detection value of the power sensor 22 becomes sufficiently small. A control signal for narrowing is output. Alternatively, a control signal for widening the loop band of the PLO that has not been changed first (in this case, PLO 6b) is output.
 一方、電力センサ22の検出値が小さくなった場合、制御部28は、電力センサ22の検出値が十分に小さくなるまで、先に変化させたPLO(この場合は、PLO6a)のループ帯域をより広げるための制御信号を出力する。あるいは、先に変化させていないPLO(この場合は、PLO6b)のループ帯域を狭くするための制御信号を出力する。 On the other hand, when the detection value of the power sensor 22 becomes small, the control unit 28 increases the loop bandwidth of the PLO (in this case, PLO 6a) that has been changed until the detection value of the power sensor 22 becomes sufficiently small. Outputs a control signal for spreading. Alternatively, a control signal for narrowing the loop band of the PLO that has not been changed first (in this case, PLO 6b) is output.
 ここで、ループ帯域検出回路16が備える電力センサ22の検出感度があまり高くない場合は、以下の方法で検出感度を向上させることができる。 Here, when the detection sensitivity of the power sensor 22 included in the loop band detection circuit 16 is not so high, the detection sensitivity can be improved by the following method.
 例えば、図9に示すように、PLO6a、6bの位相比較器10とチャージポンプ11の接続ノードにスイッチ25の一端を接続し、スイッチ25の他端を入力端子26に接続する。 For example, as shown in FIG. 9, one end of the switch 25 is connected to a connection node between the phase comparators 10 of the PLOs 6 a and 6 b and the charge pump 11, and the other end of the switch 25 is connected to the input terminal 26.
 そして、PLO6a、6bのループ帯域の調整時、制御部28により入力端子26からパイロット信号を入力すると共に、スイッチ25を導通させる。パイロット信号の周波数は、PLO6a、6bの少なくとも一方のループ帯域よりも少し高い周波数に設定する。 Then, when adjusting the loop band of the PLOs 6a and 6b, the control unit 28 inputs a pilot signal from the input terminal 26 and makes the switch 25 conductive. The frequency of the pilot signal is set to a frequency slightly higher than at least one of the loop bands of the PLOs 6a and 6b.
 パイロット信号をPLO6a、6bに入力すると、PLO6a、6bで生成されるLO信号の周波数スペクトルには、中心周波数からパイロット信号の周波数だけ離れた周波数でピークが現れる。このパイロット信号に起因するピークのレベルは、PLO6a、6bのループ帯域の周波数とパイロット信号の周波数の差によって異なる。すなわち、PLO6a、6bのループ帯域の差がピークの値として現れるため、このピークの値を、電力センサ22を用いて検出すれば、PLO6a、6bのループ帯域の差を検出できる。したがって、適切な(比較的大きな電力の)パイロット信号をPLO6a、6bに入力すれば、電力センサ22の感度不足を補うことが可能であり、PLO6a、6bのループ帯域の差を容易に検出できる。 When a pilot signal is input to the PLOs 6a and 6b, a peak appears at a frequency separated from the center frequency by the frequency of the pilot signal in the frequency spectrum of the LO signal generated by the PLOs 6a and 6b. The level of the peak due to the pilot signal differs depending on the difference between the frequency of the loop band of the PLOs 6a and 6b and the frequency of the pilot signal. That is, since the difference between the loop bands of the PLOs 6a and 6b appears as a peak value, if the peak value is detected using the power sensor 22, the difference between the loop bands of the PLOs 6a and 6b can be detected. Therefore, if an appropriate (relatively large power) pilot signal is input to the PLOs 6a and 6b, it is possible to compensate for the lack of sensitivity of the power sensor 22, and the difference in the loop bandwidth of the PLOs 6a and 6b can be easily detected.
 なお、本実施形態では、受信装置を例にして、各受信器ブロックが備えるPLOのループ帯域を一致させるための構成や方法を説明したが、図6Aに示した構成において、低雑音増幅器3a、3bに代わって、ミキサ4a、4bから出力されたRF信号をアンテナ2a,2bへ供給する電力増幅器を備え、ミキサ4a、4bとしてアップコンバート型のミキサを用いれば、本実施形態で示す技術は、PLOを備えた送信器ブロックを複数有する送信装置にも適用可能である。 In the present embodiment, the configuration and method for matching the loop bandwidth of the PLO included in each receiver block have been described using the receiver as an example. However, in the configuration illustrated in FIG. 6A, the low noise amplifier 3a, Instead of 3b, if a power amplifier for supplying the RF signals output from the mixers 4a and 4b to the antennas 2a and 2b is provided, and an up-conversion mixer is used as the mixers 4a and 4b, the technique shown in this embodiment is The present invention can also be applied to a transmission apparatus having a plurality of transmitter blocks having a PLO.
 また、本実施形態では、受信装置に2つの受信器ブロック1a、1bを備えた構成例を示したが、受信器ブロックの数は、2つに限定されるものではなく、3つ以上備えていてもよい。その場合、上記と同様の手法を用いて、いずれか1つの受信器ブロックが備えるPLOのループ帯域を基準にして、他の受信器ブロックが備えるPLOのループ帯域を、該基準のPLOのループ帯域にそれぞれ一致させればよい。 Further, in the present embodiment, the configuration example in which the receiver includes the two receiver blocks 1a and 1b has been described. However, the number of receiver blocks is not limited to two, and three or more receiver blocks are provided. May be. In that case, using the same method as described above, the PLO loop band included in any one of the receiver blocks is used as a reference, and the PLO loop band included in the other receiver block is determined as the reference PLO loop band. Should be matched to each.
 本実施形態によれば、ループ帯域検出回路16により受信器ブロック1a,1bが備えるPLO6a,6bのループ帯域を一致させることができる。そのため、複数の受信器ブロックを備えた受信装置において、位相ノイズが十分に小さいLO信号源を実現できない高周波数帯においても、ベースバンド信号の信号波形のジッターを低減できる。 According to this embodiment, the loop band detection circuit 16 can match the loop bands of the PLOs 6a and 6b included in the receiver blocks 1a and 1b. Therefore, in a receiving device including a plurality of receiver blocks, jitter of the signal waveform of the baseband signal can be reduced even in a high frequency band where an LO signal source with sufficiently small phase noise cannot be realized.
 同様に、複数の送信器ブロックを備えた送信装置において、位相ノイズが十分に小さいLO信号源を実現できない高周波数帯においても、空間上で合成されるRF信号のジッターを低減できる。
(第2の実施の形態)
 図10は、第2の実施の形態の受信装置の一構成例を示すブロック図である。
Similarly, in a transmission device including a plurality of transmitter blocks, jitter of an RF signal synthesized in space can be reduced even in a high frequency band where an LO signal source with sufficiently small phase noise cannot be realized.
(Second Embodiment)
FIG. 10 is a block diagram illustrating a configuration example of the receiving apparatus according to the second embodiment.
 図10に示すように、第2の実施の形態の受信装置は、受信器ブロック1a、1bから出力されて合成されたベースバンド信号のジッター成分の電力を検出するジッター検出回路27を備え、ループ帯域検出回路16がジッター検出回路27で検出されたジッター成分の電力も考慮して、各受信器ブロックが備えるPLOのループ帯域を調整する点で第1の実施の形態で示した受信装置と異なっている。その他の構成及び動作は第1の実施の形態の受信装置と同様であるため、その説明は省略する。なお、第2の実施の形態は、ベースバンド信号のジッター成分の電力を検出する構成であるため、受信装置のみに適用可能である。 As shown in FIG. 10, the receiving apparatus according to the second embodiment includes a jitter detection circuit 27 that detects the power of the jitter component of the baseband signal that is output from the receiver blocks 1a and 1b and is synthesized. The bandwidth detection circuit 16 is different from the reception device shown in the first embodiment in that the loop bandwidth of the PLO included in each receiver block is adjusted in consideration of the power of the jitter component detected by the jitter detection circuit 27. ing. Since other configurations and operations are the same as those of the receiving apparatus according to the first embodiment, description thereof is omitted. Since the second embodiment is configured to detect the power of the jitter component of the baseband signal, it can be applied only to the receiving apparatus.
 上述したように、受信装置から出力されるベースバンド信号のジッターは、各受信器ブロックが備えるPLOのループ帯域の関係に大きく依存する。但し、ジッターをさらに低減するには各PLOで生成されるLO信号の位相ノイズをより低減する必要がある。すなわち、各PLOのループ帯域はできるだけ狭い方が好ましい。 As described above, the jitter of the baseband signal output from the receiving device largely depends on the relationship of the loop bandwidth of the PLO included in each receiver block. However, in order to further reduce the jitter, it is necessary to further reduce the phase noise of the LO signal generated by each PLO. That is, it is preferable that the loop bandwidth of each PLO is as narrow as possible.
 そこで、第2の実施の形態では、ループ帯域検出回路16により、PLO6a,6bのループ帯域が一致するように調整しつつ、ジッター検出回路27にて検出されたジッター成分の電力が最小となるように、PLO6a,6bのループ帯域をさらに調整する。 Thus, in the second embodiment, the power of the jitter component detected by the jitter detection circuit 27 is minimized while the loop band detection circuit 16 adjusts the loop bands of the PLOs 6a and 6b to coincide. Further, the loop band of the PLOs 6a and 6b is further adjusted.
 ジッター検出回路27は、例えば以下の(1)~(3)で示す手法を用いてベースバンド信号に含まれるジッター成分の電力を取得すればよい。
(1)フィルタ処理により受信装置から出力されたベースバンド信号からジッター成分を抽出し、抽出したジッター成分の電力を電力センサで測定する。
(2)FFT処理により受信装置から出力されたベースバンド信号からジッター成分を抽出し、抽出したジッター成分の電力を電力センサで測定する。
(3)受信器ブロック1aの出力信号の電力及び受信器ブロック1bの出力信号の電力を電力センサでそれぞれ測定し、それらの値を加算した第1の検出値を取得する。また、受信装置から出力されたベースバンド信号の電力、すなわち受信器ブロック1a,1bから出力され、配線路により合成された信号の電力を電力センサで測定した第2の検出値を取得する。そして、第1の検出値と第2の検出値の差を求めることでジッター成分の電力を取得する。
The jitter detection circuit 27 may acquire the power of the jitter component included in the baseband signal by using, for example, the following methods (1) to (3).
(1) A jitter component is extracted from the baseband signal output from the receiving device by filtering, and the power of the extracted jitter component is measured by a power sensor.
(2) A jitter component is extracted from the baseband signal output from the receiving device by FFT processing, and the power of the extracted jitter component is measured by a power sensor.
(3) The power of the output signal of the receiver block 1a and the power of the output signal of the receiver block 1b are respectively measured by the power sensor, and a first detection value obtained by adding these values is obtained. Further, the second detection value obtained by measuring the power of the baseband signal output from the receiving apparatus, that is, the power of the signal output from the receiver blocks 1a and 1b and synthesized by the wiring path, with the power sensor is acquired. And the electric power of a jitter component is acquired by calculating | requiring the difference of a 1st detection value and a 2nd detection value.
 ジッター検出回路27は、電力センサに加えて、上記フィルタ処理、FFT処理、演算処理等を実行する、組み合わせ回路、順序回路、DSP、CPU、FPGA、メモリ、A/D変換器、D/A変換器等を備えた周知の情報処理装置によって実現できる。 The jitter detection circuit 27 executes the above filter processing, FFT processing, arithmetic processing, and the like in addition to the power sensor. Combination circuit, sequential circuit, DSP, CPU, FPGA, memory, A / D converter, D / A conversion This can be realized by a well-known information processing apparatus equipped with a container.
 第2の実施の形態の受信装置によれば、ループ帯域検出回路16により、PLO6a,6bのループ帯域が一致するように調整しつつ、ジッター検出回路27によりベースバンド信号に含まれるジッター成分の電力を検出し、該ジッター成分の電力が最小となるように、PLO6a,6bのループ帯域を調整するため、第1の実施の形態の受信装置よりもベースバンド信号の信号波形のジッターを低減できる。 According to the receiving apparatus of the second embodiment, the jitter band 27 is adjusted by the loop band detection circuit 16 so that the loop bands of the PLOs 6a and 6b match, and the jitter component power included in the baseband signal is detected by the jitter detection circuit 27. Since the loop band of the PLOs 6a and 6b is adjusted so that the power of the jitter component is minimized, the jitter of the signal waveform of the baseband signal can be reduced as compared with the receiving apparatus of the first embodiment.
 以上、実施形態を参照して本願発明を説明したが、本願発明は上記実施形態に限定されものではない。本願発明の構成や詳細は本願発明のスコープ内で当業者が理解し得る様々な変更が可能である。 As mentioned above, although this invention was demonstrated with reference to embodiment, this invention is not limited to the said embodiment. Various modifications that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
 この出願は、2010年7月13日に出願された特願2010-158647号を基礎とする優先権を主張し、その開示の全てをここに取り込む。 This application claims priority based on Japanese Patent Application No. 2010-158647 filed on July 13, 2010, the entire disclosure of which is incorporated herein.

Claims (6)

  1.  複数のアンテナで受信したRF信号をそれぞれダウンコンバートするための局部発振信号、またはベースバンド信号をアップコンバートするための局部発振信号を生成する位相同期発振器を備えた複数の送受信器ブロックと、
     前記送受信器ブロック毎に備える前記位相同期発振器のループ帯域の差を検出し、前記位相同期発振器毎のループ帯域を一致させるための制御信号を生成するループ帯域検出回路と、
    を有する送受信装置。
    A plurality of transceiver blocks including a phase-locked oscillator for generating a local oscillation signal for down-converting RF signals received by a plurality of antennas or a local oscillation signal for up-converting a baseband signal, and
    A loop band detection circuit that detects a difference in loop band of the phase-locked oscillator provided for each transceiver block and generates a control signal for matching the loop band of the phase-locked oscillator; and
    A transmission / reception device having
  2.  前記ループ帯域検出回路は、
     2つの前記位相同期発振器で生成された局部発振信号を混合するミキサ回路と、
     前記ミキサ回路から出力される信号の電力値を検出する電力センサと、
     前記電力センサで検出された電力値が最小となるように前記制御信号を生成する制御部と、
    を有する請求項1記載の送受信装置。
    The loop band detection circuit includes:
    A mixer circuit for mixing local oscillation signals generated by the two phase-locked oscillators;
    A power sensor for detecting a power value of a signal output from the mixer circuit;
    A control unit that generates the control signal so that the power value detected by the power sensor is minimized;
    The transmitting / receiving apparatus according to claim 1.
  3.  前記位相同期発振器は、
     電圧制御発振器、位相比較回路、チャージポンプ及びループフィルタを備えたPLL回路であり、
     前記ループ帯域検出回路は、
     前記チャージポンプから出力する電流量を前記制御信号により変化させることで前記位相同期発振器毎のループ帯域を一致させる請求項1または2記載の送受信装置。
    The phase-locked oscillator is
    A PLL circuit including a voltage controlled oscillator, a phase comparison circuit, a charge pump and a loop filter,
    The loop band detection circuit includes:
    The transmission / reception apparatus according to claim 1 or 2, wherein a loop band for each phase-locked oscillator is matched by changing an amount of current output from the charge pump by the control signal.
  4.  前記位相同期発振器は、
     電圧制御発振器、位相比較回路、チャージポンプ及びループフィルタを備えたPLL回路であり、
     前記ループフィルタは、
     抵抗値が可変の抵抗素子または容量値が可変の容量素子を備え、
     前記ループ帯域検出回路は、
     前記抵抗値または容量値を前記制御信号により変化させることで前記位相同期発振器毎のループ帯域を一致させる請求項1から3のいずれか1項記載の送受信装置。
    The phase-locked oscillator is
    A PLL circuit including a voltage controlled oscillator, a phase comparison circuit, a charge pump and a loop filter,
    The loop filter is
    A resistance element having a variable resistance value or a capacitance element having a variable capacitance value is provided.
    The loop band detection circuit includes:
    4. The transmission / reception apparatus according to claim 1, wherein the loop band of each phase-locked oscillator is matched by changing the resistance value or the capacitance value according to the control signal. 5.
  5.  前記位相同期発振器は、
     電圧制御発振器、位相比較回路、チャージポンプ及びループフィルタを備えたPLL回路であり、
     前記位相比較回路とチャージポンプの接続ノードに接続されたスイッチを備え、
     前記ループ帯域検出回路は、
     前記ループ帯域の調整時、前記スイッチを導通させ、
     少なくとも1つの前記位相同期発振器のループ帯域の周波数よりも高い周波数のパイロット信号を、前記スイッチを介して前記接続ノードに供給する請求項1から4のいずれか1項記載の送受信装置。
    The phase-locked oscillator is
    A PLL circuit including a voltage controlled oscillator, a phase comparison circuit, a charge pump and a loop filter,
    A switch connected to a connection node of the phase comparison circuit and the charge pump;
    The loop band detection circuit includes:
    When adjusting the loop band, the switch is turned on,
    The transmission / reception apparatus according to any one of claims 1 to 4, wherein a pilot signal having a frequency higher than a frequency of a loop band of at least one of the phase-locked oscillators is supplied to the connection node via the switch.
  6.  複数のアンテナで受信したRF信号をそれぞれダウンコンバートするための局部発振信号を生成する位相同期発振器を備えた複数の受信器ブロックと、
     前記受信器ブロックの出力信号を合成した信号であるベースバンド信号に含まれるジッター成分の電力を検出するジッター検出回路と、
     前記受信器ブロック毎に備える前記位相同期発振器のループ帯域の差を検出し、前記位相同期発振器毎のループ帯域を一致させると共に、前記ジッター検出回路で検出されたジッター成分の電力値が最小となるように制御信号を生成するループ帯域検出回路と、
    を有する受信装置。
    A plurality of receiver blocks each including a phase-locked oscillator that generates a local oscillation signal for down-converting RF signals received by a plurality of antennas;
    A jitter detection circuit that detects power of a jitter component included in a baseband signal that is a signal obtained by synthesizing an output signal of the receiver block;
    The difference between the loop bands of the phase-locked oscillators provided for each receiver block is detected, the loop bands of the phase-locked oscillators are matched, and the power value of the jitter component detected by the jitter detection circuit is minimized. A loop band detection circuit for generating a control signal,
    A receiving apparatus.
PCT/JP2011/060030 2010-07-13 2011-04-25 Transmitter-receiver apparatus WO2012008197A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10771030B2 (en) 2018-08-24 2020-09-08 Analog Devices International Unlimited Company Phase-locked loop with adjustable bandwidth

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0730318A (en) * 1993-07-13 1995-01-31 Sumitomo Electric Ind Ltd In-phase synthetic device and antenna device using the same
JPH0846662A (en) * 1994-07-27 1996-02-16 Fujitsu Ltd Synchronization detection system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0730318A (en) * 1993-07-13 1995-01-31 Sumitomo Electric Ind Ltd In-phase synthetic device and antenna device using the same
JPH0846662A (en) * 1994-07-27 1996-02-16 Fujitsu Ltd Synchronization detection system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10771030B2 (en) 2018-08-24 2020-09-08 Analog Devices International Unlimited Company Phase-locked loop with adjustable bandwidth

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