WO2011108136A1 - Signal transmission scheme in control/monitor-signal transmission system - Google Patents

Signal transmission scheme in control/monitor-signal transmission system Download PDF

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Publication number
WO2011108136A1
WO2011108136A1 PCT/JP2010/066647 JP2010066647W WO2011108136A1 WO 2011108136 A1 WO2011108136 A1 WO 2011108136A1 JP 2010066647 W JP2010066647 W JP 2010066647W WO 2011108136 A1 WO2011108136 A1 WO 2011108136A1
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data
signal
control
transmission
speed
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PCT/JP2010/066647
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French (fr)
Japanese (ja)
Inventor
齋藤善胤
錦戸憲治
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株式会社エニイワイヤ
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Priority to JP2011506510A priority Critical patent/JP4832612B2/en
Publication of WO2011108136A1 publication Critical patent/WO2011108136A1/en

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    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C19/00—Electric signal transmission systems

Definitions

  • the present invention includes a single control unit and a plurality of controlled devices, a master station is connected to the control unit and the data signal line, and a plurality of slave stations corresponding to the plurality of controlled devices have a common data signal line
  • the present invention also relates to a signal transmission method suitable for a control / monitor signal transmission system configured to be connected to a corresponding controlled device.
  • the number of wires Reduction of wiring leads to a reduction in wiring space, a reduction in wiring man-hours, a reduction in device manufacturing time, or downsizing of equipment, thereby making it possible to improve equipment reliability and reduce costs.
  • a technique for increasing the signal transmission speed between the control unit and the controlled device is disclosed in Japanese Patent Laid-Open No. 2002-271878.
  • a master station is connected to a control unit and a common data signal line, and a plurality of slave stations corresponding to a plurality of controlled devices are connected to a common data signal line and a corresponding data signal line.
  • the control signal from the control unit to the controlled unit is a binary signal with a predetermined duty ratio (the level of the power supply voltage and other levels), and the monitoring signal from the sensor unit to the control unit is the presence or absence of a current signal. As detected at the rise of the power supply voltage level.
  • the monitoring signal from the sensor unit to the control unit can be superimposed on the clock signal including the power supply. Therefore, bidirectional high-speed signal transmission between the control unit, the controlled unit, and the sensor unit can be realized, and the control signal and the monitoring signal can be output to a common data signal line, and both can be simultaneously transmitted. Can be transmitted in the same direction. As a result, it is not necessary to separately provide a period for transmitting the control signal or the monitoring signal in the common data signal line, and the signal transmission speed (rate) can be increased to twice the conventional speed.
  • each slave station extracts a control signal for its own station by sequentially counting transmission clocks starting from the end of the start signal as address data. At the same time, the timing to superimpose the monitoring signal from the own station is grasped. Therefore, there is no need to exchange commands such as data transmission / reception confirmation between the master station and the slave station, and the signal transmission speed can be increased under reduced wiring.
  • the present invention provides a control / monitor signal transmission system including a single control unit and a plurality of controlled devices, and easily adjusts the transmission clock speed according to the installation status of the system without taking time and effort. It is an object of the present invention to provide a signal transmission method that enables this.
  • the signal transmission method includes a control unit including a control unit and a master station connected to a common data signal line, and a plurality of slave stations connected to the common data signal line and a corresponding controlled device. It is used in a supervisory signal transmission system.
  • the controlled device includes a controlled unit that operates in accordance with an output instruction from the control unit and / or a sensor unit that transmits input information to the control unit.
  • the master station has timing generating means for generating a predetermined timing signal synchronized with a transmission clock having a predetermined cycle.
  • the master station outputs a series of pulse signals as a control data signal to the data signal line according to the value of the control data from the control unit under the control of the timing signal, and the timing Under the control of the signal, the data value of the monitoring data signal superimposed on the series of pulse signals is extracted for each cycle of the transmission clock, and this is transferred to the control unit.
  • Each of the plurality of slave stations extracts a value of each data of the control data signal for each period of the transmission clock under the control of the timing signal, and the local station in the value of each data According to the value of the monitoring data of the corresponding sensor unit for each cycle of the transmission clock signal under the control of the timing signal, and / or The monitoring data signal is superimposed on the series of pulse signals.
  • Each of the slave stations measures a time length of a start signal having a predetermined pulse width with reference to the length of one cycle of the transmission clock, and the time length is determined by a plurality of predetermined types. If the predetermined time length value obtained based on the transmission clock speed is within a predetermined range, the transmission clock speed corresponding to the predetermined time length value is set as the transmission speed of the series of pulse signals.
  • the case where the predetermined time length value is within the predetermined range is, for example, the case where the predetermined time length value is 4000 ⁇ s and the measured time length is in the range of 3000 to 5000 ⁇ s.
  • the transmission clock speed can be increased when the number of slave stations is small and the transmission distance is shortened. Even when the number increases and the transmission distance becomes long, the speed must be lowered in order to realize stable transmission. Therefore, an appropriate speed corresponding to the number of slave stations is determined in advance. That is, the transmission clock speed is predetermined based on the period of the timing signal.
  • the transmission clock speed in a control / monitoring signal transmission system in practical use is 40 kHz (one cycle of the transmission clock is 25 ⁇ s) if the number of slave stations is 64 or less, and 100 or less. There are examples of 20 kHz (one cycle is 50 ⁇ s) and 128 kHz or less, such as 10 kHz (one cycle is 100 ⁇ s).
  • the pulse width of the start signal is determined in advance based on the length of one cycle of the transmission clock. For example, if the length of one cycle of the transmission clock is Tc, the pulse width of the start signal is five times (5 Tc).
  • Each of the slave stations may start from the end of the start signal and synchronize with the timing signal corresponding to the transmission clock speed at the local station.
  • the series of pulse-like signals may be provided with a management data area including response data indicating a response state of the slave station, which is different from a control / monitor data area constituted by the control data and the monitor data. .
  • Appropriateness of the number of slave stations connected to the common data signal line is determined with respect to a predetermined number corresponding to the transmission clock speed and / or the total extension of the common data signal line. It is good.
  • the master station compared the data obtained from the slave station when setting the upper speed with the data obtained from the slave station when setting the previous lower speed, and matched In such a case, a higher speed may be set, and if they do not match, the lower speed may be set as a stable speed.
  • each slave station recognizes the speed actually used from a plurality of transmission clock speeds predetermined in the control / monitor signal transmission system to be used. And the recognized transmission rate can be set. That is, to recognize the transmission clock speed, the time length of the start signal is measured, and the time length is compared with a predetermined time length value obtained based on a plurality of predetermined transmission clock speeds. When the time length is within a predetermined range with respect to the predetermined time length value, the transmission clock speed corresponding to the predetermined time length value is set as the transmission speed. Therefore, speed adjustment according to the installation status of the system can be easily performed without taking time and effort.
  • the number of slave stations connected to the common data signal line is appropriate for a predetermined number corresponding to the transmission clock speed and / or the total extension of the common data signal line is determined. For example, it can be seen that more than the appropriate number of slave stations were connected to the transmission clock speed to be set, so a warning is issued in such a case, and it is inappropriate for the number of connected slave stations. Can be prevented in advance.
  • the master station compares the data obtained from the slave station when setting the upper speed with the data obtained from the slave station when setting the previous lower speed, the master station matches If it is set to a higher speed, and if it does not match, the lower speed is set to a stable speed, it is possible to automatically set the stable and fastest transmission clock speed suitable for the installation situation of the system. It becomes.
  • the upper speed means a faster speed
  • the lower speed means a slower speed.
  • the data compared in the master station may be, for example, the response data or actual data (monitoring data) itself.
  • the start signal of the transmission signal exchanged between the master station and the slave station and the portion immediately after it, the timing signal generated at the master station, and the pseudo signal generated at the slave station The timing signals are shown in comparison, (a) is a time chart when the transmission speed is high, and (b) is a time chart when the transmission speed is low.
  • 1 is a system configuration diagram showing a schematic configuration of a control / monitor signal transmission system employing the same signal transmission method. It is a system configuration
  • FIG. 5 is a time chart showing a comparison between a part of a management / monitoring data area in a transmission signal exchanged between a master station and a slave station and a pseudo timing signal generated in the slave station. It is a schematic diagram of an address table stored in the master station. It is a time chart figure of the signal transmitted / received between the master station and the slave station in still another embodiment that adopts high and low voltage levels as an expression format of monitoring data.
  • the control / monitor signal transmission system includes a master station 6 connected to the control unit 1 and common data signal lines DP and DN (hereinafter referred to as data signal lines DP and DN), A plurality of slave stations 2 connected to the data signal lines DP and DN and the corresponding controlled devices 5 are provided.
  • the controlled device 5 includes a controlled unit 51 that operates according to an output instruction from the control unit 1 or a sensor unit 52 that transmits input information to the control unit 1.
  • the controlled device 5 may include both the controlled unit 51 and the sensor unit 52.
  • the controlled unit 51 includes various components constituting the controlled device 5, such as an actuator, a (stepping) motor, a solenoid, a solenoid valve, a relay, a thyristor, and a lamp.
  • the sensor unit 52 is selected according to the corresponding controlled unit 51, and includes, for example, a reed switch, a micro switch, a push button switch, an optical sensor, and the like, and outputs an on / off state (binary signal).
  • the control unit 1 is, for example, a programmable controller, a computer or the like, and includes an output unit 11 that sends out control data 13 and initial setting (initialization) signal data 14, and sensor data (monitoring data signal data) from the controlled device 5 side. 15 and an input unit 12 for receiving response data 16. These output unit 11 and input unit 12 are connected to the master station 6.
  • the master station 6 includes an output data section 61, an IDX address data section 62, a timing generation section 63, a master station output section 64, a master station input section 65, an input data section 66, and response data extraction means 78. And response data detection means 79.
  • the output data unit 61 delivers the parallel data received as the control data 13 from the output unit 11 of the control unit 1 to the master station output unit 64. This control data 13 is used to instruct the controlled unit 51 to operate.
  • the IDX address data unit 62 stores IDX address data in an IDX address table 68 provided therein.
  • the IDX address data is data for specifying the slave station 2 whose response status is to be confirmed, and the address of the slave station 2 (address assigned for each cycle of a transmission clock signal described later) is used.
  • FIG. 9 shows an example of the IDX address table. These IDX address data are delivered to the control data generating means 73 and the response data detecting means 79.
  • the IDX address table 68 is generated in response to the initial setting signal data 14, and the generation procedure will be described later.
  • the timing generation unit 63 includes an oscillation circuit (OSC) 71 and timing generation means 72. Based on the OSC 71, the timing generation means 72 generates a timing clock (corresponding to the timing signal of the present invention) of this transmission system and generates a parent. Delivered to the station output unit 64.
  • the master station output unit 64 includes a control data generation unit 73 and a line driver 74.
  • the control data generation unit 73 receives a series of pulses based on the data received from the output data unit 61 and the timing clock received from the timing generation unit 63.
  • a control data signal which is a state signal is generated and sent to the data signal lines DP and DN via the line driver 74.
  • control data signal transmitted to the data signal lines DP and DN corresponds to a series of pulse signals in the present invention, but hereinafter, the control data signal flowing through the data signal lines DP and DN is transmitted. This is called a clock signal.
  • the line driver 74 is also supplied with power from the DC power source 75 and supplies circuit power for the slave station 2 via the common data signal lines DP and DN together with the transmission clock signal.
  • the master station input unit 65 includes a monitoring signal detection unit 76 and a monitoring data extraction unit 77, and sends input data to the input data unit 66 and the response data extraction unit 78.
  • the monitoring signal detection means 76 detects the monitoring data signal sent from the slave station 2 via the common data signal lines DP and DN and the response data signal.
  • the monitoring data signal transmitted from the slave station 2 is a signal indicating whether or not the detection target in the sensor unit 52 is detected as a current level, and is received sequentially from each slave station 2 after the start signal is transmitted. It has become.
  • the response data signal is a response signal of the slave station 2 with respect to a response confirmation described later expressed as a current level.
  • the monitoring data of the monitoring data signal and the response data of the response data signal are extracted by the monitoring data extracting unit 77 in synchronization with the signal of the timing generating unit 72, and the input data unit 66 and the response data extracting unit are connected as serial input data. 78.
  • response data extraction means 78 response data is extracted and delivered to response data detection means 79.
  • the response data detection unit 79 determines whether or not there is a response from the slave station 2 to be checked based on the response data delivered from the response data extraction unit 78 and the IDX address data delivered from the IDX address data unit 62. The result is delivered to the input data unit 66.
  • the IDX address table 68 is generated (when the initial setting signal data 14 is received), the presence / absence of a response is returned to the IDX address data unit 62.
  • the input data unit 66 that has received serial input data from the master station input unit 65 and the response data detection means 79 converts the serial input data into parallel data, and the sensor data 15 is the input unit of the control unit 1. Deliver to 12.
  • the master station 6 also has a transmission bleeder current circuit 67 as a transmission interface circuit.
  • the transmission bleeder current circuit 67 is connected to the line driver 74 in the master station output unit 64 and stabilizes the transmission path between the data signal lines DP and DN.
  • the slave station 2 includes a pseudo timing generation unit 20 and a slave station output unit 30 or a slave station input unit 40. However, when the corresponding controlled device 5 has both the controlled unit 51 and the sensor unit 52, the slave station 2 includes both the slave station output unit 30 and the slave station input unit 40. Each of the slave station output unit 30 and the slave station input unit 40 is connected to the data signal lines DP and DN. Then, the slave station input unit 40 sends the signal received from the sensor unit 52 to the data signal lines DP and DN as a monitoring data signal. On the other hand, the slave station output unit 40 extracts necessary information from the transmission clock signal transmitted on the data signal lines DP and DN, and operates the controlled unit 51.
  • the pseudo timing generation unit 20 includes an oscillation circuit (OSC) (not shown) and timing generation means, and is synchronized with the timing clock generated by the timing generation unit 63 based on the OSC.
  • a pseudo timing signal is generated and delivered to the slave station output unit 30 and the slave station input unit 40.
  • the slave station output unit 30 includes an address setting unit 31, an address extraction unit 32, a slave station data output unit 33, an output data unit 34, a speed determination unit 35, and a control data signal extraction unit 36. ing. Further, a connection terminal outN is provided, and the controlled unit 51 is connected thereto.
  • the slave station output unit 30 is equipped with a microcomputer control unit (MCU) 39, and includes an address setting unit 31, an address extraction unit 32, a slave station data output unit 33, an output data unit 34, and The processing in each of the speed determination means 35 is performed by the MCU 39. Calculations and storages required for each process are executed using the CPU, RAM, and ROM provided in the MCU 39. However, in FIG. 4, the relationship between the CPU, RAM, and ROM in each process is omitted for convenience of explanation.
  • MCU microcomputer control unit
  • the transmission clock signals of the data signal lines DP and DN are delivered to the address setting means 31 and the speed determination means 35 through the control data signal extraction means 36.
  • the address setting unit 31 recognizes an address value set by an address setting switch (not shown), and delivers the address and a transmission clock signal to the address extraction unit 32.
  • the address setting is not limited to a mechanical method using a switch or the like. For example, a preset value may be transmitted from the master station 6 and stored.
  • Speed determining means 35 measures the time length of the start signal and compares the time length with a predetermined time length value stored in the ROM. When the time length is within a predetermined range with respect to the predetermined time length value, the transmission clock speed corresponding to the predetermined time length value is determined as the transmission speed with the master station 6, and the determination value is It is delivered to the pseudo timing generator 20 at the end timing of the start signal. The procedure for determining the transmission rate will be described later.
  • the pseudo timing generation section 20 uses the end of the start signal as a starting point, and generates a pseudo timing signal synchronized with the timing signal corresponding to the transmission clock speed with the master station 6. Hand over to 32.
  • the address extracting means 32 obtains the timing for extracting the data of the own station based on the pseudo timing signal, extracts the data of the own station from the transmission clock signal, and delivers the data to the slave station data output means 33.
  • the data delivered to the slave station data output means 33 is further delivered to the output data unit 34, and the controlled unit 51 operates based on the data.
  • the slave station output unit 30 does not have a dedicated power supply, it is used inside the slave station output unit 30 from a transmission clock signal on which power is superimposed supplied from the common data signal lines DP and DN.
  • the power supply voltage is generated by a diode, a capacitor, and a three-terminal power supply element.
  • the slave station input unit 40 includes an address setting unit 41, an address extraction unit 42, a slave station data input unit 43, an input data unit 44, a speed determination unit 45, and a control data signal extraction unit 46. ing. Moreover, the connection terminal inN is provided and the sensor 52 is connected there. Further, similarly to the slave station output section 30, the slave station input section 40 is also equipped with a microcomputer control unit (MCU) 49, and includes an address setting means 41, an address extraction means 42, a slave station data input means. 43, the input data unit 44, and the speed determination means 45 are each performed by the MCU 49.
  • MCU microcomputer control unit
  • the address setting means 41, the address extracting means 42, the speed determining means 45, and the control data signal extracting means 46 are the address setting means 31, the address extracting means 32, the speed determining means 35, and the control data of the slave station output unit 30, respectively. Since the configuration is almost the same as that of the signal extraction unit 36 and operates almost the same, the description thereof is omitted. Also, in FIG. 6, as in FIG. 5, the relationship between the CPU, RAM, and ROM in each process is omitted for convenience of explanation.
  • the input data unit 44 delivers one or a plurality of (bit) data signals input from the sensor unit 52 to the slave station data input means 43.
  • the data delivered here is held in the slave station data input means 43.
  • the slave station data input means 43 when the timing for superimposing the data of its own station on the transmission clock signal is input from the address extraction means 42, the output of the Iout0 signal is “ “on” or “off”.
  • the Iout0 signal is “on”
  • the transistor 47 is “on”
  • the monitoring data signal is output to the data signal lines DP and DN.
  • the slave station data input means 43 performs parallel / serial conversion on the monitoring data signal, and the monitoring data signal to be output becomes a serial signal.
  • the data value of the monitoring data signal is expressed as a current level in the first half (period of low potential level) of one cycle of the transmission clock signal, as described above.
  • the slave station data input means 43 also sets the output of the Iout0 signal to “on” when the later-described management data area in the transmission clock signal is allocated to the own station, and sends response data to the data signal lines DP and DN. Output a signal.
  • the slave station input unit 40 also uses a diode, a capacitor, and a three-terminal power element to convert the power supply voltage used in the slave station input unit 40 from the transmission clock signal superimposed with the power supply. Producing.
  • the data value of the transmission clock signal sent from the master station output unit 64 to the data signal lines DP and DN is expressed by the width of the voltage level high period (voltage pulse width) in one cycle of the transmission clock.
  • the second half of one cycle is set to a high potential level (+24 V in this embodiment) and the first half is set to a low potential level (+19 V in this embodiment).
  • the width of the voltage pulse is expanded as shown by a broken line in FIG. 1 or FIG. 8 according to the value of each data of the control data 13 input from the control unit 1.
  • An address (indicated as ADR0, ADR1, ADR2, etc.) is assigned to each cycle of the transmission clock signal.
  • FIG. 6 shows an example of the transmission clock signal.
  • the control data values (output data) at the address numbers 0, 1, 2, and 3 represent “0", “0", “1”, and “0”, respectively.
  • the value (input data) of the monitoring data is expressed as a current level in the first half (period of low potential level) of one cycle of the transmission clock signal.
  • a current for example, 30 mA
  • Ith a current
  • bleeder current for example, 10 mA
  • a start signal (StartBit) indicating the start of a series of pulse signals is formed in the transmission clock signal as shown in FIG. 1 or FIG.
  • the start signal is a signal having the same potential level as the high potential level of the transmission clock signal and longer than one cycle of the transmission clock signal.
  • the transmission clock signal is 5 times (5 Tc) of one cycle Tc.
  • FIG. 7 schematically shows a transmission procedure in this control / monitor signal transmission system.
  • a control / monitoring data area composed of control data out0 to outn and monitoring data in0 to inn follows the start signal ST, and then management data on which response data CDT is superimposed.
  • the area has continued.
  • the slave station 2 obtains the timing for extracting the data of the local station based on the pseudo transmission clock signal generated by the local station, and the control data to be received by the local station from the control / monitor data area. It is intended to capture.
  • the timing at which the pulse signal rises coincides with the timing of the change of the pulse signal in the transmission clock signal.
  • the timing P1, P2, and P3 at which each cycle of the transmission clock signal starts is generated every time the pulse of the pseudo timing signal rises four times, starting from P0 that is the beginning of the transmission clock signal.
  • the timings P01 and P02 in the first cycle are the second and third rises of the pulse, and the timings P11 and P12 in the next cycle are coincident with the timing P1 at which the cycle starts.
  • the slave station 2 determines that the address corresponding to the local station (timing to superimpose the local station data) has arrived by counting the rising edge of the pulse of the pseudo timing signal, the slave station 2 In addition to being superimposed on the low potential level that is the first half of one cycle of the transmission clock, the voltage of the transmission clock signal should be detected in response to the rise of the second pulse and the third pulse, and the local station should receive it.
  • the control data value is obtained.
  • the control data is “1”, and the voltage of the transmission clock signal corresponding to the rising edge of the second pulse is 3 If the voltage of the transmission clock signal corresponding to the rise of the second pulse is high, it is determined that the control data is “0”, and processing corresponding to each is performed.
  • the slave station 2 recognizes the transmission clock speed by the speed judgment means 35 and 45 and adjusts it.
  • the time length of the start signal is measured, and the time length is compared with a predetermined time length value obtained based on a plurality of predetermined transmission clock speeds.
  • the transmission clock speed corresponding to the predetermined time length value is the actual transmission speed.
  • four cycles of the timing signal (or pseudo transmission clock) are defined as one cycle of the transmission clock signal, and the timing signal has a short cycle (as shown in FIG.
  • the start signal has a time length of 2000 ⁇ s. When it becomes 4000 ⁇ s, the speed is low.
  • the time length of the start signal is affected by the wiring laying condition, etc., it may not exactly match the predetermined time length value obtained based on the transmission clock speed. Therefore, it is preferable to give a certain range to the predetermined time length value. For example, when the predetermined time length value is 4000 ⁇ s, if the measured time length is 3000 to 5000 ⁇ s, it may be determined that the speed corresponding to the predetermined time length value is set.
  • the slave station 2 outputs a response data signal when the management data area in the transmission clock signal is allocated to the local station.
  • the management data area is assigned to each slave station 2 based on the IDX address table 68.
  • the master station 6 first selects index address data of table number 0 (# ad0 in the embodiment of FIG. 9) from the index address data group stored in the IDX address table 68, and transmits this. .
  • index address data corresponding to each table number is sequentially transmitted for each series of data groups (one frame transmission cycle) of control data, monitoring data, and management data, which are started from the start signal.
  • Each slave station 2 sends response data CDT when the address assigned to the local station matches the data value of the index address data IDX.
  • the master station 6 stores the data group of the response data CDT, and each data of the data group obtained when the upper speed is set is obtained when the lower speed is set before that. Compare with each data in the data group. If they match completely, it is determined as “stable transmission rate”, and if they do not match, it is determined as “unstable transmission rate”. When it is determined as “stable speed”, the higher speed is set, and the same processing is repeated. When it is determined as “unstable speed”, the previous lower speed is fixed as the stable speed. That is, by sequentially increasing the set speed until it is determined as “unstable speed”, a stable and fastest speed setting is automatically made suitable for the installation status of the system.
  • the high speed is automatically set as the stable transmission clock speed. Will be fixed.
  • the data to be compared when determining “stable transmission rate” or “unstable transmission rate” is not limited to the response data CDT, and may be actual data (monitoring data) itself. However, when actual data is used, a predetermined data value is input in a predetermined transmission cycle, and a determination is made in the predetermined transmission cycle.
  • the IDX address table 68 is created by the initial setting command from the control unit 1. Receiving the initial setting signal 14 indicating the initial setting command, the master station 6 increments the index address data IDX of the management data area in the transmission clock signal by one until reaching the maximum address value every frame transmission cycle. . Each slave station 2 returns response data CDT when the address assigned to the local station matches the data value of the index address data IDX. When there is response data CDT, the address is stored as index address data in an internal memory provided in the index address detector 62. At this time, the transmission speed is selected as a low speed that is surely connected, and therefore determination of whether or not the speed is appropriate is not performed.
  • the number of index address data is the number of slave stations 2 connected in this control / monitor signal transmission system.
  • the control unit 1 stores a predetermined number of appropriate connections of the slave stations 2 in consideration of the total extension of the common data signal line for each of a plurality of predetermined transmission clock speeds. Yes.
  • the number of index address data that is, the number of slave stations 2 exceeds the appropriate number of connections corresponding to the speed to be executed, a warning signal is sent to the control unit 1. Therefore, it is possible to prevent in advance that an inappropriate speed is executed for the number of connected slave stations 2.
  • the width of the voltage pulse is adopted as the expression format of the control data, and the presence / absence of current is adopted as the expression format of the monitoring data.
  • the expression format is not limited, and the voltage pulse level, current pulse Other expression formats such as the width or level may be adopted as appropriate.
  • FIG. 10 shows an embodiment in which a voltage pulse level is adopted as a representation format of monitoring data.
  • the processing timing of the slave station 2 is obtained using a pseudo transmission clock signal generated by the own station, but there is no limitation on the method of obtaining the processing timing, for example, a method of using a timer It may be.

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Abstract

Provided is a signal transmission scheme with which the rate of a transmission clock can be adjusted easily without requiring time and effort in a control/monitor-signal transmission system, which includes a single control unit and a plurality of controlled devices, in accordance with the conditions under which the system is installed. In the transmission of control data from the control unit and of monitor data from a sensor unit, each slave station: measures the length of time of a start signal, which has a predefined pulse width, on the basis of the length of a single cycle of the transmission clock; compares said length of time with predetermined time-length values which are obtained on the basis of a plurality of predefined transmission clock rates; and sets the transmission clock rate corresponding to the predetermined time-length value that matches said length of time as the transmission rate for transmitting a series of pulse signals.

Description

制御・監視信号伝送システムにおける信号伝送方式Signal transmission method in control / monitor signal transmission system
　本発明は、単一の制御部と複数の被制御装置を備え、制御部及びデータ信号線に親局が接続され、複数の被制御装置に対応する複数の子局が、共通のデータ信号線及び対応する被制御装置に接続される構成の制御・監視信号伝送システムに好適な、信号伝送方式に関する。 The present invention includes a single control unit and a plurality of controlled devices, a master station is connected to the control unit and the data signal line, and a plurality of slave stations corresponding to the plurality of controlled devices have a common data signal line The present invention also relates to a signal transmission method suitable for a control / monitor signal transmission system configured to be connected to a corresponding controlled device.
　単一の制御部と複数の被制御装置（制御部の指示に応じて動作する被制御部と制御部に情報を送信するセンサ部とで構成されるもの）を備える制御システムにおいて、配線の数を減らすことは、配線スペースの低減、配線工数の低減、装置製作工期の低減、或いは設備の小型化に繋がり、これによって、設備の信頼性向上、コスト低減などを図ることができる。 In a control system having a single control unit and a plurality of controlled devices (consisting of a controlled unit that operates in response to an instruction from the control unit and a sensor unit that transmits information to the control unit), the number of wires Reduction of wiring leads to a reduction in wiring space, a reduction in wiring man-hours, a reduction in device manufacturing time, or downsizing of equipment, thereby making it possible to improve equipment reliability and reduce costs.
　そこで、上記のような制御システムにおいて配線の数を減らす試みがなされている。具体的には、電源を含むクロック信号の線路に、各クロックに対応する１つ（１ビット）の制御信号やセンサ信号（被制御装置からの入力信号）を重畳する信号伝送方式を採用することで、制御部と被制御装置の間の省配線が実現されている。 Therefore, attempts have been made to reduce the number of wires in the control system as described above. Specifically, adopt a signal transmission method in which one (1 bit) control signal or sensor signal (input signal from the controlled device) corresponding to each clock is superimposed on the clock signal line including the power supply. Thus, wiring saving between the control unit and the controlled device is realized.
　また、この信号伝送方式において、制御部と被制御装置との間における信号伝送速度を高めるための手法が特開２００２－２７１８７８号公報に開示されている。ここで開示されている制御・監視信号伝送システムは、制御部及び共通のデータ信号線に親局が接続され、複数の被制御装置に対応する複数の子局が、共通のデータ信号線及び対応する被制御装置に接続される構成となる。そして、制御部から被制御部への制御信号を所定のデューティ比の２値（電源電圧のレベルとこれ以外のレベル）信号とするとともに、センサ部から制御部への監視信号を電流信号の有無として電源電圧のレベルの立ち上がり時に検出する。これにより、電源を含むクロック信号に、制御部から被制御部への制御信号に加えて、センサ部から制御部への監視信号をも重畳することができる。従って、制御部と被制御部およびセンサ部間の双方向の高速な信号伝送を実現することができると共に、制御信号と監視信号とを共通のデータ信号線に出力し、かつ、これらを同時に双方向に伝送することができる。この結果、共通のデータ信号線において制御信号又は監視信号を伝送する期間を別々に設ける必要をなくすことができ、信号伝送の速度（レート）を従来の２倍に高速化することができる。 Further, in this signal transmission method, a technique for increasing the signal transmission speed between the control unit and the controlled device is disclosed in Japanese Patent Laid-Open No. 2002-271878. In the control / monitor signal transmission system disclosed herein, a master station is connected to a control unit and a common data signal line, and a plurality of slave stations corresponding to a plurality of controlled devices are connected to a common data signal line and a corresponding data signal line. Connected to the controlled device. The control signal from the control unit to the controlled unit is a binary signal with a predetermined duty ratio (the level of the power supply voltage and other levels), and the monitoring signal from the sensor unit to the control unit is the presence or absence of a current signal. As detected at the rise of the power supply voltage level. Thereby, in addition to the control signal from the control unit to the controlled unit, the monitoring signal from the sensor unit to the control unit can be superimposed on the clock signal including the power supply. Therefore, bidirectional high-speed signal transmission between the control unit, the controlled unit, and the sensor unit can be realized, and the control signal and the monitoring signal can be output to a common data signal line, and both can be simultaneously transmitted. Can be transmitted in the same direction. As a result, it is not necessary to separately provide a period for transmitting the control signal or the monitoring signal in the common data signal line, and the signal transmission speed (rate) can be increased to twice the conventional speed.
特開２００２－２７１８７８号公報JP 2002-271878 A
　上記の制御・監視信号伝送システムで採用されている伝送方式において、各子局は、スタート信号の終了を起点とする伝送クロックを、アドレスデータとして順次カウントすることにより自局に対する制御信号を抽出するとともに、自局からの監視信号を重畳すべきタイミングを把握するものとなっている。そのため、親局と子局との間で、データ送受信の確認等のコマンドを授受する必要が無く、省配線下における信号伝送速度の高速化が可能となっている。 In the transmission method employed in the control / monitor signal transmission system described above, each slave station extracts a control signal for its own station by sequentially counting transmission clocks starting from the end of the start signal as address data. At the same time, the timing to superimpose the monitoring signal from the own station is grasped. Therefore, there is no need to exchange commands such as data transmission / reception confirmation between the master station and the slave station, and the signal transmission speed can be increased under reduced wiring.
　ところが、伝送クロックが各子局において正しく認識されるためには、伝送距離や接続されている子局の数などの状況に応じて伝送クロック速度を適切に調整することが必要となっていた。そして、伝送クロック速度は、これまで、伝送距離や子局の台数を考慮して人の判断で行い、さらにその速度調整のための設定も、複数の子局の全てについて手作業で行う必要があったため、時間や手間がかかるという問題があった。 However, in order for each slave station to correctly recognize the transmission clock, it is necessary to appropriately adjust the transmission clock speed according to the situation such as the transmission distance and the number of slave stations connected. The transmission clock speed has so far been determined by human judgment in consideration of the transmission distance and the number of slave stations, and the speed adjustment must be manually set for all of the slave stations. Therefore, there was a problem that it took time and labor.
　そこで本発明は、単一の制御部と複数の被制御装置を備えた制御・監視信号伝送システムにおいて、システムの設置状況に応じた伝送クロック速度調整を、時間や手間をかけることなく容易に行うことを可能とする信号伝送方式を提供することを目的とする。 Accordingly, the present invention provides a control / monitor signal transmission system including a single control unit and a plurality of controlled devices, and easily adjusts the transmission clock speed according to the installation status of the system without taking time and effort. It is an object of the present invention to provide a signal transmission method that enables this.
　本発明に係る信号伝送方式は、制御部および共通のデータ信号線に接続された親局と、前記共通のデータ信号線および対応する被制御装置に接続された複数の子局を備えた制御・監視信号伝送システムにおいて使用されるものである。前記被制御装置は、前記制御部の出力指示に応じて動作する被制御部および／または前記制御部へ入力情報を伝えるセンサ部を有する。前記親局は、所定の周期の伝送クロックに同期した所定のタイミング信号を発生するためのタイミング発生手段を有する。また、前記親局は、前記タイミング信号の制御下で、前記制御部からの制御データの値に応じて、制御データ信号として一連のパルス状信号を、前記データ信号線に出力すると共に、前記タイミング信号の制御下で、前記伝送クロックの１周期毎に、前記一連のパルス状信号に重畳された監視データ信号のデータ値を抽出し、これを前記制御部に引き渡す。前記複数の子局の各々は、前記タイミング信号の制御下で、前記伝送クロックの１周期毎に、前記制御データ信号の各データの値を抽出して、前記各データの値の中の自局に対応するデータを対応する前記被制御部に引き渡し、および／または、前記タイミング信号の制御下で、前記伝送クロック信号の１周期毎に、対応する前記センサ部の監視データの値に応じて、前記監視データ信号を前記一連のパルス状信号に重畳する。そして、前記子局の各々は、前記伝送クロックの１周期の長さを基準として予め定められたパルス幅を有するスタート信号の時間長を計測し、前記時間長が、予め定められた複数種類の伝送クロック速度に基づいて得られる所定時間長値に対し、所定の範囲内である場合前記所定時間長値に対応する前記伝送クロック速度を、前記一連のパルス状信号の伝送速度として設定する。 The signal transmission method according to the present invention includes a control unit including a control unit and a master station connected to a common data signal line, and a plurality of slave stations connected to the common data signal line and a corresponding controlled device. It is used in a supervisory signal transmission system. The controlled device includes a controlled unit that operates in accordance with an output instruction from the control unit and / or a sensor unit that transmits input information to the control unit. The master station has timing generating means for generating a predetermined timing signal synchronized with a transmission clock having a predetermined cycle. Further, the master station outputs a series of pulse signals as a control data signal to the data signal line according to the value of the control data from the control unit under the control of the timing signal, and the timing Under the control of the signal, the data value of the monitoring data signal superimposed on the series of pulse signals is extracted for each cycle of the transmission clock, and this is transferred to the control unit. Each of the plurality of slave stations extracts a value of each data of the control data signal for each period of the transmission clock under the control of the timing signal, and the local station in the value of each data According to the value of the monitoring data of the corresponding sensor unit for each cycle of the transmission clock signal under the control of the timing signal, and / or The monitoring data signal is superimposed on the series of pulse signals. Each of the slave stations measures a time length of a start signal having a predetermined pulse width with reference to the length of one cycle of the transmission clock, and the time length is determined by a plurality of predetermined types. If the predetermined time length value obtained based on the transmission clock speed is within a predetermined range, the transmission clock speed corresponding to the predetermined time length value is set as the transmission speed of the series of pulse signals.
　なお、本発明において所定時間長値に対し、所定の範囲内である場合とは、例えば、所定時間長値が４０００μｓの場合、計測された時間長が３０００～５０００μｓの範囲となる場合である。 In the present invention, the case where the predetermined time length value is within the predetermined range is, for example, the case where the predetermined time length value is 4000 μs and the measured time length is in the range of 3000 to 5000 μs.
　また、本発明の信号伝送方式が使用される制御・監視信号伝送システムでは、子局の数が少なく伝送距離も短くなる場合には伝送クロック速度を高めることが可能となる一方で、子局の数が増え伝送距離が長くなる場合においても安定した伝送を実現するためには速度を下げなくてはならず、従って、子局の数に応じた適正速度は予め決められることになる。すなわち、伝送クロック速度は、タイミング信号の周期に基づき、予め決められたものとなっている。実用化されている制御・監視信号伝送システムにおける伝送クロック速度を具体例として挙げると、子局の数が６４個以下であれば４０ｋＨｚ（伝送クロックの１周期は２５μｓ）、１００個以下であれば２０ｋＨｚ（１周期は５０μｓ）、１２８個以下であれば１０ｋＨｚ（１周期は１００μｓ）などの例がある。 In the control / monitor signal transmission system using the signal transmission system of the present invention, the transmission clock speed can be increased when the number of slave stations is small and the transmission distance is shortened. Even when the number increases and the transmission distance becomes long, the speed must be lowered in order to realize stable transmission. Therefore, an appropriate speed corresponding to the number of slave stations is determined in advance. That is, the transmission clock speed is predetermined based on the period of the timing signal. As a specific example, the transmission clock speed in a control / monitoring signal transmission system in practical use is 40 kHz (one cycle of the transmission clock is 25 μs) if the number of slave stations is 64 or less, and 100 or less. There are examples of 20 kHz (one cycle is 50 μs) and 128 kHz or less, such as 10 kHz (one cycle is 100 μs).
　更に、本発明の信号伝送方式が使用される制御・監視信号伝送システムにおいて、スタート信号のパルス幅は、伝送クロックの１周期の長さを基準として予め定められている。例えば、伝送クロックの１周期の長さをＴｃとした場合、スタート信号のパルス幅はその５倍（５Ｔｃ）などとされる。 Furthermore, in the control / monitor signal transmission system in which the signal transmission method of the present invention is used, the pulse width of the start signal is determined in advance based on the length of one cycle of the transmission clock. For example, if the length of one cycle of the transmission clock is Tc, the pulse width of the start signal is five times (5 Tc).
　前記子局の各々は、前記スタート信号の終了を起点とし、自局において前記伝送クロック速度に対応し前記タイミング信号に同期してもよい。 Each of the slave stations may start from the end of the start signal and synchronize with the timing signal corresponding to the transmission clock speed at the local station.
　前記一連のパルス状信号に、前記制御データと前記監視データとで構成される制御・監視データ領域と異なる、前記子局の応答状態を示す応答データを含む管理データ領域が設けられていてもよい。 The series of pulse-like signals may be provided with a management data area including response data indicating a response state of the slave station, which is different from a control / monitor data area constituted by the control data and the monitor data. .
　前記共通のデータ信号線に接続されている前記子局の数について、前記伝送クロック速度および／または前記共通のデータ信号線の総延長に対応して予め定められた数に対する適否判断が行われるものとしてもよい。 Appropriateness of the number of slave stations connected to the common data signal line is determined with respect to a predetermined number corresponding to the transmission clock speed and / or the total extension of the common data signal line. It is good.
　前記親局は、上位速度の設定を行った際に前記子局から得られたデータを、その前の下位速度の設定を行った際に前記子局から得られたデータと比較し、一致した場合は、より上位の速度に設定し、一致しない場合は、前記下位速度を安定速度とするものであってもよい。 The master station compared the data obtained from the slave station when setting the upper speed with the data obtained from the slave station when setting the previous lower speed, and matched In such a case, a higher speed may be set, and if they do not match, the lower speed may be set as a stable speed.
　本発明に係る信号伝送方式によれば、使用される制御・監視信号伝送システムにおいて予め定められている複数種類の伝送クロック速度の中から、実際に使用されている速度を各々の子局において認識させ、その認識された伝送速度に設定させることができる。すなわち、伝送クロック速度の認識には、スタート信号の時間長を計測し、その時間長を、予め定められた複数種類の伝送クロック速度に基づいて得られる所定時間長値と比較する。そして、その時間長が所定時間長値に対し、所定の範囲内である場合は、その所定時間長値に対応する伝送クロック速度を伝送速度として設定する。従って、システムの設置状況に応じた速度調整を、時間や手間をかけることなく容易に行うことが可能となる。 According to the signal transmission system of the present invention, each slave station recognizes the speed actually used from a plurality of transmission clock speeds predetermined in the control / monitor signal transmission system to be used. And the recognized transmission rate can be set. That is, to recognize the transmission clock speed, the time length of the start signal is measured, and the time length is compared with a predetermined time length value obtained based on a plurality of predetermined transmission clock speeds. When the time length is within a predetermined range with respect to the predetermined time length value, the transmission clock speed corresponding to the predetermined time length value is set as the transmission speed. Therefore, speed adjustment according to the installation status of the system can be easily performed without taking time and effort.
　一連のパルス状信号には、制御データと監視データとで構成される制御・監視データ領域と異なる、子局の応答状態を示す応答データを含む管理データ領域を設けておくことが好ましい。この場合、応答データを利用して、各子局が設定された伝送クロック速度に追従しているかどうかを検出することができる。 It is preferable to provide a management data area including response data indicating the response state of the slave station, which is different from the control / monitor data area composed of the control data and the monitor data, in the series of pulse signals. In this case, it is possible to detect whether or not each slave station follows the set transmission clock speed by using the response data.
　また、共通のデータ信号線に接続されている子局の数について、伝送クロック速度および／または共通のデータ信号線の総延長に対応して予め定められた数に対する適否判断が行われるものであれば、例えば、設定予定の伝送クロック速度に対し適正な数を超えた子局が接続されたことがわかるため、そのような場合に警告を発し、接続されている子局の数に対し不適切な速度が実行されることを予め防止できる。 In addition, whether or not the number of slave stations connected to the common data signal line is appropriate for a predetermined number corresponding to the transmission clock speed and / or the total extension of the common data signal line is determined. For example, it can be seen that more than the appropriate number of slave stations were connected to the transmission clock speed to be set, so a warning is issued in such a case, and it is inappropriate for the number of connected slave stations. Can be prevented in advance.
　さらに、親局が、上位速度の設定を行った際に子局から得られたデータを、その前の下位速度の設定を行った際に子局から得られたデータと比較し、一致した場合は、より上位の速度に設定し、一致しない場合は、下位速度を安定速度とするものであれば、システムの設置状況に適して安定した最速の伝送クロック速度を自動的に設定することが可能となる。なお、上位速度とはより速い速度を、逆に下位速度とはより遅い速度を意味する。また、親局において比較されるデータは、例えば、上記応答データであってもよく、実データ（監視データ）そのものであってもよい。 In addition, when the master station compares the data obtained from the slave station when setting the upper speed with the data obtained from the slave station when setting the previous lower speed, the master station matches If it is set to a higher speed, and if it does not match, the lower speed is set to a stable speed, it is possible to automatically set the stable and fastest transmission clock speed suitable for the installation situation of the system. It becomes. The upper speed means a faster speed, and the lower speed means a slower speed. The data compared in the master station may be, for example, the response data or actual data (monitoring data) itself.
本発明に係る信号伝送方式の実施例において親局と子局との間で授受される伝送信号のスタート信号およびその直後部分と、親局で生成されるタイミング信号および子局で生成される擬似タイミング信号を対比させて示し、（ａ）は伝送速度が高速の場合のタイムチャート図、（ｂ）は伝送速度が低速の場合のタイムチャート図である。In the embodiment of the signal transmission system according to the present invention, the start signal of the transmission signal exchanged between the master station and the slave station and the portion immediately after it, the timing signal generated at the master station, and the pseudo signal generated at the slave station The timing signals are shown in comparison, (a) is a time chart when the transmission speed is high, and (b) is a time chart when the transmission speed is low. 同信号伝送方式が採用された制御・監視信号伝送システムの概略構成を示すシステム構成図である。1 is a system configuration diagram showing a schematic configuration of a control / monitor signal transmission system employing the same signal transmission method. 親局のシステム構成図である。It is a system configuration | structure figure of a master station. 子局出力部のブロック図である。It is a block diagram of a slave station output unit. 子局入力部のブロック図である。It is a block diagram of a slave station input part. 親局と子局との間で授受される伝送信号における管理・監視データ領域の一部分を示すタイムチャート図である。It is a time chart figure which shows a part of management / monitoring data area | region in the transmission signal transmitted / received between a main | base station and a sub_station | mobile_unit. 親局と子局の間の伝送方式の模式図である。It is a schematic diagram of the transmission system between a master station and a slave station. 親局と子局との間で授受される伝送信号における管理・監視データ領域の一部分と、子局で生成される擬似タイミング信号を対比させて示すタイムチャート図である。FIG. 5 is a time chart showing a comparison between a part of a management / monitoring data area in a transmission signal exchanged between a master station and a slave station and a pseudo timing signal generated in the slave station. 親局に記憶されるアドレステーブルの模式図である。It is a schematic diagram of an address table stored in the master station. 監視データの表現形式として電圧レベルの高低を採用した更に他の実施例において親局と子局との間で授受される信号のタイムチャート図である。It is a time chart figure of the signal transmitted / received between the master station and the slave station in still another embodiment that adopts high and low voltage levels as an expression format of monitoring data.
　図１～９を参照しながら、本発明に係る信号伝送方式の実施例を説明する。
　まず、この信号伝送方式が採用されている制御・監視信号伝送システムの構成について説明する。この制御・監視信号伝送システムは、図２に示すように、制御部１および共通のデータ信号線ＤＰ、ＤＮ（以下、データ信号線ＤＰ、ＤＮとする）に接続された親局６と、前記データ信号線ＤＰ、ＤＮおよび対応する被制御装置５に接続された複数の子局２を備える。被制御装置５は、制御部１の出力指示に応じて動作する被制御部５１、または、制御部１へ入力情報を伝えるセンサ部５２を有している。なお、図示はしないが、被制御装置５は被制御部５１とセンサ部５２の双方を有するものとしてもよい。被制御部５１は、被制御装置５を構成する種々の部品、例えば、アクチュエータ、（ステッピング）モータ、ソレノイド、電磁弁、リレー、サイリスタ、ランプ等からなる。一方、センサ部５２は、対応する被制御部５１に応じて選択され、例えば、リードスイッチ、マイクロスイッチ、押釦スイッチ、光センサ等からなり、オン、オフの状態（２値信号）を出力する。 An embodiment of a signal transmission system according to the present invention will be described with reference to FIGS.
First, the configuration of a control / monitor signal transmission system employing this signal transmission method will be described. As shown in FIG. 2, the control / monitor signal transmission system includes a master station 6 connected to the control unit 1 and common data signal lines DP and DN (hereinafter referred to as data signal lines DP and DN), A plurality of slave stations 2 connected to the data signal lines DP and DN and the corresponding controlled devices 5 are provided. The controlled device 5 includes a controlled unit 51 that operates according to an output instruction from the control unit 1 or a sensor unit 52 that transmits input information to the control unit 1. Although not shown, the controlled device 5 may include both the controlled unit 51 and the sensor unit 52. The controlled unit 51 includes various components constituting the controlled device 5, such as an actuator, a (stepping) motor, a solenoid, a solenoid valve, a relay, a thyristor, and a lamp. On the other hand, the sensor unit 52 is selected according to the corresponding controlled unit 51, and includes, for example, a reed switch, a micro switch, a push button switch, an optical sensor, and the like, and outputs an on / off state (binary signal).
　制御部１は、例えばプログラマブルコントローラ、コンピュータ等であり、制御データ１３および初期設定（イニシャライズ）信号データ１４を送出する出力ユニット１１と、被制御装置５側からのセンサデータ（監視データ信号のデータ）１５および応答データ１６を受け取る入力ユニット１２を有する。そして、これら出力ユニット１１と入力ユニット１２が親局６に接続されている。 The control unit 1 is, for example, a programmable controller, a computer or the like, and includes an output unit 11 that sends out control data 13 and initial setting (initialization) signal data 14, and sensor data (monitoring data signal data) from the controlled device 5 side. 15 and an input unit 12 for receiving response data 16. These output unit 11 and input unit 12 are connected to the master station 6.
　親局６は、図３に示すように、出力データ部６１、ＩＤＸアドレスデータ部６２、タイミング発生部６３、親局出力部６４、親局入力部６５、入力データ部６６、応答データ抽出手段７８及び応答データ検出手段７９を備える。 As shown in FIG. 3, the master station 6 includes an output data section 61, an IDX address data section 62, a timing generation section 63, a master station output section 64, a master station input section 65, an input data section 66, and response data extraction means 78. And response data detection means 79.
　出力データ部６１は、制御部１の出力ユニット１１から制御データ１３として受けた並列データを親局出力部６４へ引き渡す。この制御データ１３は、被制御部５１の動作指示を行うものである。 The output data unit 61 delivers the parallel data received as the control data 13 from the output unit 11 of the control unit 1 to the master station output unit 64. This control data 13 is used to instruct the controlled unit 51 to operate.
　ＩＤＸアドレスデータ部６２は、その内部に備えるＩＤＸアドレステーブル６８の中に、ＩＤＸアドレスデータを記憶している。ＩＤＸアドレスデータは、応答状態の確認対象となる子局２を特定するためのデータであり、子局２のアドレス（後述する伝送クロック信号の１周期毎に割り当てられたアドレス）が用いられる。図９にＩＤＸアドレステーブルの１例を示す。これらＩＤＸアドレスデータは、制御データ発生手段７３及び応答データ検出手段７９に引き渡される。ＩＤＸアドレステーブル６８は、前記初期設定信号データ１４を受けて生成されるが、その生成手順は後述する。 The IDX address data unit 62 stores IDX address data in an IDX address table 68 provided therein. The IDX address data is data for specifying the slave station 2 whose response status is to be confirmed, and the address of the slave station 2 (address assigned for each cycle of a transmission clock signal described later) is used. FIG. 9 shows an example of the IDX address table. These IDX address data are delivered to the control data generating means 73 and the response data detecting means 79. The IDX address table 68 is generated in response to the initial setting signal data 14, and the generation procedure will be described later.
　タイミング発生部６３は、発振回路（ＯＳＣ）７１とタイミング発生手段７２からなり、ＯＳＣ７１を基にタイミング発生手段７２が、この伝送システムのタイミングクロック（本発明のタイミング信号に相当する）を生成し親局出力部６４に引き渡す。親局出力部６４は、制御データ発生手段７３とラインドライバ７４からなり、制御データ発生手段７３が、出力データ部６１から受けたデータと、タイミング発生部６３から受けたタイミングクロックに基づき一連のパルス状信号である制御データ信号を生成し、ラインドライバ７４を介してデータ信号線ＤＰ、ＤＮに送出する。ここで、データ信号線ＤＰ、ＤＮに送出される制御データ信号は、本発明における、一連のパルス状信号に相当するものであるが、以下、データ信号線ＤＰ、ＤＮを流れる制御データ信号を伝送クロック信号というものとする。ラインドライバ７４は、また、ＤＣ電源７５から電源供給を受け、伝送クロック信号とともに、共通データ信号線ＤＰ、ＤＮを経由し、子局２の回路電源を供給する。 The timing generation unit 63 includes an oscillation circuit (OSC) 71 and timing generation means 72. Based on the OSC 71, the timing generation means 72 generates a timing clock (corresponding to the timing signal of the present invention) of this transmission system and generates a parent. Delivered to the station output unit 64. The master station output unit 64 includes a control data generation unit 73 and a line driver 74. The control data generation unit 73 receives a series of pulses based on the data received from the output data unit 61 and the timing clock received from the timing generation unit 63. A control data signal which is a state signal is generated and sent to the data signal lines DP and DN via the line driver 74. Here, the control data signal transmitted to the data signal lines DP and DN corresponds to a series of pulse signals in the present invention, but hereinafter, the control data signal flowing through the data signal lines DP and DN is transmitted. This is called a clock signal. The line driver 74 is also supplied with power from the DC power source 75 and supplies circuit power for the slave station 2 via the common data signal lines DP and DN together with the transmission clock signal.
　親局入力部６５は監視信号検出手段７６と監視データ抽出手段７７で構成され、入力データ部６６および応答データ抽出手段７８へ入力データを送出する。監視信号検出手段７６は、共通データ信号線ＤＰ、ＤＮを経由して子局２から送出された監視データ信号と、応答データ信号とを検出する。子局２から送出される監視データ信号は、センサ部５２における検知対象の検知の有無が電流レベルとして表わされたもので、スタート信号が送信された後、各子局２から順次受け取るものとなっている。また、応答データ信号は、後述の応答確認に対する子局２の応答信号が電流レベルとして表わされたものとなっている。そして、監視データ信号の監視データおよび応答データ信号の応答データは、タイミング発生手段７２の信号に同期して監視データ抽出手段７７で抽出され、直列の入力データとして入力データ部６６および応答データ抽出手段７８に送出される。 The master station input unit 65 includes a monitoring signal detection unit 76 and a monitoring data extraction unit 77, and sends input data to the input data unit 66 and the response data extraction unit 78. The monitoring signal detection means 76 detects the monitoring data signal sent from the slave station 2 via the common data signal lines DP and DN and the response data signal. The monitoring data signal transmitted from the slave station 2 is a signal indicating whether or not the detection target in the sensor unit 52 is detected as a current level, and is received sequentially from each slave station 2 after the start signal is transmitted. It has become. Further, the response data signal is a response signal of the slave station 2 with respect to a response confirmation described later expressed as a current level. The monitoring data of the monitoring data signal and the response data of the response data signal are extracted by the monitoring data extracting unit 77 in synchronization with the signal of the timing generating unit 72, and the input data unit 66 and the response data extracting unit are connected as serial input data. 78.
　応答データ抽出手段７８では、応答データが抽出され応答データ検知手段７９に引き渡される。応答データ検知手段７９では、応答データ抽出手段７８から引き渡された応答データと、ＩＤＸアドレスデータ部６２から引き渡されたＩＤＸアドレスデータに基づき、確認対象となる子局２からの応答があったかどうかの判断をし、その結果を入力データ部６６に引き渡す。また、ＩＤＸアドレステーブル６８の生成時（前記初期設定信号データ１４を受けたとき）は、応答の有無をＩＤＸアドレスデータ部６２に返す。 In response data extraction means 78, response data is extracted and delivered to response data detection means 79. The response data detection unit 79 determines whether or not there is a response from the slave station 2 to be checked based on the response data delivered from the response data extraction unit 78 and the IDX address data delivered from the IDX address data unit 62. The result is delivered to the input data unit 66. When the IDX address table 68 is generated (when the initial setting signal data 14 is received), the presence / absence of a response is returned to the IDX address data unit 62.
　親局入力部６５および応答データ検知手段７９から直列の入力データを受け取った入力データ部６６は、その直列の入力データを並列（パラレル）データに変換し、センサデータ１５として制御部１の入力ユニット１２へ引き渡す。 The input data unit 66 that has received serial input data from the master station input unit 65 and the response data detection means 79 converts the serial input data into parallel data, and the sensor data 15 is the input unit of the control unit 1. Deliver to 12.
　親局６は、また、伝送インターフェイス回路として、伝送ブリーダ電流回路６７を有している。伝送ブリーダ電流回路６７は、親局出力部６４内のラインドライバ７４に接続されており、データ信号線ＤＰとＤＮ間の伝送路を安定化させる。 The master station 6 also has a transmission bleeder current circuit 67 as a transmission interface circuit. The transmission bleeder current circuit 67 is connected to the line driver 74 in the master station output unit 64 and stabilizes the transmission path between the data signal lines DP and DN.
　子局２は、擬似タイミング発生部２０と、子局出力部３０または子局入力部４０を備える。ただし、対応する被制御装置５が被制御部５１とセンサ部５２の双方を有する場合、子局２は子局出力部３０と子局入力部４０の双方を備えることになる。子局出力部３０と子局入力部４０は、その各々がデータ信号線ＤＰ、ＤＮに接続される。そして、子局入力部４０は、センサ部５２から受けた信号を監視データ信号としてデータ信号線ＤＰ、ＤＮに送出する。一方、子局出力部４０は、データ信号線ＤＰ、ＤＮ上を伝送される伝送クロック信号から必要な情報を抽出し、被制御部５１を動作させる。 The slave station 2 includes a pseudo timing generation unit 20 and a slave station output unit 30 or a slave station input unit 40. However, when the corresponding controlled device 5 has both the controlled unit 51 and the sensor unit 52, the slave station 2 includes both the slave station output unit 30 and the slave station input unit 40. Each of the slave station output unit 30 and the slave station input unit 40 is connected to the data signal lines DP and DN. Then, the slave station input unit 40 sends the signal received from the sensor unit 52 to the data signal lines DP and DN as a monitoring data signal. On the other hand, the slave station output unit 40 extracts necessary information from the transmission clock signal transmitted on the data signal lines DP and DN, and operates the controlled unit 51.
　擬似タイミング発生部２０は、親局６のタイミング発生部６３と同様、図示しない発振回路（ＯＳＣ）とタイミング発生手段からなり、ＯＳＣを基に、前記タイミング発生部６３で生成されるタイミングクロックと同期する擬似タイミング信号を生成し、子局出力部３０と子局入力部４０に引き渡す。 Similar to the timing generation unit 63 of the master station 6, the pseudo timing generation unit 20 includes an oscillation circuit (OSC) (not shown) and timing generation means, and is synchronized with the timing clock generated by the timing generation unit 63 based on the OSC. A pseudo timing signal is generated and delivered to the slave station output unit 30 and the slave station input unit 40.
　子局出力部３０は、図４に示すように、アドレス設定手段３１、アドレス抽出手段３２、子局データ出力手段３３、出力データ部３４、速度判定手段３５、および制御データ信号抽出手段３６を備えている。また、接続端子ｏｕｔＮを備え、そこに被制御部５１が接続されている。 As shown in FIG. 4, the slave station output unit 30 includes an address setting unit 31, an address extraction unit 32, a slave station data output unit 33, an output data unit 34, a speed determination unit 35, and a control data signal extraction unit 36. ing. Further, a connection terminal outN is provided, and the controlled unit 51 is connected thereto.
　なお、この子局出力部３０には、マイクロコンピュータ・コントロール・ユニット（ＭＣＵ）３９が搭載されており、アドレス設定手段３１、アドレス抽出手段３２、子局データ出力手段３３、出力データ部３４、および速度判定手段３５、のそれぞれにおける処理は、ＭＣＵ３９により行われるものとなっている。そして、それぞれの処理において必要となる演算や記憶は、ＭＣＵ３９の備えるＣＰＵ、ＲＡＭおよびＲＯＭを使用して実行されるものとなっている。ただし、図４においては、それぞれの処理におけるＣＰＵ、ＲＡＭおよびＲＯＭとの関係は、説明の便宜上、その図示を省略するものとする。 The slave station output unit 30 is equipped with a microcomputer control unit (MCU) 39, and includes an address setting unit 31, an address extraction unit 32, a slave station data output unit 33, an output data unit 34, and The processing in each of the speed determination means 35 is performed by the MCU 39. Calculations and storages required for each process are executed using the CPU, RAM, and ROM provided in the MCU 39. However, in FIG. 4, the relationship between the CPU, RAM, and ROM in each process is omitted for convenience of explanation.
　データ信号線ＤＰ、ＤＮの伝送クロック信号は、制御データ信号抽出手段３６を経て、アドレス設定手段３１と速度判定手段３５に引き渡される。アドレス設定手段３１は、図示しないアドレス設定スイッチで設定されたアドレス値を認識し、そのアドレスと伝送クロック信号をアドレス抽出手段３２に引き渡す。なお、アドレスの設定は、スイッチ等による機械的方法に限定されず、例えば、予め設定された値を親局６から送信し、それを記憶させる方法で行ってもよい。 The transmission clock signals of the data signal lines DP and DN are delivered to the address setting means 31 and the speed determination means 35 through the control data signal extraction means 36. The address setting unit 31 recognizes an address value set by an address setting switch (not shown), and delivers the address and a transmission clock signal to the address extraction unit 32. The address setting is not limited to a mechanical method using a switch or the like. For example, a preset value may be transmitted from the master station 6 and stored.
　速度判定手段３５は、スタート信号の時間長を計測し、その時間長を、ＲＯＭに記憶されている所定時間長値と比較する。そして、時間長が所定時間長値に対し、所定の範囲内である場合、その所定時間長値に対応する伝送クロック速度を、前記親局６との伝送速度と判断し、その判断値を、スタート信号の終了タイミングで擬似タイミング発生部２０に引き渡す。なお伝送速度の判断手順は後述する。 Speed determining means 35 measures the time length of the start signal and compares the time length with a predetermined time length value stored in the ROM. When the time length is within a predetermined range with respect to the predetermined time length value, the transmission clock speed corresponding to the predetermined time length value is determined as the transmission speed with the master station 6, and the determination value is It is delivered to the pseudo timing generator 20 at the end timing of the start signal. The procedure for determining the transmission rate will be described later.
　擬似タイミング発生部２０は、速度判定手段３５からの入力に基づいて、スタート信号の終了を起点とし、親局６との伝送クロック速度に対応しタイミング信号に同期した擬似タイミング信号を、アドレス抽出手段３２に引渡す。 Based on the input from the speed determination means 35, the pseudo timing generation section 20 uses the end of the start signal as a starting point, and generates a pseudo timing signal synchronized with the timing signal corresponding to the transmission clock speed with the master station 6. Hand over to 32.
　アドレス抽出手段３２は、前記擬似タイミング信号に基づいて自局のデータを抽出するタイミングを得て、伝送クロック信号から自局のデータを抽出し、そのデータを子局データ出力手段３３に引き渡す。子局データ出力手段３３に引き渡されたデータは、更に出力データ部３４に引き渡され、それらデータに基づき被制御部５１が動作する。 The address extracting means 32 obtains the timing for extracting the data of the own station based on the pseudo timing signal, extracts the data of the own station from the transmission clock signal, and delivers the data to the slave station data output means 33. The data delivered to the slave station data output means 33 is further delivered to the output data unit 34, and the controlled unit 51 operates based on the data.
　この子局出力部３０は、特に専用の電源を保有していないが、共通データ信号線ＤＰ、ＤＮから供給される、電源が重畳された伝送クロック信号から、子局出力部３０内部で使用する電源電圧を、ダイオードとコンデンサと三端子電源素子によって作り出している。 Although the slave station output unit 30 does not have a dedicated power supply, it is used inside the slave station output unit 30 from a transmission clock signal on which power is superimposed supplied from the common data signal lines DP and DN. The power supply voltage is generated by a diode, a capacitor, and a three-terminal power supply element.
　子局入力部４０は、図５に示すように、アドレス設定手段４１、アドレス抽出手段４２、子局データ入力手段４３、入力データ部４４、速度判定手段４５、および制御データ信号抽出手段４６を備えている。また、接続端子ｉｎＮを備え、そこにセンサ５２が接続されている。更に、この子局入力部４０にも、子局出力部３０と同様にマイクロコンピュータ・コントロール・ユニット（ＭＣＵ）４９が搭載されており、アドレス設定手段４１、アドレス抽出手段４２、子局データ入力手段４３、入力データ部４４、および速度判定手段４５のそれぞれにおける処理は、ＭＣＵ４９により行われるものとなっている。なお、アドレス設定手段４１、アドレス抽出手段４２、速度判定手段４５、および制御データ信号抽出手段４６は、子局出力部３０のアドレス設定手段３１、アドレス抽出手段３２、速度判定手段３５、および制御データ信号抽出手段３６とほぼ同一の構成であり、ほぼ同一の動作をするため、その説明は省略する。また、図６においては、図５と同様、それぞれの処理におけるＣＰＵ、ＲＡＭおよびＲＯＭとの関係は、説明の便宜上、その図示を省略するものとする。 As shown in FIG. 5, the slave station input unit 40 includes an address setting unit 41, an address extraction unit 42, a slave station data input unit 43, an input data unit 44, a speed determination unit 45, and a control data signal extraction unit 46. ing. Moreover, the connection terminal inN is provided and the sensor 52 is connected there. Further, similarly to the slave station output section 30, the slave station input section 40 is also equipped with a microcomputer control unit (MCU) 49, and includes an address setting means 41, an address extraction means 42, a slave station data input means. 43, the input data unit 44, and the speed determination means 45 are each performed by the MCU 49. The address setting means 41, the address extracting means 42, the speed determining means 45, and the control data signal extracting means 46 are the address setting means 31, the address extracting means 32, the speed determining means 35, and the control data of the slave station output unit 30, respectively. Since the configuration is almost the same as that of the signal extraction unit 36 and operates almost the same, the description thereof is omitted. Also, in FIG. 6, as in FIG. 5, the relationship between the CPU, RAM, and ROM in each process is omitted for convenience of explanation.
　入力データ部４４は、センサ部５２から入力された１又は複数の（ビットの）データ信号を子局データ入力手段４３に引き渡す。ここで引き渡されたデータは、子局データ入力手段４３において保持される。子局データ入力手段４３では、自局のデータを伝送クロック信号に重畳させるタイミングがアドレス抽出手段４２から入力されると、保持している１又は複数のデータに応じて、Ｉｏｕｔ０信号の出力を“ｏｎ”または“ｏｆｆ”とする。Ｉｏｕｔ０信号が“ｏｎ”の場合、トランジスタ４７は”ｏｎ”となり、データ信号線ＤＰ、ＤＮに監視データ信号が出力される。ここで子局データ入力手段４３は、監視データ信号についての並列／直列変換を行い、出力される監視データ信号は直列の信号となる。このとき監視データ信号のデータ値は、既述のように、伝送クロック信号の１周期の前半（低電位レベルの期間）における電流レベルとして表現される。 The input data unit 44 delivers one or a plurality of (bit) data signals input from the sensor unit 52 to the slave station data input means 43. The data delivered here is held in the slave station data input means 43. In the slave station data input means 43, when the timing for superimposing the data of its own station on the transmission clock signal is input from the address extraction means 42, the output of the Iout0 signal is “ “on” or “off”. When the Iout0 signal is “on”, the transistor 47 is “on”, and the monitoring data signal is output to the data signal lines DP and DN. Here, the slave station data input means 43 performs parallel / serial conversion on the monitoring data signal, and the monitoring data signal to be output becomes a serial signal. At this time, the data value of the monitoring data signal is expressed as a current level in the first half (period of low potential level) of one cycle of the transmission clock signal, as described above.
　子局データ入力手段４３は、また、伝送クロック信号における後述の管理データ領域が自局に割り当てられているときにも、Ｉｏｕｔ０信号の出力を”ｏｎ”とし、データ信号線ＤＰ、ＤＮに応答データ信号を出力する。 The slave station data input means 43 also sets the output of the Iout0 signal to “on” when the later-described management data area in the transmission clock signal is allocated to the own station, and sends response data to the data signal lines DP and DN. Output a signal.
　なお、子局入力部４０も、子局出力部３０と同様に、電源を重畳された伝送クロック信号から、子局入力部４０内部で使用する電源電圧を、ダイオードとコンデンサと三端子電源素子によって作り出している。 Similarly to the slave station output unit 30, the slave station input unit 40 also uses a diode, a capacitor, and a three-terminal power element to convert the power supply voltage used in the slave station input unit 40 from the transmission clock signal superimposed with the power supply. Producing.
　親局出力部６４からデータ信号線ＤＰ、ＤＮに送出される伝送クロック信号のデータ値は、伝送クロックの１周期における電圧レベルの高い期間の幅（電圧パルスの幅）により表現される。この実施例では、図６、図８に示すように、１周期の後半が高電位レベル（この実施例では＋２４Ｖ）と、前半が低電位レベル（この実施例では＋１９Ｖ）とされている。そして、電圧パルスの幅は、制御部１から入力される制御データ１３の各データの値に応じて、図１、或いは図８の破線で示すように拡張される。また、この伝送クロック信号の１周期毎にはアドレス（ＡＤＲ０、ＡＤＲ１、ＡＤＲ２などと表示する）が割り当てられている。 The data value of the transmission clock signal sent from the master station output unit 64 to the data signal lines DP and DN is expressed by the width of the voltage level high period (voltage pulse width) in one cycle of the transmission clock. In this embodiment, as shown in FIGS. 6 and 8, the second half of one cycle is set to a high potential level (+24 V in this embodiment) and the first half is set to a low potential level (+19 V in this embodiment). Then, the width of the voltage pulse is expanded as shown by a broken line in FIG. 1 or FIG. 8 according to the value of each data of the control data 13 input from the control unit 1. An address (indicated as ADR0, ADR1, ADR2, etc.) is assigned to each cycle of the transmission clock signal.
　図６に、伝送クロック信号の一例を示す。この実施例においては、各アドレス番号０、１、２、３における制御データの値（出力データ）はそれぞれ“０”、“０”、“１”、“０”を表わすものとなっている。一方、監視データの値（入力データ）は、伝送クロック信号の１周期の前半（低電位レベルの期間）における電流レベルとして表現される。この実施例では、監視データ信号のデータ値が“１”の場合には所定値Ｉｔｈ以上の電流（例えば、３０ｍＡ）を流し、“０”の場合にはブリーダ電流（例えば、１０ｍＡ）のみとして表現されている。従って、各アドレス番号０、１、２、３における監視データはそれぞれ“０”、“０”、“１”、“０”を表わすことになる。  FIG. 6 shows an example of the transmission clock signal. In this embodiment, the control data values (output data) at the address numbers 0, 1, 2, and 3 represent "0", "0", "1", and "0", respectively. On the other hand, the value (input data) of the monitoring data is expressed as a current level in the first half (period of low potential level) of one cycle of the transmission clock signal. In this embodiment, when the data value of the monitoring data signal is “1”, a current (for example, 30 mA) greater than or equal to a predetermined value Ith is passed, and when the data value is “0”, only the bleeder current (for example, 10 mA) is expressed. Has been. Therefore, the monitoring data at the address numbers 0, 1, 2, and 3 represent “0”, “0”, “1”, and “0”, respectively.
　なお、図６において図示は省略されているが、図１、或いは図８に示すように、伝送クロック信号には、一連のパルス状信号の始まりを示すスタート信号（ＳｔａｒｔＢｉｔ）が形成される。スタート信号は、伝送クロック信号の高電位レベルと同じ電位レベルであって、伝送クロック信号の１周期より長い信号とされる。この実施例では、伝送クロック信号の１周期Ｔｃの５倍（５Ｔｃ）とされている。 Although not shown in FIG. 6, a start signal (StartBit) indicating the start of a series of pulse signals is formed in the transmission clock signal as shown in FIG. 1 or FIG. The start signal is a signal having the same potential level as the high potential level of the transmission clock signal and longer than one cycle of the transmission clock signal. In this embodiment, the transmission clock signal is 5 times (5 Tc) of one cycle Tc.
　図７は、この制御・監視信号伝送システムにおける伝送手順を模式的に示したものである。この伝送手順では、スタート信号ＳＴの後に、制御データｏｕｔ０～ｏｕｔｎと、監視データｉｎ０～ｉｎｎとで構成される制御・監視データ領域が続き、さらに、その後に、応答データＣＤＴが重畳される管理データ領域が続いたものとなっている。子局２は、既述のように、自局で生成した擬似伝送クロック信号に基づいて自局のデータを抽出するタイミングを得て、この制御・監視データ領域から自局が受信すべき制御データを取り込むものとなっている。 FIG. 7 schematically shows a transmission procedure in this control / monitor signal transmission system. In this transmission procedure, a control / monitoring data area composed of control data out0 to outn and monitoring data in0 to inn follows the start signal ST, and then management data on which response data CDT is superimposed. The area has continued. As described above, the slave station 2 obtains the timing for extracting the data of the local station based on the pseudo transmission clock signal generated by the local station, and the control data to be received by the local station from the control / monitor data area. It is intended to capture.
　図８に示すように、親局６で生成されるタイミングクロックに同期している擬似タイミング信号において、パルス信号が立上るタイミングは、伝送クロック信号におけるパルス信号の変化のタイミングと一致することになる。図８の場合であれば、伝送クロック信号の始まりであるＰ０を起点とし、伝送クロック信号の各周期が開始するタイミングＰ１、Ｐ２、Ｐ３は擬似タイミング信号のパルスが４回立上る毎に出現する。また、制御データを判断すべきタイミングについては、最初の周期におけるタイミングＰ０１、Ｐ０２はパルスの２回目および３回目の立上りで、次の周期におけるタイミングＰ１１、Ｐ１２はその周期が開始するタイミングＰ１と一致するパルスから数えて２回目および３回目のパルスの立上りで出現する。そして、以降も同様に、その周期が開始するタイミングと一致するパルスから数えて２回目および３回目のパルスの立上りが、制御データを判断すべきタイミングとなる。そこで、子局２は、擬似タイミング信号のパルスの立上りをカウントすることで自局に対応するアドレス（自局のデータを重畳すべきタイミング）が到来したことを判断した場合は、監視データ信号を、伝送クロックの１周期の前半である低電位レベルに重畳するとともに、そこから２回目のパルスおよび３回目のパルスの立上りに対応して伝送クロック信号の電圧を検出し、自局が受信すべき制御データの値を得ている。例えば、２回目のパルスの立上りに対応した伝送クロック信号の電圧が高電位であれば制御データが”１”であり、２回目のパルスの立上りに対応した伝送クロック信号の電圧が低電位で３回目のパルスの立上りに対応した伝送クロック信号の電圧が高電位であれば制御データが”０”であると判断し、それぞれに応じた処理を行う。 As shown in FIG. 8, in the pseudo timing signal synchronized with the timing clock generated by the master station 6, the timing at which the pulse signal rises coincides with the timing of the change of the pulse signal in the transmission clock signal. . In the case of FIG. 8, the timing P1, P2, and P3 at which each cycle of the transmission clock signal starts is generated every time the pulse of the pseudo timing signal rises four times, starting from P0 that is the beginning of the transmission clock signal. . As for the timing for determining the control data, the timings P01 and P02 in the first cycle are the second and third rises of the pulse, and the timings P11 and P12 in the next cycle are coincident with the timing P1 at which the cycle starts. It appears at the rise of the second and third pulses counted from the pulse to be performed. In the same manner, the rise of the second and third pulses counted from the pulse that coincides with the timing at which the cycle starts is the timing at which the control data should be determined. Therefore, when the slave station 2 determines that the address corresponding to the local station (timing to superimpose the local station data) has arrived by counting the rising edge of the pulse of the pseudo timing signal, the slave station 2 In addition to being superimposed on the low potential level that is the first half of one cycle of the transmission clock, the voltage of the transmission clock signal should be detected in response to the rise of the second pulse and the third pulse, and the local station should receive it. The control data value is obtained. For example, if the voltage of the transmission clock signal corresponding to the rising edge of the second pulse is high, the control data is “1”, and the voltage of the transmission clock signal corresponding to the rising edge of the second pulse is 3 If the voltage of the transmission clock signal corresponding to the rise of the second pulse is high, it is determined that the control data is “0”, and processing corresponding to each is performed.
　次に、この制御・監視信号伝送システムにおける信号伝送方式について説明する。
　子局２は、既述のように、速度判定手段３５、４５によって伝送クロック速度を認識しその調整を行う。伝送クロック速度の認識は、スタート信号の時間長を計測し、その時間長を、予め定められた複数種類の伝送クロック速度に基づいて得られる所定時間長値と比較する。この場合、計測された時間長が所定時間長値に対し、所定の範囲内である場合、その所定時間長値に対応する伝送クロック速度が、実際の伝送速度となる。この実施例では、タイミング信号（あるいは擬似伝送クロック）の４周期を伝送クロック信号の１周期とし、タイミング信号の１周期の短い高速（図１（ａ）に示す場合）と、タイミング信号の１周期の長い低速（図１（ｂ）に示す場合）、が設定されている。タイミング信号の１周期は、使用状況に応じて適宜設定することができるが、例えば、高速の場合を１００μｓ、低速の場合を２００μｓと設定すれば、スタート信号の時間長が２０００μｓとなる場合は高速と、４０００μｓとなる場合は低速となる。 Next, a signal transmission method in the control / monitor signal transmission system will be described.
As described above, the slave station 2 recognizes the transmission clock speed by the speed judgment means 35 and 45 and adjusts it. To recognize the transmission clock speed, the time length of the start signal is measured, and the time length is compared with a predetermined time length value obtained based on a plurality of predetermined transmission clock speeds. In this case, when the measured time length is within a predetermined range with respect to the predetermined time length value, the transmission clock speed corresponding to the predetermined time length value is the actual transmission speed. In this embodiment, four cycles of the timing signal (or pseudo transmission clock) are defined as one cycle of the transmission clock signal, and the timing signal has a short cycle (as shown in FIG. 1A) and one cycle of the timing signal. Long low speed (in the case shown in FIG. 1B) is set. One cycle of the timing signal can be set as appropriate according to the use situation. For example, if the high speed is set to 100 μs and the low speed is set to 200 μs, the start signal has a time length of 2000 μs. When it becomes 4000 μs, the speed is low.
　なお、スタート信号の時間長は配線の敷設状況等の影響を受けるため、伝送クロック速度に基づいて得られる所定時間長値と厳密に一致しない場合がある。そのため、所定時間長値に対し、ある程度の幅を持たせることが好ましい。例えば、所定時間長値が４０００μｓの場合、計測された時間長が３０００～５０００μｓであれば、その所定時間長値に対応する速度が設定されているものと判断してもよい。 Note that since the time length of the start signal is affected by the wiring laying condition, etc., it may not exactly match the predetermined time length value obtained based on the transmission clock speed. Therefore, it is preferable to give a certain range to the predetermined time length value. For example, when the predetermined time length value is 4000 μs, if the measured time length is 3000 to 5000 μs, it may be determined that the speed corresponding to the predetermined time length value is set.
　更に、子局２は、既述のように、伝送クロック信号における管理データ領域が自局に割り当てられているとき、応答データ信号を出力する。各子局２に対する管理データ領域の割り当ては、ＩＤＸアドレステーブル６８に基づいて行われる。親局６は、前記ＩＤＸアドレステーブル６８に記憶されているインデックスアドレスデータ群の中から、まず、テーブル番号０のインデックスアドレスデータ（図９の実施例では＃ａｄ０）を選択し、これを伝送する。続けて、スタート信号から開始される、制御データ、監視データおよび管理データの、一連のデータ群（１フレーム伝送サイクル）毎に、各テーブル番号に対応するインデックスアドレスデータを順次に伝送する。各子局２では、自局に割り当てられたアドレスがインデックスアドレスデータＩＤＸのデータ値と一致するとき、応答データＣＤＴを送出する。 Furthermore, as described above, the slave station 2 outputs a response data signal when the management data area in the transmission clock signal is allocated to the local station. The management data area is assigned to each slave station 2 based on the IDX address table 68. The master station 6 first selects index address data of table number 0 (# ad0 in the embodiment of FIG. 9) from the index address data group stored in the IDX address table 68, and transmits this. . Subsequently, index address data corresponding to each table number is sequentially transmitted for each series of data groups (one frame transmission cycle) of control data, monitoring data, and management data, which are started from the start signal. Each slave station 2 sends response data CDT when the address assigned to the local station matches the data value of the index address data IDX.
　親局６は、応答データＣＤＴのデータ群を記憶しておき、上位速度の設定を行った際に得られるデータ群の各データが、その前の下位速度の設定を行った際に得られたデータ群の各データと比較する。そしてそれらが完全に一致すれば「安定伝送速度」と、一致しなければ「不安定伝送速度」と判断する。そして、「安定速度」と判断された場合は、より上位の速度に設定し、同じ処理を繰り返し、「不安定速度」と判断された場合は、その前の下位速度を安定速度としてフィックスする。すなわち、「不安定速度」と判断されるまで、設定速度を順次高くしていくことにより、システムの設置状況に適して安定した最速の速度設定が自動的になされることになる。例えば、この実施例では、高速の場合に得られる応答データＣＤＴのデータ群が、低速の場合に得られる応答データＣＤＴのデータ群と完全一致すれば、安定した伝送クロック速度として高速が自動的にフィックスされることになる。なお、「安定伝送速度」或いは「不安定伝送速度」の判断を行う際に比較されるデータは、応答データＣＤＴに制限されず、実データ（監視データ）そのものであってもよい。ただし、実データを利用する場合は、所定の伝送サイクルにおいて、予め決められたデータ値を入力させることとし、その所定の伝送サイクルでの判断を行なうことになる。 The master station 6 stores the data group of the response data CDT, and each data of the data group obtained when the upper speed is set is obtained when the lower speed is set before that. Compare with each data in the data group. If they match completely, it is determined as “stable transmission rate”, and if they do not match, it is determined as “unstable transmission rate”. When it is determined as “stable speed”, the higher speed is set, and the same processing is repeated. When it is determined as “unstable speed”, the previous lower speed is fixed as the stable speed. That is, by sequentially increasing the set speed until it is determined as “unstable speed”, a stable and fastest speed setting is automatically made suitable for the installation status of the system. For example, in this embodiment, if the data group of the response data CDT obtained at the high speed matches the data group of the response data CDT obtained at the low speed, the high speed is automatically set as the stable transmission clock speed. Will be fixed. The data to be compared when determining “stable transmission rate” or “unstable transmission rate” is not limited to the response data CDT, and may be actual data (monitoring data) itself. However, when actual data is used, a predetermined data value is input in a predetermined transmission cycle, and a determination is made in the predetermined transmission cycle.
　ＩＤＸアドレステーブル６８は、制御部１から初期設定指令により作成される。初期設定指令を示す初期設定信号１４を受けた親局６は、伝送クロック信号における管理データ領域のインデックスアドレスデータＩＤＸを、１フレーム伝送サイクル毎に、最大アドレス値に達するまで１ずつ加算していく。各子局２では、自局に割り当てられたアドレスが、インデックスアドレスデータＩＤＸのデータ値と一致する場合、応答データＣＤＴを返す。応答データＣＤＴがあった場合、そのアドレスが、インデックスアドレス検出部６２の内部に備えてある内部メモリの中にインデックスアドレスデータとして、記憶される。この際、伝送速度は、確実に接続される低速が選択されるため、速度の適否の判断は行われない。 The IDX address table 68 is created by the initial setting command from the control unit 1. Receiving the initial setting signal 14 indicating the initial setting command, the master station 6 increments the index address data IDX of the management data area in the transmission clock signal by one until reaching the maximum address value every frame transmission cycle. . Each slave station 2 returns response data CDT when the address assigned to the local station matches the data value of the index address data IDX. When there is response data CDT, the address is stored as index address data in an internal memory provided in the index address detector 62. At this time, the transmission speed is selected as a low speed that is surely connected, and therefore determination of whether or not the speed is appropriate is not performed.
　インデックスアドレスデータの数は、この制御・監視信号伝送システムにおいて接続されている子局２の数となるが、この子局２の数が増えた場合にも安定した伝送を実現するためには、低速とする必要がある。そこで、制御部１には、予め定められた複数種類の伝送クロック速度の各々に対し、共通のデータ信号線の総延長を考慮して予め定められた子局２の適正接続数が記憶されている。そして、インデックスアドレスデータの数、すなわち子局２の数が、実行すべき速度に対応する適正接続数を超える場合には、制御部１に対し警告信号が送出されるようになっている。そのため、接続されている子局２の数に対し不適切な速度が実行されることを予め防止できる。 The number of index address data is the number of slave stations 2 connected in this control / monitor signal transmission system. In order to realize stable transmission even when the number of slave stations 2 increases, Need to be slow. Therefore, the control unit 1 stores a predetermined number of appropriate connections of the slave stations 2 in consideration of the total extension of the common data signal line for each of a plurality of predetermined transmission clock speeds. Yes. When the number of index address data, that is, the number of slave stations 2 exceeds the appropriate number of connections corresponding to the speed to be executed, a warning signal is sent to the control unit 1. Therefore, it is possible to prevent in advance that an inappropriate speed is executed for the number of connected slave stations 2.
　なお、この実施例では、制御データの表現形式として電圧パルスの幅を、監視データの表現形式として電流の有無を採用しているが、その表現形式に制限はなく、電圧パルスレベルや、電流パルスの幅或いはレベルなど、その他の表現形式を適宜採用してもよい。図１０に、監視データの表現形式として電圧パルスレベルを採用した場合の実施例を示す。また、この実施例では、子局２の処理タイミングは自局で生成する擬似伝送クロック信号を利用して得ることとしているが、処理タイミングを得る手法に制限はなく、例えば、タイマを利用する手法であってもよい。 In this embodiment, the width of the voltage pulse is adopted as the expression format of the control data, and the presence / absence of current is adopted as the expression format of the monitoring data. However, the expression format is not limited, and the voltage pulse level, current pulse Other expression formats such as the width or level may be adopted as appropriate. FIG. 10 shows an embodiment in which a voltage pulse level is adopted as a representation format of monitoring data. Further, in this embodiment, the processing timing of the slave station 2 is obtained using a pseudo transmission clock signal generated by the own station, but there is no limitation on the method of obtaining the processing timing, for example, a method of using a timer It may be.
１　　制御部
２　　子局
５　　被制御装置
６　　親局
１１　出力ユニット
１２　入力ユニット
１３　制御データ
１５　センサデータ
２０　擬似タイミング発生部
３０　子局出力部
３１　アドレス設定手段
３２　アドレス抽出手段
３３　子局データ出力手段
３４　出力データ部
３５　速度判定手段
３６　制御データ信号抽出手段
３９、４９　ＭＣＵ
４０　子局入力部
４１　アドレス設定手段
４２　アドレス抽出手段
４３　子局データ入力手段
４４　入力データ部
４５　速度判定手段
４６　制御データ信号抽出手段
４７　トランジスタ
５１　被制御部
５２　センサ部
６１　出力データ部
６３　タイミング発生部
６４　親局出力部
６５　親局入力部
６６　入力データ部
６７　伝送ブリーダ電流回路
７１　発信器
７２　タイミング発生手段
７３　制御データ発生手段
７４　ラインドライバ
７５　ＤＣ電源
７６　監視信号検出手段
７７　監視データ抽出手段
　 DESCRIPTION OF SYMBOLS 1 Control part 2 Slave station 5 Controlled device 6 Master station 11 Output unit 12 Input unit 13 Control data 15 Sensor data 20 Pseudo timing generation part 30 Slave station output part 31 Address setting means 32 Address extraction means 33 Slave station data output means 34 Output data section 35 Speed determination means 36 Control data signal extraction means 39, 49 MCU
40 Slave station input unit 41 Address setting unit 42 Address extraction unit 43 Slave station data input unit 44 Input data unit 45 Speed determination unit 46 Control data signal extraction unit 47 Transistor 51 Controlled unit 52 Sensor unit 61 Output data unit 63 Timing generation unit 64 Master station output section 65 Master station input section 66 Input data section 67 Transmission bleeder current circuit 71 Transmitter 72 Timing generation means 73 Control data generation means 74 Line driver 75 DC power supply 76 Monitoring signal detection means 77 Monitoring data extraction means

Claims (5)

  1. 　制御部および共通のデータ信号線に接続された親局と、前記共通のデータ信号線および対応する被制御装置に接続された複数の子局を備え、
    　前記被制御装置は、前記制御部の出力指示に応じて動作する被制御部および／または前記制御部へ入力情報を伝えるセンサ部を有し、
    　前記親局は、所定の周期の伝送クロックに同期した所定のタイミング信号を発生するためのタイミング発生手段を有し、前記タイミング信号の制御下で、前記制御部からの制御データの値に応じて、制御データ信号として一連のパルス状信号を前記データ信号線に出力すると共に、前記タイミング信号の制御下で、前記伝送クロックの１周期毎に、前記一連のパルス状信号に重畳された監視データ信号のデータ値を抽出し、これを前記制御部に引き渡し、
    　前記複数の子局の各々は、前記タイミング信号の制御下で、前記伝送クロックの１周期毎に、前記制御データ信号の各データの値を抽出して、前記各データの値の中の自局に対応するデータを対応する前記被制御部に引き渡し、および／または、前記タイミング信号の制御下で、前記伝送クロックの１周期毎に、対応する前記センサ部の監視データの値に応じて、前記監視データ信号を前記一連のパルス状信号に重畳する制御・監視信号伝送システムにおいて、
    　前記子局の各々は、前記伝送クロックの１周期の長さを基準として予め定められたパルス幅を有するスタート信号の時間長を計測し、前記時間長が、予め定められた複数種類の伝送クロック速度に基づいて得られる所定時間長値に対し、所定の範囲内である場合前記所定時間長値に対応する前記伝送クロック速度を、前記一連のパルス状信号の伝送速度として設定することを特徴とする信号伝送方式。     A master station connected to the control unit and a common data signal line, and a plurality of slave stations connected to the common data signal line and the corresponding controlled device;
    The controlled device includes a controlled unit that operates according to an output instruction of the control unit and / or a sensor unit that transmits input information to the control unit,
    The master station has timing generation means for generating a predetermined timing signal synchronized with a transmission clock having a predetermined cycle, and according to the value of control data from the control unit under the control of the timing signal And outputting a series of pulse signals as control data signals to the data signal line, and monitoring data signals superimposed on the series of pulse signals for each cycle of the transmission clock under the control of the timing signal Data value is extracted and passed to the control unit,
    Each of the plurality of slave stations extracts a value of each data of the control data signal for each period of the transmission clock under the control of the timing signal, and the local station in the value of each data According to the value of the monitoring data of the corresponding sensor unit for each period of the transmission clock under the control of the timing signal, and / or In a control / monitor signal transmission system that superimposes a monitor data signal on the series of pulse signals,
    Each of the slave stations measures the time length of a start signal having a predetermined pulse width with reference to the length of one cycle of the transmission clock, and the time length is determined by a plurality of types of transmission clocks. When the predetermined time length value obtained based on the speed is within a predetermined range, the transmission clock speed corresponding to the predetermined time length value is set as the transmission speed of the series of pulse signals. Signal transmission method.
  2. 　前記子局の各々は、前記スタート信号の終了を起点とし、自局において前記伝送クロック速度に対応し前記タイミング信号に同期する請求項１に記載の信号伝送方式。 2. The signal transmission system according to claim 1, wherein each of the slave stations starts from the end of the start signal and synchronizes with the timing signal corresponding to the transmission clock speed at the local station.
  3. 　前記一連のパルス状信号に、前記制御データと前記監視データとで構成される制御・監視データ領域と異なる、前記子局の応答状態を示す応答データを含む管理データ領域が設けられている請求項１又は２に記載の信号伝送方式。 A management data area including response data indicating a response state of the slave station, which is different from a control / monitor data area configured by the control data and the monitor data, is provided in the series of pulse signals. The signal transmission method according to 1 or 2.
  4. 　前記共通のデータ信号線に接続されている前記子局の数について、前記伝送クロック速度および／または前記共通のデータ信号線の総延長に対応して予め定められた数に対する適否判断が行われる請求項１から３のいずれかに記載の信号伝送方式。 Regarding the number of the slave stations connected to the common data signal line, it is determined whether or not it is appropriate for a predetermined number corresponding to the transmission clock speed and / or the total extension of the common data signal line. Item 4. The signal transmission method according to any one of Items 1 to 3.
  5. 　前記親局は、上位速度の設定を行った際に前記子局から得られたデータを、その前の下位速度の設定を行った際に前記子局から得られたデータと比較し、一致した場合は、より上位の速度に設定し、一致しない場合は、前記下位速度を安定速度とする請求項１から４のいずれかに記載の信号伝送方式。
    　
    　     The master station compared the data obtained from the slave station when setting the upper speed with the data obtained from the slave station when setting the previous lower speed, and matched 5. The signal transmission method according to claim 1, wherein the higher speed is set to a higher speed and the lower speed is set to a stable speed if they do not coincide with each other.

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