WO2011066818A1

WO2011066818A1 - Nanowire structure having exposed, regularly arranged nanowire ends and method for producing such a structure

Info

Publication number: WO2011066818A1
Application number: PCT/DE2010/001353
Authority: WO
Inventors: Helmut Foell; Juergen Carstensen; Jörg BAHR; Emmanuel Ossei-Wusu
Original assignee: Christian Albrechts Universitaet Zu Kiel
Priority date: 2009-12-04
Filing date: 2010-11-22
Publication date: 2011-06-09
Also published as: DE102009056530A1

Abstract

The invention relates to a structure comprising nanowires that extend parallel to each other and that are made of a semiconductor material, the structure having at least one flat side having exposed, regularly arranged nanowires and having at least one macroporous stabilizing layer that is made of the same semiconductor material and that is penetrated perpendicularly by the nanowires, wherein the exposed nanowire ends protrude beyond the stabilizing layer by less than 100 μm.

Description

Nanowire structure with exposed, regularly arranged nanowire ends and

Process for producing such a structure

The invention relates to a nanowire structure made of semiconductor material, in particular of silicon, and to a method for the production thereof.

The commercially available lithium-ion batteries have to be significantly improved in their performance and in the price-performance ratio, before a large-scale use in the energy sector is possible. Emerging markets requiring significantly improved energy storage technology are e.g. Rechargeable batteries for the "electric car" or for energy storage in the field of alternative energy generation In addition to safety aspects, there are also high demands on the storage capacity and the repeatable chargeability and dischargeability (cyclability) of the lithium-ion accumulators.

WO 2007/027197 A2 is devoted to the task of improving the cyclability of lithium-ion batteries and proposes for this purpose a cathode which comprises, on a metal film (formed here of titanium and platinum), upright nanowires made of a lithium-cobalt Has oxide. The nanowires are formed by electrodeposition in pores of a porous aluminum oxide layer specially deposited on the metal film as a template, after which the template is completely removed by etching with NaOH or KOH. It remains on the metal film a plurality of isolated, upstanding nanowires (also: nano-columns, nanorods), which have defined diameters and distances to each other. It is also said that a nano-pillar array has been formed on the metal film.

The process of WO 2007/027197 A2 comprises, after the metal film has been formed, a series of elaborate landfilling and structuring steps. The nanowires are created only during the process and adhere with one of their ends directly on the metal film.

For the anode of a lithium-ion battery, the work of Chan et al. ("High Performance Lithium Battery Anodes Using Silicon Nanowires", Nature Nanotechnology 3, 31 (2008)) to arrange silicon nanowires standing on a metal charge collector. It has long been known that silicon, with the formation of silicon-lithium compounds, can store (intercalate) about 11 times more lithium per gram of silicon than a technically common graphite anode. The capacity of over 4000 mAh / g is even higher than that of metallic lithium. However, previous attempts to use silicon anodes have failed because virtually no cyclability has been achieved. The reason for the extremely poor cyclability of the silicon lies in the volume expansion of the silicon associated with the lithium storage by a factor of 4. The resulting mechanical stresses are so great that the material is literally pulverized.

The work of Chan et al. shows the fundamental solution of the problem: one lets silicon nanowires with known techniques (here: Liquid-Vapor-Solid, LVS) on e.g. grow up a steel substrate. The nanowires are flexible and can double in diameter without breaking. The nanostructuring of silicon on the one hand enlarges the surface for the absorption of lithium ions and on the other hand creates space for avoiding the mentioned mechanical stresses.

However, the anode of Chan et al. not yet ready for commercial production. This is mainly due to the manufacturing process, which is cumbersome and expensive. The growth of silicon nanowires with LVS methods requires gold particles as nucleation nuclei, which remain at the tips of the nanowires. The nanowires themselves are saturated with gold, which makes the production of thicker wires or very expensive on larger surfaces. Moreover, the obtained nanowires are not homogeneous. There are thick and thin, long and short, upright and curved, stuck to the substrate and detached nanowires.

Silicon nanowires not contacted with the metal film are particularly undesirable in commercial production. They do not contribute to the capacity of the battery, but absorb at the first load still lithium ions that are no longer extractable (irreversible capacity).

The unpublished DE 10 2009 035 745.9 of the present invention relates to an electrode which a metal film with projecting from at least one side of the film, long and thereby uniform, pure silicon nanowires, wherein portions of the nanowires are enclosed by the metal film. This anchoring of the nanowires in the metal film can be achieved by first providing a silicon wafer with electrochemical etching with regularly arranged deep macropores. These macropores are then joined together by chemically overetching the pores so that the remaining pore walls represent an array of upstanding nanopillars on the wafer. Finally, a metal film (eg copper) is deposited galvanically directly on the wafer, which encloses the base points of the nanowires. The metal film thus produced on the substrate (wafer) can already be used as an electrode, but the problem of damage-free and large-area detachment of the film from the substrate is not comprehensively dealt with in DE 10 2009 035 745.9. Moreover, the method of DE 10 2009 035 745.9 still has the disadvantage of a considerable process time for the galvanic metal deposition on the wafer surface in the region of the base points of the nanowires.

It would be desirable, in particular for the simplified production of battery electrodes, to be able to process the exposed ends of the nanopillars standing on the substrate, i. a. to avoid the tedious copper electrodeposition on the wafer at the nanowire base points. However, the free-standing nanowires clog themselves up from certain lengths and lay aside ("wet-hair effect", see Fig. 1), whereby the arrangement loses its regularity.

WO 2008/045301 A1 discloses how the electrochemical etching of macropores in a silicon wafer can ensure that generated silicon nanowires remain in a parallel arrangement over their entire length. It can be seen in particular from FIG. 5 and description paragraph 51 of WO 2008/045301 A1 that the staggered arrangement of the pores can lead to an overlapping of the macropores in such a way that - essentially two-dimensional - structures ("walls The films, like the nanowires themselves, are nothing more than residual pore walls, only much thinner, stabilizing the relative position of the nanowires, but only along a given direction It may be assumed that, given very large aspect ratios of the nanowires (ie here at very large etching depth or wall height) can come to contacts between adjacent walls. The outer nanowire ends, which are not exposed in this process, thus may no longer have a regular arrangement.

The object of the invention is to provide an arrangement of semiconductor nanowires, which has a flat side with regularly arranged, exposed nanowire ends regardless of the choice of nanowire length.

The object is achieved by a nanowire structure with the features of claim 1, claim 6 is directed to a method for producing this structure. The dependent claims indicate advantageous embodiments.

The nanowire structure according to the invention is obtained by etching a semiconductor wafer, the nanowires being formed as residual pore walls from the semiconductor material of the wafer. The development takes place in two steps:

1) electrochemical etching of regular macropores (preferably streamline pores);

2) wet chemical overetching of the macropores formed, so that they are connected to each other at least in sections by dissolving the pore walls.

According to the invention, depth intervals in the wafer are selected in which the wet-chemical over-etching does not completely dissolve the pore walls of the previously formed macropores, so that adjacent pores are not connected at these predetermined depth intervals. The structure produced therefore has macroporous, but otherwise contiguous layers of the semiconductor material between each of an upper and a lower cover surface at the predetermined depth intervals after the wet chemical etching, which are penetrated perpendicularly by the remaining pore walls outside the predetermined depth intervals, thus the nanowires. The top surfaces are located at the boundaries of the depth intervals. The material of these layers (in general stabilizing layers) themselves form subsections of the nanowires and furthermore connect adjacent nanowires and thereby ensure that the distances of the nanowires from each other are maintained, ie the layers stabilize the regular arrangement of the wires. Since nanowires and stabilization layers are formed piecemeal by the same material, nvan can also say that Stabilization layers penetrate the nanowires. A stabilization layer always runs perpendicular to the direction of the nanowires.

Decisive for creating a regular array of exposed nanowire ends are the overhangs of the nanowires, i. the distances of the free nanowire ends to the nearest top surface of the nearest stabilization layer. The mechanical properties of the semiconductor material and the diameter of the nanowires play a rather minor role.

The inventive regular nanowire structure has at least one stabilization layer oriented perpendicular to the direction of the nanowires, in which regularly arranged, unconnected macropores exist in the semiconductor material, the supernatants not exceeding a predetermined value.

The method for producing a nanowire structure according to the invention comprises the step of electrochemically etching macropores of predetermined diameter in the semiconductor material with continuous monitoring of the etching progress (prior art), wherein the etching current is temporarily reduced to reduce the diameter of the macropores at predetermined depth intervals. Thus, constrictions in the macropores are generated at predetermined depth intervals. Above and below the constrictions, the predetermined diameter of the pores is achieved.

In wet-chemical etching following macropore formation, semiconductor material is removed from the entire structure at approximately the same rate. The duration of the etching bath determines the material removal and thus the diameter of the nanowires produced. This duration should be at least so large that the macropores outside the predetermined depth intervals - where the predetermined diameter of the pores has been generated - are connected or overlapped with their neighboring pores. The duration of the etching bath is at the same time to be chosen at most so large that the macropores in the predetermined depth intervals with the constrictions continue to not overlap.

After removal from the etch bath, the structure has exposed nanowires, nanowire ends in a tegelmäßiger arrangement and at least one stabilizing layer in the predetermined depth interval. The predetermined depth interval results before the start of the electrochemical etching from the choice of the pore geometry, the choice of the desired nanowire diameter (hence the required duration of the etchant) and the choice of the semiconductor material.

In the method described here similar nanowires are worked out of a wafer. These nanowires are all the same diameter and length. Consequently, the supernatants are all the same. According to the supernatants should be less than 100 μιη.

It will not be difficult for the person skilled in the art to determine suitable parameters by simple preliminary tests for each material and every desired geometry. In question are all semiconductor materials in which electrochemical macropores, preferably the streamlines following pores, can be etched and for which a suitable wet chemical etching solution is available. If an anisotropic wet-chemical etching is possible, it may be favorable to pay attention to a suitable orientation of the semiconductor wafer crystal. But this is known in the art and needs no further explanation here.

Preferably, the method is performed with silicon as a semiconductor. Particular preference is given to using boron-doped p-type silicon. For silicon, the supernatants should preferably be less than 50 μm, more preferably less than 30 μm.

The abovementioned limitation of the supernatants to a maximum of 100 μm is considered to be universal for all semiconductor materials. This is not an absolute limit, but one that can hardly be exceeded by practicable means according to current knowledge, at least not in large-scale production.

The method described is designed to produce arrangements of nanowires with lengths far beyond 100 μm. Nanowires realized so far are about 160 μπι long, but in principle nanowires of 500 μηι length and more are possible. The limiting factor is the depth to which stable, uniform macropores can be etched into the wafer. According to the current state of the art, almost complete etching of a wafer with such macropores is possible (see eg DE 10 2008 012 479 B3). In the following the invention will be explained in more detail with reference to an embodiment and the figures. Showing:

FIG. 1 Electron microscope image of clumped nanowires ("wet-hair effect")

Fig. 2 Schematic section through the regular nanowire arrangement. The image plane cuts here the nanowires and the additional stabilization layer.

FIG. 3 shows a time course of the etching current during the generation of macropores, which after wet-chemical etching lead to a nanowire arrangement with two stabilization layers.

4 shows microscope images of generated structures in silicon. Above: Arrangement with a stabilization layer (order error in the image is due to preparation); Bottom: Arrangement with 3 stabilization levels at different depth intervals.

Figure 5 Stabilization layer obliquely from above (the upper sections of the nanowires were removed for this purpose, fractures are preparation-related).

Fig. 6 Detached nanowire layer, held together by a ground-level stabilization layer. Top: detail; Bottom: Larger area of the detached layer.

From FIG. 1 it can be seen by way of example which finding is the basis of the object of the invention. Individual SiVizium nanowires, which are initially perpendicular to a substrate, tilt sideways at a certain length and form tufts with adjacent nanowires. There is a clumping of the nanowires, so that the free ends are anything but regular arranged.

Fig. 2 schematically outlines the target structure according to the invention. Shown is a section through a series of adjacent nanowires. In the upper part of the picture, webs can be seen between the wires, which serve as spacers. The generation of these webs is carried out by electrochemical macroporous etching, wherein the macropores. in which for the Anordnun de * Webs provided depth interval are narrowed by a temporary power reduction. The subsequent etching bath removes the remaining pore walls - except for residues that represent the nanowires - and does not connect the pores only where the constrictions have been established. The material not removed in these areas forms the webs.

An example of the specification of a current profile in electrochemical pore etching to achieve the desired structure is shown in FIG. To produce uniform pores of constant diameter, a steep current increase (up to about 20 minutes in FIG. 3) followed by a gradual return of the current (to about 90 minutes in FIG. 3) would be sufficient. Additional, temporary withdrawals of the etching current with subsequent return to the originally provided current profile are carried out at about 40 and 60 minutes etching time in order to achieve a pore narrowing at predetermined depth intervals. The actual depth of the pore tip in the semiconductor wafer can be determined from the process observation. In particular, for example, the time integral over the etching current is proportional to the amount of material removed, as long as the change in the etching current as a function of time is not too great (otherwise transient effects and capacitive transfers are no longer negligible).

FIG. 4 shows two examples of nanowire structures according to the invention. The structures are generated in the exemplary embodiment in a boron-doped p-type silicon wafer with 150 mm diameter and 675 +/- 25μπι thickness. The wafer is <100> oriented and has a resistivity of 15 to 25 Ωcm. The macroporous etching takes place in a pre-structured manner (square grid with pore spacing 3 μm, 1 μm window size) and at a constant temperature of 20 ° C. The electrolyte consists of 30 ml of 48% hydrofluoric acid and 300 ml of 99% dimethylformamide (DMF). This corresponds to 5% by weight HF in DMF.

The lighter lines running perpendicular to the wires in FIG. 4 characterize the stabilization layers (upper image: one layer, lower image: three layers at different depths). The image plane cuts through the remaining, non-interconnected macropores in the stabilization layers. An oblique view of a stabilization layer exposed by removing the free nanowire ends for viewing is shown in FIG. It can be seen well that the Stabuisierungsschicht a provided with large pores, but otherwise closed layer made of silicon.

It should be emphasized that several stabilization planes are arranged below one another in FIG. 4, that is, the macropores have been provided with multiple constrictions during the electrochemical etching. Although each of the constrictions also forms a diffusion barrier to the electrolyte, this has no effect on the etch progress below the constrictions, and very uniform results can be achieved.

The consequence of this is that it is possible to detach the regular nanowire structures from the wafer as required, without losing the arrangement of the nanowires.

In Fig. 3, the etching current is increased again at about 90 minutes of etching time. This causes a significant broadening of the pore diameter, which then leads to a rapid detachment of the entire nanowire structure in the subsequent wet-chemical etching. Overetching of the macropores is done with an etching solution of the composition:

The etching solution is activated by brief silicon addition before the actual etching. The etching requires about 17 hours at a constant temperature of 19 ° C. During the duration of the etching bath, apart from the temperature monitoring, no process control is required.

If the etching current is increased even more than in the situation shown in FIG. 3, the pore growth in the region of the pore tips completely loses its stability. The pores no longer grow deeper, but widen until they finally grow together. As a result, the entire macroporous wafer region is detached from the rest of the wafer and can be lifted off without force.

The electrochemically etched, macroporous layer can therefore either separate from the wafer at the beginning of the chemical etching or be detached from the wafer already at the end of the electrochemical etching and be added without the wafer into the subsequent etching bath. To In the case of an appropriate residence time in the etching bath, in both cases a filigree structure can be taken from it, which practically consists only of nanowires. The stabilization layers receive the arrangement of the nanowires even in the absence of a substrate. FIG. 6 shows, in two enlargements, an example of such a cantilevered structure, which is held together only by a stabilizing layer arranged in the lower region of the wires. Typical and expedient stabilization layers have a thickness of about 3 μm. Many applications will be endeavored to make them as thin as possible. Stabilization layer thicknesses of about 1 μηι should be sufficient with careful treatment of the nanowire structure (especially if possible no force).

The structure shown in FIG. 6 apparently has two flat sides with exposed nanowire ends. In this case, the nanowire ends are regularly arranged on the side with the stabilization layer, while those on the other flat side show clumping again. Depending on the intended use, it may be sufficient for the structure to have only a well-ordered flat side. A coating of this flat side with a copper film, for example by simply immersing in a copper sulfate solution, already produces the desired electrode for lithium-ion batteries. When the electrode is first charged with lithium ions, the thin webs of the stabilization layer are already destroyed. However, the individual nanowires have all previously been embedded in a copper film in a simple and fast manner.

For applications where two flat sides with regularly spaced, free nanowire ends-which was previously a non-representable structure-desired, one can provide two or more stabilization layers, of which the two extremes are particularly important. As stated above, they must not be too far away from the free nanowire ends (overhang). The supernatants are then to be limited for both sides, i. the depth intervals for producing the stabilization layers are to be close enough to the planned free ends of the nanowires.

It is also possible to provide a single, approximately centrally located stabilization layer to produce a structure with two opposite flat sides with regularly arranged, exposed nanowire ends. A central arrangement means that the center of the predetermined depth interval in which adjacent macropores should not be connected, is arranged at about half of the predetermined nanowire length. However, such a stabilization layer would then still have to be designed to meet the requirement of limited projections. It might therefore have to be relatively thick (eg more than 100 μm), which seems rather less suitable for applications, for example as electrodes. Because there you are interested in long silicon nanowires (large, against each other movable amount of material).

In summary, the invention describes a nanowire structure which consists almost only of mutually parallel, uniform semiconductor nanowires and thereby has at least one flat side with regularly arranged, free nanowire ends. This regularity is achieved by providing a stabilization layer in the structure which is placed at a predetermined depth interval (relative to the plane of the free nanowire ends that was previously the surface of the wafer) such that predetermined boundaries for the supernatants are not exceeded. The supernatants should be less than 100 μπι, preferably less than 50 μπι, more preferably less than 30 μη amount.

The invention further relates to a method for producing the nanowire structure, which is directed to a control of the etching current in the electrochemical of macropores in semiconductor wafers. Targeted current reductions during the etching process create constrictions in the macropores, so that a subsequent wet-chemical etching does not connect the macropores in the region of the constrictions. Stabilization layers are formed.

Finally, the invention makes it possible to detach the nanotrade tracts from the wafer without a cloth, without losing the arrangement of the nanowires. Such a cantilever structure has two flat sides with free nanowire ends, at least one of which has regularly arranged nanowire ends. With the invention it is also possible to produce self-supporting nanowire structures with two flat sides with regularly arranged nanowire ends.

For the structures described, it will now be apparent to those skilled in the art that the length of the nanowires in the arrangement by design no longer plays a role, as required Plurality of stabilization layers at different depths in the structure can be generated. As a result, for example, nanowires of several 100 μm in length with diameters of around 100 nm (aspect ratio greater than 1000) can be produced as regular and possibly cantilevered nanowire structures.

Claims

claims

1. Structure of mutually parallel, formed from a semiconductor material nanowires with at least one flat side with freestanding, regularly arranged nanowire ends, characterized by at least one macroporous, formed from the same semiconductor material, from the nanowires perpendicularly penetrated stabilization layer, the freestanding nanowire ends less than 100 μπι survive over the stabilizing layer.

2. Structure according to claim 1, characterized in that the semiconductor material is silicon.

3. Structure according to one of the preceding claims, characterized in that the supernatants are less than 50 μπι, preferably less than 30 μιη.

4. Structure according to one of the preceding claims, characterized in that the length of the nanowires is more than 100 μιη.

5. Structure according to one of the preceding claims, characterized in that a plurality of perpendicularly penetrated by the nanowires layers are arranged at different distances to the nanowire ends.

6. Structure according to one of the preceding claims, characterized in that the structure is cantilevered.

7. A method for producing a nanowire structure according to any one of claims 1 to 6 with the steps

a. electrochemical etching of regularly arranged macropores in a semiconductor wafer to a predetermined final depth and

b. wet-chemical etching of the macroporous wafer region at least until the partial dissolution of the pore walls

characterized by narrowing the macropores at predetermined depth intervals by reducing the etching current at these depth intervals above the final depth.

8. A method for producing a nanowire structure according to claim 7, characterized in that the wet-chemical etching is terminated before the pore walls dissolve in the predetermined depth intervals, so that there remains a macroporous layer.

9. The method according to any one of claims 7 or 8, characterized in that the macropores are widened targeted in the range of the predetermined final depth by increasing the Ätzstromes.

10. The method according to claim 9, characterized by effecting the coalescence of the macropores in the region of the predetermined final depth by increasing the final current and lifting the macroporous wafer area before the wet-chemical etching of the remainder of the wafer.