WO2011058851A1 - Dry etching apparatus and dry etching method - Google Patents

Dry etching apparatus and dry etching method Download PDF

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Publication number
WO2011058851A1
WO2011058851A1 PCT/JP2010/068336 JP2010068336W WO2011058851A1 WO 2011058851 A1 WO2011058851 A1 WO 2011058851A1 JP 2010068336 W JP2010068336 W JP 2010068336W WO 2011058851 A1 WO2011058851 A1 WO 2011058851A1
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lower electrode
dry etching
insulating shield
substrate
etching apparatus
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PCT/JP2010/068336
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French (fr)
Japanese (ja)
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隆夫 松本
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シャープ株式会社
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32642Focus rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means

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  • the present invention relates to a dry etching apparatus and a dry etching method, and more particularly to a dry etching apparatus using plasma. Note that this application claims priority based on Japanese Patent Application No. 2009-260624 filed on November 16, 2009, the entire contents of which are incorporated herein by reference. .
  • a manufacturing process including a thin film forming step used in a semiconductor device manufacturing technique or a liquid crystal display device manufacturing technique, a step of forming a thin film on the surface of a substrate, and a step of performing a patterning process for making the thin film a predetermined pattern Is executed many times.
  • a patterning step for example, after a resist layer is formed in a predetermined pattern on the surface of the thin film by photolithography, an etching process is performed using the resist layer as a mask.
  • One of the etching methods is dry etching, and among them, there is dry etching using plasma.
  • dry etching for example, an apparatus having an electrode structure composed of a pair of opposed parallel plate electrodes housed in a chamber is used (for example, Patent Documents 1 and 2).
  • the substrate is held on the surface of one of the two opposing electrodes, and a high frequency voltage is applied between the two electrodes in this state.
  • An etching gas suitable for the material of the portion to be etched is introduced into the chamber.
  • This etching gas is an appropriate mixture of an inert gas (eg, nitrogen gas, argon gas, etc.) and a reactive gas (eg, chlorine gas, oxygen gas, methane gas, various fluorine gases, etc.).
  • an inert gas eg, nitrogen gas, argon gas, etc.
  • reactive gas eg, chlorine gas, oxygen gas, methane gas, various fluorine gases, etc.
  • the etching gas introduced into the chamber is excited to a high energy state by being activated by a high frequency voltage applied between the electrodes. That is, by applying a high-frequency voltage between the electrodes, plasma is generated between the electrodes, and reactive ions (activated etching gas) are generated in the plasma. Reactive ions are etched by reacting with the surface of the substrate disposed on one electrode and vaporizing a thin film on the surface of the substrate.
  • FIG. 1 is a diagram showing a configuration of a plasma dry etching apparatus 1000 examined by the present inventors.
  • FIG. 1A is a diagram illustrating a top surface configuration including the surface 111 of the lower electrode 110
  • FIG. 1B is a diagram illustrating a cross-sectional configuration of the lower electrode 110 and the substrate 150.
  • a shield ceramic (shield ring) 120 is disposed in the peripheral region of the lower electrode 110.
  • a substrate 150 is disposed on the surface (upper surface) 111 of the lower electrode 110 and part of the surface 121 of the shield ceramic 120.
  • a thin film to be etched is formed on the surface of the substrate 150.
  • the substrate 150 is, for example, a glass substrate for a liquid crystal panel.
  • the shield ceramic 120 is expensive and the dry etching apparatus 1000 cannot be used when the shield ceramic 120 is replaced. This reduces the throughput of the etching process.
  • the present invention has been made in view of such a point, and a main object thereof is to provide a dry etching apparatus capable of suppressing reaction deposits from adhering to a substrate.
  • a dry etching apparatus includes a lower electrode on which a substrate is disposed and an upper electrode facing the lower electrode, and an etching gas introduced between the lower electrode and the upper electrode has a high frequency voltage. Is applied, and an insulating shield is provided in a peripheral region of the lower electrode, and a concave portion is formed in the insulating shield.
  • the upper surface of the lower electrode and the upper surface of the insulating shield are located on a substrate plane.
  • the recess is composed of a wall surface located on the center side of the lower electrode and a bottom surface in contact with the wall surface, and the bottom surface of the recess is in contact with the outer peripheral surface of the insulating shield.
  • the height difference between the top surface of the insulating shield and the bottom surface of the recess is 10 mm or more.
  • the concave portion has a first wall surface located on the center side of the lower electrode, a bottom surface in contact with the first wall surface, and in contact with the bottom surface, on a side opposite to the center side of the lower electrode. It is comprised from the 2nd wall surface located.
  • Another dry etching apparatus according to the present invention includes a lower electrode on which a substrate is disposed, and an upper electrode facing the lower electrode, and an etching gas introduced between the lower electrode and the upper electrode is used as an etching gas.
  • a high frequency voltage is applied, an insulating shield is provided in the peripheral region of the lower electrode, and an inclined surface is formed in the peripheral region of the insulating shield.
  • the insulating shield is made of a ceramic material.
  • the dry etching method according to the present invention excites the etching gas by introducing an etching gas between the lower electrode and the upper electrode facing each other and applying a high frequency voltage between the lower electrode and the upper electrode. And a dry etching method for etching a surface of a substrate disposed on the lower electrode, wherein an insulating shield is provided in a peripheral region of the lower electrode, and the concave portion is provided in the insulating shield. Is formed.
  • an etching gas is introduced between a lower electrode and an upper electrode facing each other, and a high frequency voltage is applied between the lower electrode and the upper electrode, thereby the etching gas. And etching the surface of the substrate disposed on the lower electrode, and an insulating shield is provided in the peripheral region of the lower electrode, and the peripheral region of the insulating shield Is formed with an inclined surface.
  • the substrate is a glass substrate for a liquid crystal panel.
  • the insulating shield is provided in the peripheral region of the lower electrode, A recess is formed. Therefore, since the reaction deposit deposited on the insulating shield is confined in the recess, it is possible to suppress the reaction deposit from adhering to the substrate. In addition, since the replacement time of the insulating shield can be extended, it is possible to reduce the apparatus cost and the throughput of the etching process.
  • FIG. (A) is a top view which shows the structure of the lower electrode surface 111 and the ceramic shield 120 of the dry etching apparatus 1000
  • (b) is a cross section which shows the structure of the lower electrode 110 and the ceramic shield 120 of the dry etching apparatus 1000
  • FIG. (A) is a top view which shows the structure of the surface 11 and insulating shield 20 of the lower electrode of the dry etching apparatus 100 which concerns on embodiment of this invention
  • (b) is the lower electrode 10 of the dry etching apparatus 100
  • 2 is a cross-sectional view showing a configuration of an insulating shield 20.
  • FIG. It is a figure which shows typically an example of a structure of the dry etching apparatus 100 which concerns on embodiment of this invention.
  • FIG. 2 schematically shows the configuration of the dry etching apparatus 100 of the present embodiment.
  • the dry etching apparatus 100 of this embodiment is a dry etching apparatus using plasma. Specifically, in the dry etching apparatus 100, plasma is generated between the electrodes by applying a high frequency voltage between the electrodes, and the reactive ions generated in the plasma are reacted with the surface of the substrate 50 to perform etching. Do.
  • FIG. 2A is a top view showing the lower electrode 10 and its peripheral structure of the dry etching apparatus 100 according to the embodiment of the present invention
  • FIG. 2B is a cross section showing the lower electrode 10 and its peripheral structure.
  • FIG. 2A and 2B do not show the configuration of the upper electrode or the like.
  • the dry etching apparatus 100 includes a lower electrode 10 on which a substrate 50 is disposed and an upper electrode (not shown) facing the lower electrode. During the operation of the dry etching apparatus 100, an etching gas is introduced between the lower electrode 10 and the upper electrode, and a high frequency voltage is applied between the lower electrode 10 and the upper electrode to form plasma.
  • An insulating shield (shield ring) 20 is provided in the peripheral region of the lower electrode 10.
  • the insulating shield of this embodiment is made of a ceramic material.
  • a groove 15 is formed in the peripheral region of the lower electrode 10 of the present embodiment, and the insulating shield 20 is disposed in the groove 15.
  • the lower electrode 10 has a square-shaped groove 15 when viewed from above, and an insulating shield 20 is disposed along the groove 15.
  • a substrate 50 to be etched is disposed on the upper surface 11 of the central region of the lower electrode 10.
  • a recess 21 is formed in the insulating shield 20 of the present embodiment.
  • the recess 21 includes a wall surface 21 c located on the center side of the lower electrode 10 and a bottom surface 21 b in contact with the wall surface 21 c.
  • the height difference (H) between the upper surface 20a of the insulating shield 20 and the bottom surface 21b of the recess 21 is, for example, 10 mm or more.
  • the bottom surface 21 b of the recess 21 in this example is in contact with the outer peripheral surface 20 b of the insulating shield 20. That is, the recess 21 shown in FIG. 2 has an L-shaped cross section.
  • the outer peripheral surface 20b of the insulating shield 20 is a surface continuous with the upper surface 20a of the insulating shield 20.
  • the upper surface 11 of the lower electrode 10 and the upper surface 20a of the insulating shield 20 are located on the same plane (or substantially the same plane).
  • the substrate 50 is disposed on the upper surface 11 of the lower electrode 10 and a part of the upper surface 20 a of the insulating shield 20.
  • the substrate 50 can suppress that the peripheral area
  • a thin film to be etched is formed on the surface of the substrate 50, and the substrate 50 of this embodiment is a glass substrate (for example, an array substrate) for a liquid crystal panel.
  • the recess 21 is formed in the region (outer edge side) 24 where deposition proceeds. Therefore, even if the deposition of reaction deposits (dirt) due to etching becomes severe, it is deposited exclusively on the bottom surface 21 b of the recess 21. Therefore, even if the reaction deposit deposited on the bottom surface 21b of the recess 21 peels off and tries to adhere (reattach) to the surface of the substrate 50, it is blocked by the wall surface 21c of the recess 21 (arrow 25a), and as a result. Adhering to the surface of the substrate 50 can be suppressed. Further, if the reaction deposit on the bottom surface 21b of the recess 21 is peeled off and moves to the outside (arrow 25b), it is not exhausted thereafter, and therefore does not adhere to the surface of the substrate 50.
  • FIG. 3 is a diagram schematically illustrating an example of the configuration of the dry etching apparatus 100.
  • the dry etching apparatus 100 shown in FIG. 3 is a parallel plate type plasma etching apparatus, and the upper electrode 30 and the lower electrode 10 are disposed in the chamber 40 so as to face each other.
  • the upper electrode 30 is connected to the ground 43, while the lower electrode 10 is connected to the high frequency power supply 44.
  • An exhaust port 42 is formed in a part (here, the bottom portion) of the chamber 40, and exhaust is performed through the exhaust port 42 (arrow 45).
  • An etching gas inlet (not shown) is also arranged in the chamber 40.
  • An insulating shield (for example, a ceramic shield) 20 is disposed in the peripheral region of the lower electrode 10.
  • the insulating shield 32 is also disposed in the peripheral region of the upper electrode 30.
  • the insulating shield 20 is provided in the peripheral region of the lower electrode 10 in a structure in which a high frequency voltage is applied to the etching gas introduced between the lower electrode 10 and the upper electrode 30.
  • a recess 21 is formed in the insulating shield 20. Therefore, even if the reaction deposit is deposited on the insulating shield 20, it is confined in the recess 21, so that the reaction deposit can be prevented from adhering to the surface of the substrate 50. As a result, it is possible to prevent the occurrence of defects in the etching process and suppress a decrease in yield.
  • the replacement time of the insulating shield 20 used in the dry etching apparatus 100 can be extended, the apparatus cost can be reduced and the interval between replacements can be increased. This also leads to suppression of a decrease in throughput caused by stopping the process.
  • the substrate 50 of the present embodiment is a glass substrate for a liquid crystal panel, but the substrate 50 may be a mother glass before cutting out to the dimensions of the liquid crystal panel, or the size of the liquid crystal panel after cutting out. Glass may also be used. Further, the substrate 50 may be an array substrate on which a thin film transistor (TFT) is manufactured (or a product in the middle of manufacturing), or a CF substrate on which a color filter (CF) is formed (or a device in the middle of manufacturing thereof). It may be.
  • TFT thin film transistor
  • CF color filter
  • the substrate 50 may be a glass substrate, a resin substrate, or another thin plate such as a wafer.
  • the substrate 50 is not limited to the liquid crystal panel 50, and may be a thin substrate for manufacturing a PDP, an organic EL panel, other flat panel displays, or electronic devices.
  • the configuration of the dry etching apparatus 100 of the present embodiment is not limited to the above-described configuration, and can be changed to other forms.
  • a modified example of the dry etching apparatus 100 of the present embodiment will be described with reference to FIGS. 4 to 7 show cross-sectional configurations of the lower electrode 10 and the insulating shield 20 in the dry etching apparatus 100, respectively.
  • An insulating shield 20 having a recess 21 is formed on the lower electrode 10 of the dry etching apparatus 100 shown in FIG.
  • the recess 21 includes a wall surface 21c located on the center side of the lower electrode 10, a bottom surface 21b, and a wall surface 21d located on the opposite side (outside) from the center side.
  • the wall surface 21d is in contact with the second upper surface 20c of the insulating shield 20, and the second upper surface 20c is in contact with the outer peripheral surface 20b.
  • a reaction deposit (dirt) due to etching is deposited in a region surrounded by the wall surface 21c, the bottom surface 21b, and the wall surface 21d. Therefore, even when the reaction deposit is peeled off, the reaction deposit can be trapped by the concave portion 21, and as a result, adhesion (reattachment) to the surface of the substrate 50 can be suppressed.
  • the reaction deposit when a reaction deposit is deposited on the second upper surface 20 c of the insulating shield 20, the reaction deposit is further prevented from adhering (reattaching) to the surface of the substrate 50. Therefore, the second upper surface 20c is set lower than the first upper surface 20a. However, if the reaction deposit deposited on the second upper surface 20c is trapped in the recess 21 and does not adhere to the surface of the substrate 50, the second upper surface 20c and the first upper surface 20a may be set to the same height. Is possible.
  • the insulating shield 20 having the recess 21 is shown.
  • the inclined surface 23 can be formed on the insulating shield 20.
  • an inclined surface 23 is provided on the outer edge portion of the insulating shield 20.
  • the reaction deposit even if the reaction deposit is peeled off after the reaction deposit is deposited on the inclined surface 23, the reaction deposit only moves outward (arrow 25c). It can prevent adhering to the surface.
  • the angle ⁇ formed by the inclined surface 23 and the upper surface 20a may be set to a desired angle in consideration of various conditions.
  • the inclined surface 23 of the insulating shield 20 is not limited to a straight line but may be a curved line.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Disclosed is a dry etching apparatus, by which adhesion of reaction deposits on a substrate can be suppressed. The dry etching apparatus is provided with a lower electrode (10) having the substrate (50) disposed thereon, and an upper electrode (30) that faces the lower electrode (10). A high frequency voltage is applied to an etching gas to be introduced into between the lower electrode (10) and the upper electrode (30), an insulating shield (20) is provided in the peripheral region of the lower electrode (10), and a recessed section (21) is formed in the insulating shield (20).

Description

ドライエッチング装置およびドライエッチング方法Dry etching apparatus and dry etching method
 本発明は、ドライエッチング装置およびドライエッチング方法に関し、特に、プラズマを用いるドライエッチング装置に関する。
 なお、本出願は2009年11月16日に出願された日本国特許出願2009-260624号に基づく優先権を主張しており、その出願の全内容は本明細書中に参照として組み入れられている。
The present invention relates to a dry etching apparatus and a dry etching method, and more particularly to a dry etching apparatus using plasma.
Note that this application claims priority based on Japanese Patent Application No. 2009-260624 filed on November 16, 2009, the entire contents of which are incorporated herein by reference. .
 半導体装置の製造技術または液晶表示装置の製造技術に用いられる薄膜形成工程を含む製造プロセスにおいては、基板の表面に薄膜を形成する工程と、この薄膜を所定のパターンにするパターニング処理を行う工程とが数多く実行される。パターニング工程においては、例えば、薄膜の表面上にフォトリソグラフィ法によってレジスト層を所定のパターンに形成した後、このレジスト層をマスクとしてエッチング処理を実行する。 In a manufacturing process including a thin film forming step used in a semiconductor device manufacturing technique or a liquid crystal display device manufacturing technique, a step of forming a thin film on the surface of a substrate, and a step of performing a patterning process for making the thin film a predetermined pattern Is executed many times. In the patterning step, for example, after a resist layer is formed in a predetermined pattern on the surface of the thin film by photolithography, an etching process is performed using the resist layer as a mask.
 上記エッチング処理の方法の一つとして、ドライエッチングがあり、その中でも、プラズマを用いるドライエッチングがある。このドライエッチングには、例えば、チャンバ内に収容された互いに対向する平行平板型の一対の電極からなる電極構造を備えた装置が用いられる(例えば、特許文献1、2)。2つの対向する電極のうち一方の表面上には基板が保持され、そして、その状態で2つの電極間に高周波電圧が印加される。チャンバ内には、エッチングすべき部分の材質に適したエッチングガスが導入される。このエッチングガスは、不活性ガス(例えば、窒素ガス、アルゴンガスなど)と反応性ガス(例えば、塩素ガス、酸素ガス、メタンガス、各種のフッ素ガスなど)とを適宜混合したものである。なお、このチャンバ内は、上記エッチングガスが導入される一方で、排気装置によって排気されているので、常時一定の圧力に保持されている。 One of the etching methods is dry etching, and among them, there is dry etching using plasma. For this dry etching, for example, an apparatus having an electrode structure composed of a pair of opposed parallel plate electrodes housed in a chamber is used (for example, Patent Documents 1 and 2). The substrate is held on the surface of one of the two opposing electrodes, and a high frequency voltage is applied between the two electrodes in this state. An etching gas suitable for the material of the portion to be etched is introduced into the chamber. This etching gas is an appropriate mixture of an inert gas (eg, nitrogen gas, argon gas, etc.) and a reactive gas (eg, chlorine gas, oxygen gas, methane gas, various fluorine gases, etc.). The inside of the chamber is always kept at a constant pressure because the etching gas is introduced and exhausted by the exhaust device.
 チャンバ内に導入されたエッチングガスは、電極間に印加された高周波電圧によって活性化されることによって、高エネルギー状態に励起される。すなわち、電極間に高周波電圧を印加することで、電極間にプラズマを発生させ、このプラズマ中で反応性イオン(活性化されたエッチングガス)が生成する。反応性イオンは、一方の電極上に配置された基板の表面と反応し、基板表面上の薄膜などを気化させることによって、エッチングを行う。 The etching gas introduced into the chamber is excited to a high energy state by being activated by a high frequency voltage applied between the electrodes. That is, by applying a high-frequency voltage between the electrodes, plasma is generated between the electrodes, and reactive ions (activated etching gas) are generated in the plasma. Reactive ions are etched by reacting with the surface of the substrate disposed on one electrode and vaporizing a thin film on the surface of the substrate.
特開平11-61452号公報JP 11-61452 A 特開2005-243915号公報JP 2005-243915 A
 プラズマを用いるドライエッチング装置では、高エネルギー状態に励起されたエッチングガスを含むプラズマを、基板面内に安定して閉じ込めておくために、下部電極の周りにシールドセラミック(シールドリング)を配置することがある。図1は、本願発明者が検討したプラズマドライエッチング装置1000の構成を示す図である。図1(a)は、下部電極110の表面111を含む上面構成を示す図であり、図1(b)は、下部電極110および基板150の断面構成を示す図である。 In a dry etching apparatus using plasma, a shield ceramic (shield ring) is placed around the lower electrode in order to stably confine plasma containing an etching gas excited to a high energy state within the substrate surface. There is. FIG. 1 is a diagram showing a configuration of a plasma dry etching apparatus 1000 examined by the present inventors. FIG. 1A is a diagram illustrating a top surface configuration including the surface 111 of the lower electrode 110, and FIG. 1B is a diagram illustrating a cross-sectional configuration of the lower electrode 110 and the substrate 150.
 このドライエッチング装置1000では、下部電極110の周縁領域にシールドセラミック(シールドリング)120が配置されている。また、下部電極110の表面(上面)111とシールドセラミック120の表面121の一部に、基板150が配置されている。基板150の表面には、エッチングされる薄膜が形成されている。なお、基板150は、例えば、液晶パネル用のガラス基板である。 In this dry etching apparatus 1000, a shield ceramic (shield ring) 120 is disposed in the peripheral region of the lower electrode 110. A substrate 150 is disposed on the surface (upper surface) 111 of the lower electrode 110 and part of the surface 121 of the shield ceramic 120. A thin film to be etched is formed on the surface of the substrate 150. The substrate 150 is, for example, a glass substrate for a liquid crystal panel.
 ドライエッチング装置1000を用いて基板150の表面のエッチングを行うと、シールドセラミック120の表面121には、エッチングが進行する領域122と、堆積が進行する領域124とが形成される。これは、下部電極110の表面111に近い部分(122)は、常にエッチングが行われるために堆積は生じずに、一方、下部電極110の表面111から遠い部分(124)は、エッチングよりも反応堆積物の付着の方が進行することに起因している。 When the surface of the substrate 150 is etched using the dry etching apparatus 1000, a region 122 where etching proceeds and a region 124 where deposition progresses are formed on the surface 121 of the shield ceramic 120. This is because the portion (122) close to the surface 111 of the lower electrode 110 is always etched and no deposition occurs, while the portion (124) far from the surface 111 of the lower electrode 110 reacts more than etching. This is due to the fact that deposit adhesion proceeds.
 シールドセラミック120の領域124において、反応堆積物(汚れ)の堆積が酷くなると、それが剥がれて(矢印125参照)、基板150の上に付着(再付着)する可能性がある。基板150上に反応堆積物が付着すると、それがマスクとなり、エッチング工程の不良および歩留まりの低下をもたらすことにもなりかねない。 In the region 124 of the shield ceramic 120, when the deposition of the reaction deposit (dirt) becomes severe, it may peel off (see arrow 125) and adhere (reattach) on the substrate 150. When reactive deposits adhere to the substrate 150, it becomes a mask, which may lead to a defective etching process and a decrease in yield.
 したがって、シールドセラミック120で反応堆積物の堆積が酷くなると、シールドセラミック120を交換する必要がある。しかしながら、シールドセラミック120は高価であるとともに、シールドセラミック120の交換の時はドライエッチング装置1000は使用できないので、エッチング工程のスループットが低下してしまう。 Therefore, when the deposition of reaction deposits becomes severe on the shield ceramic 120, it is necessary to replace the shield ceramic 120. However, the shield ceramic 120 is expensive and the dry etching apparatus 1000 cannot be used when the shield ceramic 120 is replaced. This reduces the throughput of the etching process.
 本発明はかかる点に鑑みてなされたものであり、その主な目的は、反応堆積物が基板に付着することを抑制することができるドライエッチング装置を提供することにある。 The present invention has been made in view of such a point, and a main object thereof is to provide a dry etching apparatus capable of suppressing reaction deposits from adhering to a substrate.
 本発明に係るドライエッチング装置は、基板が配置される下部電極と、前記下部電極に対向する上部電極とを備え、前記下部電極と前記上部電極との間に導入されるエッチングガスには高周波電圧が印可され、前記下部電極の周縁領域には、絶縁性シールドが設けられており、前記絶縁性シールドには、凹部が形成されている。
 ある好適な実施形態において、前記下部電極の上面と前記絶縁性シールドの上面とは、基板平面上に位置している。
 ある好適な実施形態において、前記凹部は、前記下部電極の中央側に位置する壁面と、前記壁面に接する底面とから構成され、前記凹部の底面は、前記絶縁シールドの外周面に接している。
 ある好適な実施形態において、前記絶縁性シールドの上面と前記凹部の底面との間の高低差は、10mm以上である。
 ある好適な実施形態において、前記凹部は、前記下部電極の中央側に位置する第1壁面と、前記第1壁面に接する底面と、前記底面に接し、前記下部電極の中央側とは反対側に位置する第2壁面とから構成されている。
 本発明に係る他のドライエッチング装置は、基板が配置される下部電極と、前記下部電極に対向する上部電極とを備え、前記下部電極と前記上部電極との間に導入されるエッチングガスには高周波電圧が印可され、前記下部電極の周縁領域には、絶縁性シールドが設けられており、前記絶縁性シールドの周縁領域には、傾斜面が形成されている。
 ある好適な実施形態において、前記絶縁性シールドは、セラミック材料から構成されている。
 本発明に係るドライエッチング方法は、互いに対向する下部電極と上部電極との間にエッチングガスを導入し、前記下部電極と前記上部電極との間に高周波電圧を印可することによって前記エッチングガスを励起し、前記下部電極の上に配置された基板の表面をエッチングするドライエッチング方法であり、前記下部電極の周縁領域には、絶縁性シールドが設けられており、前記絶縁性シールドには、凹部が形成されている。
 本発明に係る他のドライエッチング方法は、互いに対向する下部電極と上部電極との間にエッチングガスを導入し、前記下部電極と前記上部電極との間に高周波電圧を印可することによって前記エッチングガスを励起し、前記下部電極の上に配置された基板の表面をエッチングするドライエッチング方法であり、前記下部電極の周縁領域には、絶縁性シールドが設けられており、前記絶縁性シールドの周縁領域には、傾斜面が形成されている。
 ある好適な実施形態において、前記基板は、液晶パネル用のガラス基板である。
A dry etching apparatus according to the present invention includes a lower electrode on which a substrate is disposed and an upper electrode facing the lower electrode, and an etching gas introduced between the lower electrode and the upper electrode has a high frequency voltage. Is applied, and an insulating shield is provided in a peripheral region of the lower electrode, and a concave portion is formed in the insulating shield.
In a preferred embodiment, the upper surface of the lower electrode and the upper surface of the insulating shield are located on a substrate plane.
In a preferred embodiment, the recess is composed of a wall surface located on the center side of the lower electrode and a bottom surface in contact with the wall surface, and the bottom surface of the recess is in contact with the outer peripheral surface of the insulating shield.
In a preferred embodiment, the height difference between the top surface of the insulating shield and the bottom surface of the recess is 10 mm or more.
In a preferred embodiment, the concave portion has a first wall surface located on the center side of the lower electrode, a bottom surface in contact with the first wall surface, and in contact with the bottom surface, on a side opposite to the center side of the lower electrode. It is comprised from the 2nd wall surface located.
Another dry etching apparatus according to the present invention includes a lower electrode on which a substrate is disposed, and an upper electrode facing the lower electrode, and an etching gas introduced between the lower electrode and the upper electrode is used as an etching gas. A high frequency voltage is applied, an insulating shield is provided in the peripheral region of the lower electrode, and an inclined surface is formed in the peripheral region of the insulating shield.
In a preferred embodiment, the insulating shield is made of a ceramic material.
The dry etching method according to the present invention excites the etching gas by introducing an etching gas between the lower electrode and the upper electrode facing each other and applying a high frequency voltage between the lower electrode and the upper electrode. And a dry etching method for etching a surface of a substrate disposed on the lower electrode, wherein an insulating shield is provided in a peripheral region of the lower electrode, and the concave portion is provided in the insulating shield. Is formed.
In another dry etching method according to the present invention, an etching gas is introduced between a lower electrode and an upper electrode facing each other, and a high frequency voltage is applied between the lower electrode and the upper electrode, thereby the etching gas. And etching the surface of the substrate disposed on the lower electrode, and an insulating shield is provided in the peripheral region of the lower electrode, and the peripheral region of the insulating shield Is formed with an inclined surface.
In a preferred embodiment, the substrate is a glass substrate for a liquid crystal panel.
 本発明によれば、下部電極と上部電極との間に導入されるエッチングガスに高周波電圧が印可されるドライエッチング装置において、下部電極の周縁領域に絶縁性シールドが設けられ、絶縁性シールドには凹部が形成されている。したがって、絶縁性シールドの上に堆積する反応堆積物は、凹部の中に閉じ込められてしまうので、その反応堆積物が基板に付着することを抑制することができる。また、絶縁性シールドの交換時期を延ばすことができるので、装置コストの低減、および、エッチング工程のスループットの低下を抑えることが可能となる。 According to the present invention, in the dry etching apparatus in which a high-frequency voltage is applied to the etching gas introduced between the lower electrode and the upper electrode, the insulating shield is provided in the peripheral region of the lower electrode, A recess is formed. Therefore, since the reaction deposit deposited on the insulating shield is confined in the recess, it is possible to suppress the reaction deposit from adhering to the substrate. In addition, since the replacement time of the insulating shield can be extended, it is possible to reduce the apparatus cost and the throughput of the etching process.
(a)は、ドライエッチング装置1000の下部電極の表面111およびセラミックシールド120の構成を示す上面図であり、(b)は、ドライエッチング装置1000の下部電極110およびセラミックシールド120の構成を示す断面図である。(A) is a top view which shows the structure of the lower electrode surface 111 and the ceramic shield 120 of the dry etching apparatus 1000, (b) is a cross section which shows the structure of the lower electrode 110 and the ceramic shield 120 of the dry etching apparatus 1000 FIG. (a)は、本発明の実施形態に係るドライエッチング装置100の下部電極の表面11および絶縁性シールド20の構成を示す上面図であり、(b)は、ドライエッチング装置100の下部電極10および絶縁性シールド20の構成を示す断面図である。(A) is a top view which shows the structure of the surface 11 and insulating shield 20 of the lower electrode of the dry etching apparatus 100 which concerns on embodiment of this invention, (b) is the lower electrode 10 of the dry etching apparatus 100, and 2 is a cross-sectional view showing a configuration of an insulating shield 20. FIG. 本発明の実施形態に係るドライエッチング装置100の構成の一例を模式的に示す図である。It is a figure which shows typically an example of a structure of the dry etching apparatus 100 which concerns on embodiment of this invention. 本発明の実施形態に係る絶縁性シールド20の改変例を示す断面図である。It is sectional drawing which shows the modification of the insulating shield 20 which concerns on embodiment of this invention. 本発明の実施形態に係る絶縁性シールド20の改変例を示す断面図である。It is sectional drawing which shows the modification of the insulating shield 20 which concerns on embodiment of this invention. 本発明の実施形態に係る絶縁性シールド20の改変例を示す断面図である。It is sectional drawing which shows the modification of the insulating shield 20 which concerns on embodiment of this invention. 本発明の実施形態に係る絶縁性シールド20の改変例を示す断面図である。It is sectional drawing which shows the modification of the insulating shield 20 which concerns on embodiment of this invention.
 以下、図面を参照しながら、本発明の実施形態を説明する。以下の図面においては、説明の簡潔化のために、実質的に同一の機能を有する構成要素を同一の参照符号で示す。なお、本発明は以下の実施形態に限定されない。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, components having substantially the same function are denoted by the same reference numerals for the sake of brevity. In addition, this invention is not limited to the following embodiment.
 図2は、本実施形態のドライエッチング装置100の構成を模式的に示している。本実施形態のドライエッチング装置100は、プラズマを用いたドライエッチング装置である。具体的には、ドライエッチング装置100では、電極間に高周波電圧を印加することで電極間にプラズマを発生させ、このプラズマ中で生成した反応性イオンを基板50の表面と反応させることによってエッチングを行う。 FIG. 2 schematically shows the configuration of the dry etching apparatus 100 of the present embodiment. The dry etching apparatus 100 of this embodiment is a dry etching apparatus using plasma. Specifically, in the dry etching apparatus 100, plasma is generated between the electrodes by applying a high frequency voltage between the electrodes, and the reactive ions generated in the plasma are reacted with the surface of the substrate 50 to perform etching. Do.
 図2(a)は、本発明の実施形態に係るドライエッチング装置100の下部電極10およびその周辺構造を示す上面図であり、図2(b)は、下部電極10およびその周辺構造を示す断面図である。なお、図2(a)および(b)では、上部電極などの構成は示していない。 2A is a top view showing the lower electrode 10 and its peripheral structure of the dry etching apparatus 100 according to the embodiment of the present invention, and FIG. 2B is a cross section showing the lower electrode 10 and its peripheral structure. FIG. 2A and 2B do not show the configuration of the upper electrode or the like.
 本実施形態のドライエッチング装置100は、基板50が配置される下部電極10と、下部電極に対向する上部電極(不図示)とから構成されている。ドライエッチング装置100の動作時には、下部電極10と上部電極との間にはエッチングガスが導入され、また、下部電極10と上部電極との間には高周波電圧が印可されてプラズマが形成される。 The dry etching apparatus 100 according to this embodiment includes a lower electrode 10 on which a substrate 50 is disposed and an upper electrode (not shown) facing the lower electrode. During the operation of the dry etching apparatus 100, an etching gas is introduced between the lower electrode 10 and the upper electrode, and a high frequency voltage is applied between the lower electrode 10 and the upper electrode to form plasma.
 下部電極10の周縁領域には、絶縁性シールド(シールドリング)20が設けられている。本実施形態の絶縁性シールドは、セラミック材料から構成されている。本実施形態の下部電極10の周縁領域には、溝15が形成されており、その溝15に絶縁性シールド20が配置されている。図2(a)に示すように、下部電極10は、上面から見て、ロの字型の溝15を有しており、その溝15にあわせて、絶縁性シールド20が配置されている。下部電極10の中央領域の上面11には、エッチングされることになる基板50が配置される。 An insulating shield (shield ring) 20 is provided in the peripheral region of the lower electrode 10. The insulating shield of this embodiment is made of a ceramic material. A groove 15 is formed in the peripheral region of the lower electrode 10 of the present embodiment, and the insulating shield 20 is disposed in the groove 15. As shown in FIG. 2A, the lower electrode 10 has a square-shaped groove 15 when viewed from above, and an insulating shield 20 is disposed along the groove 15. A substrate 50 to be etched is disposed on the upper surface 11 of the central region of the lower electrode 10.
 本実施形態の絶縁性シールド20には、凹部21が形成されている。図2に示した例では、凹部21は、下部電極10の中央側に位置する壁面21cと、壁面21cに接する底面21bとから構成されている。絶縁性シールド20の上面20aと、凹部21の底面21bとの間の高低差(H)は、例えば、10mm以上である。また、この例の凹部21の底面21bは、絶縁性シールド20の外周面20bに接している。すなわち、図2に示した凹部21は、L字型の断面を有している。なお、絶縁性シールド20の外周面20bは、絶縁性シールド20の上面20aと連続した面となっている。 A recess 21 is formed in the insulating shield 20 of the present embodiment. In the example illustrated in FIG. 2, the recess 21 includes a wall surface 21 c located on the center side of the lower electrode 10 and a bottom surface 21 b in contact with the wall surface 21 c. The height difference (H) between the upper surface 20a of the insulating shield 20 and the bottom surface 21b of the recess 21 is, for example, 10 mm or more. Further, the bottom surface 21 b of the recess 21 in this example is in contact with the outer peripheral surface 20 b of the insulating shield 20. That is, the recess 21 shown in FIG. 2 has an L-shaped cross section. The outer peripheral surface 20b of the insulating shield 20 is a surface continuous with the upper surface 20a of the insulating shield 20.
 さらに、本実施形態の構成では、下部電極10の上面11と絶縁性シールド20の上面20aとは、同一平面(または実質的に同一平面)上に位置している。そして、本実施形態では、下部電極10の上面11と絶縁性シールド20の上面20aの一部の上に、基板50は配置されている。これにより、下部電極10の上面11の方を低くした場合と比較して、基板50の周縁領域が反り上がってしまうことを抑制することができる。なお、基板50の大きさによっては、絶縁性シールド20の上面20aに基板50を配置せずに、下部電極10の上面11内で、基板50を配置することも可能である。また、基板50の表面には、エッチングされる薄膜が形成されており、本実施形態の基板50は、液晶パネル用のガラス基板(例えば、アレイ基板)である。 Furthermore, in the configuration of this embodiment, the upper surface 11 of the lower electrode 10 and the upper surface 20a of the insulating shield 20 are located on the same plane (or substantially the same plane). In the present embodiment, the substrate 50 is disposed on the upper surface 11 of the lower electrode 10 and a part of the upper surface 20 a of the insulating shield 20. Thereby, compared with the case where the direction of the upper surface 11 of the lower electrode 10 is made low, it can suppress that the peripheral area | region of the board | substrate 50 raises. Depending on the size of the substrate 50, it is possible to dispose the substrate 50 within the upper surface 11 of the lower electrode 10 without disposing the substrate 50 on the upper surface 20 a of the insulating shield 20. Further, a thin film to be etched is formed on the surface of the substrate 50, and the substrate 50 of this embodiment is a glass substrate (for example, an array substrate) for a liquid crystal panel.
 図2(a)に示すように、ドライエッチング装置100を動作させて基板50の表面のエッチングを実行すると、絶縁性シールド20の表面には、エッチングが進行する領域(中央側)22と、堆積が進行する領域(外縁側)24とが形成される。これは、下部電極10の上面11に近い部分(22)は、常にエッチングが行われるために堆積は生じずに、一方、下部電極10の上面11から遠い部分(24)は、エッチングよりも反応堆積物の付着の方が進行することに起因している。 As shown in FIG. 2A, when the dry etching apparatus 100 is operated to perform etching of the surface of the substrate 50, a region (center side) 22 where etching proceeds and deposition are formed on the surface of the insulating shield 20. And a region (outer edge side) 24 in which the travel proceeds. This is because the portion (22) close to the upper surface 11 of the lower electrode 10 is always etched and no deposition occurs, while the portion (24) far from the upper surface 11 of the lower electrode 10 reacts more than etching. This is due to the fact that deposit adhesion proceeds.
 本実施形態の構成では、堆積が進行する領域(外縁側)24に、凹部21が形成されている。したがって、エッチングによる反応堆積物(汚れ)の堆積が酷くなっても、専ら、凹部21の底面21bの上に堆積することになる。それゆえ、凹部21の底面21bの上に堆積した反応堆積物が剥がれて、基板50の表面に付着(再付着)しようとしても、凹部21の壁面21cで妨げられて(矢印25a)、その結果、基板50の表面に付着することを抑制することができる。また、凹部21の底面21b上の反応堆積物が剥がれて外側に移動したならば(矢印25b)、その後は排気されるため、基板50の表面に付着するものとはならない。 In the configuration of the present embodiment, the recess 21 is formed in the region (outer edge side) 24 where deposition proceeds. Therefore, even if the deposition of reaction deposits (dirt) due to etching becomes severe, it is deposited exclusively on the bottom surface 21 b of the recess 21. Therefore, even if the reaction deposit deposited on the bottom surface 21b of the recess 21 peels off and tries to adhere (reattach) to the surface of the substrate 50, it is blocked by the wall surface 21c of the recess 21 (arrow 25a), and as a result. Adhering to the surface of the substrate 50 can be suppressed. Further, if the reaction deposit on the bottom surface 21b of the recess 21 is peeled off and moves to the outside (arrow 25b), it is not exhausted thereafter, and therefore does not adhere to the surface of the substrate 50.
 次に、図3を参照しながら、本実施形態のドライエッチング装置100の構成を詳述する。図3は、ドライエッチング装置100の構成の一例を模式的に示す図である。 Next, the configuration of the dry etching apparatus 100 of this embodiment will be described in detail with reference to FIG. FIG. 3 is a diagram schematically illustrating an example of the configuration of the dry etching apparatus 100.
 図3に示したドライエッチング装置100は、平行平板型プラズマエッチング装置であり、チャンバ40内には、上部電極30と下部電極10とが対向して配置されている。この例では、上部電極30はグランド43に接続されており、一方、下部電極10は高周波電源44に接続されている。チャンバ40の一部(ここでは底部)には、排気口42が形成されており、排気口42を通じて排気が実行される(矢印45)。なお、チャンバ40内には、エッチングガスの導入口(不図示)も配置されている。 The dry etching apparatus 100 shown in FIG. 3 is a parallel plate type plasma etching apparatus, and the upper electrode 30 and the lower electrode 10 are disposed in the chamber 40 so as to face each other. In this example, the upper electrode 30 is connected to the ground 43, while the lower electrode 10 is connected to the high frequency power supply 44. An exhaust port 42 is formed in a part (here, the bottom portion) of the chamber 40, and exhaust is performed through the exhaust port 42 (arrow 45). An etching gas inlet (not shown) is also arranged in the chamber 40.
 下部電極10の周縁領域には、絶縁性シールド(例えば、セラミックシールド)20が配置されている。図示した構成では、上部電極30の周縁領域にも、絶縁性シールド32が配置されている。ドライエッチング装置100を動作させた場合には、上部電極30と下部電極10との間にプラズマ60が発生し、そして、そのプラズマは、絶縁性シールド32および20によって必要以上に横に広がらないようにされている。 An insulating shield (for example, a ceramic shield) 20 is disposed in the peripheral region of the lower electrode 10. In the illustrated configuration, the insulating shield 32 is also disposed in the peripheral region of the upper electrode 30. When the dry etching apparatus 100 is operated, a plasma 60 is generated between the upper electrode 30 and the lower electrode 10, and the plasma does not spread more than necessary by the insulating shields 32 and 20. Has been.
 本実施形態のドライエッチング装置100によれば、下部電極10と上部電極30との間に導入されるエッチングガスに高周波電圧が印可される構造において、下部電極10の周縁領域に絶縁性シールド20が設けられており、絶縁性シールド20には凹部21が形成されている。したがって、絶縁性シールド20の上に反応堆積物が堆積しても、凹部21の中に閉じ込められてしまうので、その反応堆積物が基板50の表面に付着することを抑制することができる。その結果、エッチング工程の不良の発生を防止し、歩留まりの低下を抑えることが可能となる。加えて、ドライエッチング装置100に用いる絶縁性シールド20の交換時期を延ばすことができるので、装置コストの低減を図ることができるとともに、交換の間隔を長くすることができるということは、交換時に装置を停止することによってもたらされるスループットの低下を抑えることにも繋がる。 According to the dry etching apparatus 100 of the present embodiment, the insulating shield 20 is provided in the peripheral region of the lower electrode 10 in a structure in which a high frequency voltage is applied to the etching gas introduced between the lower electrode 10 and the upper electrode 30. A recess 21 is formed in the insulating shield 20. Therefore, even if the reaction deposit is deposited on the insulating shield 20, it is confined in the recess 21, so that the reaction deposit can be prevented from adhering to the surface of the substrate 50. As a result, it is possible to prevent the occurrence of defects in the etching process and suppress a decrease in yield. In addition, since the replacement time of the insulating shield 20 used in the dry etching apparatus 100 can be extended, the apparatus cost can be reduced and the interval between replacements can be increased. This also leads to suppression of a decrease in throughput caused by stopping the process.
 なお、基板50の上に形成された薄膜(エッチングされる層)に応じて、使用するエッチングガス(エッチャント)は適宜好適なものが選択される。また、本実施形態の基板50は、液晶パネル用のガラス基板であるが、基板50は、液晶パネルの寸法に切り出す前のマザーガラスであってもよいし、切り出した後の液晶パネルのサイズのガラスであってもよい。さらに、基板50は、薄膜トランジスタ(TFT)が作製されるアレイ基板(またはその作製途中のもの)であってもよいし、カラーフィルタ(CF)が形成されるCF基板(またはその作製途中のもの)であってもよい。なお、基板50は、ガラス基板の他、樹脂基板や、ウェハのような他の薄板であっても構わない。加えて、液晶パネル用の基板50に限らず、PDP、有機ELパネル、その他フラットパネルディスプレイまたは電子デバイスを製作する上での薄型の基板であってもよい。 In addition, according to the thin film (layer to be etched) formed on the substrate 50, a suitable etching gas (etchant) to be used is appropriately selected. Further, the substrate 50 of the present embodiment is a glass substrate for a liquid crystal panel, but the substrate 50 may be a mother glass before cutting out to the dimensions of the liquid crystal panel, or the size of the liquid crystal panel after cutting out. Glass may also be used. Further, the substrate 50 may be an array substrate on which a thin film transistor (TFT) is manufactured (or a product in the middle of manufacturing), or a CF substrate on which a color filter (CF) is formed (or a device in the middle of manufacturing thereof). It may be. The substrate 50 may be a glass substrate, a resin substrate, or another thin plate such as a wafer. In addition, the substrate 50 is not limited to the liquid crystal panel 50, and may be a thin substrate for manufacturing a PDP, an organic EL panel, other flat panel displays, or electronic devices.
 また、本実施形態のドライエッチング装置100の構成は上述したものに限らず、他の形態に変更することも可能である。次に、図4から図7を参照しながら、本実施形態のドライエッチング装置100の改変例を説明する。図4から図7は、それぞれ、ドライエッチング装置100における下部電極10および絶縁性シールド20の断面構成を示している。 Further, the configuration of the dry etching apparatus 100 of the present embodiment is not limited to the above-described configuration, and can be changed to other forms. Next, a modified example of the dry etching apparatus 100 of the present embodiment will be described with reference to FIGS. 4 to 7 show cross-sectional configurations of the lower electrode 10 and the insulating shield 20 in the dry etching apparatus 100, respectively.
 図4に示したドライエッチング装置100の下部電極10には、凹部21を有する絶縁性シールド20が形成されている。凹部21は、下部電極10の中央側に位置する壁面21cと、底面21bと、中央側とは反対側(外側)に位置する壁面21dとから構成されている。壁面21dは、絶縁性シールド20の第2上面20cに接しており、そして、この第2上面20cは、外周面20bに接している。 An insulating shield 20 having a recess 21 is formed on the lower electrode 10 of the dry etching apparatus 100 shown in FIG. The recess 21 includes a wall surface 21c located on the center side of the lower electrode 10, a bottom surface 21b, and a wall surface 21d located on the opposite side (outside) from the center side. The wall surface 21d is in contact with the second upper surface 20c of the insulating shield 20, and the second upper surface 20c is in contact with the outer peripheral surface 20b.
 この例の凹部21の場合、壁面21cと底面21bと壁面21dとに囲まれた領域に、エッチングによる反応堆積物(汚れ)が堆積することとなる。したがって、その反応堆積物が剥がれた場合でも、凹部21によって反応堆積物をトラップすることができ、その結果、基板50の表面に付着(再付着)することを抑制することができる。 In the case of the concave portion 21 in this example, a reaction deposit (dirt) due to etching is deposited in a region surrounded by the wall surface 21c, the bottom surface 21b, and the wall surface 21d. Therefore, even when the reaction deposit is peeled off, the reaction deposit can be trapped by the concave portion 21, and as a result, adhesion (reattachment) to the surface of the substrate 50 can be suppressed.
 なお、図4に示した例では、絶縁性シールド20の第2上面20cに反応堆積物が堆積した場合に、その反応堆積物が基板50の表面に付着(再付着)することをより防止するために、第2上面20cは、第1上面20aよりも低くされている。ただし、第2上面20cに堆積した反応堆積物が凹部21でトラップされる結果、基板50の表面に付着しないのであれば、第2上面20cと第1上面20aとを同じ高さにすることも可能である。 In the example shown in FIG. 4, when a reaction deposit is deposited on the second upper surface 20 c of the insulating shield 20, the reaction deposit is further prevented from adhering (reattaching) to the surface of the substrate 50. Therefore, the second upper surface 20c is set lower than the first upper surface 20a. However, if the reaction deposit deposited on the second upper surface 20c is trapped in the recess 21 and does not adhere to the surface of the substrate 50, the second upper surface 20c and the first upper surface 20a may be set to the same height. Is possible.
 また、上述した構成では、絶縁性シールド20に凹部21を形成したものを示したが、図5に示すように、絶縁性シールド20に傾斜面23を形成することも可能である。図5に示した例では、絶縁性シールド20の外縁部に傾斜面23が設けられている。 Moreover, in the above-described configuration, the insulating shield 20 having the recess 21 is shown. However, as shown in FIG. 5, the inclined surface 23 can be formed on the insulating shield 20. In the example shown in FIG. 5, an inclined surface 23 is provided on the outer edge portion of the insulating shield 20.
 この構成によれば、傾斜面23の上に反応堆積物が堆積した後、その反応堆積物が剥がれた場合でも、反応堆積物は外側に移動するだけであるので(矢印25c)、基板50の表面に付着することを防止できる。ここで、傾斜面23と上面20a(または水平線)とのなす角θは、種々の条件を考慮して所望の角度に設定すればよい。 According to this configuration, even if the reaction deposit is peeled off after the reaction deposit is deposited on the inclined surface 23, the reaction deposit only moves outward (arrow 25c). It can prevent adhering to the surface. Here, the angle θ formed by the inclined surface 23 and the upper surface 20a (or horizontal line) may be set to a desired angle in consideration of various conditions.
 以上、本発明を好適な実施形態により説明してきたが、こうした記述は限定事項ではなく、勿論、種々の改変が可能である。例えば、図6に示すように、絶縁性シールド20の傾斜面23は、直線に限らず、曲線であっても構わない。加えて、図7に示すように、絶縁性シールド20に、凹部21と傾斜面23とを両方とも形成することも可能である。 As mentioned above, although this invention has been demonstrated by suitable embodiment, such description is not a limitation matter and, of course, various modifications are possible. For example, as shown in FIG. 6, the inclined surface 23 of the insulating shield 20 is not limited to a straight line but may be a curved line. In addition, as shown in FIG. 7, it is possible to form both the concave portion 21 and the inclined surface 23 in the insulating shield 20.
 本発明によれば、反応堆積物が基板に付着することを抑制できるドライエッチング装置およびドライエッチング方法を提供することができる。 According to the present invention, it is possible to provide a dry etching apparatus and a dry etching method capable of suppressing reaction deposits from adhering to a substrate.
 10 下部電極
 15 溝
 20 絶縁性シールド
 21 凹部
 23 傾斜面
 30 上部電極
 32 絶縁性シールド
 40 チャンバ
 42 排気口
 43 グランド
 44 高周波電源
 50 基板
 60 プラズマ
100 ドライエッチング装置
1000 ドライエッチング装置
DESCRIPTION OF SYMBOLS 10 Lower electrode 15 Groove 20 Insulating shield 21 Recess 23 Inclined surface 30 Upper electrode 32 Insulating shield 40 Chamber 42 Exhaust port 43 Ground 44 High frequency power supply 50 Substrate 60 Plasma 100 Dry etching apparatus 1000 Dry etching apparatus

Claims (10)

  1.  基板が配置される下部電極と、
     前記下部電極に対向する上部電極と
     を備え、
     前記下部電極と前記上部電極との間に導入されるエッチングガスには、高周波電圧が印可され、
     前記下部電極の周縁領域には、絶縁性シールドが設けられており、
     前記絶縁性シールドには、凹部が形成されている、ドライエッチング装置。
    A lower electrode on which the substrate is disposed;
    An upper electrode facing the lower electrode,
    A high frequency voltage is applied to the etching gas introduced between the lower electrode and the upper electrode,
    An insulating shield is provided in the peripheral region of the lower electrode,
    A dry etching apparatus in which a recess is formed in the insulating shield.
  2.  前記下部電極の上面と前記絶縁性シールドの上面とは、同一平面上に位置している、請求項1に記載のドライエッチング装置。 The dry etching apparatus according to claim 1, wherein an upper surface of the lower electrode and an upper surface of the insulating shield are located on the same plane.
  3.  前記凹部は、
           前記下部電極の中央側に位置する壁面と、
           前記壁面に接する底面と
     から構成され、
     前記凹部の底面は、前記絶縁シールドの外周面に接している、請求項1に記載のドライエッチング装置。
    The recess is
    A wall surface located on the center side of the lower electrode;
    A bottom surface in contact with the wall surface,
    The dry etching apparatus according to claim 1, wherein a bottom surface of the recess is in contact with an outer peripheral surface of the insulating shield.
  4.  前記絶縁性シールドの上面と、前記凹部の底面との間の高低差は、10mm以上である、請求項3に記載のドライエッチング装置。 The dry etching apparatus according to claim 3, wherein a height difference between the upper surface of the insulating shield and the bottom surface of the recess is 10 mm or more.
  5.  前記凹部は、
           前記下部電極の中央側に位置する第1壁面と、
           前記第1壁面に接する底面と、
           前記底面に接し、前記下部電極の中央側とは反対側に位置する第2壁面と
     から構成されている、請求項1に記載のドライエッチング装置。
    The recess is
    A first wall surface located on the center side of the lower electrode;
    A bottom surface in contact with the first wall surface;
    The dry etching apparatus according to claim 1, further comprising: a second wall surface that is in contact with the bottom surface and is located on a side opposite to a center side of the lower electrode.
  6.  基板が配置される下部電極と、
     前記下部電極に対向する上部電極と
     を備え、
     前記下部電極と前記上部電極との間に導入されるエッチングガスには、高周波電圧が印可され、
     前記下部電極の周縁領域には、絶縁性シールドが設けられており、
     前記絶縁性シールドの周縁領域には、傾斜面が形成されている、ドライエッチング装置。
    A lower electrode on which the substrate is disposed;
    An upper electrode facing the lower electrode,
    A high frequency voltage is applied to the etching gas introduced between the lower electrode and the upper electrode,
    An insulating shield is provided in the peripheral region of the lower electrode,
    A dry etching apparatus in which an inclined surface is formed in a peripheral region of the insulating shield.
  7.  前記絶縁性シールドは、セラミック材料から構成されている、請求項1から6の何れか一つに記載のドライエッチング装置。 The dry etching apparatus according to any one of claims 1 to 6, wherein the insulating shield is made of a ceramic material.
  8.  互いに対向する下部電極と上部電極との間にエッチングガスを導入し、前記下部電極と前記上部電極との間に高周波電圧を印可することによって前記エッチングガスを励起し、前記下部電極の上に配置された基板の表面をエッチングするドライエッチング方法であって、
     前記下部電極の周縁領域には、絶縁性シールドが設けられており、
     前記絶縁性シールドには、凹部が形成されている、ドライエッチング方法。
    An etching gas is introduced between the lower electrode and the upper electrode facing each other, and the etching gas is excited by applying a high frequency voltage between the lower electrode and the upper electrode, and is disposed on the lower electrode. A dry etching method for etching the surface of a substrate,
    An insulating shield is provided in the peripheral region of the lower electrode,
    A dry etching method in which a concave portion is formed in the insulating shield.
  9.  互いに対向する下部電極と上部電極との間にエッチングガスを導入し、前記下部電極と前記上部電極との間に高周波電圧を印可することによって前記エッチングガスを励起し、前記下部電極の上に配置された基板の表面をエッチングするドライエッチング方法であって、
     前記下部電極の周縁領域には、絶縁性シールドが設けられており、
     前記絶縁性シールドの周縁領域には、傾斜面が形成されている、ドライエッチング方法。
    An etching gas is introduced between the lower electrode and the upper electrode facing each other, and the etching gas is excited by applying a high frequency voltage between the lower electrode and the upper electrode, and is disposed on the lower electrode. A dry etching method for etching the surface of a substrate,
    An insulating shield is provided in the peripheral region of the lower electrode,
    A dry etching method, wherein an inclined surface is formed in a peripheral region of the insulating shield.
  10.  前記基板は、液晶パネル用のガラス基板である、請求項8または9に記載のドライエッチング方法。 The dry etching method according to claim 8 or 9, wherein the substrate is a glass substrate for a liquid crystal panel.
PCT/JP2010/068336 2009-11-16 2010-10-19 Dry etching apparatus and dry etching method WO2011058851A1 (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936098A (en) * 1995-07-18 1997-02-07 Tokyo Electron Ltd Plasma etching system
JP2000082698A (en) * 1994-04-20 2000-03-21 Tokyo Electron Ltd Plasma processing apparatus
JP2000228398A (en) * 1998-11-30 2000-08-15 Kawasaki Steel Corp Processor, method of preventing peeling of adhesive using the same processor and manufacture of semiconductor device, structural elements of the same device and focusing ring
JP2003503841A (en) * 1999-06-30 2003-01-28 ラム リサーチ コーポレーション Technology to improve etch rate uniformity
JP2003100713A (en) * 2001-09-26 2003-04-04 Kawasaki Microelectronics Kk Cover for plasma electrode
JP2005302848A (en) * 2004-04-07 2005-10-27 Toshiba Corp Semiconductor manufacturing equipment and semiconductor manufacturing method
JP2009224385A (en) * 2008-03-13 2009-10-01 Tokyo Electron Ltd Annular component for plasma processing, plasma processing apparatus, and outer annular member

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000082698A (en) * 1994-04-20 2000-03-21 Tokyo Electron Ltd Plasma processing apparatus
JPH0936098A (en) * 1995-07-18 1997-02-07 Tokyo Electron Ltd Plasma etching system
JP2000228398A (en) * 1998-11-30 2000-08-15 Kawasaki Steel Corp Processor, method of preventing peeling of adhesive using the same processor and manufacture of semiconductor device, structural elements of the same device and focusing ring
JP2003503841A (en) * 1999-06-30 2003-01-28 ラム リサーチ コーポレーション Technology to improve etch rate uniformity
JP2003100713A (en) * 2001-09-26 2003-04-04 Kawasaki Microelectronics Kk Cover for plasma electrode
JP2005302848A (en) * 2004-04-07 2005-10-27 Toshiba Corp Semiconductor manufacturing equipment and semiconductor manufacturing method
JP2009224385A (en) * 2008-03-13 2009-10-01 Tokyo Electron Ltd Annular component for plasma processing, plasma processing apparatus, and outer annular member

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