WO2009115481A1

WO2009115481A1 - Method and device for data processing via a gigabit ethernet optical transmission link

Info

Publication number: WO2009115481A1
Application number: PCT/EP2009/053054
Authority: WO
Inventors: Ying Zhen Feng; Qi Tong Sun; Zhen ZENG
Original assignee: Nokia Siemens Networks Oy
Priority date: 2008-03-20
Filing date: 2009-03-16
Publication date: 2009-09-24

Abstract

A method and a device for data processing via a Gigabit Ethernet optical transmission link are provided, wherein an additional header information is conveyed via a preamble. Furthermore, a communication system is suggested comprising said device.

Description

Method and device for data processing via a Gigabit Ethernet optical transmission link

The invention relates to a method and to a device for data processing via a Gigabit Ethernet optical transmission link.

A 10 Gigabit Attachment Unit Interface (XAUI) is an optional, self-managed interface that can be deployed between a recon^¬ ciliation sublayer and a physical (PHY) layer to transparently transmit a frame such as an Ethernet frame.

In some cases, an additional header can be provided to the Ethernet frame. However, it is a disadvantage that additional header information may reduce a transmission bandwidth available for payload data.

A data stream over the XAUI interface comprises several parts, such as

- a preamble,

- a start-of-frame delimiter (SFD) ,

- a frame and

- a MAC inter packet gap (IPG) .

Fig.l shows an exemplary XAUI data stream.

As additional header, a VLAN tag, an MPLS tag, etc. can be inserted into an Ethernet frame as shown in Fig.2. This solu- tion, however, decreases a transmission bandwidth for payload data, especially when short packets are (to be) conveyed. For example, for an Ethernet frame of 64 bytes, a four bytes ad^¬ ditional header is inserted such as a VLAN tag or a NP header, with a preamble comprising a minimum of 20 bytes, a SFD and an IPG. In case of an XAUI bandwidth amounting to

10 Gigabit without the additional header, the bandwidth amounts to 10*64/(64+20) - 7.62 Gigabit; in case of the additional header of 4 bytes included, the valid bandwidth is re- duced to 10*64/(64+24) * 7.273 Gigabit. Accordingly, the more bytes are inserted, the more bandwidth will be lost.

The problem to be solved is to overcome the disadvantages stated above and in particular to provide for an efficient approach to increase a transmission bandwidth that can be utilized for payload data via a Gigabit Attachment Unit Interface .

This problem is solved according to the features of the inde^¬ pendent claims. Further embodiments result from the depending claims .

In order to overcome this problem, a method is provided for data processing via a Gigabit Ethernet optical transmission link,

— wherein an additional header information is conveyed via a preamble.

Said preamble can be a field provided in a protocol to be run on the Gigabit Ethernet optical transmission link. The preamble may be a field or a portion of data comprising in particular control information, e.g., alignment, synchronization and/or clock rate compensation information.

This approach bears the advantage that due to the additional header information provided in the preamble a bandwidth uti^¬ lized for payload data is not impaired. This approach may in particular be useful in case of communication without a phy- sical layer, e.g., via a MAC to MAC interface.

In an embodiment, the Gigabit Ethernet optical transmission link comprises an Ethernet over SDH interface that is in particular based on a 10 Gigabit Attachment Unit Interface (XAUI) .

It is noted that the approach provided may be applicable in optical transmission link scenarios utilizing, e.g., 1 Gigabit Ethernet, 10 Gigabit Ethernet or 100 Gigabit Ether^¬ net .

It is also an embodiment that the Gigabit Ethernet optical transmission link comprises or is associated with a DWDM transmission link and/or an SDH transmission link.

Hence, wavelength-division multiplexing (WDM) may apply, which multiplexes multiple optical carrier signals on a sin- gle optical fiber by using different wavelengths (colors) of a laser light to carry different signals. This allows for a multiplication in capacity, in addition enabling bidirectional communications over one strand of fiber.

In another embodiment, the additional header information comprises a channel identification information.

Such channel identification information can be any information related to or associated with a channel. This is in parti- cular useful if a mapping of channels needs to be conducted via said XAUI .

In a further embodiment, the additional header information comprises the channel identification information of a multi channel interface, in particular a system packet interface level protocol (SPI-4) .

In a next embodiment, the additional header information comprises a parity check information, in particular a bit- interleaved parity check for the channel identification information .

It is also an embodiment that the channel identification information is associated with virtual circuit (VC) informati- on . Pursuant to another embodiment, the additional header infor^¬ mation comprises a segment information indicating an interleaving of channels.

Such segment information can be used for interleaving as well as for de-interleaving purposes. The segment information may indicate with which channel a segment is associated. The segment information could be supplied by a scheduler mixing various channels in at least one data stream. The segment in- formation can be decoded by an inverse scheduler (de- scheduler) receiving and processing such a data stream into several channels.

According to an embodiment, the additional header information comprises a data protection, in particular a redundancy information .

For example, a CRC-field can be provided to protect the addi^¬ tional header information or at least a portion thereof.

The problem stated above is also solved by a device comprising a and/or being associated with a processor unit and/or a hard-wired circuit and/or a logic device that is arranged such that the method as described herein is executable there- on.

An ASIC or an FPGA could be used as such hard-wired circuits. Hence, the device may be a communication ASIC chip or a communication FPGA with a 10 Gigabit Attachment Unit Interface (XAUI) .

The problem stated supra is further solved by a communication system comprising the device as described herein.

Embodiments of the invention are shown and illustrated in the following figures: Fig.l shows a XAUI data stream comprising in particular a frame and an IPG;

Fig.2 shows a VLAN tag that is inserted into an Ethernet frame;

Fig.3 shows an IDLE sequence, which is transformed into a sequence comprising various code groups based on a XAUI implementation;

Fig.4 shows a 10 Gigabit Ethernet over SDH card comprising a network processor NP that is connected to a data mapper DM via an 10 Gigabit Attachment Unit Interface (XAUI) ;

Fig.5 shows a diagram of a data stream comprising a preamble with an additional header containing a channel identification and 2 bits of information used for a bit-interleaved parity check;

Fig.6 shows a block diagram visualizing as how XAUI interleave mode could be supported from a XAUI source to a XAUI destination;

Fig.7 shows a symbolic diagram visualizing the principle of interleaving segments from different channels by a scheduler;

Fig.8 shows a diagram of a data portion with the additional header comprising a segment size information that can be utilized for interleaving and de-interleaving pur^¬ poses over the XAUI;

Fig.9 shows a generic diagram of a XAUI data portion com- prising the additional header and a reserved field. The following may exemplary refer to Gigabit Ethernet of SDH. However, Gigabit Ethernet over any optical transmission link may be applicable as well, e.g., Gigabit Ethernet via DWDM.

Another approach could be reducing the IPG to compensate for the bandwidth loss caused by inserting the additional header. The IPG starts with a terminate control character followed by idle control characters and ends with an idle control character prior to a start control character.

In the XAUI physical coding sublayer (PCS), the idle control character "I" can be transformed into three code groups, referred to as I |K| I, I I A| I and I |R| I as shown in Fig.3. A syn^¬ chronization code group I |K| | is used to provide a code-group synchronization process by which the receiver detects code group boundaries in the incoming bit stream of each lane. An align code group | |A| | helps compensating a the lane-to-lane skew caused by, e.g., a route on a printed circuit board (PCB) or by any other reason.

The code groups I |K| | and I |A| | are required by an XAUI receiver, wherein the code group I |R| I can be added or deleted. Such code group | |R| | is used for clock rate compensation purposes in case of multiple clock domains. Therefore, this approach sacrifices the capability of clock rate compensation to an increase of bandwidth.

The approach provided in particular suggests modifying a preamble to transmit an additional header according to parti- cular requirements. For example, in a 10 Gigabit Ethernet over SDH transmission equipment, the preamble field can be utilized to transmit a channel identifier.

Fig.4 shows a 10 Gigabit Ethernet over SDH card comprising a network processor NP that is connected to a data mapper DM via a 10 Gigabit Attachment Unit Interface (XAUI) . The network processor NP receives a 10 Gigabit Ethernet frame via a multi-channel interface SPI4.2, in particular after a layer-2 (L2) switching. The network processor NP sends the Ethernet frame to the data mapper DM through the XAUI interface, which maps the Ethernet frame into SDH payload. The data mapper DM can be implemented as an FPGA.

The SPI4.2 interface is an interface supporting up to 256 channels, while XAUI is not equipped for multi-channel applications. As a SPI4.2 channel is mapped to a SDH VC group, the channel ID (of the SPI4.2 channel) is an important piece of information that may not be omitted. To transmit this channel identification (ID), the preamble of the XAUI can be modified as shown in Fig.5. For example, if 64 VC groups are supported, SPI4.2 as well as XAUI both may preferably support 64 channels as well. The second byte of the preamble can thus be efficiently replaced by an additional header of one byte comprising a 6 bit channel ID and 2 bits of an bit- interleaved parity check for the channel ID.

Hence, the XAUI can be modified to support an interleave mode in case of the SPI4.2 interface using such an interleave mode. Fig.6 shows a block diagram visualizing as how XAUI interleave mode could be supported. In a step 601 data is fed to a multi channel FIFO buffer, which data is segmented in a step 602 and transmitted via XAUI in a step 603. In a step 604 the XAUI information is received, reassembled in a step 605 and conveyed to a multi channel FIFO buffer 606, which matches the data initially fed to the buffer on the transmit^¬ ting side.

On the XAUI source side, packets are divided into several segments (see step 602 in Fig.6). Such segments from diffe^¬ rent channels can be interleaved by a scheduler 701 as shown in Fig.7. The segments are regarded as Ethernet frames over the XAUI .

An additional header is provided to allow for these segments to be reassembled on the receiving side. Fig.8 shows a preamble structure that can be used to support an interleave mode over the XAUI. In Fig.8, the additional header field comprises

- 1 bit end-of-packet (eop) ;

- 1 bit start-of-packet (sop) ; - 14 bits segment size;

- 1 byte channel ID;

- 1 byte cyclic redundancy check (CRC) .

The eop is used to indicate whether the last segment is an end of a packet or not. The sop is used to indicate the be^¬ ginning of the packet. The segments size determines the segment length supporting, e.g., 16 Kbytes. The CRC information is used to protect the additional header.

A generic format of a XAUI data stream is shown in Fig.9. For example, the additional header may have a size of less than 6 bytes .

The additional header 901 and the reserved field 902 together allocate 6 bytes, wherein the additional header 901 may be set to n bytes. Hence, the reserved field 902 comprises 6-n bytes, wherein each of the bytes of the reserved field 902 may contain a particular pattern, e.g., "10101010".

Modification of the preamble is standard-compliant

IEEE 802.3 defines a function of the preamble. The preamble comprises 7 octets and allows a PLS circuitry reaching its steady-state synchronization with a timing of a received fra- me. The preamble pattern is 7 times "10101010".

This pattern shall be transmitted by a data terminal equipment (DTE) via a data-out circuit to a medium attachment unit (MAU) for a duration of at least 56 bits at the beginning of each frame.

The DTE may supply at least 56 bits of such a preamble to satisfy system requirements. System components use preamble bits in order to perform their functionality. The number of preamble bits generated allows for an adequate number of bits to be provided to each system component to correctly implement its function. In particular, the preamble is important to the physical layer.

With regard to the XAUI, the preamble is transformed to one S control characters and 6 Dp data characters. IEEE 802.3ae clause 48 defines that the start or I IS I I ordered set direct- Iy maps to a start control character in lane 0 followed by any three data characters in lanes 1 through 3. Normally, the three data characters will be the preamble pattern, but the PCS neither checks nor alters their contents. I |S| | indicates to the PCS that a packet has been initiated. Thus, the preamble does not matter to the XAUI except for the first characters which will be the S control characters .The remaining six bytes can be used for transmitting information via the additional header.

This method in particular applies to a case with no physical layer, such as a MAC to MAC interface. In such case, the preamble field is not used by any physical layer functionali^¬ ty.

Further Advantages:

(a) The approach provided does not reduce the transmission bandwidth and efficiently utilizes the additional header .

(b) There is no need to modify the XAUI protocol. In par^¬ ticular, the capability of XAUI is not impaired.

(c) The additional header can be defined by users according to their applications.

(d) The XAUI may support an interleave mode, e.g., in combination with SPI4.2. List of Abbreviations; Further Explanations:

ASIC Application Specific Integrated Circuit bip Bit-Interleaved Parity Check

DM Data Mapper

Dp "10101010" , preamble pattern

Ds SFD, "10101011"

DTE Data Terminal Equipment

DWDM Dense Wavelength Division Multiplexing

EFD End-of-Frame Delimiter eop End-of-Packet

EOS Ethernet over SDH

FPGA Field-Programmable Gate Array

I idle character inter-frame The mter-frame period is an interval during which no frame data activity occurs. The in- ter-frame corresponding to the MAC inter packet gap begins with a terminate control character, followed by idle control characters and ends with an idle control character prior to a start control character.

IPG MAC Inter Packet Gap

MAC Medium Access Control

MAU Medium Attachment Unit

MPLS Multi-Protocol Label Switching

NG Next Generation

NP Network Processor

PCS Physical Coding Sublayer

PHY Physical Layer entity Sublayer

PLS Physical Signaling Sublayer

S start control character

SDH Synchronous Digital Hierarchy

SFD Start-of-Frame Delimiter sop Start-of-Packet

SPI System Packet Interface

VC Virtual Container

VLAN Virtual Local Area Network XAUI 10 Gigabit Attachment Unit Interface, which may be designed to extend a connection between a 10 Gbps capable MAC and a 10 Gbps PHY

A An align or I |A| | ordered set comprising a unique special code-group, also known as Align or /A/ in each lane. /A/ may not be used in any other ordered set. The definition of a 10GBASE-X ordered set guarantees that /A/ code-groups are simultaneously initiated on all lanes at the transmitter, resulting in minimal lane-to-lane skew at the transmitter.

K Code-group synchronization is the process by which the receiver detects code-group bounda^¬ ries in the incoming bit stream of each lane. The detection of a comma pattern in the incoming bit stream identifies a code-group boundary. The Sync or K ordered set included in an PCS idle sequence guarantees a sufficient frequency of commas in each lane.

R The skip or I |R| I ordered set is included in the PCS idle sequence to allow for clock rate compensation in case of multiple clock domains. Clock rate compensation may be performed via insertion or removal of either idle characters in the un-encoded data stream or in the encoded idle stream. Any code group R may be removed. The code group I |R| I may be inserted anywhere in the idle stream with the exception of the first column following a code group I I T

A start or I I S | | ordered set directly maps to the start control character in lane 0 followed by any three data characters in lanes 1 through 3.

Claims

Claims :

1. A method for data processing via a Gigabit Ethernet optical transmission link,

- wherein an additional header information is conveyed via a preamble.

2. The method according to claim 1, wherein the Gigabit Ethernet transmission link comprises an Ethernet over SDH interface that is in particular based on a 10 Gigabit Attachment Unit Interface (XAUI) .

3. The method according to any of the preceding claims, wherein the Gigabit Ethernet optical transmission link comprises or is associated with a DWDM transmission link and/or an SDH transmission link.

4. The method according to any of the preceding claims, wherein the additional header information comprises a channel identification information.

5. The method according to claim 4, wherein the additional header information comprises the channel identification information of a multi channel interface, in particular a system packet interface level protocol (SPI-4) .

6. The method according to any of claims 4 or 5, wherein the additional header information comprises a parity check information, in particular a bit-interleaved parity check for the channel identification information.

7. The method according to any of claims 4 to 6, wherein the channel identification information is associated with virtual circuit information.

8. The method according to any of the preceding claims, wherein the additional header information comprises a segment information indicating an interleaving of channels .

9. The method according to any of the preceding claims, wherein the additional header information comprises a data protection, in particular a redundancy information.

10. A device comprising a and/or being associated with a processor unit and/or a hard-wired circuit and/or a logic device that is arranged such that the method according to any of the preceding claims is executable thereon .

11. The device according to claim 10, wherein said device is a communication device, in particular a or being associ^¬ ated with a Gigabit Ethernet device or card, a network processor and/or a data mapper.

12. The device according to claim 10, wherein said device is a 10 Gigabit Attachment Unit Interface device.

13. Communication system comprising the device according to any of claims 10 to 12.