WO2009075074A1 - Information processing device and information processing method - Google Patents

Information processing device and information processing method Download PDF

Info

Publication number
WO2009075074A1
WO2009075074A1 PCT/JP2008/003552 JP2008003552W WO2009075074A1 WO 2009075074 A1 WO2009075074 A1 WO 2009075074A1 JP 2008003552 W JP2008003552 W JP 2008003552W WO 2009075074 A1 WO2009075074 A1 WO 2009075074A1
Authority
WO
WIPO (PCT)
Prior art keywords
real time
packet
information processing
transferred
received
Prior art date
Application number
PCT/JP2008/003552
Other languages
French (fr)
Japanese (ja)
Inventor
Tatsuya Maruyama
Tsutomu Yamada
Norihisa Yanagihara
Original Assignee
Hitachi Industrial Equipment Systems Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Industrial Equipment Systems Co., Ltd. filed Critical Hitachi Industrial Equipment Systems Co., Ltd.
Publication of WO2009075074A1 publication Critical patent/WO2009075074A1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system

Abstract

When a packet such as a control instruction requiring a real time execution is received in a computer in which a general-purpose OS is operating, it is impossible to guarantee a temporal constriction posed on the real time processing. As shown in Fig. 1, a computer component (104) which has received a packet from a network (101) judges whether the packet is to be transferred in real time by using a user logic IC (114). If the packet is to be transferred in a real time, a priority queue of a communication buffer (116) is selected and the packet is immediately transferred to other computer component (104) which can perform a real time process. Simultaneously with this, interrupt signal lines (126, 118) are asserted so as to report an interrupt signal indicating a real time transfer.
PCT/JP2008/003552 2007-12-13 2008-12-02 Information processing device and information processing method WO2009075074A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007322144A JP4951486B2 (en) 2007-12-13 2007-12-13 Information processing apparatus and information processing method
JP2007-322144 2007-12-13

Publications (1)

Publication Number Publication Date
WO2009075074A1 true WO2009075074A1 (en) 2009-06-18

Family

ID=40755323

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/003552 WO2009075074A1 (en) 2007-12-13 2008-12-02 Information processing device and information processing method

Country Status (2)

Country Link
JP (1) JP4951486B2 (en)
WO (1) WO2009075074A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7087921B2 (en) * 2018-10-31 2022-06-21 富士通株式会社 Processing framework linkage device, processing framework linkage method and processing framework linkage program

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09163462A (en) * 1995-12-12 1997-06-20 Inmeru:Kk Multiple dwelling house information processing system
JP2000067115A (en) * 1998-08-18 2000-03-03 Nec Corp System and method for distributing data
JP2000332787A (en) * 1999-05-21 2000-11-30 Hitachi Ltd Packet repeater and packet priority setting method
JP2001119331A (en) * 1999-10-18 2001-04-27 Matsushita Electric Ind Co Ltd Communication method between vehicles and repeater
JP2002290493A (en) * 2001-03-22 2002-10-04 Fujitsu Denso Ltd Data transfer system and transmission side and reception side devices
JP2003179636A (en) * 2001-12-12 2003-06-27 Fujitsu Ltd CONGESTION CONTROL SYSTEM FOR VoIP NETWORK
JP2005513917A (en) * 2001-12-10 2005-05-12 シーメンス アクチエンゲゼルシヤフト Method for transmitting data of applications having different qualities
JP2007034582A (en) * 2005-07-26 2007-02-08 Hitachi Industrial Equipment Systems Co Ltd Inter-module communication equipment

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63142739A (en) * 1986-12-04 1988-06-15 Nec Corp Data transmission system
JPH1070534A (en) * 1996-08-28 1998-03-10 Taisei Corp Data transferring method between computers
JPH11136309A (en) * 1997-10-28 1999-05-21 Omron Corp Data processing system
JP3970282B2 (en) * 2002-10-16 2007-09-05 松下電器産業株式会社 IC card, data transfer device, data transfer method, and program for data transfer method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09163462A (en) * 1995-12-12 1997-06-20 Inmeru:Kk Multiple dwelling house information processing system
JP2000067115A (en) * 1998-08-18 2000-03-03 Nec Corp System and method for distributing data
JP2000332787A (en) * 1999-05-21 2000-11-30 Hitachi Ltd Packet repeater and packet priority setting method
JP2001119331A (en) * 1999-10-18 2001-04-27 Matsushita Electric Ind Co Ltd Communication method between vehicles and repeater
JP2002290493A (en) * 2001-03-22 2002-10-04 Fujitsu Denso Ltd Data transfer system and transmission side and reception side devices
JP2005513917A (en) * 2001-12-10 2005-05-12 シーメンス アクチエンゲゼルシヤフト Method for transmitting data of applications having different qualities
JP2003179636A (en) * 2001-12-12 2003-06-27 Fujitsu Ltd CONGESTION CONTROL SYSTEM FOR VoIP NETWORK
JP2007034582A (en) * 2005-07-26 2007-02-08 Hitachi Industrial Equipment Systems Co Ltd Inter-module communication equipment

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
YOICHI NASUNO ET AL.: "Router de Kyoka suru IP Network Dai 4 Kai QoS", NIKKEI NETWORK, no. 57, 22 December 2004 (2004-12-22), pages 184 - 189 *

Also Published As

Publication number Publication date
JP4951486B2 (en) 2012-06-13
JP2009146123A (en) 2009-07-02

Similar Documents

Publication Publication Date Title
US9798645B2 (en) Embedding stall and event trace profiling data in the timing stream
US8380966B2 (en) Method and system for instruction stuffing operations during non-intrusive digital signal processor debugging
JP4975544B2 (en) Simulation apparatus and program
WO2006083836A3 (en) Transmit completion event batching
US10642820B2 (en) Method for data processing and related products
TW201229911A (en) Interrupt distribution scheme
KR20100135282A (en) Virtual-interrupt-mode interface and method for virtualizing an interrupt mode
KR20090084939A (en) Method and system for trusted/untrusted digital signal processor debugging operations
US7984336B2 (en) Method and system for storing data from a plurality of processors
WO2006083868A3 (en) Including descriptor queue empty events in completion events
WO2008033391A3 (en) System and method for using stream objects to perform stream processing in a text-based computing environment
CN102768648B (en) Gatherer, the system with this gatherer and correlation technique are interrupted in low delay
TW200705186A (en) Trusted LPC docking interface for docking notebook computers to a docking station
CN101763324B (en) Method for realizing equipment simulating and device thereof
MX2014008310A (en) Input pointer delay.
WO2009075074A1 (en) Information processing device and information processing method
WO2008084541A1 (en) Receiver and control method for strting of the same
CN102117223A (en) Method for realizing interrupt response of application program of LXI loading board to M module by utilizing asynchronous notification
US5964853A (en) Interface controller including hardware mechanism to handle PS/2 interface
CN110175139A (en) A kind of the Universal debugging method and USB device of USB device
CN203894745U (en) Interface control circuit and related input system
KR100777568B1 (en) High-speed real-time monitoring method for embedded systems
JP5226848B2 (en) Simulation apparatus and program
CN107391406B (en) Microprocessor for protocol processing and protocol processing method
EP1686510A4 (en) Electronic device and control method thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08860368

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08860368

Country of ref document: EP

Kind code of ref document: A1