WO2009053963A3 - Methods for adaptively programming flash memory devices and flash memory systems incorporating same - Google Patents
Methods for adaptively programming flash memory devices and flash memory systems incorporating same Download PDFInfo
- Publication number
- WO2009053963A3 WO2009053963A3 PCT/IL2008/001242 IL2008001242W WO2009053963A3 WO 2009053963 A3 WO2009053963 A3 WO 2009053963A3 IL 2008001242 W IL2008001242 W IL 2008001242W WO 2009053963 A3 WO2009053963 A3 WO 2009053963A3
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- WO
- WIPO (PCT)
- Prior art keywords
- flash memory
- programming
- memory functional
- methods
- selectable
- Prior art date
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0064—Verifying circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5641—Multilevel memory having cells with different number of storage levels
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Read Only Memory (AREA)
Abstract
A method for programming a plurality of data sequences into a corresponding plurality of flash memory functional units using a programming process having at least one selectable programming duration-controlling parameter, the method comprising providing at least one indication of at least one varying situational characteristic and determining a value for said at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, for each flash memory functional unit, depending at least partly on said indication of said varying characteristic; and, for each individual flash memory functional unit from among said plurality of flash memory functional units, programming a sequence of bits into said individual flash memory functional unit using a programming process having at least one selectable parameter, said at least one selectable parameter being set at said value determined for said individual flash memory functional unit.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/596,680 US8694715B2 (en) | 2007-10-22 | 2008-09-17 | Methods for adaptively programming flash memory devices and flash memory systems incorporating same |
US13/956,260 US8799563B2 (en) | 2007-10-22 | 2013-07-31 | Methods for adaptively programming flash memory devices and flash memory systems incorporating same |
Applications Claiming Priority (16)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US96094307P | 2007-10-22 | 2007-10-22 | |
US60/960,943 | 2007-10-22 | ||
US99678207P | 2007-12-05 | 2007-12-05 | |
US60/996,782 | 2007-12-05 | ||
US680508P | 2008-01-31 | 2008-01-31 | |
US61/006,805 | 2008-01-31 | ||
US6485308P | 2008-03-31 | 2008-03-31 | |
US61/064,853 | 2008-03-31 | ||
US7146908P | 2008-04-30 | 2008-04-30 | |
US7146508P | 2008-04-30 | 2008-04-30 | |
US61/071,465 | 2008-04-30 | ||
US61/071,469 | 2008-04-30 | ||
US12941408P | 2008-06-25 | 2008-06-25 | |
US61/129,414 | 2008-06-25 | ||
US12960808P | 2008-07-08 | 2008-07-08 | |
US61/129,608 | 2008-07-08 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/596,680 A-371-Of-International US8694715B2 (en) | 2007-10-22 | 2008-09-17 | Methods for adaptively programming flash memory devices and flash memory systems incorporating same |
US13/956,260 Continuation US8799563B2 (en) | 2007-10-22 | 2013-07-31 | Methods for adaptively programming flash memory devices and flash memory systems incorporating same |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009053963A2 WO2009053963A2 (en) | 2009-04-30 |
WO2009053963A3 true WO2009053963A3 (en) | 2010-03-04 |
Family
ID=40580188
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IL2008/001242 WO2009053963A2 (en) | 2007-10-22 | 2008-09-17 | Methods for adaptively programming flash memory devices and flash memory systems incorporating same |
Country Status (1)
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WO (1) | WO2009053963A2 (en) |
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