WO2008106879A1

WO2008106879A1 - Data transfer process device and method

Info

Publication number: WO2008106879A1
Application number: PCT/CN2008/070350
Authority: WO
Inventors: Yang Xia; Yinghui Guo; Yunquan Xue; Qiuming Gao
Original assignee: Huawei Technologies Co., Ltd.
Priority date: 2007-03-08
Filing date: 2008-02-22
Publication date: 2008-09-12
Also published as: CN101043446A

Abstract

A data transfer process device, mainly includes: a receiving unit for receiving data messages to be transferred, and extracting transfer information of the data messages; a buffer unit for buffering the data messages received by the receiving unit; a transfer process unit for extracting sending information of the data messages according to the transfer information extracted by the receiving unit, through multiple serial and/or parallel processors established in advance, and sending it to sending unit; a sending unit for extracting corresponding data messages in the buffer unit according to the sending information extracted by the transfer process unit, and transferring the data messages to destination ports. And a data transfer process method. By means of the method and device, the operating system is needless, and it is suitable for effective data transfer process. Meanwhile, the cost of software and hardware, simultaneously the complexity of software can be reduced, and the process performance can be enhanced.

Description

TECHNICAL FIELD The present invention relates to communications technologies, and in particular, to a data forwarding processing method and apparatus. BACKGROUND OF THE INVENTION A multi-core processor integrates multiple general-purpose processor cores on a single physical chip that share an external bus and memory. Each core has a completely separate CPU structure, such as register banks, pipelines, arithmetic units, caches, etc., which can operate as a stand-alone CPU. When the processor's main frequency and power consumption become bottlenecks, multi-core technology can greatly improve the processing power of the chip.

Multi-core processor application in network processing, a key technical point in software design is the choice of system architecture. Now multi-core processor system architecture is generally divided into symmetric multi-processor (SMP, Symmetric Multi Process) and asymmetric multi-processor. Way (AMP, Asymmetric Multi Process).

AMP is a different core for different tasks. In this case, each core runs a separate operating system. Referring to Figure 1, Figure 1 is a schematic diagram of a prior art AMP architecture system. Each CPU has an independent operating system such as OSl (Operation systeml), 0S2, and so on. In the AMP mode, different processors handle different tasks. For example, one processor only processes the protocol of the control plane, and the other processor only processes the data forwarding of the data plane. The AMP method has little to do with the operating system. Resource allocation, sharing, and inter-CPU communication are all defined and designed by the user.

In the AMP mode, when the number of cores is increased, the structure of the application needs to be redesigned, and the design complexity is not linearly increased, and the complexity is much increased. And inter-core synchronous core communication is realized by application layer messages, which is inefficient.

SMP means that each processor can handle any task equally. In this case, only one operating system is running, managing all the processors and resources. Referring to Figure 2, Figure 2 is a prior art SMP Schematic diagram of the architecture system. In this mode, each processor handles various types of resource management on average, and the process allocation is done by the operating system OS. The SMP method has good scalability. When you increase the number of cores, the application does not need to be modified. The OS can see and manage all resources, automatically handle resource sharing, and arbitrate issues. The OS dynamically allocates and adjusts the load on each core to optimize system performance. Inter-core communication and synchronization are done through the OS kernel and are highly efficient. Because the operating system is capable of managing all resources, it is easy to obtain various statistics of the system's operation to evaluate and optimize the system. Due to the high operating system requirements of SMP, there are not many real-time operating systems that support multi-core processor SMP. In SMP mode, the performance cannot fully meet the requirements of an efficient data forwarding plane, and it cannot be supported by some complex applications. Summary of the invention

In view of this, the main object of embodiments of the present invention is to provide a method and apparatus for data forwarding processing. The purpose of the embodiment of the present invention is achieved by the following technical solutions:

An embodiment of the present invention provides an apparatus for data forwarding processing, including:

a receiving unit, configured to receive a data packet to be forwarded, and extract forwarding information of the data packet; and a buffer unit, configured to buffer a data packet received by the receiving unit;

a forwarding processing unit, configured to extract, according to the forwarding information extracted by the receiving unit, the sending information of the data packet by using a plurality of serial and/or parallel processors set in advance;

And a sending unit, configured to extract, according to the sending information extracted by the forwarding processing unit, the corresponding data packet in the buffer unit, and forward the extracted data packet to the destination port.

In addition, the embodiment of the present invention further provides a data forwarding method, including:

The receiving unit puts the received data message into the cache unit;

Receiving, by the receiving unit, the forwarding information of the data packet, and sending the forwarding information to the forwarding processing unit;

And forwarding, by the forwarding processing unit, the sending information of the data packet by using a plurality of serial and/or parallel processors set in advance according to the forwarding information, and transmitting the sending information;

The sending unit receives the sending information, and extracts a corresponding one in the buffer unit according to the sending information. The data packet is forwarded to the destination port.

It can be seen from the technical solutions provided by the foregoing embodiments of the present invention that the data forwarding processing method and apparatus provided by the embodiments of the present invention do not require an operating system and only provide one heap and stack, which is suitable for efficient data forwarding processing. Compared with the single task under the operating system, the resource usage is small, the software and hardware overhead is reduced, and the complexity of the software is reduced, and the processing performance is improved. DRAWINGS

1 is a schematic diagram of a prior art AMP framework system;

2 is a schematic diagram of a prior art SMP architecture system;

3 is a schematic diagram of an apparatus for data forwarding processing according to an embodiment of the present invention;

4 is a schematic diagram of a CPU parallel processing module according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a CPU serial processing module according to an embodiment of the present invention; FIG.

6 is a schematic diagram of a processing module in which CPU strings are combined in parallel according to an embodiment of the present invention;

7 is a schematic structural diagram of a system for data forwarding processing according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of a method for data forwarding processing according to an embodiment of the present invention.

detailed description

The present invention will be further described in detail below with reference to the accompanying drawings.

In the embodiment of the present invention, the device for data forwarding processing does not need an operating system, but only provides a heap and a stack, which is equivalent to a single task, and can execute an interrupt processing function in response to an interrupt.

The embodiment of the present invention provides a device for data forwarding processing. Referring to FIG. 3, FIG. 3 is a schematic diagram of a device for data forwarding processing according to an embodiment of the present invention. The device includes:

The receiving unit is configured to receive the data packet to be forwarded, and extract the forwarding information of the data packet. In a specific implementation of the embodiment of the present invention, the forwarding information of the data packet includes: Packet length information, packet start address information, and port number information of received packets. a buffer unit, configured to buffer a data packet received by the receiving unit;

In a specific implementation of the embodiment of the present invention, the receiving unit receives the data packet to be forwarded, and first puts the data packet into the cache unit. The forwarding information of the data packet may also be extracted first, and then the data packet is put into the cache unit.

In a specific implementation of the embodiment of the present invention, the sending information of the data packet includes: the message ending information, the packet length information, and the packet start address information.

In order to perform efficient data forwarding processing, the forwarding processing unit implemented by the present invention can be completed by at least two CPUs.

Correspondingly, the forwarding processing unit is composed of at least two CPUs, each of the CPUs includes a packet processing module, configured to process the received packets, and a packet processing sending module, configured to process the packets. The information processed by the module is sent to the subsequent CPU.

In a specific implementation of the embodiment of the present invention, the processing of the packet by the CPU needs to be determined according to a specific service.

In the embodiment of the present invention, the distribution of the multi-core processor in the forwarding processing unit may be as follows: One is a parallel processing module, that is, all forwarding processes of a packet are completed in one CPU, so that all forwarding is performed. The CPU runs the same code. Referring to FIG. 4, FIG. 4 is a schematic diagram of a CPU parallel processing module according to an embodiment of the present invention; the other is a serial processing module, that is, each or each group of CPUs completes a processing function, and all processing functions are serially processed. The way to complete step by step. Referring to FIG. 5, FIG. 5 is a schematic diagram of a CPU serial processing module according to an embodiment of the present invention; if a message that does not require a certain processing function can pass through a column processor, for example, the CPU 1 completes the classification function, the CPU 2 completes The table lookup function, if a message does not need to be processed by the classification function, can directly perform CPU2 processing through the CPU 1. There are many ways to specifically transmit it, for example: By specifying different in the message forwarding message The CPU's destination address selects a different CPU. In addition, there is another way to combine parallel and serial. Referring to FIG. 6, FIG. 6 is a schematic diagram of a processing module in which CPU strings are combined in parallel according to an embodiment of the present invention. In a specific implementation, the distributed processing manner of the CPU in the forwarding processing unit can be freely combined according to specific conditions, for example, a suitable distributed processing manner needs to be selected considering the hardware system structure characteristics of the CPU.

In a specific implementation of the data forwarding process, the switching network board is configured to provide packets to be forwarded between different line cards. In the embodiment of the present invention, the distributed uplink and downlink processing structure is taken as an example to further illustrate the scheme of the present invention. Referring to FIG. 7, FIG. 7 is a schematic structural diagram of a system for data forwarding processing according to an embodiment of the present invention; in FIG. 7, the forwarding processing unit includes:

The uplink forwarding processing sub-unit is configured to: when the data packet to be forwarded received by the receiving unit is an uplink data packet, extract the uplink data packet by using multiple parallel processors according to the forwarding information extracted by the receiving unit Sending information; for example, the uplink forwarding processing subunit is forwarded by the CPU 1, CPU 2, and CPU 3 in parallel, so that CPU1, CPU2, and CPU3 run the same code, that is, the same code is run while supporting IP forwarding and QoS. The IP forwarding and QoS processing functions can be completed by one of CPU1, CPU2 and CPU3;

The downlink forwarding processing sub-unit is configured to: when the data packet to be forwarded received by the receiving unit is a downlink data packet, perform, according to the forwarding information extracted by the receiving unit, the downlink data packet by using another parallel processor The enqueue process is performed, and then the queue polling process is performed by the processor in series with the plurality of parallel processors in the other path, and the transmission information of the downlink data message is extracted in the order after the queue polling. For example, the downlink forwarding processing sub-unit is forwarded by the CPU 4, the CPU 5, the CPU 6, the CPU 7, and the CPU 8 in a parallel and serial manner, that is, the CPU 4 and the CPU 5 respectively support the TM (Token Machine) queue in a serial manner. Polling and GTS (General Traffic Shaping) queue polling processing. The CPU 6, CPU 7, and CPU 8 simultaneously support IP forwarding, QoS, and GTM/TM enqueue processing functions in parallel. In this way, during the downlink forwarding process, IP forwarding, QoS, and GTM/TM enqueue processing functions can be completed by one of CPU6, CPU7, and CPU8. The TM queue polling and GTS queue polling processing functions need to be completed by the CPU 4 and the CPU 5, respectively. At the same time, the receiving and transmitting modules of the line side and the network side interface can also be completed by hardware or software. Need to say It is obvious that the present invention can support some complicated applications, that is, different CPU distribution patterns can be designed according to the needs of different application services. For example, according to the firewall service, a distribution manner of a CPU that is advantageous for implementing the service is designed.

In addition, the embodiment of the present invention provides a method for data forwarding processing based on a multi-core processor. Referring to FIG. 8, FIG. 8 is a schematic diagram of a method for data forwarding processing according to an embodiment of the present invention.

Step 801: The receiving unit puts the received data packet into a cache unit.

In a specific implementation of the embodiment of the present invention, a buffer header may be configured with a header pointer for each data packet for indexing the data packet.

Step 802: The receiving unit extracts the forwarding information of the data packet and sends the forwarding information to the forwarding processing unit. In a specific implementation of the embodiment of the present invention, the forwarding information of the data packet includes at least: packet end information and packet length information. The packet start address information and the port number information of the received packet, and the data structure of the forwarding information of the data packet may be as follows:

Where EOP indicates the end of message message. Can be represented by 0 and 1. 0 means not the last message of the message; 1 means the last message of the message.

Status is used to indicate various error messages of RX and message broadcast/multicast/unicast information, which can be designed according to the required number of bits.

Packet Lenth indicates the length of the data packet.

Packet address indicates the starting address of the data packet.

The Source Port indicates the port number of the data received.

Step 803: The forwarding processing unit extracts, according to the forwarding information, the sending information of the data packet by using a plurality of serial and/or parallel processors set in advance, and sends the sending information.

The structure of multiple processors is shown in Figure 4, Figure 5 or Figure 6, and will not be described in detail here.

In a specific implementation of the present invention, the information about the data packet includes: the packet end information, the packet length information, and the packet start address information, and the data packet sending information. The data structure can be as follows: Packet Lenth Packet address

Where EOP indicates the end of message message. It can be represented by 0 and 1, 0 means not the last message of the message; 1 means the last message of the message.

Packet Lenth indicates the length of the data packet.

Packet address indicates the starting address of the data packet.

In order to perform efficient data forwarding processing, the forwarding processing unit implemented by the present invention can be completed by at least two CPUs. Each of the CPUs processes the received message and sends the processed information to the subsequent CPU.

In the embodiment of the present invention, the message format of the message delivery between the multiple CPUs may be as follows: The message information CPU forwards the processing information, wherein the message information indicates that the EOP, Packet Lenth, Packet address, etc. in the previous message are identified. All information.

Step 804: The sending unit receives the sending information, and extracts the corresponding data packet in the buffer unit according to the sending information, and forwards the data packet to the destination port.

In an implementation of the embodiment of the present invention, the sending unit may extract the data packet corresponding to the buffer unit according to the header pointer of the data packet mentioned above and the sending information.

Therefore, the method and apparatus for data forwarding processing provided by the embodiments of the present invention do not require an operating system, and only provide one heap and stack. Compared with a single task under the operating system, the resource occupation is less, and the software and hardware overhead is reduced. It also reduces the complexity of the software, which is suitable for efficient data forwarding processing. In addition, the embodiment of the present invention provides a distribution processing module for forwarding a CPU in a CPU module, which can be flexibly selected according to different service requirements, thereby increasing forwarding capability and ensuring forwarding performance. The above is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope of the present invention. All should be covered by the scope of the present invention.

Claims

Claim

A device for data forwarding processing, comprising:

2. The device according to claim 1, wherein the forwarding information of the data packet comprises at least: packet end information, message length information, message start address information, and port number information of the received message. .

The device according to claim 1, wherein the information of the data message includes at least: the message end information, the message length information, and the message start address information.

The device according to any one of claims 1-3, wherein the receiving unit receives the data message to be forwarded, and first puts the data message into the buffer unit.

The device according to claim 1, wherein the forwarding processing unit comprises: an uplink forwarding processing sub-unit, configured to: when the data packet to be forwarded received by the receiving unit is an uplink data packet And extracting, according to the forwarding information extracted by the receiving unit, the sending information of the uplink data packet by using multiple parallel processors;

a downlink forwarding processing sub-unit, configured to: when the data packet to be forwarded received by the receiving unit is a downlink data packet, according to the forwarding information extracted by the receiving unit, downlink by another parallel processor The data packet is subjected to the enqueue processing, and then the queue polling process is performed by the processor in series with the plurality of parallel processors in the other path, and the transmission information of the downlink data packet is extracted in the order after the queue polling.

The device according to claim 1, wherein the processor is a CPU, and includes: a packet processing module, configured to process the received data packet;

a message processing sending module, configured to send information processed by the message processing module to a subsequent

CPU.

7. A data forwarding method, comprising:

The receiving unit puts the received data message into the cache unit;

The sending unit receives the sending information, and extracts a corresponding data packet in the buffer unit according to the sending information, and forwards the data packet to the destination port.

The method according to claim 7, wherein the sending information of the data message comprises at least: the message end information, the message length information, and the message start address information.

The method according to claim 7, wherein the forwarding information of the data packet at least includes: a packet end information, a packet length information, a packet start address information, and a port number information of the received packet. .

The method according to claim 7, wherein the processor is a CPU, each of the CPUs processes the received data message, and sends the processed information to a subsequent CPU.