WO2008035352A2 - A method and a storage device estimating a completion time for a storage operation - Google Patents

A method and a storage device estimating a completion time for a storage operation Download PDF

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Publication number
WO2008035352A2
WO2008035352A2 PCT/IL2007/001266 IL2007001266W WO2008035352A2 WO 2008035352 A2 WO2008035352 A2 WO 2008035352A2 IL 2007001266 W IL2007001266 W IL 2007001266W WO 2008035352 A2 WO2008035352 A2 WO 2008035352A2
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Prior art keywords
storage
completion time
operative
controller
storage device
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PCT/IL2007/001266
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French (fr)
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WO2008035352A3 (en
Inventor
Nir Perry
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Sandisk Il Ltd.
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Publication date
Priority claimed from US11/781,260 external-priority patent/US7930507B2/en
Application filed by Sandisk Il Ltd. filed Critical Sandisk Il Ltd.
Priority to KR1020097003242A priority Critical patent/KR101455085B1/en
Publication of WO2008035352A2 publication Critical patent/WO2008035352A2/en
Publication of WO2008035352A3 publication Critical patent/WO2008035352A3/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1689Synchronisation and timing concerns
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus

Definitions

  • a host processor may respond as follows to the uncertainty in predicting the time required to complete storage operations: [005] The host processor may wait idly until the storage operation terminates. That is, the host processor and the storage device would work sequentially. Such procedure wastes processing time, because the host processor cannot perform other tasks while the storage operation executes.
  • the host processor can switch to another task and return to the original task after the storage operation terminates.
  • the original task must wait longer than necessary to resume.
  • Another option is a process known as "polling," in which the host processor frequently checks if the storage operation in the storage device has completed. Such continuous interrogation consumes significant processing time.
  • the host processor can perform context switching to execute another task, execute the other task, and then perform context switching again to return to the original task.
  • context switching is time-consuming, and, if the storage operation has not yet completed by the time that the processor returns to the original task, the host processor must perform context switching again and consume more time.
  • the present invention predicts the duration of storage operations by accounting for more factors than known in the prior art, such as the effect of automatic memory operation.
  • the invention may be embodied as a storage device/system for a processor or as a method of performing a storage operation.
  • a storage device has a non-volatile memory and a controller.
  • the non-volatile memory may be a flash memory.
  • the controller is operative to send data to the non-volatile memory and to retrieve data from the nonvolatile memory in accordance with a storage command from a processor.
  • the controller is configured to estimate a completion time of a storage operation associated with the storage command and to provide to the processor the estimated completion time. Depending on the mode of operation, the controller may begin estimating the completion time of the storage operation before or after the storage operation begins.
  • a storage system for a processor of a host includes a storage device having a non-volatile memory and a controller module.
  • the controller module of this embodiment is analogous to the controller of the first embodiment.
  • the controller module may reside in the host.
  • the invention may also be embodied as a method of performing a storage operation that includes receiving from a processor a storage command for the storage operation; estimating, using a controller of a storage device, a completion time of the storage operation; and providing the estimated completion time to the processor.
  • the controller may begin estimating the completion time of the storage operation before or after the storage operation begins in accordance with the operating mode.
  • the estimating may be effected based in part on anticipated automatic memory operations that are to be applied on the storage device, including wear leveling operations, garbage collection operations, power-fail protection operations, and defragmentation operation.
  • the estimating may also be effected based in part on an attribute of a specific storage area on the storage device.
  • Figure 1 is a block diagram illustration of a storage device in accordance with a first embodiment of the present invention
  • Figures 2a-2c schematically represent various modes of operation of the invention
  • Figure 3 is a block diagram illustration of a storage system in accordance with another embodiment of the present invention.
  • Figure 4 is a flow chart representing a method of performing storage operations in accordance with an embodiment the present invention.
  • FIG. 1 is a block diagram illustrating a storage device in accordance with a first embodiment of the invention.
  • a storage device 10 interfaces with a processor 16 of a host 18.
  • Storage device 10 includes a non-volatile memory 12 and a controller 14.
  • the non-volatile memory 12 may be a flash memory.
  • the controller 14 sends data and retrieves data from the non-volatile memory 12 in accordance with a storage command from the processor 16.
  • the storage command may be a write command, a read command, or a delete command.
  • the storage command is sent by the host to the storage device 10 and executed by the storage device 10 as a storage operation.
  • the controller 14 is configured to estimate the completion time of the storage operation associated with the storage command and to provide to the processor 16 the estimated completion time.
  • the controller 14 may begin estimating the completion time of the storage operation before or after the storage operation begins.
  • Three exemplary modes of operation are schematically represented in Figures 2a- 2c.
  • the controller 14 begins and ends the calculations for estimating the completion time of the storage operation before initiating its execution.
  • the controller 14 begins estimating the completion time of a storage operation after the storage operation begins.
  • the controller 14 experiences idle times while data are written to or read or deleted from non-volatile memory 12. The controller 14 performs the calculations to estimate the completion time of the storage operation only when the storage device would otherwise be idle.
  • the controller 14 begins estimating the completion time of the storage operation after the storage operation begins, and it performs calculations to estimate the completion time only when the storage device 10 would otherwise be idle. In this mode, there is no preset time by which the controller 14 is required to provide the estimated completion time.
  • the controller 14 may begin estimating the completion time upon receipt of the storage command or after the storage operation begins.
  • the controller 14 may also begin estimating the completion time before initiating the storage operation. This may be useful if the host 18 needs the estimated completion time in order to determine which operation to perform while the storage command request is executed.
  • the controller 14 may begin estimating the completion time when the storage device 10 is otherwise idle.
  • the controller may be designed to finish estimating the completion time before initiating the storage operation.
  • the controller may provide the estimated completion time to the processor before initiating the storage operation and/or before a pre-defined time interval (for example 3 ms, 5 ms, 5 clock ticks, etc.) has elapsed since receiving the storage command.
  • a pre-defined time interval for example 3 ms, 5 ms, 5 clock ticks, etc.
  • the estimated completion time may be based in part on anticipated automatic memory operations that are to be applied to the storage device.
  • the estimated completion time may be based in part on an anticipated wear leveling operation, garbage collection operation, power-fail protection operation, or defragmentation operation.
  • the estimated completion time may be further based in part on an attribute of a specific storage area of the non-volatile memory 12 of the storage device 10.
  • An "attribute" can be any information characterizing memory cells of a specific storage area of the non-volatile memory, including but not limited to content reliability, density, transaction speed, endurance, or any combination thereof.
  • the estimated completion time may also be based in part on the type of the storage operation and/or on the amount of data associated with the storage operation.
  • FIG. 3 is a block diagram illustrating a storage system in accordance with another embodiment of the invention.
  • a storage system 20 includes a storage device 22 and a controller module 24.
  • the storage device 22 has a non-volatile memory 12.
  • the controller module 24 is analogous to controller 14 of Figure 1 and functions accordingly.
  • the controller module 24 resides in the host 12.
  • other implementations are possible, such as configuring the controller module within a unit external to both the storage device and the host.
  • the present invention may also be embodied as a method of performing a storage operation that includes: receiving from a processor a storage command for the storage operation; estimating, using a controller of a storage device, a completion time of the storage operation; and providing the estimated completion time to the processor.
  • Figure 4 provides a flow chart 40 representing one embodiment of a method embodying the present invention.
  • Step 42 the storage device is powered up.
  • the controller may operate in any of the modes of operation discussed above.
  • Step 42 includes the controller 14 of Figure 1 or the controller module 24 of Figure 3 collecting data associated with the attributes of the storage device. This data may include the cylinder- rotation frequency, read/write/erase times, error rates, and average error correction times.
  • the controller receives a storage command sent by the processor.
  • the controller in step 46 collects data describing the current status of the storage device and the host that may affect the duration of the storage operation associated with the storage command.
  • the data relating to the storage device may include the current location of the cylinder needle, the flash wear leveling status, and so on.
  • the data relating to the host may include the battery status, the processor usage, and so on.
  • the controller estimates the completion time. The estimation may be based in part on anticipated automatic memory operations that are to be applied on the storage device, including but not limited to an anticipated wear leveling operation, garbage collection operation, power-fail protection operation, defragmentation operation, etc.
  • the estimation may also be based in part on an attribute of a specific storage area on the storage device.
  • the controller may begin estimating the completion time upon receipt of the storage command, after the storage operation begins, before initiating the storage operation or when the storage device is otherwise idle.
  • the controller may finish estimating the completion time before initiating the storage operation.
  • the controller may estimate the completion time based in part on anticipated automatic memory operations that are to be applied to the storage device, such as an anticipated wear leveling operation, garbage collection operation, power-fail protection operation, or defragmentation operation.
  • the controller may also estimate the completion time based in part on an attribute of a specific storage area of the non-volatile memory of the storage device, on the type of the storage operation and/or on the amount of data associated with the storage operation.
  • the controller provides the completion time to the processor of the host.
  • the controller may provide this estimated completion time to the processor before initiating the storage operation and/or before a pre-defined time interval (for example 3 ms, 5 ms, 5 clock ticks, etc.) has elapsed since receiving the storage command.
  • a pre-defined time interval for example 3 ms, 5 ms, 5 clock ticks, etc.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Retry When Errors Occur (AREA)
  • Debugging And Monitoring (AREA)

Abstract

A storage device or system provides to a host processor an estimation of a completion time of a storage operation. The completion time may be based on the duration of automatic storage operations, which are not administered by the host processor. The storage device includes a non-volatile memory and a controller. The storage system includes: a storage device having a non-volatile memory; and a controller module. The controller or controller module estimates the completion time of a storage operation and provides to the processor the estimated completion time before the storage operation completes.

Description

A METHOD AND A STORAGE DEVICE ESTIMATING A COMPLETION TIME FOR A STORAGE OPERATION
CROSS-REFERENCE TO RELATED APPLICATIONS [001] This application claims priority from U.S. Provisional Application No. 60/825,930, filed September 18, 2006, which is hereby incorporated by reference in its entirety; from U.S. patent application serial number 11/781,260 filed July 22, 2007 and titled "A METHOD OF PROVIDING TO A PROCESSOR AN ESTIMATED COMPLETION TIME OF A STORAGE OPERATION", which is hereby incorporated by reference in its entirety; and U.S. patent application serial number 11/781,259 filed July 22, 2007 and titled "A STORAGE DEVICE ESTIMATING A COMPLETION TIME FOR A STORAGE OPERATION", which is hereby incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION [002] With advances in computer engineering, large amounts of information are stored in mass storage devices. Some of these storage devices use technology that integrates automatic memory operations, which are administered within the storage device. That is, the automatic memory operations are not administered by the processor of the host that uses the storage device. Examples of such automatic memory operations include garbage collection operations that reclaim and recycle dynamic memory that is not being used, wear leveling operations that increase the likelihood that cells within a flash memory system are worn fairly evenly, defragmentation operations that reduce the amount of fragmentation in file systems, and power fail protection operations that protect data from abnormal program termination and other data loss problems. [003] It is very difficult for a host to predict the time required to complete a storage operation such as write, read or delete. One reason is because the memory operations described above are automatically administered within the storage device and thus not by the host processor. The automatic memory operations cause the times to complete storage operations to vary considerably. For example, the longest time imaginable to write a 10 Mbyte file to a storage device might be 20 times longer than the shortest time. [004] In order to operate more efficiently, a host processor may respond as follows to the uncertainty in predicting the time required to complete storage operations: [005] The host processor may wait idly until the storage operation terminates. That is, the host processor and the storage device would work sequentially. Such procedure wastes processing time, because the host processor cannot perform other tasks while the storage operation executes.
[006] Alternatively, after sending a storage command, the host processor can switch to another task and return to the original task after the storage operation terminates. However, as the storage operation may terminate before the host processor finishes switching tasks, the original task must wait longer than necessary to resume.
[007] Another option is a process known as "polling," in which the host processor frequently checks if the storage operation in the storage device has completed. Such continuous interrogation consumes significant processing time. [008] Yet another option is, after sending a storage command to the storage device, the host processor can perform context switching to execute another task, execute the other task, and then perform context switching again to return to the original task. However, context switching is time-consuming, and, if the storage operation has not yet completed by the time that the processor returns to the original task, the host processor must perform context switching again and consume more time. [009] These options for optimizing processor efficiency do not account for the effect of automatic memory operations on the duration of storage operations. Information regarding the scheduling of automatic storage operations is not readily available to a processor in a host, because these operations are administered within the storage device. Because the effect of the automatic actions on storage operations is so significant, the optimization of processor efficiency is limited when one of the options described above is implemented. Thus, it would be desirable to account somehow for the effect of automatic memory operations on the duration of storage operations.
SUMMARY OF THE INVENTION
[0010] The present invention predicts the duration of storage operations by accounting for more factors than known in the prior art, such as the effect of automatic memory operation. The invention may be embodied as a storage device/system for a processor or as a method of performing a storage operation.
[0011] In one embodiment of the invention, a storage device has a non-volatile memory and a controller. The non-volatile memory may be a flash memory. The controller is operative to send data to the non-volatile memory and to retrieve data from the nonvolatile memory in accordance with a storage command from a processor. The controller is configured to estimate a completion time of a storage operation associated with the storage command and to provide to the processor the estimated completion time. Depending on the mode of operation, the controller may begin estimating the completion time of the storage operation before or after the storage operation begins.
[0012] In another embodiment of the invention, a storage system for a processor of a host includes a storage device having a non-volatile memory and a controller module. The controller module of this embodiment is analogous to the controller of the first embodiment. The controller module may reside in the host. [0013] The invention may also be embodied as a method of performing a storage operation that includes receiving from a processor a storage command for the storage operation; estimating, using a controller of a storage device, a completion time of the storage operation; and providing the estimated completion time to the processor. The controller may begin estimating the completion time of the storage operation before or after the storage operation begins in accordance with the operating mode. The estimating may be effected based in part on anticipated automatic memory operations that are to be applied on the storage device, including wear leveling operations, garbage collection operations, power-fail protection operations, and defragmentation operation. The estimating may also be effected based in part on an attribute of a specific storage area on the storage device.
[0014] Additional features and advantages of the invention will become apparent from the following drawings and description.
BRIEF DESCRIPTION OF THE DRAWINGS
[0015] For a better understanding of the invention with regard to the embodiments thereof, reference is made to the accompanying drawing, in which like numerals designate corresponding sections or elements throughout, and in which: [0016] Figure 1 is a block diagram illustration of a storage device in accordance with a first embodiment of the present invention;
[0017] Figures 2a-2c schematically represent various modes of operation of the invention; [0018] Figure 3 is a block diagram illustration of a storage system in accordance with another embodiment of the present invention; and
[0019] Figure 4 is a flow chart representing a method of performing storage operations in accordance with an embodiment the present invention.
DETAILED DESCRIPTION OF THE INVENTION [0020] The invention summarized above and defined by the claims below will be better understood by referring to the present detailed description of embodiments of the invention. This description is not intended to limit the scope of claims but instead to provide examples of the invention. The following discussion presents exemplary embodiments, which include a storage device for a processor, a storage system for a processor of a host, and a method of performing storage operations.
[0021] Figure 1 is a block diagram illustrating a storage device in accordance with a first embodiment of the invention. As shown, a storage device 10 interfaces with a processor 16 of a host 18. Storage device 10 includes a non-volatile memory 12 and a controller 14. The non-volatile memory 12 may be a flash memory. The controller 14 sends data and retrieves data from the non-volatile memory 12 in accordance with a storage command from the processor 16. The storage command may be a write command, a read command, or a delete command. The storage command is sent by the host to the storage device 10 and executed by the storage device 10 as a storage operation. The controller 14 is configured to estimate the completion time of the storage operation associated with the storage command and to provide to the processor 16 the estimated completion time.
Depending on the mode of operation, the controller 14 may begin estimating the completion time of the storage operation before or after the storage operation begins. Three exemplary modes of operation are schematically represented in Figures 2a- 2c. [0022] In the first mode, represented by Figure 2a, the controller 14 begins and ends the calculations for estimating the completion time of the storage operation before initiating its execution. [0023] In the second mode of operation, represented by Figure 2b, the controller 14 begins estimating the completion time of a storage operation after the storage operation begins. As the storage operation executes, the controller 14 experiences idle times while data are written to or read or deleted from non-volatile memory 12. The controller 14 performs the calculations to estimate the completion time of the storage operation only when the storage device would otherwise be idle. (Although the figures show solid lines for "CALCULATE" and "EXECUTE," these two processes may have multiple interruptions. The solid lines indicate the time span between the start and end of the "CALCULATE" and "EXECUTE" processes. Not represented in the figures for clarity is that the controller 14 administers the calculation of the estimated storage time during the times when it is not administering the execution of the storage operation.) In the mode of Figure 2b, the controller 14 provides to the processor the estimated completion time before a preset time. If necessary, the execution of the storage operation will stop to provide the resources necessary to provide the estimated completion time to the processor before the preset time.
[0024] In the mode of operation represented by Figure 2c, the controller 14 begins estimating the completion time of the storage operation after the storage operation begins, and it performs calculations to estimate the completion time only when the storage device 10 would otherwise be idle. In this mode, there is no preset time by which the controller 14 is required to provide the estimated completion time.
[0025] Other modes of operations may individually have one or more of the following features: The controller 14 may begin estimating the completion time upon receipt of the storage command or after the storage operation begins. The controller 14 may also begin estimating the completion time before initiating the storage operation. This may be useful if the host 18 needs the estimated completion time in order to determine which operation to perform while the storage command request is executed. The controller 14 may begin estimating the completion time when the storage device 10 is otherwise idle. The controller may be designed to finish estimating the completion time before initiating the storage operation. The controller may provide the estimated completion time to the processor before initiating the storage operation and/or before a pre-defined time interval (for example 3 ms, 5 ms, 5 clock ticks, etc.) has elapsed since receiving the storage command.
[0026] The estimated completion time may be based in part on anticipated automatic memory operations that are to be applied to the storage device. For example, the estimated completion time may be based in part on an anticipated wear leveling operation, garbage collection operation, power-fail protection operation, or defragmentation operation. The estimated completion time may be further based in part on an attribute of a specific storage area of the non-volatile memory 12 of the storage device 10. An "attribute" can be any information characterizing memory cells of a specific storage area of the non-volatile memory, including but not limited to content reliability, density, transaction speed, endurance, or any combination thereof. The estimated completion time may also be based in part on the type of the storage operation and/or on the amount of data associated with the storage operation. [0027] Figure 3 is a block diagram illustrating a storage system in accordance with another embodiment of the invention. As shown, a storage system 20 includes a storage device 22 and a controller module 24. The storage device 22 has a non-volatile memory 12. The controller module 24 is analogous to controller 14 of Figure 1 and functions accordingly. In the embodiment of Figure 3, the controller module 24 resides in the host 12. However, other implementations are possible, such as configuring the controller module within a unit external to both the storage device and the host.
[0028] The present invention may also be embodied as a method of performing a storage operation that includes: receiving from a processor a storage command for the storage operation; estimating, using a controller of a storage device, a completion time of the storage operation; and providing the estimated completion time to the processor. Figure 4 provides a flow chart 40 representing one embodiment of a method embodying the present invention.
[0029] In the initial step 42, the storage device is powered up. The controller may operate in any of the modes of operation discussed above. Step 42 includes the controller 14 of Figure 1 or the controller module 24 of Figure 3 collecting data associated with the attributes of the storage device. This data may include the cylinder- rotation frequency, read/write/erase times, error rates, and average error correction times.
[0030] In the next step 44, the controller receives a storage command sent by the processor. After receiving the storage command, the controller in step 46 collects data describing the current status of the storage device and the host that may affect the duration of the storage operation associated with the storage command. The data relating to the storage device may include the current location of the cylinder needle, the flash wear leveling status, and so on. The data relating to the host may include the battery status, the processor usage, and so on. [0031] In the next step 48, the controller estimates the completion time. The estimation may be based in part on anticipated automatic memory operations that are to be applied on the storage device, including but not limited to an anticipated wear leveling operation, garbage collection operation, power-fail protection operation, defragmentation operation, etc. The estimation may also be based in part on an attribute of a specific storage area on the storage device. During the execution of step 48, the controller may begin estimating the completion time upon receipt of the storage command, after the storage operation begins, before initiating the storage operation or when the storage device is otherwise idle. The controller may finish estimating the completion time before initiating the storage operation. The controller may estimate the completion time based in part on anticipated automatic memory operations that are to be applied to the storage device, such as an anticipated wear leveling operation, garbage collection operation, power-fail protection operation, or defragmentation operation. The controller may also estimate the completion time based in part on an attribute of a specific storage area of the non-volatile memory of the storage device, on the type of the storage operation and/or on the amount of data associated with the storage operation.
[0032] In the final step 50, the controller provides the completion time to the processor of the host. The controller may provide this estimated completion time to the processor before initiating the storage operation and/or before a pre-defined time interval (for example 3 ms, 5 ms, 5 clock ticks, etc.) has elapsed since receiving the storage command. [0033] Having described the invention with regard to certain specific embodiments thereof, it is to be understood that the description is not meant as a limitation, since further modifications will now suggest themselves to those skilled in the art, and it is intended to cover such modifications as fall within the scope of the appended claims.

Claims

1. A storage device for a processor, the storage device comprising: (a) a nonvolatile memory; and (b) a controller operative to send data to said non-volatile memory and to retrieve data from said non-volatile memory in accordance with a storage command from a processor, wherein said controller is configured to estimate a completion time of a storage operation associated with said storage command and to provide to the processor said estimated completion time.
2. The storage device of claim 1, wherein said controller is operative to begin and end estimating said completion time and to provide said estimated completion time to the processor before initiating said storage operation.
3. The storage device of claim 1, wherein said controller is operative to begin estimating said completion time after said storage operation begins, to perform calculations to estimate said completion time only when the storage device is otherwise idle, and to provide said estimated completion time to the processor before a preset time.
4. The storage device of claim 1, wherein said controller is operative to begin estimating said completion time after said storage operation begins and to perform calculations to estimate said completion time only when the storage device is otherwise idle.
5. The storage device of claim 1, wherein said controller is operative to begin estimating said completion time upon receipt of the storage command.
6. The storage device of claim 1, wherein said controller is operative to begin estimating said completion time after said storage operation begins.
7. The storage device of claim 1, wherein said controller is operative to begin estimating said completion time before initiating said storage operation.
8. The storage device of claim 1, wherein said controller is operative to complete estimating said completion time before initiating said storage operation.
9. The storage device of claim 1, wherein said controller is operative to provide said estimated completion time to the processor before initiating said storage operation.
3
10. The storage device of claim 1, wherein said controller is operative to provide said estimated completion time before a pre-defined time interval has elapsed since receiving said storage command.
11. The storage device of claim 1, wherein said controller is operative to begin estimating said completion time when the storage device is otherwise idle.
12. The storage device of claim 1, wherein said controller is operative to estimate said completion time based in part on an anticipated wear leveling operation.
13. The storage device of claim 1, wherein said controller is operative to estimate said completion time based in part on an anticipated garbage collection operation.
14. The storage device of claim 1, wherein said controller is operative to estimate said completion time based in part on an anticipated power-fail protection operation.
15. The storage device of claim 1, wherein said controller is operative to estimate said completion time based in part on an anticipated defragmentation operation.
16. The storage device of claim 1, wherein said controller is operative to estimate said completion time based in part on an attribute of a specific storage area on the storage device.
17. The storage device of claim 1, wherein said non-volatile memory is a flash memory.
18. A storage system for a processor of a host, the storage system comprising: a storage device having a non-volatile memory; and a controller module operative to send data to said non-volatile memory and to retrieve data from said non-volatile memory in accordance a with storage command from a processor, wherein said controller is configured to estimate a completion time of a storage operation associated with said storage command and to provide to the processor said estimated completion time.
19. The storage system of claim 19, wherein said controller module is operative to begin and end estimating said completion time and to provide said estimated completion time to the processor before initiating said storage operation.
20. The storage system of claim 19, wherein said controller module is operative to begin estimating said completion time after said storage operation begins, to perform calculations to estimate said completion time only when the storage device is otherwise idle, and to provide said estimated completion time to the processor before a preset time.
21. The storage system of claim 19, wherein said controller module is operative to begin estimating said completion time after said storage operation begins and to perform calculations to estimate said completion time only when the storage device is otherwise idle.
22. The storage system of claim 19, wherein said controller module resides in the host.
23. The storage system of claim 19, wherein said controller module is operative to begin estimating said completion time upon receipt of the storage command.
24. The storage system of claim 19, wherein said controller module is operative to begin estimating said completion time after said storage operation begins.
25. The storage system of claim 19, wherein said controller module is operative to begin estimating said completion time before initiating said storage operation.
26. The storage system of claim 19, wherein said controller module is operative to complete estimating said completion time before initiating said storage operation.
27. The storage system of claim 19, wherein said controller module is operative to provide said estimated completion time to the processor before initiating said storage operation.
28. The storage system of claim 19, wherein said controller module is operative to provide said estimated completion time before a pre-defined time interval has elapsed since receiving said storage command.
29. The storage system of claim 19, wherein said controller module is operative to begin estimating said completion time when said storage device is otherwise idle.
30. The storage system of claim 19, wherein said controller module is operative to estimate said completion time based in part on an anticipated wear leveling operation.
31. The storage system of claim 19, wherein said controller module is operative to estimate said completion time based in part on an anticipated garbage collection operation.
32. The storage system of claim 19, wherein said controller module is operative to estimate said completion time based in part on an anticipated power-fail protection operation.
33. The storage system of claim 19, wherein said controller module is operative to estimate said completion time based in part on an anticipated defragmentation operation.
34. The storage system of claim 19, wherein said controller module is operative to estimate said completion time based in part on an attribute of a specific storage area on said storage device.
35. The storage system of claim 19, wherein said non-volatile memory is a flash memory.
36. A method of performing a storage operation, the method comprising: (a) receiving from a processor a storage command for the storage operation; (b) estimating, using a controller of a storage device, a completion time of the storage operation; and (c) providing said estimated completion time to said processor.
37. The method of claim 36, wherein said estimating begins and ends and said estimated completion time is provided to said processor before initiating said storage operation.
38. The method of claim 36, wherein said estimating begins after said storage operation begins, calculations to estimate the completion time are performed only when said storage device is otherwise idle, and said estimated completion time is provided to the processor before a preset time.
39. The method of claim 36, wherein said estimation begins after said storage operation begins and calculations to estimate the completion time are performed only when said storage device is otherwise idle.
40. The method of claim 36, wherein said estimating begins upon receiving the storage command.
41. The method of claim 36, wherein said estimating begins after said storage operation begins.
42. The method of claim 36, wherein said estimating begins before initiating the storage operation.
43. The method of claim 36, wherein said estimating completes before initiating the storage operation.
44. The method of claim 36, wherein said providing completes before initiating the storage operation.
45. The method of claim 36, wherein said estimated completion time is provided before a pre-defined time interval has elapsed since said receiving said storage command.
46. The method of claim 36, wherein said estimating is effected based in part on an anticipated wear leveling operation.
47. The method of claim 36, wherein said estimating is effected based in part on an anticipated garbage collection operation.
48. The method of claim 36, wherein said estimating is effected based in part on an anticipated power-fail protection operation.
49. The method of claim 36, wherein said estimating is effected based in part on an anticipated defragmentation operation.
50. The method of claim 36, wherein said estimating is effected based in part on an attribute of a specific storage area of said storage device.
51. The method of claim 36, wherein said estimating begins when said controller is otherwise idle.
PCT/IL2007/001266 2006-09-18 2007-10-23 A method and a storage device estimating a completion time for a storage operation WO2008035352A2 (en)

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