WO2008023368A3 - A nand flash memory controller exporting a logical sector-based interface - Google Patents

A nand flash memory controller exporting a logical sector-based interface Download PDF

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Publication number
WO2008023368A3
WO2008023368A3 PCT/IL2007/001041 IL2007001041W WO2008023368A3 WO 2008023368 A3 WO2008023368 A3 WO 2008023368A3 IL 2007001041 W IL2007001041 W IL 2007001041W WO 2008023368 A3 WO2008023368 A3 WO 2008023368A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
host
size
flash
pages
Prior art date
Application number
PCT/IL2007/001041
Other languages
French (fr)
Other versions
WO2008023368A2 (en
Inventor
Menachem Lasser
Original Assignee
Sandisk Il Ltd
Menachem Lasser
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/806,701 external-priority patent/US20080046641A1/en
Priority claimed from US11/806,702 external-priority patent/US20080046630A1/en
Application filed by Sandisk Il Ltd, Menachem Lasser filed Critical Sandisk Il Ltd
Publication of WO2008023368A2 publication Critical patent/WO2008023368A2/en
Publication of WO2008023368A3 publication Critical patent/WO2008023368A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)

Abstract

A controller of a flash memory device exchanges data pages with the memory device via a host-type NAND interface and exchanges data sectors with a host via a flash-type NAND interface. The data sectors are different in size than the data pages. A data storage system includes the controller and the memory device. Another data storage system includes a memory whose physical pages have a common size and circuitry for exporting a flash-type NAND interface for exchanging data sectors, that differ in size from the physical pages, with a host. A data processing system includes the data storage system and the host. Data are stored in a memory whose physical pages have a common physical page size by exporting, to a host, a flash-type NAND interface for exchanging data sectors with the host. The common size of the data sectors is different than the physical page size.
PCT/IL2007/001041 2006-08-21 2007-08-21 A nand flash memory controller exporting a logical sector-based interface WO2008023368A2 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US82294806P 2006-08-21 2006-08-21
US60/822,948 2006-08-21
US11/806,702 2007-06-04
US11/806,701 2007-06-04
US11/806,701 US20080046641A1 (en) 2006-08-21 2007-06-04 NAND flash memory controller exporting a logical sector-based interface
US11/806,702 US20080046630A1 (en) 2006-08-21 2007-06-04 NAND flash memory controller exporting a logical sector-based interface

Publications (2)

Publication Number Publication Date
WO2008023368A2 WO2008023368A2 (en) 2008-02-28
WO2008023368A3 true WO2008023368A3 (en) 2008-06-19

Family

ID=39060245

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2007/001041 WO2008023368A2 (en) 2006-08-21 2007-08-21 A nand flash memory controller exporting a logical sector-based interface

Country Status (3)

Country Link
KR (1) KR20090054958A (en)
TW (1) TWI387878B (en)
WO (1) WO2008023368A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9959203B2 (en) 2014-06-23 2018-05-01 Google Llc Managing storage devices
CN104461959B (en) * 2014-11-05 2017-04-19 福州瑞芯微电子股份有限公司 Method and device for distinguishing NOR Flash from NAND Flash
US9952769B2 (en) 2015-09-14 2018-04-24 Microsoft Technology Licensing, Llc. Data storage system with data storage devices operative to manage storage device functions specific to a particular data storage device
TWI619023B (en) * 2016-11-30 2018-03-21 瑞昱半導體股份有限公司 Memory control circuit and method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1146428A1 (en) * 2000-04-13 2001-10-17 Yao, Li-ho Multi-interface memory card and adapter module for the same
US20030065899A1 (en) * 2001-09-28 2003-04-03 Gorobets Sergey Anatolievich Memory system sectors
US20030135688A1 (en) * 2002-01-11 2003-07-17 Shih-Chieh Tai Flash memory data access method and configuration
WO2005066773A1 (en) * 2003-12-31 2005-07-21 Sandisk Corporation Flash memory system startup operation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1146428A1 (en) * 2000-04-13 2001-10-17 Yao, Li-ho Multi-interface memory card and adapter module for the same
US20030065899A1 (en) * 2001-09-28 2003-04-03 Gorobets Sergey Anatolievich Memory system sectors
US20030135688A1 (en) * 2002-01-11 2003-07-17 Shih-Chieh Tai Flash memory data access method and configuration
WO2005066773A1 (en) * 2003-12-31 2005-07-21 Sandisk Corporation Flash memory system startup operation

Also Published As

Publication number Publication date
TWI387878B (en) 2013-03-01
WO2008023368A2 (en) 2008-02-28
TW200815991A (en) 2008-04-01
KR20090054958A (en) 2009-06-01

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