WO2006088265A1 - An inspection apparatus and method of a electronic device - Google Patents

An inspection apparatus and method of a electronic device Download PDF

Info

Publication number
WO2006088265A1
WO2006088265A1 PCT/KR2005/000244 KR2005000244W WO2006088265A1 WO 2006088265 A1 WO2006088265 A1 WO 2006088265A1 KR 2005000244 W KR2005000244 W KR 2005000244W WO 2006088265 A1 WO2006088265 A1 WO 2006088265A1
Authority
WO
WIPO (PCT)
Prior art keywords
test
electronic device
signals
test data
set forth
Prior art date
Application number
PCT/KR2005/000244
Other languages
French (fr)
Inventor
Hyun Sung Gu
Original Assignee
Samsung Electronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co., Ltd. filed Critical Samsung Electronics Co., Ltd.
Priority to PCT/KR2005/000244 priority Critical patent/WO2006088265A1/en
Publication of WO2006088265A1 publication Critical patent/WO2006088265A1/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • G01R31/2808Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/30Nc systems
    • G05B2219/31From computer integrated manufacturing till monitoring
    • G05B2219/31304Identification of workpiece and data for control, inspection, safety, calibration
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/30Nc systems
    • G05B2219/36Nc in input of data, input key till input tape
    • G05B2219/36371Barcode reader
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Definitions

  • the present invention relates to technology for testing electronic devices, and, more particularly, to a test apparatus and a test method of an electronic device which are capable of automatically testing states of various electronic devices.
  • image recording media are a type of recording means for storing images and audio, such as CDs or DVDs, etc.
  • the image processors are a kind of device for reproducing information (image or audio) stored in the image recording media.
  • a CD player, a DVD player, a digital camcorder, or etc. is an example of the image processors.
  • image processors When producing the image processors, general product tests are made as to whether they are normal.
  • the image processors are sold to the public on the condition that they pass the general quality tests.
  • an examiner directly views images reproduced from a monitor or listens to audio reproduced from a speaker, etc. in order to test the image processors.
  • examiners check to ensure that the image processors normally reproduce images or audio stored therein by viewing waveforms of video or audio signals outputted from the images processors using simple measurement equipment such as oscilloscopes, etc.
  • test method for an image processor in which the test is dependent upon the vision and listening of an examiner, has disadvantages in that, since consistency of the test may be decreased, test reliability can be decreased.
  • the prior art test method has drawbacks in that since measurement equipment is used to test video and audio signals outputted from the image processor, testing the various features of the devices is time consuming and thus the manufacturing productivity of the electronic devices is decreased. Also, such problems occur in other electronic devices, such as set-top boxes or mobile telephones, in addition to image processors.
  • test apparatus and a test method of electronic devices, which are capable of automatically testing states of the electronic devices. It is second aspect of the invention to provide a test apparatus and a test method of electronic devices, which enable a single test apparatus to test various electronic devices.
  • a test apparatus of an electronic device comprising: an editor for setting test data based on electronic device type, in which the test data are inputted by an examiner; and a test execution unit for confirming corresponding test data corresponding to the electronic device type, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
  • the test data may include test items, test sequence, and test conditions.
  • the test apparatus further comprises a signal processor for processing various signals outputted from the electronic device as an object to be tested to properly test the electronic device.
  • the signal processor includes a first MUX for multiplexing a plurality of image signals outputted from an electronic device implementing SD level images; and a third MUX for multiplexing a plurality of image signals outputted from an electric device implementing HD level images.
  • the signal processor further includes first to third signal conversion units for converting image signals into composite signals to transmit them to the first MUX; and a fifth signal conversion unit for converting image signals into RGB signals to transmit them to the third MUX.
  • the signal processor further includes fourth and fifth MUXs for multiplexing a plurality of audio signals.
  • the test apparatus further comprises a pin jig on which a PCB of the electronic device, as an object to be tested, is mounted.
  • the pin jig is installed to be replaced with other pin jigs, in which the pin jigs have pins whose positions are differently aligned, such that the pin jigs can receive signals outputted from the PCB, according to the kinds of electronic devices.
  • the test apparatus further comprises a jig controller for controlling the pin jig.
  • the test apparatus further comprises a server in which data related to the tests are stored.
  • a test apparatus of an electronic device comprising: an editor for setting a plurality of test items according to input of an examiner; and a test execution unit for confirming the test items, and performing a test to determine whether the electronic device is normal.
  • a test apparatus of an electronic device comprising: a plurality of pin jigs for mounting the electronic device as an object to be tested; an editor for setting test data according to input of an examiner; and a test execution unit for testing a plurality of electronic devices mounted on the plurality of pin jigs on the basis of the set test data.
  • the test apparatus further comprises a signal processor for processing various signals outputted from the plurality of electronic devices to properly test the plurality of electronic devices.
  • a test apparatus of an electronic device comprising: an editor for setting test data according to kind of the electronic device, in which the test data are inputted by an examiner; a barcode reader for reading barcodes printed on the electronic device; a barcode analyzing unit for analyzing the barcodes read by the barcode reader; and a test execution unit for recognizing the kind of the electronic device based on the analyzed barcodes, confirming corresponding test data corresponding to one of the kinds of electronic devices, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
  • the barcode reader is installed on the pin jig on which the electronic device is mounted.
  • test method of an electronic device comprising: setting test data according to the electronic device types, in which the test data are inputted by an examiner; and confirming corresponding test data corresponding to one of the electronic device types, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
  • the test data may include test items, test sequences, and test conditions.
  • a test method of an electronic device comprising: setting a plurality of test items according to input of an examiner; and confirming the test items, and performing a test to determine whether the electronic device is normal.
  • a test method of an electronic device comprising: setting test data according to input of an examiner; and testing a plurality of electronic devices mounted on a plurality of pin jigs, based on the set test data.
  • a test method of an electronic device comprising: setting test data according to the electronic device types, in which the test data are inputted by an examiner; reading and analyzing barcodes printed on the electronic device; recognizing the kind of the electronic device based on the analyzed barcodes; and confirming corresponding test data corresponding to one of the kinds of electronic devices, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
  • test apparatus since the test apparatus according to the present invention can automatically test electronic devices, it can provide convenient testing and improve test reliability, as compared with the naked- eye test.
  • the present invention enables a single test apparatus to test various kinds of electronic devices, thereby securing universality thereof.
  • the present invention can enable a single test apparatus to test an electronic device based on various test items.
  • the present invention can enable a single test apparatus to test a plurality of electronic devices, thereby improving test speed. Moreover, the present invention can automatically recognize objects to be tested, thereby providing convenient testing.
  • FIG. 1 is a view illustrating a production line of an image processor to which a test apparatus and a test method of an electronic device according to first to third embodiments of the present invention are applied;
  • FIGS. 2 and 3 are schematic block diagrams illustrating a test apparatus according to the first embodiment of the present invention.
  • FIGS. 4 is a perspective view illustrating a structure of a pin jig used in the test apparatus of FIG. 2;
  • FIG. 5 is a cross-sectional view illustrating a structure of a pin jig used in the test apparatus of FIG. 2;
  • FIG. 6 is a detailed view illustrating a pin jig and a jig controller of the test apparatus of FIG. 2;
  • FIG. 7 is a detailed view illustrating a signal processor and a test unit of the test apparatus of FIG. 2;
  • FIG. 8 is a flow chart illustrating a test method of an electronic device according to the first embodiment of the present invention.
  • FIG. 9 is a view illustrating a table for test items testing an electronic device in the test apparatus of an electronic device according to the first embodiment of the present invention
  • FIG. 10 is a schematic block diagram illustrating composite signal test in test items of FIG. 7;
  • FIG. 11 is a schematic block diagram illustrating S-video signal test in test items of FIG. 7;
  • FIG. 12 is a schematic block diagram illustrating component signal test in test items of FIG. 7;
  • FIG. 13 is a schematic block diagram illustrating RGB signal test in test items of FIG. 7;
  • FIG. 14 is a schematic block diagram illustrating DVI signal test in test items of FIG. 7
  • FIG. 15 is a schematic block diagram illustrating audio signal test in test items of FIG. 7;
  • FIG. 16 is a schematic block diagram illustrating SCART signal test in test items of FIG. 7;
  • FIG. 17 is a block diagram illustrating a test apparatus of an electronic device according to a second embodiment of the present invention.
  • FIG. 18 is a block diagram illustrating a test apparatus of an electronic device according to a third embodiment of the present invention.
  • FIG. 19 is a flow chart illustrating a test method of an electronic device according to the third embodiment of the present invention.
  • FIG. 1 is a view illustrating a production line of an image processor to which a test apparatus and a test method of an electronic device according to first to third embodiments of the present invention are applied, in which the production line is roughly divided into four processes, which are an assembly process 10, a completion process 20, a testing process 30 and a shipment process 40.
  • work guideline providing devices 73, 74, and 75, a testing unit 50, monitoring terminals 72 and 76, and a server 80 are connected to each other via a dedicated test line, denoted by a solid line.
  • the work guideline providing devices 73, 74, and 75 provide work guideline indicative of working data of workers in each process.
  • the testing unit 50 tests an image processor.
  • the monitoring terminals 72 and 76 monitor information for each process.
  • the server 80 manages information, related to the production line, and provides the information through the dedicated test line.
  • the assembly process 10 serves to assemble parts included in a VCR or DVD player into a finished product.
  • a forklift 71 carries the assembled products to a location for performing a completion process 20.
  • the completion process 20 involves fabrication of an image processor using the assembled product and supplies operating power to the image processor.
  • the testing process 30 serves to test whether an image processor can normally extract data from an image-recording medium and provide images to a screen, which is characterized by the present invention.
  • the shipment process 40 serves to pack the image processor without defect, i.e., passing through the testing process 30, and then attach a box label thereto. On the other hand, a defective image processor, detected in the testing process 30, is deposited at a specific place.
  • information relating to the four respective processes 10, 20, 30 and 40 is shared with each other via the dedicated test line, denoted by a solid line, and may be stored in the server 80.
  • the server 80 is connected additionally to an external network as well as the dedicated test line, the monitoring terminal 78 can access information related to the production line, which is stored in the server 80, through the external network.
  • an editor 77 is further connected to the external network.
  • the editor 77 registers or changes data of test items, test sequences, test conditions (for example, a reference value of image signals, an error range of image signals, etc.), which serve to test an image processor.
  • the test apparatus according to the present invention as shown in FIG. 1, is aligned in the production line for image processors, it can be similarly adopted to other production line configurations.
  • FIGS. 2 and 3 are schematic block diagrams illustrating a test apparatus according to the first embodiment of the present invention, in which the test apparatus includes a pin jig 110 on which a PCB 111 to be tested is mounted, a jig controller 130 for controlling operations of the pin jig 110, a signal processor 90 for processing various signals outputted from the pin jig 110 to form proper signals to be tested, a test unit 50 for performing tests using the signals processed in the signal processor 90, and a server 80 in which data related to test items, test sequences, test conditions and test results, etc. are stored.
  • the test apparatus includes a pin jig 110 on which a PCB 111 to be tested is mounted, a jig controller 130 for controlling operations of the pin jig 110, a signal processor 90 for processing various signals outputted from the pin jig 110 to form proper signals to be tested, a test unit 50 for performing tests using the signals processed in the signal processor 90, and a server 80 in which data related to test items,
  • the pin jig 110 mounts a PCB 111 to be tested thereon.
  • the pin jig 110 may be designed to further mount a separate device depending on an object to be tested. For example, when testing a DVD player, as shown in FIG. 2, a DVD- ROM 112a is further installed thereon. Also, in the case that a set-top box (provided that a satellite set-top box) is tested, as shown in FIG. 3, a turner 112b receiving satellite signals is further installed thereon.
  • the pin jig 110 includes a lower pin jig 113 on which a PCB 111 is mounted, and an upper pin jig 114 for pressing the upper side of the PCB 111 to firmly fix the PCB 111 to the lower pin jig 113.
  • the lower pin jig 113 includes a plurality of pins 115 formed in the internal side thereof, in which the pins 115 contact the rear side of the PCB 111 and are connected to the signal processor 90 such that signals from the PCB 111 are transmitted to the signal processor 90, and a plurality of fixing poles 116 to prevent the PCB 111 from changing their positions while testing.
  • the plurality of pins 115 are protruded from an upper plate 117 of the lower pin jig 113 through corresponding through-holes formed on the upper plate 117, and the fixing poles 116 are also protruded from the upper plate 117 around the upper plate 117.
  • the upper pin jig 114 movable in the vertical direction by air cylinders, etc. includes a plurality of pressure poles 118 for pressing the PCB 111 to the upper pin jig 114.
  • the pins 115 of the lower pin jig 113 can be manufactured as an elastic variable supporting pole, such that the pins 115 can be closely connected to the rear solder of the PCB 111 when the upper ping jig 114 is pressed.
  • the pressure poles 118 of the upper pin jig 114 press the PCB 111 from the upper side thereof such that part of the solder of the rear side of the PCB 111 can contact the pins 115 of the lower pin jig 113. Therefore, the PCB 111 can transmit its signals to the signal processor 90 through the pins 115 thereof.
  • the lower pin jig 113 is installed in the pin jig 110 such that it can be replaced with other lower pin jigs.
  • the positions of the pins 115 or the fixing poles 116 of the lower pin jig 113 are changed according to an object to be tested.
  • the lower pin jigs are installed differing their types according to on a DVD player or a mobile communication terminal as an object to be tested, and at same time, the positions of the pins or the fixing poles are changed according to the size and shapes of the PCBs of the DVD player and the mobile communication terminal.
  • the pin jig 110 includes the above mentioned elements and further includes a switch unit 119 (which includes switches, such as a switch for applying power to the pin jig or a DVD playing switch if an object to be tested is a DVD player, etc.) for operating the pin jig 110 and the PCB 111 as an object to be tested, and a remote control signal receiving unit 121 for receiving remote control signals.
  • the remote control signal receiving unit 121 installed in the pin jig 110 transmits the remote control signals stored in the test unit 50 mounted on the pin jig 110 thereto to check signals from the PCB 111, such that the state of the PCB 111 can be tested on the basis of the remote control signals.
  • the pin jig 110 outputs and inputs various signals according to kinds of electronic devices to be tested, such as composite signals (referred to as video signals in FIG. 4), S-video signals, component signals Y, Pb and Pr, RGB signals, digital visual interface (DVI) signals, radio frequency (RF) signals, audio LR signals, Sony/Philips digital interface (S/PDIF) signals, COAXIAL signals, SCART signals, etc.
  • composite signals referred to as video signals in FIG. 4
  • S-video signals S-video signals
  • component signals Y, Pb and Pr RGB signals
  • DVI digital visual interface
  • RF radio frequency
  • S/PDIF Sony/Philips digital interface
  • COAXIAL signals COAXIAL signals
  • SCART signals etc.
  • the jig controller 130 includes a second address decoder 131 for analyzing addresses of objects to be controlled on the basis of control signals transmitted from the test unit 50, a bus 132 for data communication between elements of the jig controller 130, and a switch controller 133 for transmitting switch control signals to the switch unit 119 of the pin jig 110 such that the switch controller 113 can control the switch 119 according to the control signals.
  • the second address decoder 131 is installed to the jig controller 130 to be used when the plurality of PCBs 111 are tested by the plurality of pin jigs 110.
  • the second address decoder 131 serves to determines whether which one of control signals transmitted from the test unit 50 is corresponded to which one of a plurality of PCBs 111, such that the control signals can correspondingly control the plurality of PCBs 111. Also, the second address decoder 131 serves to determine which one of control signals transmitted from the test unit 50 is corresponded to which one of switches of the switch unit 119.
  • the signal processor 90 includes first to fifth signal conversion units 96 ⁇ 99, and 101 for converting various signals outputted from the pin jig 110 into composite signals, first to fifth MUXs 91 ⁇ 95, a tuner 103 for separating RF signals into video and audio signals, an optical audio receiver 102 for converting S/PDIF signals, which are a type of optical signal, into electrical signals, a bus 104 for data communication between elements of the signal processor 90, and a first address decoder 105 for analyzing addresses of objects to be tested from the control signals transmitted from the test unit 50.
  • the analysis of the first address decoder 105 means a procedure for confirming which one of the signals inputted to the signal processor 90 must be controlled.
  • the first signal conversion unit 96 converts the component signals into composite signals.
  • the second signal conversion unit 97 converts the RGB signals into composite signals.
  • the third signal conversion unit 98 converts the S-video signal into composite signals.
  • the fourth signal conversion unit 99 converts the S- video and the RGB signals of the SCART signals into composite signals.
  • the fifth signal conversion unit 101 converts the component signals into RGB signals.
  • the first MUX 91 serves to multiplex signals from an image processor, which implements SD level images, to select any one of a plurality of composite signals inputted therefrom and signals transmitted from the second MUX 92, and to transmit the selected signal to the test unit 50.
  • the second MUX 92 serves to select any one of video signals of the SCART signals and video signals separated by the tuner 103 and transmit the selected signal to the first MUX 91.
  • the third MUX 93 serves to multiplex signals from an image processor implementing an HD level image, select any one of the RGB signals outputted from the pin jig 110 or the RGB signals from the fifth signal conversion unit 101, and transmit the selected signal to the test unit 50.
  • the fourth MUX 94 serves to multiplex audio signals, select one of the Audio L/R signals or audio signals separated from the tuner 103, and transmit the selected signal to the test unit 50.
  • the fifth MUX 95 serves to multiplex digital audio signals, and select and output any one of the digital audio signals transmitted form the optical audio receiver 102 or the COAXIAL signals.
  • the fifth MUX 95 includes a decoder installed therein such that the decoder can convert the inputted digital audio signal into the audio signal to be outputted,
  • the test unit 50 includes an editor 51 for setting test items, test sequence and test conditions according to the kinds of object to be tested when testing electronic devices, a test program storage unit 52 for storing a program execution test processes when performing tests, a test execution unit 53 for performing tests accruing to the test items, test sequence and test conditions, which are set in the editor 51, and a display 54 for displaying reproduced images or test proceeding states, or test results.
  • the test unit 50 includes an SD image board 55 for inputting image signals (namely, images) transmitted from the first MUX 91, an HD image board 56 for inputting image signals transmitted from the third MUX 93 and DVI signals, a scope board 57 for processing the image signals transmitted from the first MUX 91 into a proper state for waveform analysis (for example, the scope board 57 triggers the composite signal transmitted from the first MUX 91), a digital acquisition board (DAQ) 58 for inputting audio signals from the fourth and fifth MUXs 94 and 95, an industry standard architecture (ISA) board 59, and a digital input/output (DIO) board 61.
  • the industry standard architecture (ISA) board 59 and the digital input/output (DIO) board function as input/output devices.
  • the editor 51 serves to set test items, test sequences, and test conditions according to data inputted by input devices, such as a keyboard (not shown) or a mouse (not shown).
  • input devices such as a keyboard (not shown) or a mouse (not shown).
  • the editor 51 float a setting window on the display 54, in which the setting window includes test items, test sequences, and test conditions, such that it enables a user to easily set the test items, test sequences and test conditions.
  • the test items, test sequences and test conditions, set in the editor 51 are stored in a server 80, such that they can be searched or modified by other editor 77 through the external network connected to the server 80.
  • the test program storage unit 52 may be implemented with storage devices such as a Hard Disk Drive (HDD). Also, a test program defines control directions for each of devices, such as a pin jig 110 and a signal processor 90, based on test items or test sequence. Also, the test program storage unit 52 stores a reference value and an error range of each signal inputted to the test unit 50 from the electronic device, which are used for comparison factors when performing tests.
  • HDD Hard Disk Drive
  • the test execution unit 53 is implemented with devices such as a CPU and a RAM.
  • the CPU and RAM execute a test program such that the PCB 111 mounted on the pin jig 110 can be tested on the basis of the test items and the test sequences, which are set in the editor 51.
  • the test execution unit 53 compares each signal inputted with the reference value stored in the test program storage unit 52 in order to determine whether each signal is normal or not.
  • test items As shown in FIG. 7, are plural, and the objects to be tested (which are models of FIG. 7) are also various types.
  • the test items can be set according to the types of electronic devices as an object to be tested.
  • a model to be tested and the test items are set through the input devices (as notations, O' and 'x,' denote items to be tested and not to be tested, respectively, as shown in FIG. 9)
  • testing is performed only for the selected items when testing a corresponding type of electronic device.
  • the object to be tested is a DTB-9401Z (a set top box)
  • the test is performed only for the items such as a power test, a SCART voltage test, a SCART output test, an Audio test, an Optical test, a menu test and a smart card test.
  • test execution unit 53 executes the test program to test the selected test items based on the test sequences in step S 144.
  • the display 54 displays the test result thereon in step S 146.
  • the composite signals outputted form the pin jig 110 are inputted to the image board 55 through the first MUX 91 and then the SD image board 55 separates the inputted signals into RGB signals.
  • the test execution unit 53 makes a determination as to whether the separated R, G, B signals are within each of error ranges ER, EQ, and E B in order to determine the states of the R, G, B signals.
  • the S-video signal Pl outputted from the pin jig 110 is converted into composite signals P2 by the third signal conversion unit 98, and then the composite signals are inputted to the SD image board 55.
  • the SD image board 55 separates the inputted signals into R, G, B signals.
  • the test execution unit 53 makes a determination as to whether the separated R, G, B signals are within each of error ranges or whether the separated R, G, B signals are normal based on spectrum analysis P3.
  • FIG. 12 (and FIGS.
  • the component signals P4 outputted from the pin jig 110 are converted into composite signals P5 by the first signal conversion unit 96, and then the composite signals are inputted to the scope board 57 and the SD image board 55.
  • the test execution unit 53 performs a determination as to whether the component signals are normal on the basis of composite level analysis for the signals inputted to the scope board 57 and spectrum analysis P6 for the signals separated into R, G, B signals by the SD image board 55.
  • the RGB signals P7 outputted from the pin jig 110 are converted into composite signals P8 by the second signal conversion unit 97, and then the composite signals are inputted to the scope board 57 and the SD image board 55.
  • the test execution unit 53 makes a determination as to whether the RGB signals are normal on the basis of composite level analysis for the signals inputted to the scope board 57 and spectrum analysis P6 for the signals separated into R, G, B signals by the SD image board 55
  • the DVI signals (R, G, B signal format) PlO outputted from the pin jig 110 are directly inputted to the HD image board 56.
  • the test execution unit 53 makes a determination as to whether the DVI signals are normal based on spectrum analysis PI l.
  • the audio L/R signals outputted from the pin jig 110 or the audio signals Pl 2 separated from the RF signals are inputted to the DAQ board 58.
  • the test execution unit 58 compares frequency and voltage of the audio signals with a reference value stored in the test program storage unit 52 to determine whether the audio signals are normal.
  • the SCART signals Pl 3 outputted from the pin jig 110 can be tested by one of the test methods mentioned above.
  • test items for testing an image processor in the test apparatus of an electronic device are illustrated in FIG. 9, and the test methods are implemented based on parts of the test items as shown in FIGS. 10 to 16, it is easily appreciated that the test items can be configured to differ from those of FIG. 9, depending on objects to be tested, such that tests can be performed on the basis of the newly configured test items and/or parts thereof. Accordingly, when selecting a new device as an object to be tested, test items are added or deleted in a test list such that the test items comply with the new device.
  • the test apparatus can automatically test performance of the PCBs.
  • the lower pin jig can be variously implemented while varying pin alignment or positions of guide poles.
  • the test items are selected in the editor, such that various types of electronic devices can be tested via a single test apparatus, and tests for a plurality of test items can be also performed via a single test apparatus.
  • the test apparatus according to the second embodiment of the present invention is implemented such that a single test unit 50 is connected to a plurality of pin jigs 110 and a signal processor 90.
  • the descriptions for the pin jig 110, signal processor 90, test unit 50 and server 80 are the same as those of the first embodiment of the present invention. Therefore, basically, the apparatus and method for testing electronic devices according to the second embodiment of the present invention are similar to those of the first embodiment of the present invention, except that the second embodiment of the present invention can simultaneously test a plurality of electronic devices. As such, the number of the electronic devices simultaneously testable in a single test unit 50 is dependent upon the performance of the test unit 50. As shown in FIG.
  • the test apparatus of an electronic device includes all elements of FIG. 2 and further includes a barcode reader 151 for reading barcodes printed on the PCB 111, and a barcode analyzing unit 161 for analyzing barcodes read by the barcode reader 151.
  • the barcodes includes data indicative of kinds of PCBs, or kinds of electronic devices as the objects to be tested. Referring to FIG. 19, operations of the test apparatus according to the third embodiment of the present invention are described in detail below.
  • step S 170 kinds of electronic devices to be tested by the test apparatus, and test items, test sequences and test conditions, based on the kinds of electronic devices, are set, and then stored in the test program storage unit 52 in step S 170.
  • the barcode reader 151 installed in the pin jig 110 reads barcodes printed on a PCB 111 in step S 172.
  • the barcode analyzing unit 161 of the test unit 160 analyzes the barcodes read by the barcode reader 151 to confirm the kind of PCB 111 to be tested in step S 174.
  • test execution unit 53 After confirming the object to be tested, the test execution unit 53 performs testing on the basis of the test items, test sequence and test conditions for corresponding electronic device, which are stored in the test program storage unit 52, in step S 176. After completing the test, the test result is displayed on the display 54 in step S 178.
  • the test apparatus can automatically confirm the object to be tested and then perform the test to comply with the confirmed test object, even though the test items, etc. are not set according to the object to be tested by the examiner.
  • the third embodiment of the present invention adopts a barcode as a means for confirming an object to be tested, but it will be easily appreciated that the means can be implemented with various means, such as a radio frequency identification (RFID) tag, etc.
  • RFID radio frequency identification
  • the first to the third embodiments of the present invention test the electronic devices by installing the PCBs on the pin jig.
  • the present invention can be also applied to the finished electronic devices to which the PCBs have already installed. In that case, signals for tests are not transmitted to the test unit through the pin jig but the signals are sent to the test unit through output ports.

Abstract

A test apparatus and test method of an electronic device is disclosed. The test apparatus includes pin jigs each of which has different pin positions according to electronic device types, a signal processor for processing signals outputted from the pin jigs, and a test unit for receiving the signals processed in the signal processor and performing tests in predetermined fashions. Therefore, the present invention can automatically test electronic devices and enable a single test apparatus to test various kinds of electronic devices.

Description

[Description] [Invention Title]
An inspection apparatus and method of a electronic device
[Technical Field]
The present invention relates to technology for testing electronic devices, and, more particularly, to a test apparatus and a test method of an electronic device which are capable of automatically testing states of various electronic devices.
[Background Art]
Recently, with the development of the electronic industry, various electronic devices are produced for utilization in fields such as imaging, communications, etc. Regarding the imaging fields, various audio and video formats have been proposed and also new image processors and image recording media are continuously produced based on such audio and video formats.
Here, such image recording media are a type of recording means for storing images and audio, such as CDs or DVDs, etc. Also, the image processors are a kind of device for reproducing information (image or audio) stored in the image recording media. A CD player, a DVD player, a digital camcorder, or etc. is an example of the image processors.
When producing the image processors, general product tests are made as to whether they are normal. The image processors are sold to the public on the condition that they pass the general quality tests. In the prior art, an examiner directly views images reproduced from a monitor or listens to audio reproduced from a speaker, etc. in order to test the image processors. Also, examiners check to ensure that the image processors normally reproduce images or audio stored therein by viewing waveforms of video or audio signals outputted from the images processors using simple measurement equipment such as oscilloscopes, etc.
However, the prior art test method for an image processor, in which the test is dependent upon the vision and listening of an examiner, has disadvantages in that, since consistency of the test may be decreased, test reliability can be decreased.
Also, the prior art test method has drawbacks in that since measurement equipment is used to test video and audio signals outputted from the image processor, testing the various features of the devices is time consuming and thus the manufacturing productivity of the electronic devices is decreased. Also, such problems occur in other electronic devices, such as set-top boxes or mobile telephones, in addition to image processors.
[Disclosure of Invention] [ Technical Problem ]
Therefore, it is an aspect of the invention to provide a test apparatus and a test method of electronic devices, which are capable of automatically testing states of the electronic devices. It is second aspect of the invention to provide a test apparatus and a test method of electronic devices, which enable a single test apparatus to test various electronic devices.
It is third aspect of the invention to provide a test apparatus and a test method of electronic devices, which enable a single test apparatus to test a plurality of test items.
It is a fourth aspect of the invention to provide a test apparatus and a test method of electronic devices, which enable a single test apparatus to test a plurality of electronic devices together.
It is a fourth aspect of the invention to provide a test apparatus and a test method of electronic devices, which are capable of automatically recognizing the electronic device type and performing tests in accordance with the determined electronic device type.
Additional aspects and/or advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
[Technical Solution]
In accordance with an aspect of the present invention, the above and other objects can be accomplished by the provision of a test apparatus of an electronic device comprising: an editor for setting test data based on electronic device type, in which the test data are inputted by an examiner; and a test execution unit for confirming corresponding test data corresponding to the electronic device type, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
Preferably, the test data may include test items, test sequence, and test conditions.
Preferably, the test apparatus further comprises a signal processor for processing various signals outputted from the electronic device as an object to be tested to properly test the electronic device.
Preferably, the signal processor includes a first MUX for multiplexing a plurality of image signals outputted from an electronic device implementing SD level images; and a third MUX for multiplexing a plurality of image signals outputted from an electric device implementing HD level images.
Preferably, the signal processor further includes first to third signal conversion units for converting image signals into composite signals to transmit them to the first MUX; and a fifth signal conversion unit for converting image signals into RGB signals to transmit them to the third MUX. Preferably, the signal processor further includes fourth and fifth MUXs for multiplexing a plurality of audio signals.
Preferably, the test apparatus further comprises a pin jig on which a PCB of the electronic device, as an object to be tested, is mounted. Preferably, the pin jig is installed to be replaced with other pin jigs, in which the pin jigs have pins whose positions are differently aligned, such that the pin jigs can receive signals outputted from the PCB, according to the kinds of electronic devices. Preferably, the test apparatus further comprises a jig controller for controlling the pin jig.
Preferably, the test apparatus further comprises a server in which data related to the tests are stored.
In accordance with another aspect of the present invention, there is provided a test apparatus of an electronic device comprising: an editor for setting a plurality of test items according to input of an examiner; and a test execution unit for confirming the test items, and performing a test to determine whether the electronic device is normal.
In accordance with another aspect of the present invention, there is provided a test apparatus of an electronic device comprising: a plurality of pin jigs for mounting the electronic device as an object to be tested; an editor for setting test data according to input of an examiner; and a test execution unit for testing a plurality of electronic devices mounted on the plurality of pin jigs on the basis of the set test data. Preferably, the test apparatus further comprises a signal processor for processing various signals outputted from the plurality of electronic devices to properly test the plurality of electronic devices.
In accordance with another aspect of the present invention, there is provided a test apparatus of an electronic device comprising: an editor for setting test data according to kind of the electronic device, in which the test data are inputted by an examiner; a barcode reader for reading barcodes printed on the electronic device; a barcode analyzing unit for analyzing the barcodes read by the barcode reader; and a test execution unit for recognizing the kind of the electronic device based on the analyzed barcodes, confirming corresponding test data corresponding to one of the kinds of electronic devices, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
Preferably, the barcode reader is installed on the pin jig on which the electronic device is mounted.
In accordance with another aspect of the present invention, there is provided a test method of an electronic device comprising: setting test data according to the electronic device types, in which the test data are inputted by an examiner; and confirming corresponding test data corresponding to one of the electronic device types, and performing a test to determine whether the electronic device is normal, based on the corresponding test data. Preferably, the test data may include test items, test sequences, and test conditions.
In accordance with another aspect of the present invention, there is provided a test method of an electronic device comprising: setting a plurality of test items according to input of an examiner; and confirming the test items, and performing a test to determine whether the electronic device is normal.
In accordance with another aspect of the present invention, there is provided a test method of an electronic device comprising: setting test data according to input of an examiner; and testing a plurality of electronic devices mounted on a plurality of pin jigs, based on the set test data. In accordance with yet another aspect of the present invention, there is provided a test method of an electronic device comprising: setting test data according to the electronic device types, in which the test data are inputted by an examiner; reading and analyzing barcodes printed on the electronic device; recognizing the kind of the electronic device based on the analyzed barcodes; and confirming corresponding test data corresponding to one of the kinds of electronic devices, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
[Advantageous Effects]
As appreciated through the above aspects, since the test apparatus according to the present invention can automatically test electronic devices, it can provide convenient testing and improve test reliability, as compared with the naked- eye test.
Also, the present invention enables a single test apparatus to test various kinds of electronic devices, thereby securing universality thereof.
In addition, the present invention can enable a single test apparatus to test an electronic device based on various test items.
Further, the present invention can enable a single test apparatus to test a plurality of electronic devices, thereby improving test speed. Moreover, the present invention can automatically recognize objects to be tested, thereby providing convenient testing.
[Description of Drawings]
These and/or other aspects and advantages of the invention will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a view illustrating a production line of an image processor to which a test apparatus and a test method of an electronic device according to first to third embodiments of the present invention are applied;
FIGS. 2 and 3 are schematic block diagrams illustrating a test apparatus according to the first embodiment of the present invention;
FIGS. 4 is a perspective view illustrating a structure of a pin jig used in the test apparatus of FIG. 2; FIG. 5 is a cross-sectional view illustrating a structure of a pin jig used in the test apparatus of FIG. 2;
FIG. 6 is a detailed view illustrating a pin jig and a jig controller of the test apparatus of FIG. 2;
FIG. 7 is a detailed view illustrating a signal processor and a test unit of the test apparatus of FIG. 2;
FIG. 8 is a flow chart illustrating a test method of an electronic device according to the first embodiment of the present invention;
FIG. 9 is a view illustrating a table for test items testing an electronic device in the test apparatus of an electronic device according to the first embodiment of the present invention; FIG. 10 is a schematic block diagram illustrating composite signal test in test items of FIG. 7;
FIG. 11 is a schematic block diagram illustrating S-video signal test in test items of FIG. 7;
FIG. 12 is a schematic block diagram illustrating component signal test in test items of FIG. 7;
FIG. 13 is a schematic block diagram illustrating RGB signal test in test items of FIG. 7;
FIG. 14 is a schematic block diagram illustrating DVI signal test in test items of FIG. 7; FIG. 15 is a schematic block diagram illustrating audio signal test in test items of FIG. 7;
FIG. 16 is a schematic block diagram illustrating SCART signal test in test items of FIG. 7;
FIG. 17 is a block diagram illustrating a test apparatus of an electronic device according to a second embodiment of the present invention;
FIG. 18 is a block diagram illustrating a test apparatus of an electronic device according to a third embodiment of the present invention; and
FIG. 19 is a flow chart illustrating a test method of an electronic device according to the third embodiment of the present invention.
[Best Mode]
Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. The embodiments are described below to explain the present invention by referring to the figures. FIG. 1 is a view illustrating a production line of an image processor to which a test apparatus and a test method of an electronic device according to first to third embodiments of the present invention are applied, in which the production line is roughly divided into four processes, which are an assembly process 10, a completion process 20, a testing process 30 and a shipment process 40. Also, work guideline providing devices 73, 74, and 75, a testing unit 50, monitoring terminals 72 and 76, and a server 80 are connected to each other via a dedicated test line, denoted by a solid line. Here, the work guideline providing devices 73, 74, and 75 provide work guideline indicative of working data of workers in each process. The testing unit 50 tests an image processor. The monitoring terminals 72 and 76 monitor information for each process. The server 80 manages information, related to the production line, and provides the information through the dedicated test line.
The assembly process 10 serves to assemble parts included in a VCR or DVD player into a finished product. After assembly, a forklift 71 carries the assembled products to a location for performing a completion process 20.
The completion process 20 involves fabrication of an image processor using the assembled product and supplies operating power to the image processor. The testing process 30 serves to test whether an image processor can normally extract data from an image-recording medium and provide images to a screen, which is characterized by the present invention.
The shipment process 40 serves to pack the image processor without defect, i.e., passing through the testing process 30, and then attach a box label thereto. On the other hand, a defective image processor, detected in the testing process 30, is deposited at a specific place.
Meanwhile, information relating to the four respective processes 10, 20, 30 and 40 is shared with each other via the dedicated test line, denoted by a solid line, and may be stored in the server 80. Here, since the server 80 is connected additionally to an external network as well as the dedicated test line, the monitoring terminal 78 can access information related to the production line, which is stored in the server 80, through the external network. Also, an editor 77 is further connected to the external network. Here, the editor 77 registers or changes data of test items, test sequences, test conditions (for example, a reference value of image signals, an error range of image signals, etc.), which serve to test an image processor. Although the test apparatus according to the present invention, as shown in FIG. 1, is aligned in the production line for image processors, it can be similarly adopted to other production line configurations.
FIGS. 2 and 3 are schematic block diagrams illustrating a test apparatus according to the first embodiment of the present invention, in which the test apparatus includes a pin jig 110 on which a PCB 111 to be tested is mounted, a jig controller 130 for controlling operations of the pin jig 110, a signal processor 90 for processing various signals outputted from the pin jig 110 to form proper signals to be tested, a test unit 50 for performing tests using the signals processed in the signal processor 90, and a server 80 in which data related to test items, test sequences, test conditions and test results, etc. are stored.
The pin jig 110 mounts a PCB 111 to be tested thereon. The pin jig 110 may be designed to further mount a separate device depending on an object to be tested. For example, when testing a DVD player, as shown in FIG. 2, a DVD- ROM 112a is further installed thereon. Also, in the case that a set-top box (provided that a satellite set-top box) is tested, as shown in FIG. 3, a turner 112b receiving satellite signals is further installed thereon.
As shown in FIG. 4, the pin jig 110 includes a lower pin jig 113 on which a PCB 111 is mounted, and an upper pin jig 114 for pressing the upper side of the PCB 111 to firmly fix the PCB 111 to the lower pin jig 113. The lower pin jig 113 includes a plurality of pins 115 formed in the internal side thereof, in which the pins 115 contact the rear side of the PCB 111 and are connected to the signal processor 90 such that signals from the PCB 111 are transmitted to the signal processor 90, and a plurality of fixing poles 116 to prevent the PCB 111 from changing their positions while testing. Here, the plurality of pins 115 are protruded from an upper plate 117 of the lower pin jig 113 through corresponding through-holes formed on the upper plate 117, and the fixing poles 116 are also protruded from the upper plate 117 around the upper plate 117.
The upper pin jig 114 movable in the vertical direction by air cylinders, etc. (not shown) includes a plurality of pressure poles 118 for pressing the PCB 111 to the upper pin jig 114. Here, the pins 115 of the lower pin jig 113 can be manufactured as an elastic variable supporting pole, such that the pins 115 can be closely connected to the rear solder of the PCB 111 when the upper ping jig 114 is pressed.
As shown in FIG. 5, when the upper pin jig 114 is moved in a state wherein the PCB 111 is mounted on the upper side 117 of the lower pin jig 113, the pressure poles 118 of the upper pin jig 114 press the PCB 111 from the upper side thereof such that part of the solder of the rear side of the PCB 111 can contact the pins 115 of the lower pin jig 113. Therefore, the PCB 111 can transmit its signals to the signal processor 90 through the pins 115 thereof. On the other hand, as shown in FIGS. 4 and 5, the lower pin jig 113 is installed in the pin jig 110 such that it can be replaced with other lower pin jigs. The positions of the pins 115 or the fixing poles 116 of the lower pin jig 113 are changed according to an object to be tested. For example, the lower pin jigs are installed differing their types according to on a DVD player or a mobile communication terminal as an object to be tested, and at same time, the positions of the pins or the fixing poles are changed according to the size and shapes of the PCBs of the DVD player and the mobile communication terminal.
As shown in FIG. 6, the pin jig 110 includes the above mentioned elements and further includes a switch unit 119 (which includes switches, such as a switch for applying power to the pin jig or a DVD playing switch if an object to be tested is a DVD player, etc.) for operating the pin jig 110 and the PCB 111 as an object to be tested, and a remote control signal receiving unit 121 for receiving remote control signals. As such, the remote control signal receiving unit 121 installed in the pin jig 110 transmits the remote control signals stored in the test unit 50 mounted on the pin jig 110 thereto to check signals from the PCB 111, such that the state of the PCB 111 can be tested on the basis of the remote control signals. The pin jig 110 outputs and inputs various signals according to kinds of electronic devices to be tested, such as composite signals (referred to as video signals in FIG. 4), S-video signals, component signals Y, Pb and Pr, RGB signals, digital visual interface (DVI) signals, radio frequency (RF) signals, audio LR signals, Sony/Philips digital interface (S/PDIF) signals, COAXIAL signals, SCART signals, etc.
On the other hand, the jig controller 130 includes a second address decoder 131 for analyzing addresses of objects to be controlled on the basis of control signals transmitted from the test unit 50, a bus 132 for data communication between elements of the jig controller 130, and a switch controller 133 for transmitting switch control signals to the switch unit 119 of the pin jig 110 such that the switch controller 113 can control the switch 119 according to the control signals. The second address decoder 131 is installed to the jig controller 130 to be used when the plurality of PCBs 111 are tested by the plurality of pin jigs 110. Namely, the second address decoder 131 serves to determines whether which one of control signals transmitted from the test unit 50 is corresponded to which one of a plurality of PCBs 111, such that the control signals can correspondingly control the plurality of PCBs 111. Also, the second address decoder 131 serves to determine which one of control signals transmitted from the test unit 50 is corresponded to which one of switches of the switch unit 119.
As shown in FIG. 7, the signal processor 90 includes first to fifth signal conversion units 96 ~ 99, and 101 for converting various signals outputted from the pin jig 110 into composite signals, first to fifth MUXs 91~95, a tuner 103 for separating RF signals into video and audio signals, an optical audio receiver 102 for converting S/PDIF signals, which are a type of optical signal, into electrical signals, a bus 104 for data communication between elements of the signal processor 90, and a first address decoder 105 for analyzing addresses of objects to be tested from the control signals transmitted from the test unit 50. Here, the analysis of the first address decoder 105 means a procedure for confirming which one of the signals inputted to the signal processor 90 must be controlled.
The first signal conversion unit 96 converts the component signals into composite signals. The second signal conversion unit 97 converts the RGB signals into composite signals. The third signal conversion unit 98 converts the S-video signal into composite signals. The fourth signal conversion unit 99 converts the S- video and the RGB signals of the SCART signals into composite signals. Finally, the fifth signal conversion unit 101 converts the component signals into RGB signals. Although the present embodiment of the present invention is implemented with the first to fifth signal conversion units 96~99 and 101 for performing conversion of each signal, it is easily appreciated that the embodiment can be modified such that a single signal conversion unit can convert a plurality of signals into composite signals, instead of the five signal conversion units.
The first MUX 91 serves to multiplex signals from an image processor, which implements SD level images, to select any one of a plurality of composite signals inputted therefrom and signals transmitted from the second MUX 92, and to transmit the selected signal to the test unit 50. The second MUX 92 serves to select any one of video signals of the SCART signals and video signals separated by the tuner 103 and transmit the selected signal to the first MUX 91.
The third MUX 93 serves to multiplex signals from an image processor implementing an HD level image, select any one of the RGB signals outputted from the pin jig 110 or the RGB signals from the fifth signal conversion unit 101, and transmit the selected signal to the test unit 50. The fourth MUX 94 serves to multiplex audio signals, select one of the Audio L/R signals or audio signals separated from the tuner 103, and transmit the selected signal to the test unit 50.
The fifth MUX 95 serves to multiplex digital audio signals, and select and output any one of the digital audio signals transmitted form the optical audio receiver 102 or the COAXIAL signals. Here, the fifth MUX 95 includes a decoder installed therein such that the decoder can convert the inputted digital audio signal into the audio signal to be outputted,
On the other hand, the test unit 50 includes an editor 51 for setting test items, test sequence and test conditions according to the kinds of object to be tested when testing electronic devices, a test program storage unit 52 for storing a program execution test processes when performing tests, a test execution unit 53 for performing tests accruing to the test items, test sequence and test conditions, which are set in the editor 51, and a display 54 for displaying reproduced images or test proceeding states, or test results.
Also, the test unit 50 includes an SD image board 55 for inputting image signals (namely, images) transmitted from the first MUX 91, an HD image board 56 for inputting image signals transmitted from the third MUX 93 and DVI signals, a scope board 57 for processing the image signals transmitted from the first MUX 91 into a proper state for waveform analysis (for example, the scope board 57 triggers the composite signal transmitted from the first MUX 91), a digital acquisition board (DAQ) 58 for inputting audio signals from the fourth and fifth MUXs 94 and 95, an industry standard architecture (ISA) board 59, and a digital input/output (DIO) board 61. Here, the industry standard architecture (ISA) board 59 and the digital input/output (DIO) board function as input/output devices.
The editor 51 serves to set test items, test sequences, and test conditions according to data inputted by input devices, such as a keyboard (not shown) or a mouse (not shown). When setting the test items, etc., the editor 51 float a setting window on the display 54, in which the setting window includes test items, test sequences, and test conditions, such that it enables a user to easily set the test items, test sequences and test conditions. Also, the test items, test sequences and test conditions, set in the editor 51, are stored in a server 80, such that they can be searched or modified by other editor 77 through the external network connected to the server 80.
The test program storage unit 52 may be implemented with storage devices such as a Hard Disk Drive (HDD). Also, a test program defines control directions for each of devices, such as a pin jig 110 and a signal processor 90, based on test items or test sequence. Also, the test program storage unit 52 stores a reference value and an error range of each signal inputted to the test unit 50 from the electronic device, which are used for comparison factors when performing tests.
The test execution unit 53 is implemented with devices such as a CPU and a RAM. The CPU and RAM execute a test program such that the PCB 111 mounted on the pin jig 110 can be tested on the basis of the test items and the test sequences, which are set in the editor 51. The test execution unit 53 compares each signal inputted with the reference value stored in the test program storage unit 52 in order to determine whether each signal is normal or not.
Referring to FIG. 8, a test method of the test apparatus of an electronic device as shown in FIGS. 2 and 3 is described in detail below. When an image processor manufactured on the production line is conveyed to a location for test processes through a conveyor belt, a PCB 111 of the image processor 111 is mounted on the lower pin jig 113 and then the upper pin jig 114 is placed thereon to fix the PCB 111 thereto in step S 140. The editor 51 sets test items, test sequences, and test conditions according to data inputted through the input devices in step S 142. Here, the test items, as shown in FIG. 7, are plural, and the objects to be tested (which are models of FIG. 7) are also various types. Therefore, the test items can be set according to the types of electronic devices as an object to be tested. When a model to be tested and the test items are set through the input devices (as notations, O' and 'x,' denote items to be tested and not to be tested, respectively, as shown in FIG. 9), testing is performed only for the selected items when testing a corresponding type of electronic device. For example, in the case that the object to be tested is a DTB-9401Z (a set top box), the test is performed only for the items such as a power test, a SCART voltage test, a SCART output test, an Audio test, an Optical test, a menu test and a smart card test.
After that, the test execution unit 53 executes the test program to test the selected test items based on the test sequences in step S 144. When completing the test of the test execution unit 53, the display 54 displays the test result thereon in step S 146. With reference to FIGS 10 to 16, a test method for testing a part of the test items as shown in FIG. 9 is briefly described below.
As shown in FIG. 10 (and FIGS. 6 and 7), the composite signals outputted form the pin jig 110 are inputted to the image board 55 through the first MUX 91 and then the SD image board 55 separates the inputted signals into RGB signals. The test execution unit 53 makes a determination as to whether the separated R, G, B signals are within each of error ranges ER, EQ, and EB in order to determine the states of the R, G, B signals.
As shown in FIG. 11 (and FIGS. 6 and 7), the S-video signal Pl outputted from the pin jig 110 is converted into composite signals P2 by the third signal conversion unit 98, and then the composite signals are inputted to the SD image board 55. The SD image board 55 separates the inputted signals into R, G, B signals. Like the test of the composite signals as shown in FIG. 8, the test execution unit 53 makes a determination as to whether the separated R, G, B signals are within each of error ranges or whether the separated R, G, B signals are normal based on spectrum analysis P3. As shown in FIG. 12 (and FIGS. 6 and 7), the component signals P4 outputted from the pin jig 110 are converted into composite signals P5 by the first signal conversion unit 96, and then the composite signals are inputted to the scope board 57 and the SD image board 55. The test execution unit 53 performs a determination as to whether the component signals are normal on the basis of composite level analysis for the signals inputted to the scope board 57 and spectrum analysis P6 for the signals separated into R, G, B signals by the SD image board 55.
As shown in FIG. 13 (and FIGS. 6 and 7), the RGB signals P7 outputted from the pin jig 110 are converted into composite signals P8 by the second signal conversion unit 97, and then the composite signals are inputted to the scope board 57 and the SD image board 55. The test execution unit 53 makes a determination as to whether the RGB signals are normal on the basis of composite level analysis for the signals inputted to the scope board 57 and spectrum analysis P6 for the signals separated into R, G, B signals by the SD image board 55
As shown in FIG. 14 (and FIGS. 6 and 7), the DVI signals (R, G, B signal format) PlO outputted from the pin jig 110 are directly inputted to the HD image board 56. The test execution unit 53 makes a determination as to whether the DVI signals are normal based on spectrum analysis PI l.
As shown in FIG. 15 (and FIGS. 6 and 7), the audio L/R signals outputted from the pin jig 110 or the audio signals Pl 2 separated from the RF signals are inputted to the DAQ board 58. The test execution unit 58 compares frequency and voltage of the audio signals with a reference value stored in the test program storage unit 52 to determine whether the audio signals are normal.
As shown in FIG. 16, the SCART signals Pl 3 outputted from the pin jig 110 can be tested by one of the test methods mentioned above.
Even though the test items for testing an image processor in the test apparatus of an electronic device according to the present invention are illustrated in FIG. 9, and the test methods are implemented based on parts of the test items as shown in FIGS. 10 to 16, it is easily appreciated that the test items can be configured to differ from those of FIG. 9, depending on objects to be tested, such that tests can be performed on the basis of the newly configured test items and/or parts thereof. Accordingly, when selecting a new device as an object to be tested, test items are added or deleted in a test list such that the test items comply with the new device.
As such, the test apparatus according to the first embodiment of the present invention can automatically test performance of the PCBs. Also, according to the object to be tested, the lower pin jig can be variously implemented while varying pin alignment or positions of guide poles. In addition, the test items are selected in the editor, such that various types of electronic devices can be tested via a single test apparatus, and tests for a plurality of test items can be also performed via a single test apparatus.
As shown in FIG. 17, the test apparatus according to the second embodiment of the present invention is implemented such that a single test unit 50 is connected to a plurality of pin jigs 110 and a signal processor 90. Here, the descriptions for the pin jig 110, signal processor 90, test unit 50 and server 80 are the same as those of the first embodiment of the present invention. Therefore, basically, the apparatus and method for testing electronic devices according to the second embodiment of the present invention are similar to those of the first embodiment of the present invention, except that the second embodiment of the present invention can simultaneously test a plurality of electronic devices. As such, the number of the electronic devices simultaneously testable in a single test unit 50 is dependent upon the performance of the test unit 50. As shown in FIG. 18, the test apparatus of an electronic device according to the third embodiment of the present invention includes all elements of FIG. 2 and further includes a barcode reader 151 for reading barcodes printed on the PCB 111, and a barcode analyzing unit 161 for analyzing barcodes read by the barcode reader 151. Here, the barcodes includes data indicative of kinds of PCBs, or kinds of electronic devices as the objects to be tested. Referring to FIG. 19, operations of the test apparatus according to the third embodiment of the present invention are described in detail below.
Firstly, kinds of electronic devices to be tested by the test apparatus, and test items, test sequences and test conditions, based on the kinds of electronic devices, are set, and then stored in the test program storage unit 52 in step S 170. When initiating testing, the barcode reader 151 installed in the pin jig 110 reads barcodes printed on a PCB 111 in step S 172. The barcode analyzing unit 161 of the test unit 160 analyzes the barcodes read by the barcode reader 151 to confirm the kind of PCB 111 to be tested in step S 174.
After confirming the object to be tested, the test execution unit 53 performs testing on the basis of the test items, test sequence and test conditions for corresponding electronic device, which are stored in the test program storage unit 52, in step S 176. After completing the test, the test result is displayed on the display 54 in step S 178.
The test apparatus according to the third embodiment of the present invention can automatically confirm the object to be tested and then perform the test to comply with the confirmed test object, even though the test items, etc. are not set according to the object to be tested by the examiner. On the other hand, the third embodiment of the present invention adopts a barcode as a means for confirming an object to be tested, but it will be easily appreciated that the means can be implemented with various means, such as a radio frequency identification (RFID) tag, etc.
The first to the third embodiments of the present invention test the electronic devices by installing the PCBs on the pin jig. However, the present invention can be also applied to the finished electronic devices to which the PCBs have already installed. In that case, signals for tests are not transmitted to the test unit through the pin jig but the signals are sent to the test unit through output ports. Although a few embodiments of the present invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.

Claims

[CLAIMS]
[Claim 1 ] A test apparatus of an electronic device comprising: an editor for setting test data based on electronic device types, in which the test data are inputted by an examiner; and a test execution unit for confirming corresponding test data corresponding to one of the electronic device types, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
[Claim 2] The test apparatus as set forth in claim 1, wherein the test data include test items, test sequence, and test conditions.
[Claim 3] The test apparatus as set forth in claim 1, further comprising a signal processor for processing various signals outputted from the electric device as an object to be tested to properly test the electric device.
[Claim 4] The test apparatus as set forth in claim 3, wherein the signal processor includes: a first MUX for multiplexing a plurality of image signals outputted from an electric device implementing SD level images; and a third MUX for multiplexing a plurality of image signals outputted from an electric device implementing HD level images.
[Claim 5] The test apparatus as set forth in claim 4, wherein the signal processor further includes: first to third signal conversion units for converting image signals into composite signals to transmit them to the first MUX; and a fifth signal conversion unit for converting image signals into RGB signals to transmit them to the third MUX.
[Claim 6] The test apparatus as set forth in claim 4, wherein the signal processor further includes fourth and fifth MUXs for multiplexing a plurality of audio signals.
[Claim 7] The test apparatus as set forth in claim 1 , further comprising: a pin jig on which a PCB of the electronic device, as an object to be tested, is mounted.
[Claim 8] The test apparatus as set forth in claim 7, wherein the pin jig is installed to be replaced with other pin jigs, in which the pin jigs have pins whose positions are differently aligned, such that the pin jigs can receive signals outputted from the PCB, according to the kinds of electric devices.
[Claim 9] The test apparatus as set forth in claim 7 or 8, further comprising: a jig controller for controlling the pin jig.
[Claim 10] The test apparatus as set forth in claim 1, further comprising a server in which data related to the tests are stored.
[Claim 111 A test apparatus of an electronic device comprising: an editor for setting a plurality of test items according to input of an examiner; and a test execution unit for confirming the test items, and performing a test to determine whether the electronic device is normal.
[Claim 12] A test apparatus of an electronic device comprising: a plurality of pin jigs for mounting the electronic device as an object to be tested; an editor for setting test data according to input of an examiner; and a test execution unit for testing a plurality of electronic devices mounted on the plurality of pin jigs on the basis of the set test data.
[Claim 13 ] The test apparatus as set forth in claim 12, further comprising: a signal processor for processing various signals outputted from the plurality of electronic devices to properly test the plurality of electronic devices.
[Claim 14] A test apparatus of an electronic device comprising: an editor for setting test data according to kind of the electronic device, in which the test data are inputted by an examiner; a barcode reader for reading barcodes printed on the electronic device; a barcode analyzing unit for analyzing the barcodes read by the barcode reader; and a test execution unit for recognizing the kind of the electronic device based on the analyzed barcodes, confirming corresponding test data corresponding to one of the kinds of electronic devices, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
[Claim 15] The test apparatus as set forth in claim 14, wherein the barcode reader is installed on the pin jig on which the electronic device is mounted.
[Claim 16] A test method of an electronic device comprising: setting test data according to the electronic device types, in which the test data are inputted by an examiner; and confirming corresponding test data corresponding to one of the electronic device types, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
[Claim 17] The test method as set forth in claim 16, wherein the test data includes test items, test sequences, and test conditions.
[Claim 18] A test method of an electronic device comprising: setting a plurality of test items according to input of an examiner; and confirming the test items, and performing a test to determine whether the electronic device is normal.
[Claim 19] A test method of an electronic device comprising: setting test data according to input of an examiner; and testing a plurality of electronic devices mounted on a plurality of pin jigs, based on the set test data.
[ Claim 20 ] A test method of an electronic device comprising: setting test data according to kind of the electronic device, in which the test data are inputted by an examiner; reading and analyzing barcodes printed on the electronic device; recognizing the kind of the electronic device based on the analyzed barcodes; and confirming corresponding test data corresponding to one of the kinds of electronic devices, and performing a test to determine whether the electronic device is normal, based on the corresponding test data.
PCT/KR2005/000244 2005-01-28 2005-01-28 An inspection apparatus and method of a electronic device WO2006088265A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/KR2005/000244 WO2006088265A1 (en) 2005-01-28 2005-01-28 An inspection apparatus and method of a electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/KR2005/000244 WO2006088265A1 (en) 2005-01-28 2005-01-28 An inspection apparatus and method of a electronic device

Publications (1)

Publication Number Publication Date
WO2006088265A1 true WO2006088265A1 (en) 2006-08-24

Family

ID=36916644

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2005/000244 WO2006088265A1 (en) 2005-01-28 2005-01-28 An inspection apparatus and method of a electronic device

Country Status (1)

Country Link
WO (1) WO2006088265A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990073880A (en) * 1998-03-04 1999-10-05 구자홍 Performance tester of PC integrated monitor and test method
JP2003347179A (en) * 2002-05-29 2003-12-05 Hitachi High-Technologies Corp System and method for remote maintenance
KR20050007727A (en) * 2003-07-11 2005-01-21 삼성전자주식회사 Apparatus and Method for testing A/V device
KR20050007721A (en) * 2003-07-11 2005-01-21 삼성전자주식회사 Method and Apparutus for testing image quality

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990073880A (en) * 1998-03-04 1999-10-05 구자홍 Performance tester of PC integrated monitor and test method
JP2003347179A (en) * 2002-05-29 2003-12-05 Hitachi High-Technologies Corp System and method for remote maintenance
KR20050007727A (en) * 2003-07-11 2005-01-21 삼성전자주식회사 Apparatus and Method for testing A/V device
KR20050007721A (en) * 2003-07-11 2005-01-21 삼성전자주식회사 Method and Apparutus for testing image quality

Similar Documents

Publication Publication Date Title
US8879744B2 (en) Audio testing system and audio testing method for device under test
CN102572503A (en) Automatic test system for functions of television set and method thereof
CN201986083U (en) Device for automatically detecting circuit board
US20130104158A1 (en) System and method for securing and testing set-top boxes
CN102905034A (en) Electronic device testing system and electronic device testing method
CN103376380A (en) Test system and method thereof
US11489750B2 (en) Automatic test system and device thereof
CN111143215A (en) Automatic testing method for vehicle-mounted software
CN102034406A (en) Methods and devices for displaying multimedia data
CN102087336A (en) Method and system for detecting video/audio signal circuit board
CN112882458A (en) Intelligent cabin combined test equipment device
CN109669831A (en) A kind of test method and electronic equipment
CN101577592B (en) Radiofrequency test system and radiofrequency test method
CN101931827A (en) Set-top box test method for event replay
US20130103341A1 (en) Test fixture for testing set-top boxes
WO2006088265A1 (en) An inspection apparatus and method of a electronic device
CN100418154C (en) Apparatus and method for detecting defective elements produced upon playing moving picture
CN1784024A (en) Sound image synchronous detecting method and its device of digital TV receiver
US11528473B2 (en) Automatic test method
CN201928389U (en) Automatic testing system of television function
CN103245856B (en) A kind of test the method for electronic equipment performance, equipment and system
US7342603B2 (en) Image output test system and method and device thereof
CN111885250A (en) Mobile phone MMI automatic test method and equipment thereof
CN103680557A (en) Optical disk playing device and communication control method thereof
WO2006088264A1 (en) An inspection apparatus and method of a electronic device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase

Ref document number: 05726539

Country of ref document: EP

Kind code of ref document: A1