WO2006073775A1 - A fast (vertical) scan apparatus for transposed scan display systems - Google Patents

A fast (vertical) scan apparatus for transposed scan display systems Download PDF

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Publication number
WO2006073775A1
WO2006073775A1 PCT/US2005/045899 US2005045899W WO2006073775A1 WO 2006073775 A1 WO2006073775 A1 WO 2006073775A1 US 2005045899 W US2005045899 W US 2005045899W WO 2006073775 A1 WO2006073775 A1 WO 2006073775A1
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WIPO (PCT)
Prior art keywords
scan
circuit
transposed
vertical
modulator
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Application number
PCT/US2005/045899
Other languages
French (fr)
Inventor
Richard William Collins
Richard Laverne Eyer
Richard Hugh Miller
Frank Melvin Koch
James Arthur Hutton
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Thomson Licensing
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Publication of WO2006073775A1 publication Critical patent/WO2006073775A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/23Distortion correction, e.g. for pincushion distortion correction, S-correction
    • H04N3/233Distortion correction, e.g. for pincushion distortion correction, S-correction using active elements
    • H04N3/2335Distortion correction, e.g. for pincushion distortion correction, S-correction using active elements with calculating means
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/12Picture reproducers
    • H04N9/16Picture reproducers using cathode ray tubes
    • H04N9/18Picture reproducers using cathode ray tubes using separate electron beams for the primary colour signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/12Picture reproducers
    • H04N9/16Picture reproducers using cathode ray tubes
    • H04N9/28Arrangements for convergence or focusing

Definitions

  • the present invention relates to cathode ray tubes (CRTs) for displays such as, for example, High Definition Television (HDTV). More particularly, it relates to CRTs operating in a vertical scan mode and a method of operating the CRT in the vertical scan mode.
  • CRTs cathode ray tubes
  • HDTV High Definition Television
  • FIG. 1 illustrates the basic geometrical relationship between throw distance and deflection angle for a typical CRT. Increasing the deflection angle (A) reduces the throw distance, thus allowing for production of a shorter CRT and ultimately, a slimmer television set.
  • obliquity is defined as the effect of a beam intercepting the screen at an oblique angle, thereby causing an elongation of the spot.
  • the problem of obliquity becomes especially apparent in CRTs having a standard horizontal gun orientation, i.e., a CRT whose guns have a horizontal alignment along the major axis of the screen.
  • a spot having a generally circular shape at the center of the screen becomes oblong or elongated as the spot moves toward edges of the screen.
  • CRT's typically include a horizontal yoke that generates a pincushion shaped field and a vertical yoke that generates a barrel shaped field. These yoke fields cause the spot shape to become elongated. This elongation adds to the obliquity effect by further increasing spot distortion at the three-o'clock and nine o'clock positions (referred to as the "3/9" positions) and at corner positions on the screen.
  • U.S. Patent No. 5, 170,102 describes a CRT with a vertical electron gun orientation whose un- deflected beams appear parallel to the short axis of the display screen.
  • the deflection system described in this patent includes a signal generator for causing scanning of the display screen in a raster-scan fashion, thereby yielding a plurality of lines oriented along the short axis of the display screen.
  • the deflection system also comprises a first set of coils for generating a substantially pincushion-shaped deflection field for deflecting the beams in the direction of the short axis of the display screen.
  • a second set of coils generates a substantially barrel shaped deflection field for deflecting the beams in the direction in the long axis of the display screen.
  • the deflection system's coils generally distort spots by elongating them vertically. This vertical elongation compensates for obliquity effects, thereby reducing spot distortion at the 3/9 and corner positions on the screen.
  • the barrel shaped field required to achieve self convergence at 3/9 screen locations overcompensates for obliquity and vertically elongates the spot at the 3/9 and corner locations as shown in Figure 10 of the U.S. Patent No. 5, 170, 102.
  • a video display system that includes a cathode ray tube having a picture display area.
  • the display system includes a deflection system for the cathode ray tube to provide line rate scanning in a vertical direction.
  • a video/deflection system is provided for a transposed scan display system that operates using a high frequency (41.25 KHz) scan rate.
  • the transposed scan display means includes a fast scan driver circuit for receiving V drive signals, an N-S pin cushion modulator circuit connected to the fast scan driver circuit, and a fast scan output stage connected to the N-S pin cushion modulator circuit, wherein the N-S pin cushion modulator outputs a modulation correction signal to the fast scan output stage.
  • the high frequency vertical scan circuit includes height adjustment means coupled to the N-S Pin Modulator for controlling an amplitude of the modulation correction signal.
  • the height adjustment means can be, for example, a DC voltage signal, where the DC voltage signal has a range of 0 to 4.8 volts.
  • the pin cushion modulator correction signal is adapted to correct pin cushion distortion that is greater than 17%.
  • the transposed scan display system for a cathode ray tube includes means for receiving an input video signal having a horizontal scan orientation and corresponding horizontal scan rate, means for transposing the input video signal to an output interlaced scan video signal having a vertical scan orientation and corresponding vertical scan rate, and means for controlling the vertical scan at a frequency of at least 41.25K.hz.
  • the controlling means may include a fast scan driver circuit for receiving V drive signals, an N-S pin cushion modulator circuit to provide a modulated correction signal, and a fast scan output stage connected to said fast scan driver circuit and said N-S pin cushion -TnordulatorT-TlTe ⁇ fasrscan output stage receives the modulated correction signal.
  • a sync processor is connected to the fast scan driver circuit, and a microprocessor connected to the N-S pin cushion modulator.
  • the sync processor provides the V drive signal to the fast scan driver circuit and the microprocessor provides a height adjustment signal to the N-S Pin Modulator for controlling an amplitude of the modulated correction signal.
  • the modulation correction signal corrects pin cushion distortion in the transposed scan display. This pin cushion distortion is greater than 17%.
  • the high frequency vertical scan circuit for a transposed scan display includes a fast scan driver circuit, an N-S pin cushion modulator circuit connected to the fast scan driver circuit, and a fast scan output stage connected to the N-S pin cushion modulator circuit and the fast scan driver circuit.
  • the fast scan output stage outputs a vertical scan having an operating frequency in a range 4OkHz - 52kHz.
  • a sync processor connected to the fast scan driver circuit, and a microprocessor is connected to the N-S pin cushion modulator circuit.
  • the sync processor provides a V drive signal to the fast scan driver circuit and the microprocessor provides a height adjustment control to the N-S pin cushion modulator circuit.
  • the N-S pin cushion modulator circuit outputs a modulation correction signal to the fast scan output stage, wherein the height adjustment controls the amplitude of the modulation correction signal.
  • the V drive signal output by the sync processor corresponds to a transposed V sync signal input to the sync processor, and the height adjustment control comprises a DC voltage signal in a range of 0 to 4.8 volts.
  • Figure 1 is a diagram depicting the basic geometrical relationship between the throw distance and deflection angle in a typical CRT;
  • Figure 2a is a diagrammatic cross-sectional view of a CRT according to an embodiment of the present principles
  • Figure 2b is a diagram representing the lines and pixels of a standard scan CRT
  • Figure 2c is a diagram representing the lines and pixels of the transposed scan display according to-an embodiment of-the present principlcs;-
  • Figure 3 is a block diagram of the transposed scan display system incorporating the high frequency scan method of the present invention
  • Figures 4a-4c are illustrative schematic diagrams of the video/deflection system for driving the CRT of FlG. 2 in accordance with the present principles of the invention
  • Figure 5 is a schematic diagram of the N-S pin modulator of the fast scan circuit according to an embodiment of the present principles
  • Figure 6 is a schematic diagram of the driver portion for the fast scan circuit according to an embodiment of the present principles
  • Figure 7 is a schematic diagram of the output stage of the fast scan circuit according to an embodiment of the present principles.
  • Figure 8 is graphical representation of a custom correction waveform for the fast scan circuit according to an embodiment of the present principles
  • Figure 9 is a graphical representation of the High frequency scan (V scan) voltage and current near the center of a display screen according to an embodiment of the present principles.
  • Figure 10 is a graphical representation of the high frequency. scan (V scan) voltage and current near the edges of a display screen according to an embodiment of the present principles.
  • FIG. 2a illustrates a cathode ray tube (CRT) 1 , for example a W76 wide screen tube, having a glass envelope 2 having a rectangular faceplate panel 3 and a tubular neck 4 connected by a funnel 5.
  • the funnel 5 has an internal conductive coating (not shown) that extends from an anode button 6 toward the faceplate panel 3 and to the neck 4.
  • the faceplate panel 3 comprises a viewing faceplate 8 and a peripheral flange or sidcwall 9, which is sealed to the funnel 5 by a glass frit 7.
  • the inner surface of the faceplate panel 3 carries a three-color phosphor screen 12.
  • the screen 12 comprises a line -screerFwitlrthe r phosphoHines r ar-ranged ⁇ in triads.
  • Each triad includes a phosphor line of three primary colors, typically Red, Green and Blue, and extends generally parallel to the major axis of the screen 12.
  • a mask assembly 10 lies in a predetermined spaced relation with the screen 12.
  • the mask assembly 10 has a multiplicity of elongated slits extending generally parallel to the major axis of the screen 12.
  • An electron gun assembly 13, shown schematically by dashed lines in Figure 2a, is centrally mounted within the neck 4 to generate three inline electron beams, a center beam and two side or outer beams, directed along convergent paths through the mask frame assembly 10 to strike the screen 12.
  • the electron gun assembly 13 has three vertically oriented guns, each generating an electron beam for a separate one of the three colors, Red, Green and Blue.
  • the three guns lie in a linear array extending parallel to a minor axis of the screen 12. I 1
  • the CRT 1 employs an external magnetic deflection system comprised of a yoke 14 situated in the neighborhood of the funnel-to-neck junction. When activated with deflection currents, the yoke 14 generates magnetic fields that cause the beams to scan over the screen 12 vertically and horizontally in a rectangular raster.
  • FIG. 2b shows an example of a standard orientation (scan) CRT having 720 horizontally scanned lines each having a pixel width of 1280
  • the yoke 14 of the transposed scan display of the present principles includes a first deflection coil system (not shown) that generates a horizontal deflection yoke field that is substantially barrel-shaped.
  • the yoke 14 has a second deflection coil system (not shown) electrically insulated from the first deflection coil system for generating a vertical yoke field that is substantially pincushion-shaped.
  • the image must undergo a translation into a vertical scan pattern such that the signal sequence starts at the upper left hand corner of the image.
  • the subsequent signal elements then follow along a vertical line from top to bottom along the left edge.
  • generation of a signal element at the top edge of the image at the second scan line occurs, followed by the signal elements corresponding to a sequence from top to bottom along the second scan line.
  • the third scan line starts at the top and proceeds to the bottom of the image, and thus the corresponding top to bottom signal element must be provided. This process continues through the last scan line at right vertical edge of the image.
  • Figure 2c shows an example of the vertical scanning of the transposed scan display according to an embodiment of the present principles. As shown in this example, there are 1280 vertically scanned lines, each having a length of 720 pixels. For-the ⁇ purposes-Ofthe-following-discussion, the r tcrms "Digital Orthogonal Scan" and/or
  • DOS refer to the above-described transposition operation and is used herein interchangeably with the term "transposed scan display”.
  • CRT displays exhibit raster distortions.
  • the most common raster distortions pertain to geometric errors and to convergence errors.
  • a geometric error results from non- linearities in the scanned positions of the beams as the raster traverses the screen.
  • Convergence errors occur in a CRT display when the Red, Green and Blue rasters do not align perfectly such that over some portion of the image, a Red sub-image appears offset with respect to the Green sub-image and the Blue sub-image appears offset to the right of the Green sub-image.
  • Convergence errors of this type can occur in any direction and can appear anywhere in the displayed image.
  • IP Image Processing
  • the transposed scan display and video correction (VC) operations are preferentially executed in the digital domain.
  • IP operations can be executed in analog or digital forms.
  • the digital form for IP is preferred when digital signals are available in the signal path.
  • the various signal processing tasks associated with DOS, VC and IP operations can be effectively executed in a programmable gate array and associated memory.
  • the programmable gate array can take several alternative forms including field programmable gate arrays (which are commonly referred to as FPGAs), mask programmable gate arrays, and Application-specific Integrated Circuits and other forms of circuits suitable for digital signal processing.
  • a standard orientation CRT has 720 horizontal scan lines, each having a horizontal width of 1280 pixels (i.e, 1280 pixels per line).
  • the standard orientation CRT has a horizontal scan frequency of 45kHz and a vertical scan frequency of 60Hz.
  • Table 1 provides a comparison of the clock frequency, scan line count, and pixel per scan line value for a conventional CRT having horizontal aligned electron guns versus a vertical scan CRT display in accordance with the present principles.
  • the visible image field contains 1280 vertical scan lines with 720 addressable pixel on each scan line.
  • the three different scan systems in Table 1 afford excellent visual performance. Any visual differences due to the number of scan lines or pixels appear insignificant on a screen size having a diagonal dimension of less than 1 meter at normal viewing distances of larger than 1 meter.
  • the transposed scan system provides a significantly better image because of the better spot size/resolution of the electron beam.
  • the high speed scan frequency remains about the same for all systems, the vertical scan system requires significantly less scan power because the deflection angle in the vertical direction is much smaller than horizontal direction for a 16 x 9 aspect ratio systems.
  • the pixel clock rate for the vertical scan system is much less than the other systems.
  • a particularly advantageous arrangement utilizes 1280 interlaced visual scan lines, which significantly reduces the deflection power requirements with no detrimental effect when displaying HDTV images.
  • the CRT display system of the present principles can operate at scan rates other than those listed in Table 1.
  • pincushion distortion One of the required corrections for the high frequency vertical scan according to the present principles is pincushion distortion.
  • the amount of pincushion distortion is normally 10-15%.
  • pincushion distortion is corrected by applying a parabola waveform to the horizontal (fast) scan signal to the yoke.
  • FIG. 3 shows a block diagram of the transposed scan display system 100 according to an embodiment of the present principles.
  • a high definition (HD) video source 102 such as, for example from a cable, satellite, network or other service provider is provided to the display system.
  • the high resolution source input is fed to an FPGA 1 10 where it is processed and then input into the video processor 1 16.
  • an RGB to YPrPb converter 104 may be required to input the Y, Pr and Pb signals to the video processor 1 16.
  • content source 102 provides horizontal and vertical sync signals (H & V) which are processed by the FPGA 1 10 and sent to the sync processor 1 18.
  • the video processor 1 16 outputs the RGB video signals to the video drivers 133 which drive the electron-gun of -the transposed scan-(-DOS) CRT 200.—
  • the sync processor 1 18 outputs several signals including synchronization signals to a waveform generator 120 embodied within the microprocessor 1 12 in order to generate the appropriate waveform for the quad coil drivers 130, and for N-S Pincushion Modulator 124.
  • the waveform generator can be incorporated into the FPGA 110 and thus be eliminated from the microprocessor the circuit shown in Figure 3.
  • the sync processor 1 18 is responsible for handling the synchronization of the output signals to the transposed scan CRT (DOS) 200. As such, it is responsible for the fast scan (V Drive) and slow scan (H Drive) signals input to the V scan 128 and H scan 126 circuits, respectively.
  • Sync processor 118 also provides control signals to the focus modulation generator 120, which controls the dynamic focus output 121 connected to the anode power supply 134.
  • the video processor 1 16 may include OSD insertion 117 capabilities.
  • the OSD may be integrated into video processor 116, or the microprocessor 112, or the FPGA 110 without departing from the spirit of the present disclosure.
  • ASIC application specific integrated circuit
  • Examples of such circuits that could be embodied in one or more ASICS would be, FPGA 1 10, Microprocessor 1 12, RGB to YPrPb converter 104, sync processor 1 18, video processor 1 16 and/or focus modulation generator 120.
  • Microprocessor 1 12 functions to control the video processor 1 16, the OSD 1 17, the OSD 1 17, FPGA 1 10, and the SW mode power supply 1 13. Microprocessor 1 12 also functions as the waveform generator for the transposed.
  • An IR pickup 1 14/ keyboard or other user interface -device may-be-Gonneeted-to-the-mieroproeessor-for-prov-iding remote-eontrol-eapability to the system 100.
  • the Anode power supply 134 outputs the heater voltage and G2, G3 and G5 voltages to the appropriate pins (not shown) of the electron gun 13. In addition, it provides a 3OkV anode voltage to the transposed scan CRT 200.
  • the quad drivers 130 drive the quad coils 16 of the CRT, and the V scan 128 and H scan 126 circuits drive the yoke 14.
  • the video drivers 133 provide the video signals to the electron gun for display on the CRT 200.
  • the fast scan sync waveform generated by the V scan circuit 128, is used by: the sync processor 118 for phase correction; the video processor 116 to generate blanking; the SW mode power supply 1 13 for synchronization and the anode power supply 134 for synchronization.
  • the present principles provide a method and corresponding circuitry for implementing a fast scan (V scan) system for transposed scan CRTs.
  • FIGS 4a - 4c are exemplary schematic diagrams of the circuitry embodying the transposed scan display system according to the present principles. As will be noted, the identified blocks in these figures correspond to blocks in Figure 3.
  • FIG. 4c there is shown the sync processor 1 18, the dynamic locus circuit 120, the H scan or slow scan circuit 126 and the V scan or fast scan circuit 128 according to an exemplary embodiment of the transposed scan display of the present principles.
  • the vertical scan, or fast scan circuit 128 is made up of two parts or circuits 600 and 700 and the N-S pin modulator 124, which are embodied in Figures 6, 7 and 5 respectively.
  • the waveforms of Figures 8-10 will also be referred to as the following examples of the present principles are described.
  • the vertical scan (V scan - fast) 128 circuit and the N-S pi ⁇ rmodulatorl ⁇ 4 according to ⁇ an-embodiment of the present principles.
  • the vertical scan circuitry 128 and N-S Pin Modulator 124 receives input from the sync processor 1 18. Based on the incoming video signal rate (i.e., frequency), the V Scan circuit 128 operates the vertical scan at a high frequency of the transposed scan display.
  • the frequency at which the vertical scan is performed may vary depending on the incoming video signal rate.
  • the present principles propose a constant high frequency (V) scan rate intended to work for a number of signal sources from 50Hz to 60Hz, and even including cinema modes at 72Hz or 75Hz.
  • V (high frequency) scan circuit By operating the V (high frequency) scan circuit at a rate higher than 40kHz, and in some embodiments at a rate approaching 51 kHz, the number of high frequency (i.e., vertical) scan lines can be changed to accommodate any variety of input signals rates.
  • the single high frequency scan rate (e.g., 51.56kHz) will enable one common chassis design to be utilized across the world (i.e., for different incoming video signal rates), thereby simplifying chassis design requirements for transposed scan displays of the present principles.
  • the following table 2 is provided to show several specific examples of incoming single rates that can be handled with the high frequency vertical scan circuit 128 according to the present principles.
  • the high frequency scan rate for the transposed scan display is 41.25 KHz.
  • the V (fast) scan circuit 128 receives pin cushion correction waveform signals from the N-S pin modulator 124 (depicted as modulated-B-+-) ⁇ -T-he-N-S-pin-modu]ator 124 is-connected to the microprocessor 1 12, and uses a supply voltage B+.
  • the microprocessor 1 12 provides the N-S pin modulator 124 with a custom waveform signal to assist in producing the pin cushion correction wave form, modulated B+.
  • the modulated B+ signal is applied to the output stage 700 of the V scan circuit 128 to adjust the yoke current according to the required pin cushion correction for the transposed (vertical) scan display according of the present principles.
  • Figure 5 shows the N-S Pin Modulator 124 which works in conjunction with the Vertical (fast) scan circuit 128.
  • the N-S Pin modulator 124 operates as an amplifier effectively providing an output that functions to adjust the amplitude of the V Scan.
  • Circuit 124 includes a height adjustment input 501, a customized waveform input 502, a B+ supply voltage, and a B+ modulated output 510.
  • the microprocessor 112 provides a customized waveform signal to the input 502 for purposes of modulating the B+ signal that is applied to the Vertical scan output.
  • Figure 8 shows a graphical representation of the B+ supply signal 810, and the customized waveform 802 provided by microprocessor 1 12.
  • the microprocessor 1 12 can provide the height adjustment input 501 to the N-S pin modulator 124 in any suitable known manner in an analog form.
  • the height adjustment is the DC level of the correction waveform 502 applied to the B+ supply voltage waveform.
  • the microprocessor 1 12 can provide a DC height adjustment signal in the range of 0 - 4.8V through the OSD device (e.g., LM 1257) and utilize the D/A converter contained therein for the output of this height adjustment signal.
  • the height adjustment signal is combined (summed) with the customized correction waveform 802 ( Figure 8).
  • This correction waveform is used to regulate the B+ supply voltage to provide the modulated B+ waveform.
  • the modulated B+ output 510 is fed into the output circuit 700 at input 710.
  • the circuit 600 is the V scan driver circuit and is connected to the sync processor 1 18 to receive the V drive signals according to the transposed V sync from FPGA 1 10.
  • the output 612 of the driver circuit is coupled to the corresponding input 712 on the output circuit 700.
  • the inductance value of LTlOl is selected along with the values of LClOl and LRl 1 1 (See Figure 5) in order to minimize ringing in the modulated B+ waveform.
  • LTlOl can be 500 ⁇ H, while LClOl is 2.2 ⁇ F and LRl 1 1 is 22 ohms.
  • the voltage waveform 820 represents the modulated B+ output that is applied to the input of the output circuit 700 at input 710. This "corrected" voltage waveform results in the current waveform 830 which is the corrected yoke current at output 720.
  • Circuit 700 includes S caps LCl 13 and LCl 14 which provide high speed (fast scan) S correction, while the linearity coil LL l OO functions to compensate for resistance in the circuit.
  • Figure 9 and 10 show exemplary waveforms of the high frequency scan voltages and currents of the transposed scan display according to the present principles.
  • Figure 9 shows an expansion of high frequency scan voltage 902 as compared to the current 904 near the center of a transposed scan display.
  • figure 10 shows an expansion of waveforms 1002 (voltage) and 1004 (current) near the edges of the transposed display screen.
  • the waveform amplitudes near the ⁇ ccnter of the ⁇ screeir( Figure-9) are much higher than those-at-the edges of the screen ( Figure 10).

Abstract

The implementation of a vertical scan system with a single high frequency vertical scan rate will permit one common basic chassis design to be utilized worldwide. In addition, such implementation will enable the automatic (and/or manual) adaptation of the viewer's display device in response to the incoming video signal rate. The high frequency scan rate for transposed scan display system can allow one circuit to accommodate various types of input signals (individually and not simultaneously). For example, the high frequency scan rate would allow the same circuit to be used for an input source having a signal source rate of 50Hz, 60Hz, or may even include cinema modes at 72Hz or 75Hz. By operating the high frequency (vertical) scan rate (e.g., in a range of 41.5 kHz - 52 kHz), the number of scan lines can be changed to accommodate the potential variety of input signals.

Description

A FAST (VERTICAL) SCAN APPARATUS FOR TRANSPOSED SCAN DISPLAY SYSTEMS
RELATED APPLICATION INFORMATION This application claims the benefit of U.S. Provisional Patent application Serial No.
60/640,944 filed on December 31 , 2004, the entire contents of which is incorporated herein by reference.
FIELD OF THE INVENTION The present invention relates to cathode ray tubes (CRTs) for displays such as, for example, High Definition Television (HDTV). More particularly, it relates to CRTs operating in a vertical scan mode and a method of operating the CRT in the vertical scan mode.
BACKGROUND OF THE INVENTION The popularity of HDTV has prompted an increased demand for television sets capable of displaying HDTV images. Such demand has prompted an increase in demand for larger aspect ratio, true flat screen displays having a shallower depth, increased deflection angle and improved visual resolution performance.
The demand for shallow, flat screen displays has led to efforts to improve spot performance so that spot size and shape exhibit greater uniformity across the entire screen for improved visual resolution performance. To this end, most displays now make use of dynamic focus. Increasing the deflection angle also yields an improvement in spot performance in the central area of the screen because increasing the deflection angle results in a decreased gun-to- screen distance, hereinafter referred to as the 'throw distance'. Figure 1 illustrates the basic geometrical relationship between throw distance and deflection angle for a typical CRT. Increasing the deflection angle (A) reduces the throw distance, thus allowing for production of a shorter CRT and ultimately, a slimmer television set.
As the deflection angle increases, the throw distance decreases and spot size decreases in a non-linear relationship. The following formula mathematically approximates relationship between spot size and throw distance:
Spot Size ~ B * Throw ' 4 (Equation 1 ) where the exponent 1.4 represents an approximation taking into consideration the effects of magnification and space charge effects over a useful range of beam current. The term B represents a system=rerated~proportibnality-constanf. Θonsidering thfs relationship, for a tube having a diagonal dimension of 760 mm, increasing the corner to corner deflection angle from 100 degrees to 120 degrees while decreasing the center throw distance, for example, from 413mm to 313mm yields a 32% reduction in spot size at the center of the screen.
Increasing the deflection angle in these displays gives rise to increases in obliquity, which is defined as the effect of a beam intercepting the screen at an oblique angle, thereby causing an elongation of the spot. The problem of obliquity becomes especially apparent in CRTs having a standard horizontal gun orientation, i.e., a CRT whose guns have a horizontal alignment along the major axis of the screen. As obliquity increases, a spot having a generally circular shape at the center of the screen becomes oblong or elongated as the spot moves toward edges of the screen. Based on this geometrical relationship, in a large aspect ratio screen, such as a 16 x 9 screen, the spot appears most elongated at the edges of the major axis and at the screen corners. Thus it becomes apparent that the obliquity effect causes the spot size to grow. The following equation defines the spot size radius SSradiaι: SSrat|,ai = SSnormil|/cos(A) (Equation 2) where A represents deflection angle, as measured from Dc to De as shown in Figure 1 and nominal spot size SSnormai represents the spot size without obliquity.
In addition to the obliquity effect, yoke deflection effects in self-converging CRTs having a horizontal gun orientation can compromises spot shape uniformity. To achieve self convergence, CRT's typically include a horizontal yoke that generates a pincushion shaped field and a vertical yoke that generates a barrel shaped field. These yoke fields cause the spot shape to become elongated. This elongation adds to the obliquity effect by further increasing spot distortion at the three-o'clock and nine o'clock positions (referred to as the "3/9" positions) and at corner positions on the screen.
Various attempts have been made to address spot distortion and obliquity. For example, U.S. Patent No. 5, 170,102 describes a CRT with a vertical electron gun orientation whose un- deflected beams appear parallel to the short axis of the display screen. The deflection system described in this patent includes a signal generator for causing scanning of the display screen in a raster-scan fashion, thereby yielding a plurality of lines oriented along the short axis of the display screen. The deflection system also comprises a first set of coils for generating a substantially pincushion-shaped deflection field for deflecting the beams in the direction of the short axis of the display screen. A second set of coils generates a substantially barrel shaped deflection field for deflecting the beams in the direction in the long axis of the display screen. The deflection system's coils generally distort spots by elongating them vertically. This vertical elongation compensates for obliquity effects, thereby reducing spot distortion at the 3/9 and corner positions on the screen. The barrel shaped field required to achieve self convergence at 3/9 screen locations overcompensates for obliquity and vertically elongates the spot at the 3/9 and corner locations as shown in Figure 10 of the U.S. Patent No. 5, 170, 102. (In effect, the barrel shaped field ovcrcompensates, thus making the spot shape at the 3/9 position and the screen corners a vertically oriented ellipse). Orienting the electron guns along the vertical or minor axis will yield improvements in a self-converging system, but spot distortion remains problematic at the 3/9 positions and at the corner screen locations.
Thus, a need exists for a CRT system that overcomes the aforementioned disadvantages when increasing the deflection angle A and thereby reducing throw distance and thus the overall depth of the CRT. More specifically, when transposing the scan into a vertical scan CRT, additional considerations must be made for the various changes in the display properties resulting-from transposing the scan.
SUMMARY OF THE INVENTION
Briefly, in accordance with a preferred embodiment of the present principles, there is provided a video display system that includes a cathode ray tube having a picture display area. The display system includes a deflection system for the cathode ray tube to provide line rate scanning in a vertical direction. A video/deflection system is provided for a transposed scan display system that operates using a high frequency (41.25 KHz) scan rate.
This and other aspects are achieved in accordance with the present principles where the high frequency vertical scan circuit for a transposed scan display includes a transposed scan display means adapted to receive input control signals and for providing correction waveform -signals=to=the^vertical scan in response to an incoming video signal, wherein said vertical scan has a frequency of at least 41.25kHz.
According to an embodiment of the present principles, the transposed scan display means includes a fast scan driver circuit for receiving V drive signals, an N-S pin cushion modulator circuit connected to the fast scan driver circuit, and a fast scan output stage connected to the N-S pin cushion modulator circuit, wherein the N-S pin cushion modulator outputs a modulation correction signal to the fast scan output stage.
In another embodiment, the high frequency vertical scan circuit includes height adjustment means coupled to the N-S Pin Modulator for controlling an amplitude of the modulation correction signal. The height adjustment means can be, for example, a DC voltage signal, where the DC voltage signal has a range of 0 to 4.8 volts.
According to one embodiment of the present principles, the pin cushion modulator correction signal is adapted to correct pin cushion distortion that is greater than 17%. In accordance with further embodiments of the present principles, the transposed scan display system for a cathode ray tube (CRT) includes means for receiving an input video signal having a horizontal scan orientation and corresponding horizontal scan rate, means for transposing the input video signal to an output interlaced scan video signal having a vertical scan orientation and corresponding vertical scan rate, and means for controlling the vertical scan at a frequency of at least 41.25K.hz.
The controlling means may include a fast scan driver circuit for receiving V drive signals, an N-S pin cushion modulator circuit to provide a modulated correction signal, and a fast scan output stage connected to said fast scan driver circuit and said N-S pin cushion -TnordulatorT-TlTe^fasrscan output stage receives the modulated correction signal.
A sync processor is connected to the fast scan driver circuit, and a microprocessor connected to the N-S pin cushion modulator. The sync processor provides the V drive signal to the fast scan driver circuit and the microprocessor provides a height adjustment signal to the N-S Pin Modulator for controlling an amplitude of the modulated correction signal. In this embodiment the modulation correction signal corrects pin cushion distortion in the transposed scan display. This pin cushion distortion is greater than 17%.
In accordance with yet further embodiments of the present principles, the high frequency vertical scan circuit for a transposed scan display includes a fast scan driver circuit, an N-S pin cushion modulator circuit connected to the fast scan driver circuit, and a fast scan output stage connected to the N-S pin cushion modulator circuit and the fast scan driver circuit. The fast scan output stage outputs a vertical scan having an operating frequency in a range 4OkHz - 52kHz.
A sync processor connected to the fast scan driver circuit, and a microprocessor is connected to the N-S pin cushion modulator circuit. The sync processor provides a V drive signal to the fast scan driver circuit and the microprocessor provides a height adjustment control to the N-S pin cushion modulator circuit. The N-S pin cushion modulator circuit outputs a modulation correction signal to the fast scan output stage, wherein the height adjustment controls the amplitude of the modulation correction signal.
The V drive signal output by the sync processor corresponds to a transposed V sync signal input to the sync processor, and the height adjustment control comprises a DC voltage signal in a range of 0 to 4.8 volts.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will now be described by way of example with reference to the accompanying figure of which:
Figure 1 is a diagram depicting the basic geometrical relationship between the throw distance and deflection angle in a typical CRT;
Figure 2a is a diagrammatic cross-sectional view of a CRT according to an embodiment of the present principles;
Figure 2b is a diagram representing the lines and pixels of a standard scan CRT; Figure 2c is a diagram representing the lines and pixels of the transposed scan display according to-an embodiment of-the present principlcs;-
Figure 3 is a block diagram of the transposed scan display system incorporating the high frequency scan method of the present invention;
Figures 4a-4c are illustrative schematic diagrams of the video/deflection system for driving the CRT of FlG. 2 in accordance with the present principles of the invention; Figure 5 is a schematic diagram of the N-S pin modulator of the fast scan circuit according to an embodiment of the present principles;
Figure 6 is a schematic diagram of the driver portion for the fast scan circuit according to an embodiment of the present principles;
Figure 7 is a schematic diagram of the output stage of the fast scan circuit according to an embodiment of the present principles;
Figure 8 is graphical representation of a custom correction waveform for the fast scan circuit according to an embodiment of the present principles;
Figure 9 is a graphical representation of the High frequency scan (V scan) voltage and current near the center of a display screen according to an embodiment of the present principles; and
Figure 10 is a graphical representation of the high frequency. scan (V scan) voltage and current near the edges of a display screen according to an embodiment of the present principles.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
Prior to discussing the CRT display system of the present principles, a brief discussion of the facets of a typical cathode ray tube will prove helpful. Figure 2a illustrates a cathode ray tube (CRT) 1 , for example a W76 wide screen tube, having a glass envelope 2 having a rectangular faceplate panel 3 and a tubular neck 4 connected by a funnel 5. The funnel 5 has an internal conductive coating (not shown) that extends from an anode button 6 toward the faceplate panel 3 and to the neck 4. The faceplate panel 3 comprises a viewing faceplate 8 and a peripheral flange or sidcwall 9, which is sealed to the funnel 5 by a glass frit 7. The inner surface of the faceplate panel 3 carries a three-color phosphor screen 12. The screen 12 comprises a line -screerFwitlrtherphosphoHinesrar-ranged~in triads. Each triad includes a phosphor line of three primary colors, typically Red, Green and Blue, and extends generally parallel to the major axis of the screen 12.
A mask assembly 10 lies in a predetermined spaced relation with the screen 12. The mask assembly 10 has a multiplicity of elongated slits extending generally parallel to the major axis of the screen 12. An electron gun assembly 13, shown schematically by dashed lines in Figure 2a, is centrally mounted within the neck 4 to generate three inline electron beams, a center beam and two side or outer beams, directed along convergent paths through the mask frame assembly 10 to strike the screen 12. The electron gun assembly 13 has three vertically oriented guns, each generating an electron beam for a separate one of the three colors, Red, Green and Blue. The three guns lie in a linear array extending parallel to a minor axis of the screen 12. I 1
The CRT 1 employs an external magnetic deflection system comprised of a yoke 14 situated in the neighborhood of the funnel-to-neck junction. When activated with deflection currents, the yoke 14 generates magnetic fields that cause the beams to scan over the screen 12 vertically and horizontally in a rectangular raster.
Conventional video signal transmission assumes a pixel-by-pixel time sequence such that transmission of Red, Green and Blue images effectively occurs as a series of scan lines proceeding from the left edge to the right edge of the image along a scan line and then moving down to the next scan line where again the signal sequence proceeds from left to right. This process continues from top to bottom, in either a progressive scan mode or an interlaced scan mode, as is known in the art. Figure 2b shows an example of a standard orientation (scan) CRT having 720 horizontally scanned lines each having a pixel width of 1280
Those of skill in the art will recognize that the yoke 14 of the transposed scan display of the present principles includes a first deflection coil system (not shown) that generates a horizontal deflection yoke field that is substantially barrel-shaped. The yoke 14 has a second deflection coil system (not shown) electrically insulated from the first deflection coil system for generating a vertical yoke field that is substantially pincushion-shaped. These yoke fields affect beam convergence and spot shape for the transposed scan display.
To achieve a vertical scan (or transposed scan) display, the image must undergo a translation into a vertical scan pattern such that the signal sequence starts at the upper left hand corner of the image. The subsequent signal elements then follow along a vertical line from top to bottom along the left edge. After an appropriate retrace interval, generation of a signal element at the top edge of the image at the second scan line occurs, followed by the signal elements corresponding to a sequence from top to bottom along the second scan line. Similarly the third scan line starts at the top and proceeds to the bottom of the image, and thus the corresponding top to bottom signal element must be provided. This process continues through the last scan line at right vertical edge of the image. To effect vertical scanning, the horizontal scan sequence must undergo a change from a conventional left-to-right and stepwise top-to-bottom regimen to a top-to-bottom and stepwise left to right transposed sequence. Figure 2c shows an example of the vertical scanning of the transposed scan display according to an embodiment of the present principles. As shown in this example, there are 1280 vertically scanned lines, each having a length of 720 pixels. For-the^purposes-Ofthe-following-discussion, thertcrms "Digital Orthogonal Scan" and/or
DOS refer to the above-described transposition operation and is used herein interchangeably with the term "transposed scan display".
In general, CRT displays exhibit raster distortions. The most common raster distortions pertain to geometric errors and to convergence errors. A geometric error results from non- linearities in the scanned positions of the beams as the raster traverses the screen. Convergence errors occur in a CRT display when the Red, Green and Blue rasters do not align perfectly such that over some portion of the image, a Red sub-image appears offset with respect to the Green sub-image and the Blue sub-image appears offset to the right of the Green sub-image. Convergence errors of this type can occur in any direction and can appear anywhere in the displayed image.
With known color CRT displays, both convergence and geometric errors can occur despite perfect alignment of the center region during the original manufacture of the CRT display, assuming that the deflection signals applied to the deflection coils ramp linearly. Traditional analog circuit techniques compensate for such distortions by modifying the deflection signals from linear ramps to more complex wave shapes. Also, adjustment in the details of the yoke design can reduce convergence errors and geometry errors. As the deflection angle increases beyond 100°, however, the traditional methods of geometry and convergence corrections become more difficult to implement.
Prior art optimized CRT display systems commonly employ Image Processing (IP) techniques which cause the displayed image, as seen by the human eye, to appear superior to the same image in the absence of any processing. Edge enhancement constitutes a typical example of image processing, and serves to enhance brightness transition gradients so that the image appears-sharper
The transposed scan display and video correction (VC) operations according to the present principles herein described are preferentially executed in the digital domain. IP operations can be executed in analog or digital forms. The digital form for IP is preferred when digital signals are available in the signal path. The various signal processing tasks associated with DOS, VC and IP operations can be effectively executed in a programmable gate array and associated memory. The programmable gate array can take several alternative forms including field programmable gate arrays (which are commonly referred to as FPGAs), mask programmable gate arrays, and Application-specific Integrated Circuits and other forms of circuits suitable for digital signal processing. As mentioned above, when the deflection angle is increased in a transposed scan display of the present principles, and the throw distance of the electron gun is thereby decreased, many considerations and corrections are required in order to compensate for the negative effects on the displayed image resulting from such changes in design. For example, when working with an input signal of 72Op, a standard orientation CRT has 720 horizontal scan lines, each having a horizontal width of 1280 pixels (i.e, 1280 pixels per line). In normal operation (with an input signal of 72Op), the standard orientation CRT has a horizontal scan frequency of 45kHz and a vertical scan frequency of 60Hz. However, in order to maintain a 1280x720 display resolution in the transposed scan environment, it is necessary to interlace the scan. Thus, when transposing the scan as proposed by the present principles, the input signal translates into 1280 vertical (scan) lines across the width of the CRT and a horizontal pixel width of 720 pixels (i.e., 720 pixels per vertical line), where the horizontal scan frequency for a progressive input would be 60Hz (30Hz interlaced) and the vertical scan frequency -would-be-82-.-5Khz-(or=41-2-5 KJdZrinterlaced)-See,-=forrex-ample^Figurcs 2b and 2c.
Those of skill in the art will recognize that generally speaking deflection yokes in consumer color CRTs are not rated for frequency scans greater than 45kHz. As such, and in order to minimize yoke losses, it is preferred not to exceed the desired operating frequency range of the yoke. It is therefore preferred to interlace the scan and maintain the high vertical scan frequency within the operating range of existing CRT circuitry.
By implementing the high frequency scan of the present principles as described herein, the same number of image elements as would be used in a 1280x720 standard orientation CRT can be maintained.
By way of example, Table 1 provides a comparison of the clock frequency, scan line count, and pixel per scan line value for a conventional CRT having horizontal aligned electron guns versus a vertical scan CRT display in accordance with the present principles.
Figure imgf000017_0001
TABLE 1
The number of scan lines and pixel data listed within the Table 1 under the heading "Timing and circuit considerations" exceed the visual scan lines and pixel data, respectively, and take into account the retrace time. For the transposed scan CRT in the Table 1, the visible image field contains 1280 vertical scan lines with 720 addressable pixel on each scan line.
The three different scan systems in Table 1 afford excellent visual performance. Any visual differences due to the number of scan lines or pixels appear insignificant on a screen size having a diagonal dimension of less than 1 meter at normal viewing distances of larger than 1 meter. The transposed scan system, however, provides a significantly better image because of the better spot size/resolution of the electron beam. While the high speed scan frequency remains about the same for all systems, the vertical scan system requires significantly less scan power because the deflection angle in the vertical direction is much smaller than horizontal direction for a 16 x 9 aspect ratio systems. Further, the pixel clock rate for the vertical scan system is much less than the other systems. A particularly advantageous arrangement utilizes 1280 interlaced visual scan lines, which significantly reduces the deflection power requirements with no detrimental effect when displaying HDTV images.
The CRT display system of the present principles can operate at scan rates other than those listed in Table 1. A scan rate that yields vertical scan lines in the range of approximately 700 to 3000 for 16:9 format tubes in the diagonal dimensional range between approximately 20 " ciτrand~hτrprovide-excellent MDTV-displaysmnder normal home-viewing-conditions (approximately 2 meter viewing distance).
One of the required corrections for the high frequency vertical scan according to the present principles is pincushion distortion. In standard orientation CRTs, the amount of pincushion distortion is normally 10-15%. In the standard orientation CRT, pincushion distortion is corrected by applying a parabola waveform to the horizontal (fast) scan signal to the yoke.
However, with the transposed scan operation and wider angle CRTs as proposed by the present principles, the pincushion distortion that needs to be corrected is in the order of 30 - 45%. This pincushion correction must be applied to the High frequency (fast) vertical scan. With this increase in pincushion correction requirement comes significantly increased sensitivity to yoke matching and gun centering. In addition, a standard parabola correction waveform is no longer suitable for the transposed scan display due to the increased deflection angles and rotation of the display scans. Figure 3 shows a block diagram of the transposed scan display system 100 according to an embodiment of the present principles. As shown, an input from a high definition (HD) video source 102, such as, for example from a cable, satellite, network or other service provider is provided to the display system. The high resolution source input is fed to an FPGA 1 10 where it is processed and then input into the video processor 1 16. In some instances, an RGB to YPrPb converter 104 may be required to input the Y, Pr and Pb signals to the video processor 1 16. In addition, content source 102 provides horizontal and vertical sync signals (H & V) which are processed by the FPGA 1 10 and sent to the sync processor 1 18.
The video processor 1 16 outputs the RGB video signals to the video drivers 133 which drive the electron-gun of -the transposed scan-(-DOS) CRT 200.—
The sync processor 1 18 outputs several signals including synchronization signals to a waveform generator 120 embodied within the microprocessor 1 12 in order to generate the appropriate waveform for the quad coil drivers 130, and for N-S Pincushion Modulator 124. In other contemplated embodiments, the waveform generator can be incorporated into the FPGA 110 and thus be eliminated from the microprocessor the circuit shown in Figure 3.
The sync processor 1 18 is responsible for handling the synchronization of the output signals to the transposed scan CRT (DOS) 200. As such, it is responsible for the fast scan (V Drive) and slow scan (H Drive) signals input to the V scan 128 and H scan 126 circuits, respectively. Sync processor 118 also provides control signals to the focus modulation generator 120, which controls the dynamic focus output 121 connected to the anode power supply 134.
In accordance with one embodiment, the video processor 1 16 may include OSD insertion 117 capabilities. In other contemplated embodiments, the OSD may be integrated into video processor 116, or the microprocessor 112, or the FPGA 110 without departing from the spirit of the present disclosure. Those of skill in the art will recognize that many of the components shown in the block diagram of Figure 3 can be embodied in an application specific integrated circuit (ASIC) or other specialized integrated circuit without departing from the spirit of the present principles. Examples of such circuits that could be embodied in one or more ASICS would be, FPGA 1 10, Microprocessor 1 12, RGB to YPrPb converter 104, sync processor 1 18, video processor 1 16 and/or focus modulation generator 120.
Microprocessor 1 12 functions to control the video processor 1 16, the OSD 1 17, the OSD 1 17, FPGA 1 10, and the SW mode power supply 1 13. Microprocessor 1 12 also functions as the waveform generator for the transposed. An IR pickup 1 14/ keyboard or other user interface -device may-be-Gonneeted-to-the-mieroproeessor-for-prov-iding remote-eontrol-eapability to the system 100.
The Anode power supply 134 outputs the heater voltage and G2, G3 and G5 voltages to the appropriate pins (not shown) of the electron gun 13. In addition, it provides a 3OkV anode voltage to the transposed scan CRT 200. The quad drivers 130 drive the quad coils 16 of the CRT, and the V scan 128 and H scan 126 circuits drive the yoke 14. The video drivers 133 provide the video signals to the electron gun for display on the CRT 200. The fast scan sync waveform generated by the V scan circuit 128, is used by: the sync processor 118 for phase correction; the video processor 116 to generate blanking; the SW mode power supply 1 13 for synchronization and the anode power supply 134 for synchronization. The present principles provide a method and corresponding circuitry for implementing a fast scan (V scan) system for transposed scan CRTs.
Figures 4a - 4c are exemplary schematic diagrams of the circuitry embodying the transposed scan display system according to the present principles. As will be noted, the identified blocks in these figures correspond to blocks in Figure 3.
Referring specifically to Figure 4c, there is shown the sync processor 1 18, the dynamic locus circuit 120, the H scan or slow scan circuit 126 and the V scan or fast scan circuit 128 according to an exemplary embodiment of the transposed scan display of the present principles. The vertical scan, or fast scan circuit 128 is made up of two parts or circuits 600 and 700 and the N-S pin modulator 124, which are embodied in Figures 6, 7 and 5 respectively. The waveforms of Figures 8-10 will also be referred to as the following examples of the present principles are described.
Referring to Figures 3 and 4c, there is shown the vertical scan (V scan - fast) 128 circuit and the N-S piιrmodulatorl^4 according to~an-embodiment of the present principles. The vertical scan circuitry 128 and N-S Pin Modulator 124 receives input from the sync processor 1 18. Based on the incoming video signal rate (i.e., frequency), the V Scan circuit 128 operates the vertical scan at a high frequency of the transposed scan display.
In conventional CRT displays, the frequency at which the vertical scan is performed may vary depending on the incoming video signal rate. However, the present principles propose a constant high frequency (V) scan rate intended to work for a number of signal sources from 50Hz to 60Hz, and even including cinema modes at 72Hz or 75Hz. By operating the V (high frequency) scan circuit at a rate higher than 40kHz, and in some embodiments at a rate approaching 51 kHz, the number of high frequency (i.e., vertical) scan lines can be changed to accommodate any variety of input signals rates. In addition, the single high frequency scan rate (e.g., 51.56kHz) will enable one common chassis design to be utilized across the world (i.e., for different incoming video signal rates), thereby simplifying chassis design requirements for transposed scan displays of the present principles. By way of example, the following table 2 is provided to show several specific examples of incoming single rates that can be handled with the high frequency vertical scan circuit 128 according to the present principles.
Figure imgf000023_0001
Table 2
According to one embodiment of the present principles, the high frequency scan rate for the transposed scan display is 41.25 KHz. As shown in Figure 3, the V (fast) scan circuit 128 receives pin cushion correction waveform signals from the N-S pin modulator 124 (depicted as modulated-B-+-)τ-T-he-N-S-pin-modu]ator 124 is-connected to the microprocessor 1 12, and uses a supply voltage B+. The microprocessor 1 12 provides the N-S pin modulator 124 with a custom waveform signal to assist in producing the pin cushion correction wave form, modulated B+. The modulated B+ signal is applied to the output stage 700 of the V scan circuit 128 to adjust the yoke current according to the required pin cushion correction for the transposed (vertical) scan display according of the present principles.
Referring now to the circuit examples of Figure 5-7, Figure 5 shows the N-S Pin Modulator 124 which works in conjunction with the Vertical (fast) scan circuit 128. The N-S Pin modulator 124 operates as an amplifier effectively providing an output that functions to adjust the amplitude of the V Scan. Circuit 124 includes a height adjustment input 501, a customized waveform input 502, a B+ supply voltage, and a B+ modulated output 510. The microprocessor 112 provides a customized waveform signal to the input 502 for purposes of modulating the B+ signal that is applied to the Vertical scan output. Figure 8 shows a graphical representation of the B+ supply signal 810, and the customized waveform 802 provided by microprocessor 1 12.
The microprocessor 1 12 can provide the height adjustment input 501 to the N-S pin modulator 124 in any suitable known manner in an analog form. The height adjustment, as discussed herein, is the DC level of the correction waveform 502 applied to the B+ supply voltage waveform. By way of example, the microprocessor 1 12 can provide a DC height adjustment signal in the range of 0 - 4.8V through the OSD device (e.g., LM 1257) and utilize the D/A converter contained therein for the output of this height adjustment signal.
The height adjustment signal is combined (summed) with the customized correction waveform 802 (Figure 8). This correction waveform is used to regulate the B+ supply voltage to provide the modulated B+ waveform. The modulated B+ output 510 is fed into the output circuit 700 at input 710.
The circuit 600 is the V scan driver circuit and is connected to the sync processor 1 18 to receive the V drive signals according to the transposed V sync from FPGA 1 10. The output 612 of the driver circuit is coupled to the corresponding input 712 on the output circuit 700. When applying the modulated B+ to the output circuit 700, consideration must be made to prevent ringing that may be caused by that waveform. Referring to Figure 7 and output circuit 700, the inductance value of LTlOl is selected along with the values of LClOl and LRl 1 1 (See Figure 5) in order to minimize ringing in the modulated B+ waveform. By way of example, LTlOl can be 500μH, while LClOl is 2.2 μF and LRl 1 1 is 22 ohms. Referring to Figure 8, the voltage waveform 820 represents the modulated B+ output that is applied to the input of the output circuit 700 at input 710. This "corrected" voltage waveform results in the current waveform 830 which is the corrected yoke current at output 720.
Those of skill in the art will recognize that the fast scan S correction ordinarily provided in a Standard CRT arc provided in the transposed scan circuitry of the present principles and in particular fast scan output circuit 700. Circuit 700 includes S caps LCl 13 and LCl 14 which provide high speed (fast scan) S correction, while the linearity coil LL l OO functions to compensate for resistance in the circuit. Figure 9 and 10 show exemplary waveforms of the high frequency scan voltages and currents of the transposed scan display according to the present principles. Figure 9 shows an expansion of high frequency scan voltage 902 as compared to the current 904 near the center of a transposed scan display. While figure 10 shows an expansion of waveforms 1002 (voltage) and 1004 (current) near the edges of the transposed display screen. The waveform amplitudes near the~ccnter of the~screeir(Figure-9) are much higher than those-at-the edges of the screen (Figure 10).
While there have been shown, described and pointed out fundamental novel features of the invention as applied to preferred embodiments thereof, it will be understood that various omissions, substitutions and changes in the form and details of the methods described and devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements and/or method steps shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed, described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.

Claims

1. A high frequency vertical scan circuit for a transposed scan display comprising: a transposed scan display means (600, 124, 700) adapted to receive input control signals and for providing correction waveform signals to the vertical scan in response to an incoming video signal, wherein said vertical scan has a frequency of at least 41.25kHz.
2. The high frequency vertical scan circuit according to claim 1 , wherein said transposed scan display means comprises: a fast scan driver circuit (600) for receiving V drive signals; an N-S pin cushion modulator circuit (124) connected to the fast scan driver circuit; and a fast scan output stage (700) connected to said N-S pin cushion modulator circuit; wherein said N-S pin cushion modulator outputs a modulation correction signal to said fast scan output stage.
3. The high frequency vertical scan circuit according to claim 2, further comprising: height adjustment means coupled to said N-S Pin Modulator for controlling an amplitude of the modulation correction signal.
4. The vertical scan circuit according to claim 3, wherein said height adjustment means comprises a DC voltage signal.
5. The vertical scan circuit according to claim 4, wherein said DC voltage signal has a range of 0 to 4.8 volts.
6. The vertical scan circuit according to claim 3, wherein said pin cushion modulator correction signal is adapted to correct pin cushion distortion that is greater than 17%.
7. A transposed scan display system for a cathode ray tube (CRT) comprising: means for receiving an input video signal having a horizontal scan orientation and corresponding horizontal scan rate; means for transposing the input video signal to an output interlaced scan video signal having a vertical scan orientation and corresponding vertical scan rate; and means for controlling the vertical scan at a frequency of at least 41.25Khz.
8. The transposed scan display system according to claim 7, wherein said controlling means comprises: a fast scan driver circuit (600) for receiving V drive signals; an N-S pin cushion modulator (124) circuit to provide a modulated correction signal; and a fast scan output stage (700) connected to said fast scan driver circuit and said N-S pin cushion modulator, said fast scan output stage receiving said modulated correction signal.
9. The transposed scan display according to claim 8, further comprising a sync processor ( 1 18) connected to said fast scan driver circuit (600), and a microprocessor ( 1 12) connected to said N- S pin cushion modulator (124), said sync processor providing said V drive signal to said fast scan driver circuit and said microprocessor providing a height adjustment signal to said N-S Pin Modulator for controlling an amplitude of the modulated correction signal.
10. The transposed scan display according to claim 8, wherein said modulation correction signal corrects pin cushion distortion in the transposed scan display.
1 1. The transposed scan display according to claim 10, wherein said pin cushion distortion is greater than 17%.
12. A high frequency vertical scan circuit for a transposed scan display comprising: a fast scan driver circuit (600); an N-S pin cushion modulator circuit (124) connected to the fast scan driver circuit; and a fast scan output stage (700) connected to said N-S pin cushion modulator circuit and said fast scan driver circuit; wherein said fast scan output stage outputs a vertical scan having an operating frequency in a range 40kHz - 52kHz.
13. The high frequency circuit according to claim 12, further comprising: a sync processor ( 1 18) connected to said fast scan driver circuit; and a microprocessor ( 1 12) connected to said N-S pin cushion modulator circuit.
14. The high frequency circuit according to claim 13, wherein said sync processor ( 1 18) provides a V drive signal to said fast scan driver circuit (600) and said microprocessor (1 12) provides a height adjustment control to said N-S pin cushion modulator circuit (124).
15. The high frequency circuit according to claim 14, wherein said N-S pin cushion modulator circuit ( 124) outputs a modulation correction signal to said fast scan output stage, said height adjustment controlling an amplitude of said modulation correction signal.
16. The high frequency circuit according to claim 14, wherein said V drive signal output by the sync processor (1 18) corresponds to a transposed V sync signal input to said sync processor.
17. The vertical scan circuit according to claim 14, wherein said height adjustment control comprises a DC voltage signal in a range of 0 to 4.8 volts.
18. The vertical scan circuit according to claim 15, wherein said modulation correction signal is adapted to correct pin cushion distortion that is greater than 17%.
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