WO2004008054A1 - Variable heater element for low to high temperature ranges - Google Patents

Variable heater element for low to high temperature ranges Download PDF

Info

Publication number
WO2004008054A1
WO2004008054A1 PCT/US2003/021648 US0321648W WO2004008054A1 WO 2004008054 A1 WO2004008054 A1 WO 2004008054A1 US 0321648 W US0321648 W US 0321648W WO 2004008054 A1 WO2004008054 A1 WO 2004008054A1
Authority
WO
WIPO (PCT)
Prior art keywords
heater
coil
insulating
heating
temperature
Prior art date
Application number
PCT/US2003/021648
Other languages
French (fr)
Other versions
WO2004008054A9 (en
Inventor
Taiquing Qiu
Original Assignee
Aviza Technology, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aviza Technology, Inc. filed Critical Aviza Technology, Inc.
Priority to AU2003256487A priority Critical patent/AU2003256487A1/en
Priority to US10/521,283 priority patent/US20060083495A1/en
Priority to JP2004521645A priority patent/JP2005533232A/en
Priority to EP03764467A priority patent/EP1540258A1/en
Publication of WO2004008054A1 publication Critical patent/WO2004008054A1/en
Publication of WO2004008054A9 publication Critical patent/WO2004008054A9/en

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C23C16/4409Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber characterised by sealing means
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4412Details relating to the exhausts, e.g. pumps, filters, scrubbers, particle traps
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563Gas nozzles
    • C23C16/45578Elongated nozzles, tubes with holes
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54Apparatus specially adapted for continuous coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67772Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading involving removal of lid, door, cover
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67775Docking arrangements

Definitions

  • This invention relates generally to a method and apparatus for insulating and heating a semiconductor manufacturing environment, and more specifically to a selectably insulating heater element appropriate for use in wide temperature ranges with a minibatch furnace.
  • Furnaces are commonly used in a wide variety of industries, including in the manufacture of integrated circuits or semiconductor devices from semiconductor substrates or wafers.
  • Thermal processing of semiconductor wafers include, for example, heat treating, annealing, diffusion or driving of dopant material, deposition or growth of layers of material, and etching or removal of material from the substrate.
  • These processes often call for the wafer to be heated to a temperature as high as 250 to 1200 degrees Celsius before and during the process.
  • these processes typically require that the wafer be maintained at a uniform temperature throughout the process, despite fluctuations in the temperature of the process gas or the rate at which it is introduced into the process chamber.
  • a conventional furnace typically consists of a voluminous process chamber positioned in or surrounded by a furnace.
  • the furnace typically has multiple interconnected heating coils.
  • Substrates to be thermally processed are sealed in the process chamber, which is then heated by the furnace to a desired temperature at which the processing is performed.
  • the sealed process chamber is first evacuated, after which reactive or process gases are introduced to form or deposit reactant species on the substrates.
  • the process chamber temperature must often be quickly varied, such as when beginning or ending thermal processing.
  • furnace downtime should be minimized in order to maximize the number of semiconductor wafers that may be processed on any given day.
  • power consumption requirements at high operating temperatures need to be minimized for cost efficiency, while ease of temperature control at low temperatures must be enhanced to avoid excessive operator interference with the semiconductor processing.
  • semiconductor furnaces having multiple interconnected heating coils provide a simple method for heating and cooling the furnace, the entire heating array must be replaced if a single coil fails. Further, this construction can respond to temperature gradients in the process chamber only by increasing power to every heating coil simultaneously, thus causing certain portions of the chamber to overheat in order to eliminate the temperature fluctuation in a different portion of the chamber. This may adversely affect the wafers. This is particularly a concern with the latest, large wafer sizes and more complex integrated circuits, where a single wafer is extremely expensive.
  • the present invention discloses an apparatus and method for insulating and controlling temperature in a semiconductor manufacturing environment. More specifically, the invention comprises at least one modular heating element consisting of a base ring and attached insulating blocks. The heating element is designed to be mounted about a semiconductor furnace in order to minimize thermal transfer between the furnace interior and exterior.
  • the base ring or cylinder (also referred to as a "heater ring”) is sized to be fitted around an inner skin of a semiconductor mini- batch furnace.
  • the base ring has multiple channels equidistantly spaced about its inner perimeter, each of which contains a heating coil.
  • the coils may be either removably or permanently affixed within the channels.
  • three heater rings are placed one atop the other in order to completely insulate the furnace's process chamber.
  • Alternate embodiments may use a different number of heater rings, such as two, five, and so on, to surround the process chamber.
  • temperature gradients between zones may be easily monitored and controlled by selectively adjusting the power to the coils within one or more rings.
  • a heating coil should a heating coil fail, only the heater element containing that coil need be removed and replaced. This may be done during operation of the furnace without removing either of the other heater elements.
  • One embodiment of the present invention has a number of insulating blocks located on the exterior. When viewed in cross-section, such a heater ring may resemble a gear, with the insulating blocks corresponding to gear teeth. The number, thickness, and width of each insulating block may vary, depending on the exact heating/insulating characteristics required.
  • This embodiment may be adjusted "on the fly” in order to change the heating and insulating characteristics of each ring. Additional spacers of insulating material may be inserted along the height of each ring, into the space between attached insulating blocks. These spacers increase the insulating effect of the heater rings.
  • thermal characteristics of a heater ring may be changed by placing an auxiliary interlocking cylinder along the outside of the ring.
  • a number of interior insulating blocks (“interior insulators”) are affixed to the inside diameter of the cylinder in such a manner that, when the auxiliary cylinder is placed around the heater ring, the interior insulators fit into the spaces between the insulating blocks along the outside of the base ring.
  • Auxiliary cylinders may have insulating blocks arranged in a variety of formats. BRIEF DESCRIPTION OF THE DRAWINGS
  • Fig. 1 displays an exemplary operating environment for an embodiment of the present invention.
  • Fig. 2 displays a first embodiment of the present invention suitable for use with low-temperature environments.
  • Fig. 3 displays an electrical schematic of an embodiment in accordance with the present invention.
  • Fig. 4 displays a top-down view of the embodiment of Fig. 2.
  • Fig. 5 displays a second embodiment of the present invention suitable for use with medium-temperature environments.
  • Fig. 6 displays a top-down view of the embodiment of Fig. 5.
  • Fig. 7 displays a third embodiment of the present invention suitable for use with high-temperature environments.
  • Fig. 8 displays three heater elements in operation in a suitable operating environment.
  • Fig. 9 displays the first embodiment of the present invention in operation in a one-skin environment.
  • Fig. 10 displays the first embodiment of the present invention in operation in a two-skin environment.
  • Fig. 11 displays a set of insulating spacers as used with an embodiment of the present invention.
  • Fig. 12 displays an auxiliary cylinder as used with an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION, INCLUDING THE BEST MODE
  • the methods and apparatuses described herein are for insulating and controlling temperature in a semiconductor manufacturing environment. More specifically, the modular heater element described herein is designed to be mounted about a semiconductor furnace's process chamber in order to minimize thermal transfer between the furnace interior and exterior.
  • the base ring or cylinder (also referred to as a "heater ring”) is sized to be fitted around an inner skin of a semiconductor mini- batch furnace.
  • the base ring has multiple channels equidistantly spaced about its inner perimeter.
  • Heating coils of any suitable type, including types well known in the art, may be nested in these channels in order to warm the furnace interior.
  • the coils may be either removably or permanently affixed within the channels.
  • multiple heater rings are typically placed one atop the other in order to completely insulate and surround the furnace.
  • three heater rings 100 are stacked one atop another to completely surround the sidewalls of the furnace interior.
  • Different embodiments include heater rings having different designs to enable the furnace to operate at a wide range of temperatures.
  • semiconductor fabrication takes place at temperatures ranging from 200 to 1250 degrees Celsius. Because the furnace may operate over different temperature ranges, depending on processes being carried out and on the number of semiconductors being fabricated, differing amounts of insulation may be required at different temperatures.
  • a heater ring using a small amount of insulation minimizes the time taken to decrease temperature when the furnace is overheated when, for example, a target furnace temperature is overshot, because heat may more readily bleed through the furnace walls.
  • ease of control is maximized because solid-state power controllers, such as those used in many conventional furnaces, control power more precisely when the steady-state power consumption exceeds approximately three percent of the total power.
  • more insulation reduces the power necessary to maintain a given temperature, because heat loss through . Accordingly, less insulation is preferable at low temperatures where thermal transfer is a minimal issue, while more insulation is preferable at high temperatures where thermal transfer increases power consumption.
  • One embodiment has a number of insulating blocks located on the exterior.
  • each insulating block may vary, depending on the exact heating/insulating characteristics required.
  • a low-temperature heater element has relatively narrow insulating blocks (which may be longitudinally continuous or discontinuous as desired) with large gaps between each block, while a high- temperature heating element has blocks of increased thickness or width, or a greater number of blocks, or a combination thereof.
  • the insulating blocks may be replaced by a solid cylinder of insulating material. Since the heater rings are modular, one or more rings may easily be changed out when the semiconductor furnace changes its mode of operation from low temperature to high temperature.
  • this embodiment may be adjusted "on the fly” in order to change the heating and insulating characteristics of each ring. Additional spacers of insulating material may be inserted along the length of each ring, into the space between attached insulating blocks. These spacers increase the insulating effect of the heater rings, thus permitting a user of the present invention to adjust thermal characteristics as desired. Thus, where more insulation is required to minimize power utilization at high temperatures, additional insulation spacers may be added instead of swapping out rings.
  • thermal characteristics of a heater ring may be changed by placing an auxiliary interlocking cylinder along the outside of the ring.
  • the auxiliary insulating cylinder has a diameter slightly exceeding that of the heater ring.
  • a number of interior insulating blocks (“interior insulators”) are affixed to the inside diameter of the cylinder in such a manner that, when the auxiliary cylinder is placed around the heater ring, the interior insulators thereon fit into the spaces between the insulating blocks along the outside of the base ring.
  • Auxiliary cylinders may have interior insulators arranged in a variety of formats.
  • one auxiliary cylinder may have a series of insulating blocks arranged such that, when mated with a low-temperature heater ring, the auxiliary cylinder insulating blocks contact the heater ring insulating blocks. This configuration would eliminate any gap between insulating blocks, thus mimicking a very high-temperature insulation configuration.
  • Another auxiliary cylinder may be set up to leave a relatively small space between insulating blocks for use in a medium-temperature environment.
  • Fig. 1 displays an exemplary operating environment for a semiconductor minibatch furnace.
  • the furnace 140 generally includes a process chamber 102 having a support 104 adapted for receiving a carrier or boat 106 with a batch of wafers 108 held therein, and heat source 140 having a number of heating elements 100 for raising a temperature of the wafers 108 to the desired temperature for thermal processing.
  • the furnace 140 further includes one or more optical or electrical temperature sensing elements 114, such as a resistance temperature device (RTD) or thermocouple, for monitoring the temperature within the process chamber 102 and/or controlling operation of the heating elements 100.
  • RTD resistance temperature device
  • the temperature sensing element is a profile thermocouple 114 that has multiple independent temperature sensing nodes or points for detecting the temperature at multiple locations within the process chamber 102.
  • the temperature sensing element may be a series of spike thermocouples (not shown) extending from the heating elements 100 and unrelated to one another.
  • the furnace 140 can also include one or more injectors 116 for introducing a fluid, gas, or vapor, into the process chamber 102 for processing and/or cooling the wafers 108, and one or more vents or purge ports 118 (only one of which is shown) for introducing a purge element into the process chamber.
  • a liner 120 may be used to increase the concentration of processing gas or vapor near the wafers 108, and to reduce contamination of the wafers from flaking or peeling of deposits that can form on interior surfaces of the process chamber enclosure 101.
  • the process chamber 102 is sealed by a seal, such as an o-ring 122, to a platform or baseplate 124 to completely enclose the wafers 108 during thermal processing. Openings for the injectors 116, thermocouples 114 and purge ports 118 are sealed using seals such as O-rings, VCR , or CF ® fittings. Gases or vapor released or introduced during processing are evacuated through an exhaust port 126 formed in a wall of the process chamber 102 or via a plenum 127 of the baseplate 124, as shown in Fig. 1.
  • the process chamber 102 can be maintained at atmospheric pressure during thermal processing or evacuated to near-vacuum via a pumping system (not shown) including one or more roughing pumps, blowers, hi- vacuum pumps, and roughing, throttle and/or foreline valves.
  • the process chamber enclosure 101 and liner 120 can be made of any metal, ceramic, crystalline or glass material that is capable of withstanding the thermal and mechanical stresses of high temperature and high vacuum operation, and which is resistant to erosion from gases and vapors used or released during processing.
  • the process chamber enclosure 101 is made from an opaque, translucent or transparent quartz glass having a sufficient thickness to withstand the mechanical stresses and that resists deposition of process byproducts, thereby reducing potential contamination of the processing environment.
  • the process chamber enclosure 101 and liner 120 are made from an opaque quartz that reduces or eliminates the conduction of heat away from the region or processing zone 128 in which the wafers 108 are processed to the seal 122.
  • six heating elements are employed.
  • a first heating element 152 is adjacent the top of the process chamber 102, while a second element 154 runs along the chamber bottom.
  • a third heating element 156 encircles the bottom portion of the chamber.
  • the fourth, fifth, and sixth heating elements 100 are functionally and operationally identical, and surround the remainder of the process chamber 102 sides. These three heating elements 100 divide the process chamber into three temperature zones, each of which may be controlled independently of one another. Generally, the heating elements operate to maintain operating temperatures in the process chamber 102 between approximately 250 and 1250 degrees Celsius. The exact operating temperature varies, depending on the wafer load inside the chamber, the type of wafer being fabricated, the process conditions, and so forth. Accordingly, each heater element 100 is fully capable of supporting the entire range of potential operating temperatures.
  • Fig. 2 displays one embodiment 240 of either the heater element 100 or the heating element 156.
  • the heater element 240 shown in Fig. 2 is configured for use in low-temperature environments.
  • the heater element 240 includes a base ring 200 and multiple, spaced insulation blocks 210. Equally spaced about the interior of the base ring 200 is a series of coil recesses 220.
  • the base ring 200 is typically made of a vacuum-formed fiber having insulating properties.
  • the base ring may be made of a low-density alumina silica fiber insulation. Manufacture of articles using low-density alumina silica fiber insulation is generally known to those skilled in the art.
  • the insulation blocks 210 may be created as an integral part of the base ring 200, or may be later affixed thereto. Any attachment means known to those skilled in the art may serve to fasten the insulation blocks to the base ring.
  • the base ring 200 is sized to fit about the exterior of the process chamber 102.
  • the base ring 200 interior may be a small distance from the process chamber 102 exterior wall (as shown in Fig.
  • the intervening air may distribute heat generated by the heating coils, thus assisting in generating uniform temperature distribution across the wafers, and may also assist in cooling.
  • the base ring 200 flush against the skin of the process chamber 102, thermal transfer to the interior of the process chamber is reduced, thus minimizing power requirements. Accordingly, different circumstances may call for different size heater elements 100.
  • the heater ring 100 has an inner diameter of approximately 20.5 inches, an outer diameter of approximately 26.5 inches, and a height of approximately three to nine inches. Typically, multiple heater rings 100 are used with a single furnace.
  • a top insulation ring (approximately 3 inches high), three main heater rings (each approximately nine inches high), and a base heater ring (approximately three inches high) are all placed about a single furnace to form a "heater stack.”
  • This heater stack is generally about thirty-six inches high.
  • insulation blocks 210 are evenly spaced about the base ring 200 in the present embodiment.
  • the insulation blocks 210 are made of the same material as the base ring 200, but may be formed from a different type of insulation if desired. Further, although the present embodiment forms each of the insulation blocks 210 from the same material, the various blocks may be made from different insulators if necessary.
  • the insulation block 210 width is approximately equal at the outer edge and the edge contacting the base ring 200, although alternate embodiments may increase or decrease the insulation width across the length of the block 210.
  • the insulation blocks 210 cover a relatively small percentage of the base ring's 200 overall surface area. At low-temperature operation, thermal loss is relatively minimal. This, in turn, dictates that power requirements are also minimized. Accordingly, by using less insulation, the present embodiment of the heater element 100 yields better heating stability and easier temperature control.
  • a pair of heater studs 230 Extending through one of the insulation blocks 210 are a pair of heater studs 230.
  • Fig. 3 displays a schematic of the electrical circuit formed by the heater studs 230 and coils 300.
  • the heater studs 230 are electrically connected to the heater coils 300 running throughout the coil recesses 220, and supply power thereto.
  • the series of heater coils 300 and heater studs 230 form an electrical loop, with power being supplied to the coils by a power source (not shown).
  • the power source connected to the heater coils 300 by the studs 230 may be in direct or remote physical or electrical connection with the studs. That is, the power source may close the electrical loop shown in Fig.
  • the heater coils 300 convert electrical energy to heat via a high coil resistance, as well known to those skilled in the art. Thus, by, varying the power supplied to the heater coils 300 via the heater studs 230, the heat generated by the heater element 100 may be easily controlled. Suitable material for the heating coils 300 include nickel-chromium electric resistance allows and iron-chromium-aluminum electric resistance alloys.
  • Fig. 4 displays a top-down view of the heater element 100 shown in Fig. 2.
  • the base ring, projecting insulation blocks 210, heater coil recesses 220, and heater studs 230 may all be seen.
  • the combination of dashed line running through the heater coil recesses and individual lines pe ⁇ endicular to the dashed line mark the center of each heating coil recess.
  • Fig. 5 displays a second embodiment 540 suitable for use in a moderate- temperature environment.
  • the heater element 520 shown in Fig. 5 also has a base ring 500, a series of insulation blocks 510 situated about the exterior of the ring, coil recesses 520 located along the exterior of the base ring, and a pair of heater studs 530.
  • the configuration of the medium-temperature heater element 540 is similar to that displayed in Figure 2. Differences between the embodiments are enumerated below.
  • the number of insulating blocks 510 contained in the present embodiment is increased substantially over those in the low-temperature embodiment of Fig. 2.
  • one insulating block 510 is located behind each coil recess 520.
  • insulating blocks 510 Approximately 50% of the base ring 500 is covered with insulating blocks 510. By locating one insulating block behind each coil 300, insulation is provided along the outer surface of the ring 500 at the points where surface temperature is hottest, and thus where thermal loss occurs most quickly. However, depending on the thermal properties of the base ring 500, which are determined by the material comprising and physical measurements of the ring, heat radiating out from the coils 300 may be fairly uniformly distributed along the ring exterior. In such a case, the insulating blocks 210 may be positioned at any point along the ring 200 exterior, as desired.
  • the heater element 540 shown in Fig. 5 retains more heat than the embodiment shown in Fig. 2. Accordingly, power consumption is relatively smaller in the present embodiment, although heating stability may be sacrificed.
  • Fig. 6 displays a top-down view of the medium-temperature heater element 100 shown in Fig. 5.
  • dashed line running through the heater coil recesses and individual lines pe ⁇ endicular to the dashed line mark the center of each heating coil recess.
  • the heater element embodiment 740 shown in Fig. 7 is intended for high- temperature operation, and includes a base ring 700 and heater studs 730, as previously discussed.
  • the heater element 740 lacks individual insulating blocks.
  • an insulating cylinder 710 completely encircles the base ring 700.
  • the cylinder 710 provides maximum insulation and heat retention, which is desirable at high operating temperatures in order to minimize power loss and external heating of the furnace.
  • the embodiment shown in Fig. 7 operates in a manner similar to that previously discussed. It should be noted that, although the embodiments shown in Figs. 2-6 have evenly spaced insulating blocks, there is no requirement that the blocks be uniformly distributed about the perimeter of the base ring.
  • the blocks may be shifted about as necessary during construction of the heater element without adversely affecting the operational characteristics of the element under most circumstances.
  • the previously-discussed embodiments have multiple coils electrically connected to one another and affixed within the various coil recesses 220, the coils may be separate electrical elements and/or removable in alternate embodiments.
  • Fig. 8 shows a cross-sectional view of a minibatch furnace 840 with a particular embodiment of the heating elements 100 installed and operating.
  • the furnace 140 is divided into three separate temperature zones (labeled "TZ1,” “TZ2,” and “TZ3” on Fig. 8), each of which corresponds to a unique heater element 800, 810, 820.
  • the heater elements 800, 810, 820 may be individually placed, removed, and controlled. By permitting each heater element to be installed or replaced separately, only one-third of the heating coils 300 need be switched out if any single coil fails. Although the present embodiment does not permit heater elements 800, 810 and 820 to be replaced while the furnace 840 is in operation, alternate embodiments may permit such "hot-swapping."
  • each heater element 800, 810 and 820 may be independently controlled, the temperature of a single zone TZl , TZ2, TZ3 may be raised or lowered as necessary to compensate for heat loss from the process chamber 102 and ensure uniform heat distribution across the wafers.
  • the desired process temperature inside the chamber 102 may be 750 degrees Celsius.
  • the temperature at multiple points inside the process chamber 102 may be measured by an array of spike thermocouples 830, 840, 850, 860, 870, a profile thermocouple 880, or another temperature-sensing element.
  • a spike thermocouple may extend through the heating element (for example, spike thermocouple 830) or may occupy a space between adjacent heating elements (for example, spike thermocouple 890). While the average temperature inside the chamber 102 may be 750 degrees Celsius, a single thermocouple 850 may sense a point temperature in zone TZ3 of only 730 degrees Celsius.
  • two heating elements 800, 810 may be held stable while additional power is routed to the heating element 820 associated with the under-heated zone.
  • the temperature in zone TZ3 will rise, while the temperature in the other zones TZl, TZ2 will remain relatively constant (ignoring thermal migration effects).
  • the temperature in a single zone be raised more quickly thanks to a more directed application of heat, but power is also conserved across the entire system.
  • the embodiment shown in cross-section in Fig. 9 displays the various heater elements 900, 910, 920, 930 flush with the inside of the outer skin 950 of the furnace 140.
  • the heater elements are represented by diagonal shading. It should be understood that the diagonal shading represents the heater elements generally; individual components of the heater elements are not shown.
  • only the insulating blocks 210 (or 510 or 710 depending on the embodiment) actually contact the outer skin 950.
  • the base ring 200 does not.
  • the cross-section of Fig. 9 is taken through a series of insulating blocks 210.
  • the insulating blocks 210 are the only portions of the heater elements 900, 910, 920 to contact the outer skin 950, the skin remains relatively cool to the touch.
  • the vast majority of heat generated by the heater coils 300 is prevented from reaching the skin 950 by the shielding properties of the insulating blocks 210 and the air space between the base ring 200 and the outer skin 950. Thus, an operator may safely contact the furnace during operation without risk of being burned.
  • the outer skin 950 of the furnace 140 may also be provided with one or more inlet ports 960 and outlet ports 970. Air flows into the inlet port 960 at the bottom of the furnace 140 or outer skin 950, up through the spaces between insulating blocks 210 mounted to the base rings 200 of each heater element 900, 910, 920 and 930, and out the outlet port 970. Effectively, the space defined by adjacent insulating blocks, the base ring, and outer skin acts as a chimney. Because heat rises, cool air is drawn through the inlet port 960 and expelled, after heating, through the outlet port 970. The motion of the air acts as a convection cooler, effectively reducing the temperature inside each "chimney" and, by extension, the outer skin 950 and heater elements 900, 910, 920 and 930.
  • each inlet 960 and outlet 970 port may be provided with a cover (not shown). By opening or closing the cover, the convection cooling effect may be utilized or eliminated. Further, the covers may have a variety of operating positions ranging from fully closed to fully opened, thus permitting the exact amount of air drawn through the furnace 140 to be easily regulated. This offers an additional means for temperature regulation not only of the outer skin 950, but also of the heater elements 900, 910, 920 and 930 and the process chamber 102 themselves.
  • Fig. 10 displays an embodiment of the present invention operating in a furnace 1050 having an inner skin 1000 and outer skin 1010.
  • the heater elements 1050, 1060, 1070 are positioned between the inner skin 1000 and furnace wall. Again, diagonal shading represents the heater elements generally; specific components of each heater element are not shown.
  • Inlet ports 1020 and outlet ports 1030 may be provided in the surface of the outer skin 1010. Each port may also have a cover capable of being fully or partially opened or closed.
  • the cylindrical chamber 1040 defined by the inner 1000 and outer 1010 skins acts much like the space between insulating blocks 210 discussed in the section above, permitting air to circulate and cool the outer skin via convection.
  • Airflow may be regulated by adjusting the port covers 1020, 1030. In this embodiment, airflow acts primarily to cool the outer skin 1010, making it safe to touch. The effect on the heater elements 100 is minimal, insofar as the air does not flow directly over them.
  • air inside the cylindrical chamber 1040 acts as an additional layer of insulation to prevent heat from escaping during furnace 1050 operation.
  • a vacuum pump (not shown) may be fitted to another port opening into the chamber 1040, and a near-vacuum created within the chamber. This near-vacuum space will act as an even more efficient insulator. Either method of insulation (air or vacuum) may assist in maintaining temperatures within the process chamber 102 and in reducing the power requirements of the heater elements.
  • insulating properties of a heater element 100 may be changed "on the fly" through the addition or removal of various insulating spacers 1100.
  • Fig. 11 shows a heater element 100 including several insulating spacers 1100.
  • the insulating cylinders are typically formed from the same silica fiber and aluminum composite material as a heater element 100, but may be created from different materials having different insulating properties in alternate embodiments.
  • the insulating spacers 1100 are sized such that they may be placed into the spaces defined by adjacent insulating blocks 210, the exterior of the base ring 200, and the outer skin 950 of the furnace shown in Fig. 9, or the inner skin 1000 of the furnace shown in Fig. 10.
  • the spacers 1100 may simply be slipped into place from the top or bottom of the furnace in order to provide additional insulation without requiring the heater elements 100 to be dismounted and a different element installed.
  • the overall insulating effect of the heater element is enhanced.
  • a low- temperature heater element 100 for example, that of Fig.
  • a medium-temperature heater element 100 may duplicate the effect of a high-temperature element with the addition of sufficient insulating spacers 1100.
  • the insulating spacers 1100 have approximately the same width and height as an insulating block 210, but may vary in length depending on the insulating characteristics required. In an alternate embodiment, each insulating spacer 1100 may be approximately three times as high as the base ring 200 or insulating block 210, thus permitting one insulating spacer to be placed along the entirety of the three heater elements 100 while in operation.
  • auxiliary insulating cylinder 1200 A variant of the insulating spacers 1100, discussed above, is the concept of an auxiliary insulating cylinder 1200.
  • Fig. 12 displays a top-down cross-sectional view of a heater element 100 and matching auxiliary cylinder 1200.
  • the auxiliary insulating cylinder 1200 comprises an exterior shell
  • the diameter of the shell 1210 is approximately equal to the diameter of the base ring 200 plus the width of one insulating block 210. In this manner, the inner surface of the shell 1210 snugly contacts the exterior of the insulating blocks 210.
  • the interior insulators 1220 have approximately the same height and width as the insulating blocks 210 of the heater element 100, and in turn fit snugly against the outside of the base ring 200. The number and positioning of the interior insulators 1220 is such that they do not overlap the insulating blocks 210 when the auxiliary insulating cylinder 1200 is fitted about the heater element 100.
  • the two items mesh like gears, with the insulating blocks and interior insulators being teeth.
  • the shell 1210 is relatively thin, it provides little or no insulation when in use. Instead, the majority of additional insulation afforded by the auxiliary cylinder 1200 comes from the interior insulators 1220.
  • the shell 1210 may be made of any material capable of withstanding the operating temperatures of the furnace 140, while the interior insulators are typically formed from the aforementioned silica fiber and aluminum composite. In alternate embodiments, the shell 1210 may also provide an insulating effect, and may be made of the same insulating composite as the interior insulators 1220 and heater element 100.
  • auxiliary cylinders 1200 may be designed, manufactured, and employed for each embodiment of the present invention, depending on the additional insulating characteristics desired.
  • the low-temperature embodiment shown in Fig. 2 may have two different varieties of auxiliary insulating cylinder 1200.
  • a first cylinder may have a relatively small number of interior insulators 1220, in order to simulate a medium-temperature heater element 100 when placed about the low-temperature embodiment and to permit air flow through channels formed by the spaces.
  • a second cylinder 1200 may have so many more (or longer) interior insulators 1220 that the entire space between insulating blocks 210 on the heater element 100 is filled. This, in turn, would simulate a high-temperature heater element 100.
  • a heater element may have different physical measurements, or may be manufactured from different materials.
  • a heater element may have different physical measurements, or may be manufactured from different materials.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Furnace Details (AREA)
  • Resistance Heating (AREA)
  • Control By Computers (AREA)
  • Physical Vapour Deposition (AREA)
  • Control Of Fluid Pressure (AREA)
  • Control Of Non-Electrical Variables (AREA)
  • Control Of Resistance Heating (AREA)
  • Muffle Furnaces And Rotary Kilns (AREA)

Abstract

A method and apparatus for insulating and controlling temperature in a semiconductor manufacturing environment. The invention comprises at least one modular heater element designed to be mounted about a semiconductor furnace process chamber in order to minimize thermal transfer between the furnace interior and exterior. A base ring or cylinder (200, 500, 700) also referred to as a heater ring is sized to be fitted around an inner skin of a semiconductor mini-batch furnace. The base ring (200, 500, 700) has multiple channels (220, 520) equidistantly spaced about its inner perimeter. Heating coils of a type well known in the art may nest in these channels in order to warm the furnace interior. The coils may be either removably or permanently affixed within the channels.

Description

VARIABLE HEATER ELEMENT FOR LOW TO HIGH TEMPERATURE
RANGES CROSS-REFERENCE TO RELATED APPLICATIONS
The present application claims the benefit of and priority from commonly assigned U.S. Provisional Patent Applications Serial Nos. 60/396,536, entitled Thermal Processing System, and filed July 15, 2002, and 60/428,526, entitled Thermal Processing System and Method for Using the Same, and filed November 22, 2002, both of which are incorporated herein by reference in their entirety. BACKGROUND OF THE INVENTION
1. Technical Field
This invention relates generally to a method and apparatus for insulating and heating a semiconductor manufacturing environment, and more specifically to a selectably insulating heater element appropriate for use in wide temperature ranges with a minibatch furnace.
2. Description of Related Art
Furnaces are commonly used in a wide variety of industries, including in the manufacture of integrated circuits or semiconductor devices from semiconductor substrates or wafers. Thermal processing of semiconductor wafers include, for example, heat treating, annealing, diffusion or driving of dopant material, deposition or growth of layers of material, and etching or removal of material from the substrate. These processes often call for the wafer to be heated to a temperature as high as 250 to 1200 degrees Celsius before and during the process. Moreover, these processes typically require that the wafer be maintained at a uniform temperature throughout the process, despite fluctuations in the temperature of the process gas or the rate at which it is introduced into the process chamber.
A conventional furnace typically consists of a voluminous process chamber positioned in or surrounded by a furnace. The furnace typically has multiple interconnected heating coils. Substrates to be thermally processed are sealed in the process chamber, which is then heated by the furnace to a desired temperature at which the processing is performed. For many processes, such as chemical vapor deposition, the sealed process chamber is first evacuated, after which reactive or process gases are introduced to form or deposit reactant species on the substrates. There are several design challenges to meeting the thermal requirements of heat treatment apparatuses. For instance, the process chamber temperature must often be quickly varied, such as when beginning or ending thermal processing. Further, furnace downtime should be minimized in order to maximize the number of semiconductor wafers that may be processed on any given day. In like vein, power consumption requirements at high operating temperatures need to be minimized for cost efficiency, while ease of temperature control at low temperatures must be enhanced to avoid excessive operator interference with the semiconductor processing.
Although semiconductor furnaces having multiple interconnected heating coils provide a simple method for heating and cooling the furnace, the entire heating array must be replaced if a single coil fails. Further, this construction can respond to temperature gradients in the process chamber only by increasing power to every heating coil simultaneously, thus causing certain portions of the chamber to overheat in order to eliminate the temperature fluctuation in a different portion of the chamber. This may adversely affect the wafers. This is particularly a concern with the latest, large wafer sizes and more complex integrated circuits, where a single wafer is extremely expensive.
Accordingly, there is a need for an apparatus and method to overcome the aforementioned problems.
BRIEF SUMMARY OF THE INVENTION Generally, the present invention discloses an apparatus and method for insulating and controlling temperature in a semiconductor manufacturing environment. More specifically, the invention comprises at least one modular heating element consisting of a base ring and attached insulating blocks. The heating element is designed to be mounted about a semiconductor furnace in order to minimize thermal transfer between the furnace interior and exterior.
In the current embodiment, the base ring or cylinder (also referred to as a "heater ring") is sized to be fitted around an inner skin of a semiconductor mini- batch furnace. The base ring has multiple channels equidistantly spaced about its inner perimeter, each of which contains a heating coil. The coils may be either removably or permanently affixed within the channels.
Continuing the description of the present embodiment, three heater rings are placed one atop the other in order to completely insulate the furnace's process chamber. Alternate embodiments may use a different number of heater rings, such as two, five, and so on, to surround the process chamber. By using multiple rings and dividing the furnace into separate heating zones, each of which corresponds to a ring, temperature gradients between zones may be easily monitored and controlled by selectively adjusting the power to the coils within one or more rings. Further, should a heating coil fail, only the heater element containing that coil need be removed and replaced. This may be done during operation of the furnace without removing either of the other heater elements.
One embodiment of the present invention has a number of insulating blocks located on the exterior. When viewed in cross-section, such a heater ring may resemble a gear, with the insulating blocks corresponding to gear teeth. The number, thickness, and width of each insulating block may vary, depending on the exact heating/insulating characteristics required.
This embodiment may be adjusted "on the fly" in order to change the heating and insulating characteristics of each ring. Additional spacers of insulating material may be inserted along the height of each ring, into the space between attached insulating blocks. These spacers increase the insulating effect of the heater rings. In yet another embodiment of the present invention, thermal characteristics of a heater ring may be changed by placing an auxiliary interlocking cylinder along the outside of the ring. A number of interior insulating blocks ("interior insulators") are affixed to the inside diameter of the cylinder in such a manner that, when the auxiliary cylinder is placed around the heater ring, the interior insulators fit into the spaces between the insulating blocks along the outside of the base ring. Auxiliary cylinders may have insulating blocks arranged in a variety of formats. BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 displays an exemplary operating environment for an embodiment of the present invention.
Fig. 2 displays a first embodiment of the present invention suitable for use with low-temperature environments. Fig. 3 displays an electrical schematic of an embodiment in accordance with the present invention.
Fig. 4 displays a top-down view of the embodiment of Fig. 2.
Fig. 5 displays a second embodiment of the present invention suitable for use with medium-temperature environments. Fig. 6 displays a top-down view of the embodiment of Fig. 5.
Fig. 7 displays a third embodiment of the present invention suitable for use with high-temperature environments.
Fig. 8 displays three heater elements in operation in a suitable operating environment. Fig. 9 displays the first embodiment of the present invention in operation in a one-skin environment.
Fig. 10 displays the first embodiment of the present invention in operation in a two-skin environment.
Fig. 11 displays a set of insulating spacers as used with an embodiment of the present invention.
Fig. 12 displays an auxiliary cylinder as used with an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION, INCLUDING THE BEST MODE
General Overview
Generally, the methods and apparatuses described herein are for insulating and controlling temperature in a semiconductor manufacturing environment. More specifically, the modular heater element described herein is designed to be mounted about a semiconductor furnace's process chamber in order to minimize thermal transfer between the furnace interior and exterior.
In the current embodiment, the base ring or cylinder (also referred to as a "heater ring") is sized to be fitted around an inner skin of a semiconductor mini- batch furnace. The base ring has multiple channels equidistantly spaced about its inner perimeter. Heating coils of any suitable type, including types well known in the art, may be nested in these channels in order to warm the furnace interior. The coils may be either removably or permanently affixed within the channels.
Continuing the description of the present embodiment, multiple heater rings are typically placed one atop the other in order to completely insulate and surround the furnace. In the embodiment of Fig. 1, for example, three heater rings 100 are stacked one atop another to completely surround the sidewalls of the furnace interior. By using multiple rings and dividing the furnace into separate heating zones, each of which corresponds to one or more rings, temperature gradients between zones may be more easily monitored and controlled by selectively adjusting the power to the coils within one or more rings. Further, should a heating coil fail, only the base ring containing that coil need be removed and replaced. This minimizes repair costs in the Fig. 1 embodiment, insofar as two-thirds of the heating coils and insulation are not discarded due to a single coil failure. Different embodiments include heater rings having different designs to enable the furnace to operate at a wide range of temperatures. Generally speaking, semiconductor fabrication takes place at temperatures ranging from 200 to 1250 degrees Celsius. Because the furnace may operate over different temperature ranges, depending on processes being carried out and on the number of semiconductors being fabricated, differing amounts of insulation may be required at different temperatures.
Less insulation typically yields better heating stability and ease of control. For example, a heater ring using a small amount of insulation minimizes the time taken to decrease temperature when the furnace is overheated when, for example, a target furnace temperature is overshot, because heat may more readily bleed through the furnace walls. Similarly, ease of control is maximized because solid-state power controllers, such as those used in many conventional furnaces, control power more precisely when the steady-state power consumption exceeds approximately three percent of the total power. Continuing the example, more insulation reduces the power necessary to maintain a given temperature, because heat loss through . Accordingly, less insulation is preferable at low temperatures where thermal transfer is a minimal issue, while more insulation is preferable at high temperatures where thermal transfer increases power consumption. One embodiment has a number of insulating blocks located on the exterior.
When viewed in cross-section, such a heater ring resembles a gear, with the insulating blocks corresponding to gear teeth. The number, thickness, and width of each insulating block may vary, depending on the exact heating/insulating characteristics required. For example, a low-temperature heater element has relatively narrow insulating blocks (which may be longitudinally continuous or discontinuous as desired) with large gaps between each block, while a high- temperature heating element has blocks of increased thickness or width, or a greater number of blocks, or a combination thereof. For extremely high temperatures, the insulating blocks may be replaced by a solid cylinder of insulating material. Since the heater rings are modular, one or more rings may easily be changed out when the semiconductor furnace changes its mode of operation from low temperature to high temperature.
Further, this embodiment may be adjusted "on the fly" in order to change the heating and insulating characteristics of each ring. Additional spacers of insulating material may be inserted along the length of each ring, into the space between attached insulating blocks. These spacers increase the insulating effect of the heater rings, thus permitting a user of the present invention to adjust thermal characteristics as desired. Thus, where more insulation is required to minimize power utilization at high temperatures, additional insulation spacers may be added instead of swapping out rings.
In yet another embodiment of the present invention, thermal characteristics of a heater ring may be changed by placing an auxiliary interlocking cylinder along the outside of the ring. The auxiliary insulating cylinder has a diameter slightly exceeding that of the heater ring. Additionally, a number of interior insulating blocks ("interior insulators") are affixed to the inside diameter of the cylinder in such a manner that, when the auxiliary cylinder is placed around the heater ring, the interior insulators thereon fit into the spaces between the insulating blocks along the outside of the base ring. Auxiliary cylinders may have interior insulators arranged in a variety of formats. For example, one auxiliary cylinder may have a series of insulating blocks arranged such that, when mated with a low-temperature heater ring, the auxiliary cylinder insulating blocks contact the heater ring insulating blocks. This configuration would eliminate any gap between insulating blocks, thus mimicking a very high-temperature insulation configuration. Another auxiliary cylinder may be set up to leave a relatively small space between insulating blocks for use in a medium-temperature environment.
Operating Environment
Fig. 1 displays an exemplary operating environment for a semiconductor minibatch furnace. The furnace 140 generally includes a process chamber 102 having a support 104 adapted for receiving a carrier or boat 106 with a batch of wafers 108 held therein, and heat source 140 having a number of heating elements 100 for raising a temperature of the wafers 108 to the desired temperature for thermal processing. The furnace 140 further includes one or more optical or electrical temperature sensing elements 114, such as a resistance temperature device (RTD) or thermocouple, for monitoring the temperature within the process chamber 102 and/or controlling operation of the heating elements 100.
In the embodiment shown, the temperature sensing element is a profile thermocouple 114 that has multiple independent temperature sensing nodes or points for detecting the temperature at multiple locations within the process chamber 102. Alternately, the temperature sensing element may be a series of spike thermocouples (not shown) extending from the heating elements 100 and unrelated to one another. The furnace 140 can also include one or more injectors 116 for introducing a fluid, gas, or vapor, into the process chamber 102 for processing and/or cooling the wafers 108, and one or more vents or purge ports 118 (only one of which is shown) for introducing a purge element into the process chamber. A liner 120 may be used to increase the concentration of processing gas or vapor near the wafers 108, and to reduce contamination of the wafers from flaking or peeling of deposits that can form on interior surfaces of the process chamber enclosure 101.
Generally, the process chamber 102 is sealed by a seal, such as an o-ring 122, to a platform or baseplate 124 to completely enclose the wafers 108 during thermal processing. Openings for the injectors 116, thermocouples 114 and purge ports 118 are sealed using seals such as O-rings, VCR , or CF® fittings. Gases or vapor released or introduced during processing are evacuated through an exhaust port 126 formed in a wall of the process chamber 102 or via a plenum 127 of the baseplate 124, as shown in Fig. 1. The process chamber 102 can be maintained at atmospheric pressure during thermal processing or evacuated to near-vacuum via a pumping system (not shown) including one or more roughing pumps, blowers, hi- vacuum pumps, and roughing, throttle and/or foreline valves.
The process chamber enclosure 101 and liner 120 can be made of any metal, ceramic, crystalline or glass material that is capable of withstanding the thermal and mechanical stresses of high temperature and high vacuum operation, and which is resistant to erosion from gases and vapors used or released during processing. Preferably, the process chamber enclosure 101 is made from an opaque, translucent or transparent quartz glass having a sufficient thickness to withstand the mechanical stresses and that resists deposition of process byproducts, thereby reducing potential contamination of the processing environment. Optionally, the process chamber enclosure 101 and liner 120 are made from an opaque quartz that reduces or eliminates the conduction of heat away from the region or processing zone 128 in which the wafers 108 are processed to the seal 122. In the Fig. 1 embodiment, illustratively, six heating elements are employed. A first heating element 152 is adjacent the top of the process chamber 102, while a second element 154 runs along the chamber bottom. A third heating element 156 encircles the bottom portion of the chamber. The fourth, fifth, and sixth heating elements 100 are functionally and operationally identical, and surround the remainder of the process chamber 102 sides. These three heating elements 100 divide the process chamber into three temperature zones, each of which may be controlled independently of one another. Generally, the heating elements operate to maintain operating temperatures in the process chamber 102 between approximately 250 and 1250 degrees Celsius. The exact operating temperature varies, depending on the wafer load inside the chamber, the type of wafer being fabricated, the process conditions, and so forth. Accordingly, each heater element 100 is fully capable of supporting the entire range of potential operating temperatures.
The Heater Element 1. Low-Temperature Embodiment
Fig. 2 displays one embodiment 240 of either the heater element 100 or the heating element 156. The heater element 240 shown in Fig. 2 is configured for use in low-temperature environments. The heater element 240 includes a base ring 200 and multiple, spaced insulation blocks 210. Equally spaced about the interior of the base ring 200 is a series of coil recesses 220.
The base ring 200 is typically made of a vacuum-formed fiber having insulating properties. For example, the base ring may be made of a low-density alumina silica fiber insulation. Manufacture of articles using low-density alumina silica fiber insulation is generally known to those skilled in the art. The insulation blocks 210 may be created as an integral part of the base ring 200, or may be later affixed thereto. Any attachment means known to those skilled in the art may serve to fasten the insulation blocks to the base ring. Generally speaking, the base ring 200 is sized to fit about the exterior of the process chamber 102. The base ring 200 interior may be a small distance from the process chamber 102 exterior wall (as shown in Fig. 1), or may be positioned flush against the chamber. By leaving a small amount of space between the base ring 200 and process chamber 102, the intervening air may distribute heat generated by the heating coils, thus assisting in generating uniform temperature distribution across the wafers, and may also assist in cooling. By mounting the base ring 200 flush against the skin of the process chamber 102, thermal transfer to the interior of the process chamber is reduced, thus minimizing power requirements. Accordingly, different circumstances may call for different size heater elements 100. In the present embodiment, however, the heater ring 100 has an inner diameter of approximately 20.5 inches, an outer diameter of approximately 26.5 inches, and a height of approximately three to nine inches. Typically, multiple heater rings 100 are used with a single furnace. In the present embodiment, a top insulation ring (approximately 3 inches high), three main heater rings (each approximately nine inches high), and a base heater ring (approximately three inches high) are all placed about a single furnace to form a "heater stack." This heater stack is generally about thirty-six inches high.
Multiple insulation blocks 210 are evenly spaced about the base ring 200 in the present embodiment. Typically, the insulation blocks 210 are made of the same material as the base ring 200, but may be formed from a different type of insulation if desired. Further, although the present embodiment forms each of the insulation blocks 210 from the same material, the various blocks may be made from different insulators if necessary. In the present embodiment, the insulation block 210 width is approximately equal at the outer edge and the edge contacting the base ring 200, although alternate embodiments may increase or decrease the insulation width across the length of the block 210.
Because the heater element 240 shown in Fig. 2 is designed for low- temperature operation, the insulation blocks 210 cover a relatively small percentage of the base ring's 200 overall surface area. At low-temperature operation, thermal loss is relatively minimal. This, in turn, dictates that power requirements are also minimized. Accordingly, by using less insulation, the present embodiment of the heater element 100 yields better heating stability and easier temperature control.
Extending through one of the insulation blocks 210 are a pair of heater studs 230. Fig. 3 displays a schematic of the electrical circuit formed by the heater studs 230 and coils 300. The heater studs 230 are electrically connected to the heater coils 300 running throughout the coil recesses 220, and supply power thereto. Taken together, the series of heater coils 300 and heater studs 230 form an electrical loop, with power being supplied to the coils by a power source (not shown). It should be noted that the power source connected to the heater coils 300 by the studs 230 may be in direct or remote physical or electrical connection with the studs. That is, the power source may close the electrical loop shown in Fig. 3, or there may be multiple intervening elements between the studs 230 and the power source. Any method or configuration known to those skilled in the art permitting electrical power to flow through the studs and to the coils is contemplated herein. The heater coils 300, of course, convert electrical energy to heat via a high coil resistance, as well known to those skilled in the art. Thus, by, varying the power supplied to the heater coils 300 via the heater studs 230, the heat generated by the heater element 100 may be easily controlled. Suitable material for the heating coils 300 include nickel-chromium electric resistance allows and iron-chromium-aluminum electric resistance alloys. Fig. 4 displays a top-down view of the heater element 100 shown in Fig. 2. The base ring, projecting insulation blocks 210, heater coil recesses 220, and heater studs 230 may all be seen. Generally, the combination of dashed line running through the heater coil recesses and individual lines peφendicular to the dashed line mark the center of each heating coil recess.
2. Medium-Temperature Embodiment
Fig. 5 displays a second embodiment 540 suitable for use in a moderate- temperature environment. The heater element 520 shown in Fig. 5 also has a base ring 500, a series of insulation blocks 510 situated about the exterior of the ring, coil recesses 520 located along the exterior of the base ring, and a pair of heater studs 530. Generally, the configuration of the medium-temperature heater element 540 is similar to that displayed in Figure 2. Differences between the embodiments are enumerated below. First, the number of insulating blocks 510 contained in the present embodiment is increased substantially over those in the low-temperature embodiment of Fig. 2. Generally, in the present embodiment one insulating block 510 is located behind each coil recess 520. Approximately 50% of the base ring 500 is covered with insulating blocks 510. By locating one insulating block behind each coil 300, insulation is provided along the outer surface of the ring 500 at the points where surface temperature is hottest, and thus where thermal loss occurs most quickly. However, depending on the thermal properties of the base ring 500, which are determined by the material comprising and physical measurements of the ring, heat radiating out from the coils 300 may be fairly uniformly distributed along the ring exterior. In such a case, the insulating blocks 210 may be positioned at any point along the ring 200 exterior, as desired.
Since a proportionately greater percentage of the base ring 500 is covered by insulating blocks, the heater element 540 shown in Fig. 5 retains more heat than the embodiment shown in Fig. 2. Accordingly, power consumption is relatively smaller in the present embodiment, although heating stability may be sacrificed.
Fig. 6 displays a top-down view of the medium-temperature heater element 100 shown in Fig. 5. Generally, the combination of dashed line running through the heater coil recesses and individual lines peφendicular to the dashed line mark the center of each heating coil recess. 3. High-Temperature Embodiment
The heater element embodiment 740 shown in Fig. 7 is intended for high- temperature operation, and includes a base ring 700 and heater studs 730, as previously discussed. Here, however, the heater element 740 lacks individual insulating blocks. Instead, an insulating cylinder 710 completely encircles the base ring 700. The cylinder 710 provides maximum insulation and heat retention, which is desirable at high operating temperatures in order to minimize power loss and external heating of the furnace. Generally, the embodiment shown in Fig. 7 operates in a manner similar to that previously discussed. It should be noted that, although the embodiments shown in Figs. 2-6 have evenly spaced insulating blocks, there is no requirement that the blocks be uniformly distributed about the perimeter of the base ring. The blocks may be shifted about as necessary during construction of the heater element without adversely affecting the operational characteristics of the element under most circumstances. Further, although the previously-discussed embodiments have multiple coils electrically connected to one another and affixed within the various coil recesses 220, the coils may be separate electrical elements and/or removable in alternate embodiments.
4. The Embodiment in Operation- Multiple Zones of Control
Fig. 8 shows a cross-sectional view of a minibatch furnace 840 with a particular embodiment of the heating elements 100 installed and operating.
Generally speaking, the furnace 140 is divided into three separate temperature zones (labeled "TZ1," "TZ2," and "TZ3" on Fig. 8), each of which corresponds to a unique heater element 800, 810, 820. The heater elements 800, 810, 820 may be individually placed, removed, and controlled. By permitting each heater element to be installed or replaced separately, only one-third of the heating coils 300 need be switched out if any single coil fails. Although the present embodiment does not permit heater elements 800, 810 and 820 to be replaced while the furnace 840 is in operation, alternate embodiments may permit such "hot-swapping."
Further, because each heater element 800, 810 and 820 may be independently controlled, the temperature of a single zone TZl , TZ2, TZ3 may be raised or lowered as necessary to compensate for heat loss from the process chamber 102 and ensure uniform heat distribution across the wafers.
For example, the desired process temperature inside the chamber 102 may be 750 degrees Celsius. As previously mentioned, the temperature at multiple points inside the process chamber 102 may be measured by an array of spike thermocouples 830, 840, 850, 860, 870, a profile thermocouple 880, or another temperature-sensing element. Further, a spike thermocouple may extend through the heating element (for example, spike thermocouple 830) or may occupy a space between adjacent heating elements (for example, spike thermocouple 890). While the average temperature inside the chamber 102 may be 750 degrees Celsius, a single thermocouple 850 may sense a point temperature in zone TZ3 of only 730 degrees Celsius. Rather than increasing the power to every heating element 800, 810, 820 in order to raise the temperature in zone TZ3, two heating elements 800, 810 may be held stable while additional power is routed to the heating element 820 associated with the under-heated zone. Thus, the temperature in zone TZ3 will rise, while the temperature in the other zones TZl, TZ2 will remain relatively constant (ignoring thermal migration effects). Thus, not only may the temperature in a single zone be raised more quickly thanks to a more directed application of heat, but power is also conserved across the entire system. One-Skin Environment
The embodiment shown in cross-section in Fig. 9 displays the various heater elements 900, 910, 920, 930 flush with the inside of the outer skin 950 of the furnace 140. The heater elements are represented by diagonal shading. It should be understood that the diagonal shading represents the heater elements generally; individual components of the heater elements are not shown. In this operating environment, only the insulating blocks 210 (or 510 or 710 depending on the embodiment) actually contact the outer skin 950. The base ring 200 does not. (The cross-section of Fig. 9 is taken through a series of insulating blocks 210.) Because the insulating blocks 210 are the only portions of the heater elements 900, 910, 920 to contact the outer skin 950, the skin remains relatively cool to the touch. The vast majority of heat generated by the heater coils 300 is prevented from reaching the skin 950 by the shielding properties of the insulating blocks 210 and the air space between the base ring 200 and the outer skin 950. Thus, an operator may safely contact the furnace during operation without risk of being burned.
The outer skin 950 of the furnace 140 may also be provided with one or more inlet ports 960 and outlet ports 970. Air flows into the inlet port 960 at the bottom of the furnace 140 or outer skin 950, up through the spaces between insulating blocks 210 mounted to the base rings 200 of each heater element 900, 910, 920 and 930, and out the outlet port 970. Effectively, the space defined by adjacent insulating blocks, the base ring, and outer skin acts as a chimney. Because heat rises, cool air is drawn through the inlet port 960 and expelled, after heating, through the outlet port 970. The motion of the air acts as a convection cooler, effectively reducing the temperature inside each "chimney" and, by extension, the outer skin 950 and heater elements 900, 910, 920 and 930.
Additionally, each inlet 960 and outlet 970 port may be provided with a cover (not shown). By opening or closing the cover, the convection cooling effect may be utilized or eliminated. Further, the covers may have a variety of operating positions ranging from fully closed to fully opened, thus permitting the exact amount of air drawn through the furnace 140 to be easily regulated. This offers an additional means for temperature regulation not only of the outer skin 950, but also of the heater elements 900, 910, 920 and 930 and the process chamber 102 themselves.
Two-Skin Environment
Fig. 10 displays an embodiment of the present invention operating in a furnace 1050 having an inner skin 1000 and outer skin 1010. Generally, the heater elements 1050, 1060, 1070 are positioned between the inner skin 1000 and furnace wall. Again, diagonal shading represents the heater elements generally; specific components of each heater element are not shown. Inlet ports 1020 and outlet ports 1030 may be provided in the surface of the outer skin 1010. Each port may also have a cover capable of being fully or partially opened or closed. In this environment, the cylindrical chamber 1040 defined by the inner 1000 and outer 1010 skins acts much like the space between insulating blocks 210 discussed in the section above, permitting air to circulate and cool the outer skin via convection. Airflow may be regulated by adjusting the port covers 1020, 1030. In this embodiment, airflow acts primarily to cool the outer skin 1010, making it safe to touch. The effect on the heater elements 100 is minimal, insofar as the air does not flow directly over them.
When the inlet ports 1000 and outlet ports 1010 are completely blocked with an air-tight cover, however, air inside the cylindrical chamber 1040 acts as an additional layer of insulation to prevent heat from escaping during furnace 1050 operation. Alternately, a vacuum pump (not shown) may be fitted to another port opening into the chamber 1040, and a near-vacuum created within the chamber. This near-vacuum space will act as an even more efficient insulator. Either method of insulation (air or vacuum) may assist in maintaining temperatures within the process chamber 102 and in reducing the power requirements of the heater elements.
It will be appreciated that the two-skin embodiment of Fig. 10 is particularly useful with the heating element embodiment of Fig. 7.
Insulating Spacers
In yet another embodiment of the invention, insulating properties of a heater element 100 may be changed "on the fly" through the addition or removal of various insulating spacers 1100. Fig. 11 shows a heater element 100 including several insulating spacers 1100. The insulating cylinders are typically formed from the same silica fiber and aluminum composite material as a heater element 100, but may be created from different materials having different insulating properties in alternate embodiments.
The insulating spacers 1100 are sized such that they may be placed into the spaces defined by adjacent insulating blocks 210, the exterior of the base ring 200, and the outer skin 950 of the furnace shown in Fig. 9, or the inner skin 1000 of the furnace shown in Fig. 10. The spacers 1100 may simply be slipped into place from the top or bottom of the furnace in order to provide additional insulation without requiring the heater elements 100 to be dismounted and a different element installed. As more insulating spacers 1100 are added, the overall insulating effect of the heater element is enhanced. Thus, by simply adding a number of spacers, a low- temperature heater element 100 (for example, that of Fig. 2) may mimic the characteristics of a medium- or high-temperature heater element (for example, those of Figs. 5 and 7). Similarly, a medium-temperature heater element 100 may duplicate the effect of a high-temperature element with the addition of sufficient insulating spacers 1100.
Typically, the insulating spacers 1100 have approximately the same width and height as an insulating block 210, but may vary in length depending on the insulating characteristics required. In an alternate embodiment, each insulating spacer 1100 may be approximately three times as high as the base ring 200 or insulating block 210, thus permitting one insulating spacer to be placed along the entirety of the three heater elements 100 while in operation.
Auxiliary Cylinders
A variant of the insulating spacers 1100, discussed above, is the concept of an auxiliary insulating cylinder 1200. Fig. 12 displays a top-down cross-sectional view of a heater element 100 and matching auxiliary cylinder 1200. Generally, the auxiliary insulating cylinder 1200 comprises an exterior shell
1210 and at least one interior insulator 1220. The diameter of the shell 1210, as measured to the inner surface thereof, is approximately equal to the diameter of the base ring 200 plus the width of one insulating block 210. In this manner, the inner surface of the shell 1210 snugly contacts the exterior of the insulating blocks 210. The interior insulators 1220 have approximately the same height and width as the insulating blocks 210 of the heater element 100, and in turn fit snugly against the outside of the base ring 200. The number and positioning of the interior insulators 1220 is such that they do not overlap the insulating blocks 210 when the auxiliary insulating cylinder 1200 is fitted about the heater element 100. Effectively, the two items mesh like gears, with the insulating blocks and interior insulators being teeth. Because the shell 1210 is relatively thin, it provides little or no insulation when in use. Instead, the majority of additional insulation afforded by the auxiliary cylinder 1200 comes from the interior insulators 1220. Thus, the shell 1210 may be made of any material capable of withstanding the operating temperatures of the furnace 140, while the interior insulators are typically formed from the aforementioned silica fiber and aluminum composite. In alternate embodiments, the shell 1210 may also provide an insulating effect, and may be made of the same insulating composite as the interior insulators 1220 and heater element 100.
A variety of auxiliary cylinders 1200 may be designed, manufactured, and employed for each embodiment of the present invention, depending on the additional insulating characteristics desired. For example, the low-temperature embodiment shown in Fig. 2 may have two different varieties of auxiliary insulating cylinder 1200. A first cylinder may have a relatively small number of interior insulators 1220, in order to simulate a medium-temperature heater element 100 when placed about the low-temperature embodiment and to permit air flow through channels formed by the spaces. A second cylinder 1200 may have so many more (or longer) interior insulators 1220 that the entire space between insulating blocks 210 on the heater element 100 is filled. This, in turn, would simulate a high-temperature heater element 100. Conclusion
As will be recognized by those skilled in the art from the foregoing description of example embodiments of the invention, numerous variations on the described embodiments may be made without departing from the spirit and scope of the invention. For example, a heater element may have different physical measurements, or may be manufactured from different materials. Further, while the present invention has been described in the context of specific embodiments and processes, such descriptions are by way of example and not limitation. Accordingly, the proper scope of the present invention is specified by the following claims and not by the preceding examples.

Claims

WHAT IS CLAIMED IS:
1. A heating element for heating a portion of a semiconductor fabrication furnace, comprising: a base ring having a one coil recess; a coil situated within the one coil recess; and an insulating block affixed to the base ring; wherein the heating element surrounds substantially less than the entirety of the furnace.
2. The heating element of claim 1, wherein the heating coil is removably situated within the coil recess.
3. The heating element of claim 1, wherein the insulating block is located directly behind the heating coil.
4. The heating element of claim 1, wherein the base ring and insulating block are both made from the same insulating material.
5. The heating element of claim 4, wherein the insulating material is a vacuum-formed silica fiber and aluminum composite.
6. The heating element of claim 1, wherein the insulating block is permanently attached to the base ring.
7. The heating element of claim 6, wherein the heating element is configured for low-temperature operation.
8. The heating element of claim 6, wherein the heating element is configured for medium-temperature operation.
9. The heating element of claim 6, wherein the heating element is configured for high-temperature operation.
10. The heating element of claim 6, further comprising an insulating spacer removably placed between the insulating block and a second adjacent insulating block.
11. The heating element of claim 10, wherein the insulating spacer is temporarily placed during operation of the heater element.
12. The heating element of claim 6, further comprising an auxiliary insulating cylinder, comprising: an exterior cylindrical shell sized to fit about the combination of the base ring and at least one insulating block; and an interior insulator sized to fit between the block and an adjacent insulating block.
13. The heating element of claim 12, wherein: the inner surface of the exterior cylindrical shell contacts the outer surface of the insulating block and outer surface of the adjacent insulating block; and the inner surface of the interior insulator contacts the outer surface of the base ring.
14. A method for heating and insulating a semiconductor fabrication furnace, comprising: determining a desired operating temperature; in response to determining a desired operating temperature, selecting a corresponding heater element configuration; placing a first and second heater element having the proper configuration about the furnace, the first heater element corresponding to a first and second temperature zone; and providing power to at least one coil in the first and second heater elements.
15. The method of claim 14, further comprising: detecting a temperature fluctuation in the first temperature zone; and in response to detecting the temperature fluctuation, providing additional power to at least one coil in the first heater element.
16. The method of claim 15, further comprising: detecting that a heater coil in the first heater element is no longer functioning; and in response to detecting the non-functioning heater coil, replacing the first heater element while leaving the second heater element in place.
17. The method of claim 15, further comprising: increasing power to the at least one coil in order to increase the operating temperature of the furnace; and in response to increasing power to the at least one coil, adding an insulation spacer to the first and second heater elements.
18. The method of claim 15, further comprising: increasing power to the at least one coil in order to increase the operating temperature of the fumace; and in response to increasing power to the at least one coil, placing an auxiliary insulating cylinder about the first and second heater elements.
19. A heater configuration for insulating a semiconductor fabrication furnace, comprising: a first heater, said first heater comprising: a first base ring having at least one first coil recess; at least one first heating coil situated within the at least one first coil recess; and at least one first insulating block attached to the first base ring; and a second heater disposed adjacent to the first heater, the second heater comprising: a second base ring having at least one second coil recess; at least one second heating coil situated within the at least one second coil recess; at least one second insulating block attached to the second
base ring; and a power means for providing power to the at least one first heating coil and at least one second heating coil; wherein the at least one first heating coil and at least one second heating coil cooperate to maintain a temperature inside the furnace.
20. The heater configuration of claim 19, wherein the first heater may be removed without removing the second heater.
PCT/US2003/021648 2002-07-15 2003-07-10 Variable heater element for low to high temperature ranges WO2004008054A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU2003256487A AU2003256487A1 (en) 2002-07-15 2003-07-10 Variable heater element for low to high temperature ranges
US10/521,283 US20060083495A1 (en) 2002-07-15 2003-07-10 Variable heater element for low to high temperature ranges
JP2004521645A JP2005533232A (en) 2002-07-15 2003-07-10 Variable heater element for low to high temperature range
EP03764467A EP1540258A1 (en) 2002-07-15 2003-07-10 Variable heater element for low to high temperature ranges

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US39653602P 2002-07-15 2002-07-15
US60/396,536 2002-07-15
US42852602P 2002-11-22 2002-11-22
US60/428,526 2002-11-22

Publications (2)

Publication Number Publication Date
WO2004008054A1 true WO2004008054A1 (en) 2004-01-22
WO2004008054A9 WO2004008054A9 (en) 2005-01-13

Family

ID=30118590

Family Applications (9)

Application Number Title Priority Date Filing Date
PCT/US2003/021647 WO2004008494A2 (en) 2002-07-15 2003-07-10 Servomotor control system and method in a semiconductor manufacturing environment
PCT/US2003/021575 WO2004008491A2 (en) 2002-07-15 2003-07-10 Thermal processing system and configurable vertical chamber
PCT/US2003/021646 WO2004008008A2 (en) 2002-07-15 2003-07-10 Control of a gaseous environment in a wafer loading chamber
PCT/US2003/021648 WO2004008054A1 (en) 2002-07-15 2003-07-10 Variable heater element for low to high temperature ranges
PCT/US2003/021641 WO2004007105A1 (en) 2002-07-15 2003-07-10 Apparatus and method for backfilling a semiconductor wafer process chamber
PCT/US2003/021644 WO2004007800A1 (en) 2002-07-15 2003-07-10 Thermal processing apparatus and method for evacuating a process chamber
PCT/US2003/021642 WO2004008493A2 (en) 2002-07-15 2003-07-10 Method and apparatus for supporting semiconductor wafers
PCT/US2003/021645 WO2004008052A2 (en) 2002-07-15 2003-07-10 System and method for cooling a thermal processing apparatus
PCT/US2003/021973 WO2004007318A2 (en) 2002-07-15 2003-07-15 Loadport apparatus and method for use thereof

Family Applications Before (3)

Application Number Title Priority Date Filing Date
PCT/US2003/021647 WO2004008494A2 (en) 2002-07-15 2003-07-10 Servomotor control system and method in a semiconductor manufacturing environment
PCT/US2003/021575 WO2004008491A2 (en) 2002-07-15 2003-07-10 Thermal processing system and configurable vertical chamber
PCT/US2003/021646 WO2004008008A2 (en) 2002-07-15 2003-07-10 Control of a gaseous environment in a wafer loading chamber

Family Applications After (5)

Application Number Title Priority Date Filing Date
PCT/US2003/021641 WO2004007105A1 (en) 2002-07-15 2003-07-10 Apparatus and method for backfilling a semiconductor wafer process chamber
PCT/US2003/021644 WO2004007800A1 (en) 2002-07-15 2003-07-10 Thermal processing apparatus and method for evacuating a process chamber
PCT/US2003/021642 WO2004008493A2 (en) 2002-07-15 2003-07-10 Method and apparatus for supporting semiconductor wafers
PCT/US2003/021645 WO2004008052A2 (en) 2002-07-15 2003-07-10 System and method for cooling a thermal processing apparatus
PCT/US2003/021973 WO2004007318A2 (en) 2002-07-15 2003-07-15 Loadport apparatus and method for use thereof

Country Status (6)

Country Link
EP (2) EP1540258A1 (en)
JP (2) JP2005533378A (en)
CN (1) CN1643322A (en)
AU (9) AU2003253873A1 (en)
TW (9) TW200416774A (en)
WO (9) WO2004008494A2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL1030360C2 (en) * 2005-11-07 2007-05-08 Holding Mij Wilro B V Furnace and method for the production of photovoltaic solar cells using a diffusion process.
WO2007098438A2 (en) * 2006-02-17 2007-08-30 Aviza Technology, Inc. Direct liquid injector device
US20170207078A1 (en) * 2016-01-15 2017-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. Atomic layer deposition apparatus and semiconductor process
US11407000B2 (en) 2019-09-23 2022-08-09 S. C. Johnson & Son, Inc. Volatile material dispenser

Families Citing this family (324)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9051641B2 (en) 2001-07-25 2015-06-09 Applied Materials, Inc. Cobalt deposition on barrier surfaces
US20090004850A1 (en) 2001-07-25 2009-01-01 Seshadri Ganguli Process for forming cobalt and cobalt silicide materials in tungsten contact applications
US6916398B2 (en) 2001-10-26 2005-07-12 Applied Materials, Inc. Gas delivery apparatus and method for atomic layer deposition
US7966969B2 (en) * 2004-09-22 2011-06-28 Asm International N.V. Deposition of TiN films in a batch reactor
US7427571B2 (en) 2004-10-15 2008-09-23 Asm International, N.V. Reactor design for reduced particulate generation
TWI332532B (en) 2005-11-04 2010-11-01 Applied Materials Inc Apparatus and process for plasma-enhanced atomic layer deposition
WO2007099387A1 (en) 2006-03-03 2007-09-07 Mymetics Corporation Virosome-like vesicles comprising gp41-derived antigens
US7691757B2 (en) 2006-06-22 2010-04-06 Asm International N.V. Deposition of complex nitride films
DE102007058053B4 (en) * 2007-11-30 2009-10-15 Von Ardenne Anlagentechnik Gmbh Diffusion furnace and method for generating a gas flow
US9157150B2 (en) * 2007-12-04 2015-10-13 Cypress Semiconductor Corporation Method of operating a processing chamber used in forming electronic devices
JP4885901B2 (en) * 2008-03-31 2012-02-29 株式会社山武 Flow control system
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US7833906B2 (en) 2008-12-11 2010-11-16 Asm International N.V. Titanium silicon nitride deposition
US8136618B2 (en) 2009-01-21 2012-03-20 The Raymond Corporation Cyclonic motor cooling for material handling vehicles
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
JP5794497B2 (en) 2010-06-08 2015-10-14 国立研究開発法人産業技術総合研究所 Linkage system
KR101877494B1 (en) * 2010-12-24 2018-07-13 엘지이노텍 주식회사 Vacuum heat treatment apparatus
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US9018567B2 (en) 2011-07-13 2015-04-28 Asm International N.V. Wafer processing apparatus with heated, rotating substrate support
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US9147584B2 (en) * 2011-11-16 2015-09-29 Taiwan Semiconductor Manufacturing Company, Ltd. Rotating curing
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
KR101440307B1 (en) * 2012-09-17 2014-09-18 주식회사 유진테크 Apparatus for processing substrate
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US10177014B2 (en) * 2012-12-14 2019-01-08 Applied Materials, Inc. Thermal radiation barrier for substrate processing chamber components
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
WO2014151475A1 (en) * 2013-03-15 2014-09-25 Watkins Bobby G Ii Flow control and gas metering process
US9240412B2 (en) 2013-09-27 2016-01-19 Asm Ip Holding B.V. Semiconductor structure and device and methods of forming same using selective epitaxial process
US20160348240A1 (en) * 2014-01-27 2016-12-01 Applied Materials, Inc High speed epi system and chamber concepts
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9543171B2 (en) * 2014-06-17 2017-01-10 Lam Research Corporation Auto-correction of malfunctioning thermal control element in a temperature control plate of a semiconductor substrate support assembly that includes deactivating the malfunctioning thermal control element and modifying a power level of at least one functioning thermal control element
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
KR102263121B1 (en) 2014-12-22 2021-06-09 에이에스엠 아이피 홀딩 비.브이. Semiconductor device and manufacuring method thereof
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
TWI642137B (en) * 2015-08-04 2018-11-21 日商日立國際電氣股份有限公司 Substrate processing apparatus, reaction container, and manufacturing method of semiconductor device
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
WO2017130268A1 (en) * 2016-01-25 2017-08-03 三菱電機株式会社 Control apparatus
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US9892913B2 (en) 2016-03-24 2018-02-13 Asm Ip Holding B.V. Radial and thickness control via biased multi-port injection settings
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
KR102592471B1 (en) 2016-05-17 2023-10-20 에이에스엠 아이피 홀딩 비.브이. Method of forming metal interconnection and method of fabricating semiconductor device using the same
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
KR102532607B1 (en) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus and method of operating the same
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
KR102613349B1 (en) 2016-08-25 2023-12-14 에이에스엠 아이피 홀딩 비.브이. Exhaust apparatus and substrate processing apparatus and thin film fabricating method using the same
FR3057391B1 (en) * 2016-10-11 2019-03-29 Soitec THERMAL TREATMENT EQUIPMENT WITH COLLECTING DEVICE
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
KR102546317B1 (en) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. Gas supply unit and substrate processing apparatus including the same
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
KR20180068582A (en) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
KR20180070971A (en) 2016-12-19 2018-06-27 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
JP6736755B2 (en) * 2017-02-17 2020-08-05 株式会社Kokusai Electric Substrate processing apparatus, semiconductor device manufacturing method and program
JP7158133B2 (en) 2017-03-03 2022-10-21 アプライド マテリアルズ インコーポレイテッド Atmosphere-controlled transfer module and processing system
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
USD876504S1 (en) 2017-04-03 2020-02-25 Asm Ip Holding B.V. Exhaust flow control ring for semiconductor deposition apparatus
KR102457289B1 (en) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. Method for depositing a thin film and manufacturing a semiconductor device
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
TWI629441B (en) 2017-07-07 2018-07-11 寶成工業股份有限公司 Smart oven
KR20190009245A (en) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. Methods for forming a semiconductor device structure and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
KR102491945B1 (en) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
KR102630301B1 (en) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
SG11202003438QA (en) * 2017-11-16 2020-05-28 Applied Materials Inc High pressure steam anneal processing apparatus
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
KR102443047B1 (en) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. Method of processing a substrate and a device manufactured by the same
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
KR102597978B1 (en) 2017-11-27 2023-11-06 에이에스엠 아이피 홀딩 비.브이. Storage device for storing wafer cassettes for use with batch furnaces
CN111344522B (en) 2017-11-27 2022-04-12 阿斯莫Ip控股公司 Including clean mini-environment device
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
TW202325889A (en) 2018-01-19 2023-07-01 荷蘭商Asm 智慧財產控股公司 Deposition method
CN111630203A (en) 2018-01-19 2020-09-04 Asm Ip私人控股有限公司 Method for depositing gap filling layer by plasma auxiliary deposition
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
EP3737779A1 (en) 2018-02-14 2020-11-18 ASM IP Holding B.V. A method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
KR102636427B1 (en) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. Substrate processing method and apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
KR102646467B1 (en) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102501472B1 (en) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. Substrate processing method
TW202344708A (en) 2018-05-08 2023-11-16 荷蘭商Asm Ip私人控股有限公司 Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
TWI816783B (en) 2018-05-11 2023-10-01 荷蘭商Asm 智慧財產控股公司 Methods for forming a doped metal carbide film on a substrate and related semiconductor device structures
KR102596988B1 (en) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. Method of processing a substrate and a device manufactured by the same
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
KR102568797B1 (en) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. Substrate processing system
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
WO2020003000A1 (en) 2018-06-27 2020-01-02 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
KR20200002519A (en) 2018-06-29 2020-01-08 에이에스엠 아이피 홀딩 비.브이. Method for depositing a thin film and manufacturing a semiconductor device
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
JP7206678B2 (en) * 2018-07-30 2023-01-18 Tdk株式会社 Load port device, semiconductor manufacturing device, and method for controlling atmosphere in pod
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
KR20200030162A (en) 2018-09-11 2020-03-20 에이에스엠 아이피 홀딩 비.브이. Method for deposition of a thin film
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
CN110970344A (en) 2018-10-01 2020-04-07 Asm Ip控股有限公司 Substrate holding apparatus, system including the same, and method of using the same
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (en) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. Substrate support unit and apparatuses for depositing thin film and processing the substrate including the same
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102605121B1 (en) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus and substrate processing method
KR102546322B1 (en) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus and substrate processing method
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (en) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. Substrate support unit and substrate processing apparatus including the same
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (en) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. A method for cleaning a substrate processing apparatus
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
JP2020096183A (en) 2018-12-14 2020-06-18 エーエスエム・アイピー・ホールディング・ベー・フェー Method of forming device structure using selective deposition of gallium nitride, and system for the same
JP7203588B2 (en) * 2018-12-17 2023-01-13 東京エレクトロン株式会社 Heat treatment equipment
TWI819180B (en) 2019-01-17 2023-10-21 荷蘭商Asm 智慧財產控股公司 Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
KR20200091543A (en) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. Semiconductor processing device
CN111524788B (en) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 Method for topologically selective film formation of silicon oxide
TW202104632A (en) 2019-02-20 2021-02-01 荷蘭商Asm Ip私人控股有限公司 Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
KR102626263B1 (en) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. Cyclical deposition method including treatment step and apparatus for same
TW202044325A (en) 2019-02-20 2020-12-01 荷蘭商Asm Ip私人控股有限公司 Method of filling a recess formed within a surface of a substrate, semiconductor structure formed according to the method, and semiconductor processing apparatus
KR20200102357A (en) 2019-02-20 2020-08-31 에이에스엠 아이피 홀딩 비.브이. Apparatus and methods for plug fill deposition in 3-d nand applications
TW202100794A (en) 2019-02-22 2021-01-01 荷蘭商Asm Ip私人控股有限公司 Substrate processing apparatus and method for processing substrate
KR20200108242A (en) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. Method for Selective Deposition of Silicon Nitride Layer and Structure Including Selectively-Deposited Silicon Nitride Layer
KR20200108248A (en) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. STRUCTURE INCLUDING SiOCN LAYER AND METHOD OF FORMING SAME
KR20200108243A (en) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. Structure Including SiOC Layer and Method of Forming Same
JP2020167398A (en) 2019-03-28 2020-10-08 エーエスエム・アイピー・ホールディング・ベー・フェー Door opener and substrate processing apparatus provided therewith
KR20200116855A (en) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. Method of manufacturing semiconductor device
KR20200123380A (en) 2019-04-19 2020-10-29 에이에스엠 아이피 홀딩 비.브이. Layer forming method and apparatus
KR20200125453A (en) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. Gas-phase reactor system and method of using same
KR20200130118A (en) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. Method for Reforming Amorphous Carbon Polymer Film
KR20200130121A (en) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. Chemical source vessel with dip tube
KR20200130652A (en) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. Method of depositing material onto a surface and structure formed according to the method
JP2020188255A (en) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. Wafer boat handling device, vertical batch furnace, and method
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141003A (en) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. Gas-phase reactor system including a gas detector
KR20200143254A (en) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. Method of forming an electronic structure using an reforming gas, system for performing the method, and structure formed using the method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (en) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. Temperature control assembly for substrate processing apparatus and method of using same
JP2021015791A (en) 2019-07-09 2021-02-12 エーエスエム アイピー ホールディング ビー.ブイ. Plasma device and substrate processing method using coaxial waveguide
CN112216646A (en) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 Substrate supporting assembly and substrate processing device comprising same
KR20210010307A (en) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
KR20210010820A (en) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. Methods of forming silicon germanium structures
KR20210010816A (en) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. Radical assist ignition plasma system and method
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
CN112242296A (en) 2019-07-19 2021-01-19 Asm Ip私人控股有限公司 Method of forming topologically controlled amorphous carbon polymer films
CN112309843A (en) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 Selective deposition method for achieving high dopant doping
CN112309900A (en) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 Substrate processing apparatus
CN112309899A (en) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 Substrate processing apparatus
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
KR20210018759A (en) 2019-08-05 2021-02-18 에이에스엠 아이피 홀딩 비.브이. Liquid level sensor for a chemical source vessel
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
JP2021031769A (en) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー.ブイ. Production apparatus of mixed gas of film deposition raw material and film deposition apparatus
KR20210024423A (en) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. Method for forming a structure with a hole
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
KR20210024420A (en) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210029090A (en) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. Methods for selective deposition using a sacrificial capping layer
KR20210029663A (en) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (en) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 Method for forming topologically selective silicon oxide film by cyclic plasma enhanced deposition process
TW202129060A (en) 2019-10-08 2021-08-01 荷蘭商Asm Ip控股公司 Substrate processing device, and substrate processing method
KR20210043460A (en) 2019-10-10 2021-04-21 에이에스엠 아이피 홀딩 비.브이. Method of forming a photoresist underlayer and structure including same
KR20210045930A (en) 2019-10-16 2021-04-27 에이에스엠 아이피 홀딩 비.브이. Method of Topology-Selective Film Formation of Silicon Oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (en) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. Apparatus and methods for selectively etching films
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (en) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (en) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
KR20210065848A (en) 2019-11-26 2021-06-04 에이에스엠 아이피 홀딩 비.브이. Methods for selectivley forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112951697A (en) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 Substrate processing apparatus
CN112885693A (en) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 Substrate processing apparatus
CN112885692A (en) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 Substrate processing apparatus
JP2021090042A (en) 2019-12-02 2021-06-10 エーエスエム アイピー ホールディング ビー.ブイ. Substrate processing apparatus and substrate processing method
KR20210070898A (en) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
TW202125596A (en) 2019-12-17 2021-07-01 荷蘭商Asm Ip私人控股有限公司 Method of forming vanadium nitride layer and structure including the vanadium nitride layer
KR20210080214A (en) 2019-12-19 2021-06-30 에이에스엠 아이피 홀딩 비.브이. Methods for filling a gap feature on a substrate and related semiconductor structures
JP2021109175A (en) 2020-01-06 2021-08-02 エーエスエム・アイピー・ホールディング・ベー・フェー Gas supply assembly, components thereof, and reactor system including the same
KR20210095050A (en) 2020-01-20 2021-07-30 에이에스엠 아이피 홀딩 비.브이. Method of forming thin film and method of modifying surface of thin film
TW202130846A (en) 2020-02-03 2021-08-16 荷蘭商Asm Ip私人控股有限公司 Method of forming structures including a vanadium or indium layer
TW202146882A (en) 2020-02-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 Method of verifying an article, apparatus for verifying an article, and system for verifying a reaction chamber
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
KR20210116240A (en) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. Substrate handling device with adjustable joints
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
KR20210117157A (en) 2020-03-12 2021-09-28 에이에스엠 아이피 홀딩 비.브이. Method for Fabricating Layer Structure Having Target Topological Profile
KR20210124042A (en) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. Thin film forming method
TW202146689A (en) 2020-04-03 2021-12-16 荷蘭商Asm Ip控股公司 Method for forming barrier layer and method for manufacturing semiconductor device
TW202145344A (en) 2020-04-08 2021-12-01 荷蘭商Asm Ip私人控股有限公司 Apparatus and methods for selectively etching silcon oxide films
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
KR20210132605A (en) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. Vertical batch furnace assembly comprising a cooling gas supply
KR20210132600A (en) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
KR20210134226A (en) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. Solid source precursor vessel
KR20210134869A (en) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Fast FOUP swapping with a FOUP handler
KR20210141379A (en) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. Laser alignment fixture for a reactor system
KR20210143653A (en) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
KR20210145078A (en) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. Structures including multiple carbon layers and methods of forming and using same
TW202201602A (en) 2020-05-29 2022-01-01 荷蘭商Asm Ip私人控股有限公司 Substrate processing device
TW202218133A (en) 2020-06-24 2022-05-01 荷蘭商Asm Ip私人控股有限公司 Method for forming a layer provided with silicon
TW202217953A (en) 2020-06-30 2022-05-01 荷蘭商Asm Ip私人控股有限公司 Substrate processing method
TW202219628A (en) 2020-07-17 2022-05-16 荷蘭商Asm Ip私人控股有限公司 Structures and methods for use in photolithography
TW202204662A (en) 2020-07-20 2022-02-01 荷蘭商Asm Ip私人控股有限公司 Method and system for depositing molybdenum layers
KR20220027026A (en) 2020-08-26 2022-03-07 에이에스엠 아이피 홀딩 비.브이. Method and system for forming metal silicon oxide and metal silicon oxynitride
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
TW202229613A (en) 2020-10-14 2022-08-01 荷蘭商Asm Ip私人控股有限公司 Method of depositing material on stepped structure
KR20220053482A (en) 2020-10-22 2022-04-29 에이에스엠 아이피 홀딩 비.브이. Method of depositing vanadium metal, structure, device and a deposition assembly
TW202223136A (en) 2020-10-28 2022-06-16 荷蘭商Asm Ip私人控股有限公司 Method for forming layer on substrate, and semiconductor processing system
TW202235675A (en) 2020-11-30 2022-09-16 荷蘭商Asm Ip私人控股有限公司 Injector, and substrate processing apparatus
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
TW202231903A (en) 2020-12-22 2022-08-16 荷蘭商Asm Ip私人控股有限公司 Transition metal deposition method, transition metal layer, and deposition assembly for depositing transition metal on substrate
GB2610156A (en) * 2021-04-29 2023-03-01 Edwards Ltd Semiconductor processing system
FI129948B (en) * 2021-05-10 2022-11-15 Picosun Oy Substrate processing apparatus and method
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
KR102444786B1 (en) * 2021-12-23 2022-09-19 주식회사 에이치피에스피 High Pressure Chamber to Improve Cooling Efficiency
CN114990299B (en) * 2022-08-01 2022-10-04 兴化市天泰合金制品科技有限公司 Heat treatment device for preparing nodular cast iron alloy

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5001327A (en) * 1987-09-11 1991-03-19 Hitachi, Ltd. Apparatus and method for performing heat treatment on semiconductor wafers
US5900177A (en) * 1997-06-11 1999-05-04 Eaton Corporation Furnace sidewall temperature control system
US6414277B1 (en) * 2000-01-21 2002-07-02 Shinku Giken Co., Ltd. Ultra-high-temperature heat treatment apparatus

Family Cites Families (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4401689A (en) * 1980-01-31 1983-08-30 Rca Corporation Radiation heated reactor process for chemical vapor deposition on substrates
EP0164928A3 (en) * 1984-06-04 1987-07-29 Texas Instruments Incorporated Vertical hot wall cvd reactor
JPS61191015A (en) * 1985-02-20 1986-08-25 Hitachi Ltd Semiconductor vapor growth and equipment thereof
US4753192A (en) * 1987-01-08 1988-06-28 Btu Engineering Corporation Movable core fast cool-down furnace
JPH088220B2 (en) * 1988-09-05 1996-01-29 株式会社日立製作所 Semiconductor wafer heat treatment apparatus and heat treatment method
EP0308946B1 (en) * 1987-09-22 1993-11-24 Nec Corporation Chemical vapor deposition apparatus for obtaining high quality epitaxial layer with uniform film thickness
US4787844A (en) * 1987-12-02 1988-11-29 Gas Research Institute Seal arrangement for high temperature furnace applications
US4914276A (en) * 1988-05-12 1990-04-03 Princeton Scientific Enterprises, Inc. Efficient high temperature radiant furnace
JP2654996B2 (en) * 1988-08-17 1997-09-17 東京エレクトロン株式会社 Vertical heat treatment equipment
JPH02130943A (en) * 1988-11-11 1990-05-18 Tel Sagami Ltd Accommodation jig
US5160545A (en) * 1989-02-03 1992-11-03 Applied Materials, Inc. Method and apparatus for epitaxial deposition
DE3906075A1 (en) * 1989-02-27 1990-08-30 Soehlbrand Heinrich Dr Dipl Ch METHOD FOR THERMALLY TREATING SEMICONDUCTOR MATERIALS AND DEVICE FOR CARRYING OUT THE SAME
US5207835A (en) * 1989-02-28 1993-05-04 Moore Epitaxial, Inc. High capacity epitaxial reactor
US5127365A (en) * 1990-02-27 1992-07-07 Kabushiki Kaisha Toshiba Vertical heat-treatment apparatus for semiconductor parts
JP2819073B2 (en) * 1991-04-25 1998-10-30 東京エレクトロン株式会社 Method of forming doped thin film
JP3040212B2 (en) * 1991-09-05 2000-05-15 株式会社東芝 Vapor phase growth equipment
DE69221152T2 (en) * 1992-05-15 1998-02-19 Shinetsu Quartz Prod VERTICAL HEAT TREATMENT DEVICE AND HEAT INSULATION MATERIAL
US5383984A (en) * 1992-06-17 1995-01-24 Tokyo Electron Limited Plasma processing apparatus etching tunnel-type
JP3024449B2 (en) * 1993-07-24 2000-03-21 ヤマハ株式会社 Vertical heat treatment furnace and heat treatment method
US5706627A (en) * 1994-02-02 1998-01-13 Tetra Laval Holdings & Finance, S.A. Control system for a packaging machine
JPH088194A (en) * 1994-06-16 1996-01-12 Kishimoto Sangyo Kk Gas phase growth mechanism and heating apparatus in heat treatment mechanism
US6361618B1 (en) * 1994-07-20 2002-03-26 Applied Materials, Inc. Methods and apparatus for forming and maintaining high vacuum environments
US5724786A (en) * 1994-09-28 1998-03-10 Tetra Laval Holdings & Finance S.A. Control system having error correcting apparatus
JP2732224B2 (en) * 1994-09-30 1998-03-25 信越半導体株式会社 Wafer support boat
JPH08213446A (en) * 1994-12-08 1996-08-20 Tokyo Electron Ltd Processing equipment
US5830277A (en) * 1995-05-26 1998-11-03 Mattson Technology, Inc. Thermal processing system with supplemental resistive heater and shielded optical pyrometry
JP2001524259A (en) * 1995-07-10 2001-11-27 シーヴィシー、プラダクツ、インク Programmable ultra-clean electromagnetic substrate rotating apparatus and method for microelectronics manufacturing equipment
JP3471144B2 (en) * 1995-09-06 2003-11-25 東京エレクトロン株式会社 Vertical heat treatment apparatus, heat insulation structure thereof, and heat shield plate
JP3423131B2 (en) * 1995-11-20 2003-07-07 東京エレクトロン株式会社 Heat treatment equipment and treatment equipment
JPH09306980A (en) * 1996-05-17 1997-11-28 Asahi Glass Co Ltd Vertical wafer boat
US20010052359A1 (en) * 1997-02-21 2001-12-20 Masayoshi Ikeda Method of substrate temperature control and method of assessing substrate temperature controllability
US5846073A (en) * 1997-03-07 1998-12-08 Semitool, Inc. Semiconductor furnace processing vessel base
US5826406A (en) * 1997-05-01 1998-10-27 Tetra Laval Holdings & Finance, S.A. Servo-controlled conveyor system for carrying liquid filled containers
US6352594B2 (en) * 1997-08-11 2002-03-05 Torrex Method and apparatus for improved chemical vapor deposition processes using tunable temperature controlled gas injectors
WO1999036587A1 (en) * 1998-01-15 1999-07-22 Torrex Equipment Corporation Vertical plasma enhanced process apparatus and method
US6204194B1 (en) * 1998-01-16 2001-03-20 F.T.L. Co., Ltd. Method and apparatus for producing a semiconductor device
US6059567A (en) * 1998-02-10 2000-05-09 Silicon Valley Group, Inc. Semiconductor thermal processor with recirculating heater exhaust cooling system
US6051113A (en) * 1998-04-27 2000-04-18 Cvc Products, Inc. Apparatus and method for multi-target physical-vapor deposition of a multi-layer material structure using target indexing
US6030208A (en) * 1998-06-09 2000-02-29 Semitool, Inc. Thermal processor
DE69940161D1 (en) * 1998-06-18 2009-02-05 Kline & Walker L L C AUTOMATIC DEVICE FOR MONITORING EQUIPPED OPTIONS AND MACHINES WORLDWIDE
JP3487497B2 (en) * 1998-06-24 2004-01-19 岩手東芝エレクトロニクス株式会社 Object to be processed accommodation jig and heat treatment apparatus using the same
US6537461B1 (en) * 2000-04-24 2003-03-25 Hitachi, Ltd. Process for treating solid surface and substrate surface
US6140833A (en) * 1998-11-16 2000-10-31 Siemens Aktiengesellschaft In-situ measurement method and apparatus for semiconductor processing
US6449428B2 (en) * 1998-12-11 2002-09-10 Mattson Technology Corp. Gas driven rotating susceptor for rapid thermal processing (RTP) system
US6193811B1 (en) * 1999-03-03 2001-02-27 Applied Materials, Inc. Method for improved chamber bake-out and cool-down
US6450116B1 (en) * 1999-04-22 2002-09-17 Applied Materials, Inc. Apparatus for exposing a substrate to plasma radicals
JP2000311862A (en) * 1999-04-28 2000-11-07 Kokusai Electric Co Ltd Substrate treating system
US6121581A (en) * 1999-07-09 2000-09-19 Applied Materials, Inc. Semiconductor processing system
US6391163B1 (en) * 1999-09-27 2002-05-21 Applied Materials, Inc. Method of enhancing hardness of sputter deposited copper films
US20020069970A1 (en) * 2000-03-07 2002-06-13 Applied Materials, Inc. Temperature controlled semiconductor processing chamber liner
US6537707B1 (en) * 2000-03-15 2003-03-25 Agilent Technologies, Inc. Two-stage roughing and controlled deposition rates for fabricating laser ablation masks
US6641350B2 (en) * 2000-04-17 2003-11-04 Hitachi Kokusai Electric Inc. Dual loading port semiconductor processing equipment
JP2002083780A (en) * 2000-09-05 2002-03-22 Hitachi Kokusai Electric Inc Semiconductor manufacturing apparatus
US6589350B1 (en) * 2000-09-08 2003-07-08 Advanced Micro Devices, Inc. Vacuum processing chamber with controlled gas supply valve
US20030082031A1 (en) * 2001-10-30 2003-05-01 Olivier Vatel Wafer handling device and method for testing wafers
JP4873820B2 (en) * 2002-04-01 2012-02-08 株式会社エフティーエル Semiconductor device manufacturing equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5001327A (en) * 1987-09-11 1991-03-19 Hitachi, Ltd. Apparatus and method for performing heat treatment on semiconductor wafers
US5900177A (en) * 1997-06-11 1999-05-04 Eaton Corporation Furnace sidewall temperature control system
US6414277B1 (en) * 2000-01-21 2002-07-02 Shinku Giken Co., Ltd. Ultra-high-temperature heat treatment apparatus

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL1030360C2 (en) * 2005-11-07 2007-05-08 Holding Mij Wilro B V Furnace and method for the production of photovoltaic solar cells using a diffusion process.
WO2007053016A2 (en) * 2005-11-07 2007-05-10 Holdingmij. Wilro B.V. Surface and method for the manufacture of photovolataic cells using a diffusion process
WO2007053016A3 (en) * 2005-11-07 2007-10-25 Holdingmij Wilro B V Surface and method for the manufacture of photovolataic cells using a diffusion process
WO2007098438A2 (en) * 2006-02-17 2007-08-30 Aviza Technology, Inc. Direct liquid injector device
WO2007098438A3 (en) * 2006-02-17 2008-01-10 Aviza Tech Inc Direct liquid injector device
US20170207078A1 (en) * 2016-01-15 2017-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. Atomic layer deposition apparatus and semiconductor process
US11407000B2 (en) 2019-09-23 2022-08-09 S. C. Johnson & Son, Inc. Volatile material dispenser

Also Published As

Publication number Publication date
WO2004008052A2 (en) 2004-01-22
WO2004008493A9 (en) 2004-07-22
TW200416774A (en) 2004-09-01
WO2004008494A2 (en) 2004-01-22
WO2004007800A9 (en) 2005-01-13
TW200416775A (en) 2004-09-01
WO2004008491A2 (en) 2004-01-22
WO2004007318A2 (en) 2004-01-22
TW200406818A (en) 2004-05-01
AU2003253907A1 (en) 2004-02-02
AU2003249030A8 (en) 2004-02-02
WO2004007800A1 (en) 2004-01-22
WO2004008494A3 (en) 2005-04-21
TW200405401A (en) 2004-04-01
WO2004008493A3 (en) 2004-05-27
TW200411717A (en) 2004-07-01
WO2004007105A1 (en) 2004-01-22
AU2003259104A8 (en) 2004-02-02
AU2003249029A1 (en) 2004-02-02
WO2004008493A2 (en) 2004-01-22
AU2003249028A1 (en) 2004-02-02
JP2005533378A (en) 2005-11-04
AU2003259104A1 (en) 2004-02-02
EP1522090A2 (en) 2005-04-13
WO2004008008A3 (en) 2004-12-16
AU2003256486A1 (en) 2004-02-02
JP2005533232A (en) 2005-11-04
TW200419890A (en) 2004-10-01
TW200409176A (en) 2004-06-01
AU2003253907A8 (en) 2004-02-02
AU2003256487A1 (en) 2004-02-02
EP1522090A4 (en) 2006-04-05
AU2003249029A8 (en) 2004-02-02
AU2003253874A8 (en) 2004-02-02
CN1643322A (en) 2005-07-20
TW200416773A (en) 2004-09-01
AU2003253874A1 (en) 2004-02-02
WO2004008054A9 (en) 2005-01-13
AU2003253873A1 (en) 2004-02-02
WO2004008491A3 (en) 2004-06-03
TW200411960A (en) 2004-07-01
WO2004008052A3 (en) 2004-05-13
AU2003256486A8 (en) 2004-02-02
AU2003249030A1 (en) 2004-02-02
WO2004007318A3 (en) 2004-08-05
EP1540258A1 (en) 2005-06-15
WO2004008008A2 (en) 2004-01-22

Similar Documents

Publication Publication Date Title
WO2004008054A1 (en) Variable heater element for low to high temperature ranges
CN106469666B (en) Base and matrix processing equipment
JPH03108323A (en) Heating method for heater assembly and substrate
EP1182692B1 (en) Heat-processing apparatus and method for semiconductor processing
JP5897081B2 (en) Reactor for processing multiple wafers simultaneously
EP2643495B1 (en) Thermal gradient enhanced chemical vapour deposition (tge-cvd)
CN101490491B (en) Device and method for heating semiconductor processing chamber
US7432475B2 (en) Vertical heat treatment device and method controlling the same
KR19980018624A (en) Chemical vapor deposition, plasma enhanced chemical vapor deposition or method and apparatus for treating exhaust gas from plasma etch reactor
US6303906B1 (en) Resistively heated single wafer furnace
WO2012125275A2 (en) Apparatus for monitoring and controlling substrate temperature
KR102176181B1 (en) Modular substrate heater for efficient thermal cycling
US20060083495A1 (en) Variable heater element for low to high temperature ranges
EP2294244B1 (en) Thermal gradient enhanced chemical vapour deposition.
US11837478B2 (en) Temperature-controllable process chambers, electronic device processing systems, and manufacturing methods
US6508062B2 (en) Thermal exchanger for a wafer chuck
US6759633B2 (en) Heat treating device
JP2011021253A (en) Film deposition system
KR100728408B1 (en) Forced convection assisted rapid thermal furnace
JP2011029597A (en) Method of manufacturing semiconductor device, method of manufacturing substrate, and substrate treatment apparatus
KR20010101007A (en) Apparatus and method for thermal processing of semiconductor substrates
US5279671A (en) Thermal vapor deposition apparatus
JP2013175641A (en) Substrate processing apparatus and substrate processing method
JP2011204945A (en) Substrate treatment apparatus and method of manufacturing semiconductor device

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
COP Corrected version of pamphlet

Free format text: PAGES 1/12-12/12, DRAWINGS, REPLACED BY NEW PAGES 1/12-12/12; DUE TO LATE TRANSMITTAL BY THE RECEIVING OFFICE

WWE Wipo information: entry into national phase

Ref document number: 2004521645

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 2003764467

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2006083495

Country of ref document: US

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 10521283

Country of ref document: US

WWP Wipo information: published in national office

Ref document number: 2003764467

Country of ref document: EP

WWW Wipo information: withdrawn in national office

Ref document number: 2003764467

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 10521283

Country of ref document: US