WO2002095427A1

WO2002095427A1 - Apparatus and method for measuring power consumption using voltage variation of capacitors

Info

Publication number: WO2002095427A1
Application number: PCT/KR2001/000853
Authority: WO
Inventors: Nae-Hyuck Chang
Original assignee: Nae-Hyuck Chang
Priority date: 2001-05-23
Filing date: 2001-05-23
Publication date: 2002-11-28

Abstract

Disclosed is an apparatus and method for measuring power consumption using voltage variation of capacitor which comprises a clock signal generator for generating clock signals and supplying first and second powers having opposite phases; four CMOS bus switches, two of which coupled to the first power and other two of which coupled to the second power, for connecting or disconnecting a circuit according to the clock signals; and two capacitors, each of which coupled to a node of the two CMOS bus switches, for supplying power or functioning as a power of a power measuring target. According to the present invention, the power can be easily measured without bandwidth limits and a problem of current sparks and by measuring the voltages at the capacitors only twice.

Description

Apparatus and Method for Measuring Power Consumption Using Viltage Variation of Capacitors

BACKGROUND OF THE INVENTION

(a) Field of the Invention

The present invention relates to an apparatus and method for measuring power consumption. More specifically, the present invention relates to an apparatus and method for measuring power consumption using voltage variations of capacitors.

(b) Description of the Related Art

In the conventional power measuring methods, a user provides a resistor between circuits of a power device, and uses a voltage drop generated from the resistor to measure power, which is applicable to cases when the power is uniformly consumed. However, since the power consumption of digital circuits is greatly varied within a short time frame, the user generally measures mean power of the digital circuits, and the above- noted conventional methods fail to obtain accurate values of mean power

generated by the digital circuits. The existing power consumption measuring apparatuses using the above-described methods include digital multi-meters and oscilloscopes.

Since digital multi-meters have a slow response time, they cannot measure

power consumption of high sampling rates, but they can measure the same of limited bandwidths. Oscilloscopes can measure power consumption of

high sampling rates, but they may obtain erroneous values when incidents such as current sparks occur in the digital systems.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide an apparatus and method for measuring more accurate power consumption using voltage variations of capacitors with no limitations of bandwidths.

In one aspect of the present invention, an apparatus for measuring power consumption using voltage variations of capacitors comprises: a clock signal generator 1 for generating clock signals and supplying powers Φl and Φ2 with opposite phases; four CMOS bus switches 2, 3, 4, and 5, two of which are coupled to the power Φl of the clock signal generator, and the other two of which are coupled to the power Φ2 having a phase opposite that of Φl for turning a circuit on and off according to the clock signals; and two capacitors 8 and 9 respectively coupled to nodes 6 and 7 between the CMOS bus switches, and being grounded, for supplying power of V_DD or functioning as power for a power consumption measuring circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the

invention, and, together with the description, serve to explain the principles of the invention:

FIG. 1 shows a configuration of a power consumption measuring apparatus according to a preferred embodiment of the present invention;

FIG. 2 shows waveforms at various nodes generated by the power consumption measuring apparatus; and

FIG. 3 shows a circuit diagram of the power consumption measuring apparatus according to a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following detailed description, only the preferred embodiment of the invention has been shown and described, simply by way of illustration of the best mode contemplated by the inventor(s) of carrying out the invention. As will be realized, the invention is capable of modification in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not restrictive.

The basic method for measuring power consumption according to a

preferred embodiment of the present invention is different from the conventional methods. In the embodiment of the present invention, a

predetermined voltage is charged to a capacitor, the capacitance of which is known; power charged to the capacitor is supplied to a target circuit for a clock signal period; and a voltage is measured after discharge to thereby find

power consumption during one clock signal period. In this instance, the period of a clock frequency is matched with that of the digital system. Referring to drawings, an apparatus and method for measuring power consumption will be described.

FIG. 1 shows a configuration of a power consumption measuring apparatus according to a preferred embodiment of the present invention, and FIG. 2 shows waveforms at various nodes generated by the power consumption measuring apparatus.

As shown by FIGs. 1 and 2, a clock signal generator supplies two powers with opposite phases, and the period of power waveforms is twice the clock frequency. The power Φl is coupled to CMOS bus switches 2 and 5, each diagonally facing together, and the power Φ2 is coupled to CMOS bus switches 3 and 4. The CMOS bus switches operate according to clock signals, and the first pair of CMOS bus switches 2 and 5 and the second pair of CMOS bus switches 3 and 4 operate alternately. That is, in the case the switches 2 and 5 are turned on when the clock signal is switched, the switches 3 and 4 are turned off, and the switches 2 and 5 are turned off and

the switches 3 and 4 are turned on in the next clock signal.

Referring to FIG. 2, Vco shows waveforms of a capacitor in the

CMOS bus switches 2 and 5, Vcι illustrates waveforms of a capacitor in the CMOS bus switches 3 and 4, and Vs denotes waveforms at the V_s terminal of FIG. 1. A process for generating the above-noted waveforms will now be described,. while analyzing the circuit of FIG. 1.

With reference to FIG. 2, in the state of from the point,21 to the point 22, the bus switches 2 and 5 coupled to the power Φl are turned on, and the bus switches 3 and 4 coupled to the power Φ2 are turned off. In this case, the capacitor Cs 8 coupled to the bus switch 2 is coupled to VDD, and the capacitor C_s 9 coupled to the bus switch 5 is coupled to a power consumption measuring circuit. Since the power Φl presently supplies power, the waveforms of Vco monotonically increase, and the waveforms of s are matched with those of Vco- In the state of from the point 22 to the point 23 during which the clock signal is switched, the bus switches 2 and 5 are turned off, and the bus switches 3 and 4 are turned on.. In this instance, the capacitor C_s 8 coupled to the bus switch 3 is coupled to the power consumption measuring circuit, and the capacitor Cs 9 coupled to the bus switch 4 is coupled to V D- Here, the power Φ2 supplies no power. Therefore, the capacitor Cs 8 functions as a power for a target circuit to thereby be discharged. Hence, the waveforms of Vci monotonically decrease,

and the waveforms of Vs in this case are matched with those of V_Cι. "ice" of

FIG. 2 represents the current that flows to a measuring target circuit. The

capacitor C_s functions as power, and accordingly, the current flows to the

circuit when the capacitor is discharged. The capacitor Cs is charged during the period of from the point 21 to

the point 22, and it is discharged during the period of from the point 22 to the point 23. In the preferred embodiment of the present invention, as described above, the power consumption is calculated on the basis that the amount of the voltage discharged by the capacitor is matched with the power consumed by the power consumption measuring circuit during a single clock period. Defining that the voltage when the capacitor is charged is V_s-(i), and the voltage when the capacitor is discharged is Vs+(i), the power consumed by the measuring circuit during a clock signal period is calculated as follows: Equation 1

As shown in FIG. 1 , the voltage of Vs is measured by a level shifter 10 and a fast A/D converter 12, and the value of V_s is converted into a digital value by the A/D converter 12. An FPGA vector generator is used to minimize interference phenomena occurring during the measuring process, and the value of Vs obtained in real-time is stored in an SRAM having a fast real-time storing speed. A communication adaptor 13 serially connects the obtained value of Vs with an application program of a computer that

calculates power. The voltage Vs is measured for each period. In this case, a

trigger for checking what period the values that are measured many times for each period correspond to is required. The computer calculates the actual

power consumption volume through equation 1 using the value of V_s converted by the A/D converter. Also, in order to more accurately measure the voltage, the voltage at the capacitor may be measured using two A/D

converters without measuring Vs+ and Vs.. Voltage variations measured for each period, values of important signals of the measuring target device, and power consumption volume calculated using them are stored altogether for convenient analysis.

The apparatus shown in FIG. 1 uses capacitors to measure power consumption according to the preferred embodiment of the present invention. That is, two switch pairs and two capacitors are provided to measure power in FIG. 1 , and further, n switch pairs and n capacitors may be used. FIG. 3 shows the basic circuit configuration for realizing the embodiment of the present invention. The switch 31 is turned on and the switch 32 is turned off at the time of charging the capacitor 33, and the switch 31 is turned off and the switch 32 is turned on at the time of discharging the capacitor 33, and accordingly, the capacitor 33 functions as power for the power measuring target apparatus, and measures the discharged voltage to thereby obtain power consumption volume. Therefore, when the circuit of FIG. 3 is defined to be a single basic block, and n basic blocks are provided, n switch pairs and n capacitors are provided to thus configure a power consumption measuring apparatus in which the n capacitors are alternately discharged to

the power consumption measuring apparatus. It is also possible to configure

a circuit simpler than the basic circuit of FIG. 3, and remove the switch 32 for coupling the capacitor to the power measuring target apparatus from the circuit to thereby form a power measuring apparatus including a switch and a capacitor.

As described above, the power consumption measuring apparatus

according to the preferred embodiment of the present invention measures the voltage variations, that is, moving volume of the charges twice during a single clock period to thereby easily obtain power consumption, and greatly reduces the amount of data compared to other voltage measuring methods with similar accuracies. Further, the apparatus has no bandwidth limits in the like manner of digital multi-meters, and it prevent errors caused by current sparks which may be generated in the transient state in the like manner of oscilloscopes since the initial voltage and the voltage after discharging are important values, and the voltage in the transient state is not important. The present invention is applicable to a method for measuring power consumption of a digital system that causes great variations of signals during a short period, such as a microprocessor.

While this invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed

embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the

appended claims.

Claims

WHAT IS CLAIMED IS:

1. An apparatus for measuring power consumption using voltage variations of capacitors, comprising: a clock signal generator 1 for generating clock signals and supplying powers Φl and Φ2 with opposite phases; four CMOS bus switches 2, 3, 4, and 5, two of which are coupled to the power Φl of the clock signal generator, and the other two of which are coupled to the power Φ2 having a phase opposite that of Φl , for turning a circuit on and off according to the clock signals; and two capacitors 8 and 9 respectively coupled to nodes 6 and 7 between the CMOS bus switches, and being grounded, for supplying power of VDD or functioning as power for a power consumption measuring circuit.

2. A method for measuring power consumption using measuring of voltage variations of capacitors, comprising: enabling the voltage V_s- and the charged capacitor to function as power for a power consumption measuring circuit to measure the voltage V_s+ after discharging when the capacitor is charged, and using the measured voltages Vs₊ and Vs. to obtain a total power consumption volume.

3. The apparatus of claim 1 , wherein the CMOS bus switches 2 and 5 are a pair, and the CMOS bus switches 3 and 4 are a pair, and they alternately turn the circuit on and off.

4. The method of claim 2, wherein when a digital system becomes a power measuring target apparatus, the charging and discharging period is matched with the system clock signal of the power measuring target apparatus, and a method for not coupling the capacitor to the power measuring circuit at the time of charging and coupling the capacitor to the power measuring target apparatus at the time of discharging is realized through switching means.

5. The method of claim 2, wherein the measured voltage value is converted into a digital value by an A/D converter, and the actual power consumption by using the digital value is calculated through a computer.

6. The method of claim 2, comprising a trigger function for checking what periods the measured voltages VS- and VS+ are matched with.

7. The method of claim 6, wherein the measured voltages Vs- and V_s+ at the capacitors, values of important signals of the power consumption measuring target device, and the power consumption volume calculated through a computer are stored in the computer and are processed for easy analysis of assistance of the trigger function.

8. An apparatus for measuring power consumption using voltage variations of capacitors, comprising: n blocks, each of which includes: a capacitor 33 for functioning as

power for a power consumption measuring apparatus after being charged

through power; a switch 31 for coupling the capacitor 33 to power; and a switch 32 for coupling the capacitor 33 to the power consumption measuring apparatus, the n blocks thereby including n switch pairs and n capacitors, and each capacitor alternately being discharged and supplying power to the power consumption measuring apparatus.

9. The apparatus of claim 8, wherein the switch 32 for coupling the capacitor 33 to the power consumption measuring apparatus is removed from the block and the removed portion is coupled so that the block comprises the switch 31 for coupling the power to the capacitor 33 and the capacitor 33.

10. The method of claim 2, wherein the voltages Vs+ and V_s- are not measured but the voltages at the capacitors are measured using two A/D converters so as to increase measurement accuracies.