WO2001028115A1 - Multichannel analyzer data storage, compression, and transfer - Google Patents
Multichannel analyzer data storage, compression, and transfer Download PDFInfo
- Publication number
- WO2001028115A1 WO2001028115A1 PCT/US2000/027057 US0027057W WO0128115A1 WO 2001028115 A1 WO2001028115 A1 WO 2001028115A1 US 0027057 W US0027057 W US 0027057W WO 0128115 A1 WO0128115 A1 WO 0128115A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- memory
- channel
- byte
- channels
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
- G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
- G01T1/16—Measuring radiation intensity
- G01T1/17—Circuit arrangements not adapted to a particular type of detector
Definitions
- the present invention relates to multichannel analyzers generally and, more particularly, to a novel multichannel analyzer that stores, compresses, and transfers data in a rapid manner
- Multichannel analyzers build a histogram that represents a pulse height distribution of radiation detector pulse signals For each pulse, the pulse height is measure using an analog-to-digital converter (ADC) The resulting digital value addresses an MCA memory location The memory locations represent the channels of the MCA The pointed channel is incremented by one count Each channel normally can store a large number of counts It is typical for each channel to use four bytes (double word) from the MCA memory space
- an MCA may have few thousands of channels, e g 1024, 2048, 4096. 8192 etc Thus, a large amount of data has to be transferred between the MCA and the host Often the interface has a limited bandwidth that limits the data update rate As a result, the visualization display lacks a real time update For example, when an RS 232 interface is used the display update can be in the order of few seconds The slow display update is a major obstacle when an operator feedback is required in the process of tuning the MCA or adjusting other components of the measurement setup To overcome this obstacle a scheme for storage, compression, transfer and decompression of the MCA data was developed, however, known multichannel analyzers still have a relatively slow display update
- the present invention achieves the above objects, among others, by providing, in a preferred embodiment, a method of operating a multichannel analyzer system, comprising receiving a detector signal and producing digital values representative of peak values of pulses in said detector signal, storing said digital values in channels in a memory, and compressing and transmitting data from only those said channels in said memory that have changed since a next previous transmission
- FIG. 2 is a schematic diagram showing the data storage concept of the invention
- Figure 3 is flow chart showing the algorithm to increment a single channel of memory
- Figure 4 is a flow chart of the compression algorithm for the case of four-byte channel content
- Figure 5 is a flow chart of the decompression algorithm for the compressed data of Figure 4.
- FIG. 1 illustrates a simplified block diagram of an MCA, generally indicated by the reference numeral 20 connected to a host computer 22
- MCA 20 a pulse-height analyzer 30 that produces a digital value corresponding to the peak of measured pulse processes the detector signal.
- the digital peak value is passed to a channel increment controller 40.
- the channel increment controller increments memory location(s) in an MCA memory 50 that is pointed by the digital peak value from the pulse height analyzer MCA memory 50 is dual accessed memory and its content can be read by memory read controller 60
- Memory read controller 60 reads the MCA memory, compresses data, and sends data to host computer 22
- Host computer 22 receives data and decompresses and stores them for visualization and further processing.
- Each channel of MCA 20 occupies a certain number of bytes of the MCA memory.
- the channel increment can be done on a byte, word, double word, and etc. basis. For simplicity, a byte increment scheme is considered.
- the key of this invention is that from the MCA memory an information unit (e.g. bit or byte) is reserved and associated with each channel or part of it (e.g. byte). This information unit is set every time a channel increments.
- the information unit serves as a flag that signals whether or not a channel (or a channel byte) has been changed and only data in channels that have changed since the last data transmission are compressed and sent to host computer 22.
- Figure 2 illustrates the memory organization and the channel increment flag concept of MCA 20 ( Figure 1 ).
- the data is stored in channels numbered from 0 to N.
- Each channels stores data in four bytes numbered from 0 to 3.
- Byte 0 is the least significant byte while byte 3 is the most significant byte.
- Each byte has 8 bits numbered from 0 to 7 - bit zero being the least significant bit.
- Bit 7 (grayed) of each byte is used as a byte increment flag. When a byte is incremented, this bit is forced to a predetermined state - flag rises. For clarity, in this particular example, logic one indicates a risen flag. That is, when the byte increments, its bit 7 is set to logic one.
- Counts of each channel are stored using bits 0 to 6 of each byte. As a result, the maximum number of counts per channel, in this example, is 2 2 - 1 .
- FIG. 3 A flow chart that shows the algorithm to increment a single channel of MCA memory 50 (Figure 1 ) is shown in Figure 3.
- a pulse height digital value is passed from pulse height analyzer 30 and is loaded in a channel pointer (ChnPtr). Initially a byte pointer (BytePtr) is set to 0 pointing to the first byte of a channel.
- bit 7 of the same byte is set to logic one If there is no carry' from the 7 data bits, the value of the byte is different than 128 and the channel increment process is terminated If the byte value is equal to 128, then the byte pointer is incremented and next byte of the channel is incremented This process continues until either there is no carry or all bytes have been incremented During channel incrementing, the read operation is suspended MCA memory 50 is read during the intervals between incrementing the channels
- MCA memory 50 The content of MCA memory 50 is read, compressed, and sent to host computer 22 ( Figure 1 ) by memory read controller 60
- bit 7 of the byte automatically is set to zero - the increment flag is cleared if it was set before the reading.
- the bytes represent signed 8 bit values That is, bit 7 is a sign bit A byte value that is negative indicates that the byte has been changed since last read If the byte value is positive or zero then the byte has not been modified since the last reading
- the compression algorithm is based on this ability to distinguish modified from unchanged channel bytes
- Figure 4 shows a flowchart of compression algorithm for the case of four-byte channel content with byte increment scheme
- the controller sends updated channel content between an initial channel (FIRST CHN) and an end channel (LAST CHN)
- the channel is pointed by the channel pointer / which can be changed in increments of mc
- Each byte of the channel is pointed by the byte pointer //
- a skip counter (SCNT) is used to indicate the number of unchanged channels to be skipped Initially, the skip counter is cleared A byte pointed by [/://] is read If the byte is not negative than the skip counter increments If the skip counter reaches 126, the skip counter is sent to the host and then is cleared
- the skip counter is sent to the host and then is cleared If the byte is negative and the skip counter is zero, then the skip counter is not sent to the host Then, in both cases, the negative byte is sent and the byte pointer increments Next byte of the channel content is read. If this byte is negative, a byte with content zero is sent to the host. The value zero has a special meaning indicating that the byte that follows is the next byte of the same channel. The process of sending channel bytes continues until all modified (incremented) bytes of the same channel are sent. When the modified bytes are sent or after incrementing the skip counter, the channel pointer increments. If the last channel is reached, a special code 127 is sent indicating end of data transfer
- the host receives bytes (e.g. through RS-232 link) and decompresses the information
- the decompression algorithm is shown in Figure 5
- the routine uses the same variables as described for the compression algorithm ( Figure 4). After a byte is received, it is checked to see whether it is 127 - end of transfer If so, the routine terminates.
- the byte received is not 127, the byte is examined as to whether it is negative or positive. If negative, it is stored in the host memory that is a mirror image of the MCA memory. The byte location of the last stored byte is memorized (variable m) and the channel pointer increments. The byte pointer is cleared If the received byte is not negative and not 127, then it is examined for zero
- the channel pointer decrements and the byte pointer is restored from m and incremented.
- Next byte must be negative as indicated by the compression algorithm - zero value is always followed by a negative value If the received byte is greater then zero and less than 127. then it represents the skip counter.
- the channel pointer is incremented proportional to the skip counter No bytes are updated for the channels that have been skipped Using these algorithms and their modifications, a significant improvement in the data transfer rate is achieved
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Molecular Biology (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
In a preferred embodiment, method of operating a multichannel analyzer system (20), including: receiving a detector signal and producing digital values representative of peak values of pulses in the detector signal; storing the digital values in channels in a memory (50); and compressing and transmitting data from only those the channels in the memory (50) that have changed since a next previous transmission.
Description
Multichannel Analyzer Data Storage, Compression, and Transfer
Description
Technical Field
The present invention relates to multichannel analyzers generally and, more particularly, to a novel multichannel analyzer that stores, compresses, and transfers data in a rapid manner
Background Art
Multichannel analyzers (MCAs) build a histogram that represents a pulse height distribution of radiation detector pulse signals For each pulse, the pulse height is measure using an analog-to-digital converter (ADC) The resulting digital value addresses an MCA memory location The memory locations represent the channels of the MCA The pointed channel is incremented by one count Each channel normally can store a large number of counts It is typical for each channel to use four bytes (double word) from the MCA memory space
Stand alone and especially portable MCAs transfer data to a host computer for visualization, analysis and storage An MCA may have few thousands of channels, e g 1024, 2048, 4096. 8192 etc Thus, a large amount of data has to be transferred between the MCA and the host Often the interface has a limited bandwidth that limits the data update rate As a result, the visualization display lacks a real time update For example, when an RS 232 interface is used the display update can be in the order of few seconds The slow display update is a major obstacle when an operator feedback is required in the process of tuning the MCA or adjusting other components of the measurement setup To overcome this obstacle a scheme for storage, compression, transfer and decompression of
the MCA data was developed, however, known multichannel analyzers still have a relatively slow display update
Accordingly, it is a principal object of the present invention to provide a multichannel analyzer that transfers data in a rapid manner
It is an additional object of the invention to provide such a multichannel analyzer that transfers only data that have changed since the next previous data transmission
It is a further object of the invention to provide such a multichannel analyzer and method that can be economically and readily implemented
Other objects of the present invention, as well as particularly features, elements, and advantages thereof, will be elucidated in, or be apparent from, the following description and the accompanying drawing figures
Disclosure of Invention
The present invention achieves the above objects, among others, by providing, in a preferred embodiment, a method of operating a multichannel analyzer system, comprising receiving a detector signal and producing digital values representative of peak values of pulses in said detector signal, storing said digital values in channels in a memory, and compressing and transmitting data from only those said channels in said memory that have changed since a next previous transmission
Brief Description of Drawings
Understanding of the present invention and the various aspects thereof will be facilitated by reference to the accompanying drawing figures, submitted for purposes of illustration only and not intended to defined the scope of the invention, on which
Figure 1 is a block diagram of an apparatus employing the present invention
Figure 2 is a schematic diagram showing the data storage concept of the invention
Figure 3 is flow chart showing the algorithm to increment a single channel of memory
Figure 4 is a flow chart of the compression algorithm for the case of four-byte channel content
Figure 5 is a flow chart of the decompression algorithm for the compressed data of Figure 4
Best Mode for Carrying Out the Invention
Reference should now be made to the drawing figures, on which similar or identical elements are given consistent identifying numerals throughout the various figures thereof, and on which parenthetical references to figure numbers (when used) direct the reader to the view(s) on which the element(s) being described is (are) best seen, although the element(s) may be seen also on other views
Figure 1 illustrates a simplified block diagram of an MCA, generally indicated by the reference numeral 20 connected to a host computer 22 In MCA 20, a pulse-height analyzer 30 that produces a digital value corresponding to the peak of measured pulse processes the detector signal. The digital peak value is passed to a channel increment controller 40. The channel increment controller increments memory location(s) in an MCA memory 50 that is pointed by the digital peak value from the pulse height analyzer MCA memory 50 is dual accessed memory and its content can be read by memory read controller 60 Memory read controller 60 reads the MCA memory, compresses data, and sends data to host computer 22
Host computer 22 receives data and decompresses and stores them for visualization and further processing.
Each channel of MCA 20 occupies a certain number of bytes of the MCA memory. The channel increment can be done on a byte, word, double word, and etc. basis. For simplicity, a byte increment scheme is considered. The key of this invention is that from the MCA memory an information unit (e.g. bit or byte) is reserved and associated with each channel or part of it (e.g. byte). This information unit is set every time a channel increments. The information unit serves as a flag that signals whether or not a channel (or a channel byte) has been changed and only data in channels that have changed since the last data transmission are compressed and sent to host computer 22.
Figure 2 illustrates the memory organization and the channel increment flag concept of MCA 20 (Figure 1 ). The data is stored in channels numbered from 0 to N. Each channels stores data in four bytes numbered from 0 to 3. Byte 0 is the least significant byte while byte 3 is the most significant byte. Each byte has 8 bits numbered from 0 to 7 - bit zero being the least significant bit. Bit 7 (grayed) of each byte is used as a byte increment flag. When a byte is incremented, this bit is forced to a predetermined state - flag rises. For clarity, in this particular example, logic one indicates a risen flag. That is, when the byte increments, its bit 7 is set to logic one. Counts of each channel are stored using bits 0 to 6 of each byte. As a result, the maximum number of counts per channel, in this example, is 22 - 1 .
A flow chart that shows the algorithm to increment a single channel of MCA memory 50 (Figure 1 ) is shown in Figure 3. A pulse height digital value is passed from pulse height analyzer 30 and is loaded in a channel pointer (ChnPtr). Initially a byte pointer (BytePtr) is set to 0 pointing to the first byte of a channel. The byte that is pointed by both channel pointer
and byte pointer increments At the same time, bit 7 of the same byte is set to logic one If there is no carry' from the 7 data bits, the value of the byte is different than 128 and the channel increment process is terminated If the byte value is equal to 128, then the byte pointer is incremented and next byte of the channel is incremented This process continues until either there is no carry or all bytes have been incremented During channel incrementing, the read operation is suspended MCA memory 50 is read during the intervals between incrementing the channels
The content of MCA memory 50 is read, compressed, and sent to host computer 22 (Figure 1 ) by memory read controller 60 After a byte from MCA memory 50 is read, the bit 7 of the byte automatically is set to zero - the increment flag is cleared if it was set before the reading. Let the bytes represent signed 8 bit values That is, bit 7 is a sign bit A byte value that is negative indicates that the byte has been changed since last read If the byte value is positive or zero then the byte has not been modified since the last reading The compression algorithm is based on this ability to distinguish modified from unchanged channel bytes
Figure 4 shows a flowchart of compression algorithm for the case of four-byte channel content with byte increment scheme The controller sends updated channel content between an initial channel (FIRST CHN) and an end channel (LAST CHN) The channel is pointed by the channel pointer / which can be changed in increments of mc Each byte of the channel is pointed by the byte pointer // A skip counter (SCNT) is used to indicate the number of unchanged channels to be skipped Initially, the skip counter is cleared A byte pointed by [/://] is read If the byte is not negative than the skip counter increments If the skip counter reaches 126, the skip counter is sent to the host and then is cleared
If the byte is negative and if the skip counter is different than zero, then the skip counter is sent to the host and then is cleared If the byte is
negative and the skip counter is zero, then the skip counter is not sent to the host Then, in both cases, the negative byte is sent and the byte pointer increments Next byte of the channel content is read. If this byte is negative, a byte with content zero is sent to the host. The value zero has a special meaning indicating that the byte that follows is the next byte of the same channel The process of sending channel bytes continues until all modified (incremented) bytes of the same channel are sent. When the modified bytes are sent or after incrementing the skip counter, the channel pointer increments. If the last channel is reached, a special code 127 is sent indicating end of data transfer
The host receives bytes (e.g. through RS-232 link) and decompresses the information The decompression algorithm is shown in Figure 5 The routine uses the same variables as described for the compression algorithm (Figure 4). After a byte is received, it is checked to see whether it is 127 - end of transfer If so, the routine terminates.
If the byte received is not 127, the byte is examined as to whether it is negative or positive. If negative, it is stored in the host memory that is a mirror image of the MCA memory. The byte location of the last stored byte is memorized (variable m) and the channel pointer increments. The byte pointer is cleared If the received byte is not negative and not 127, then it is examined for zero
If the received byte is zero, then the channel pointer decrements and the byte pointer is restored from m and incremented. Next byte must be negative as indicated by the compression algorithm - zero value is always followed by a negative value If the received byte is greater then zero and less than 127. then it represents the skip counter. The channel pointer is incremented proportional to the skip counter No bytes are updated for the channels that have been skipped
Using these algorithms and their modifications, a significant improvement in the data transfer rate is achieved
It will thus be seen that the objects set forth above, among those elucidated in, or made apparent from, the preceding description, are efficiently attained and, since certain changes may be made in the above apparatus and method without departing from the scope of the invention, it is intended that all matter contained in the above description or shown on the accompanying drawing figures shall be interpreted as illustrative only and not in a limiting sense
It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween
Claims
Claims
1 A method of operating a multichannel analyzer system, comprising
(a) receiving a detector signal and producing digital values representative of peak values of pulses in said detector signal,
(b) storing said digital values in channels in a memory, and
(c) compressing and transmitting data from only those said channels in said memory that have changed since a next previous transmission
2 A method of operating a multichannel analyzer system, as defined in Claim 1 , further comprising-
(d) receiving and decompressing said data
3 A method of operating a multichannel analyzer system, as defined in Claim 1 , wherein said steps of storing, compressing, and transmitting include marking each said data as changed then said data is modified, storing said data in said memory, and unmarking, compressing and transmitting said data
4 A method of operating a multichannel analyzer system, as defined in Claim 1 , wherein said step of storing includes assigning a mark indicator to each channel information unit, said mark indicator being used to indicate changes in said data between transmissions
5 A method of operating a multichannel analyzer system, as defined in Claim 1 , wherein transmission of a single byte
indicates a consecutive number of channels that have not been changed between consecuth e transmissions, causing circuitry receiving said transmission to advance its channel counter said number of channels
6 A multichannel analyzer system, comprising
(a) a pulse height analyzer to receive a detector signal and to produce digital values corresponding to peaks of measured pulses 1 said detector signal,
(b) a channel increment controller connected to said pulse height analyzer,
(c) a memory connected to said channel increment controller having memory locations incremented by said channel increment controller, said memory locations being pointed by said digital values, and
(d) a memory read controller connected to said memory to read data in said memory locations, to unmark said read data and to transmit only elements of said data that have changed since a next previous transmission
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15853299P | 1999-10-08 | 1999-10-08 | |
US60/158,532 | 1999-10-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001028115A1 true WO2001028115A1 (en) | 2001-04-19 |
Family
ID=22568564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/027057 WO2001028115A1 (en) | 1999-10-08 | 2000-09-29 | Multichannel analyzer data storage, compression, and transfer |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2001028115A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015187608A (en) * | 2014-03-26 | 2015-10-29 | ゼネラル・エレクトリック・カンパニイ | Particle event recordation |
JP2016515204A (en) * | 2013-03-11 | 2016-05-26 | ザ ユニバーシティ オブ ブリストル | Radiation detection apparatus and method |
CN112817028A (en) * | 2020-12-29 | 2021-05-18 | 上海工物高技术产业发展有限公司 | Multichannel analyzer zero clearing method, device and system and storage medium |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4222275A (en) * | 1978-10-02 | 1980-09-16 | Dapco Industries, Inc. | System for non-destructively acquiring and processing information about a test piece |
US5627765A (en) * | 1994-07-25 | 1997-05-06 | Avid Technology, Inc. | Method and apparatus for compressing and analyzing video and for creating a reference video |
US5757970A (en) * | 1992-05-13 | 1998-05-26 | Apple Computer, Inc. | Disregarding changes in data in a location of a data structure based upon changes in data in nearby locations |
-
2000
- 2000-09-29 WO PCT/US2000/027057 patent/WO2001028115A1/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4222275A (en) * | 1978-10-02 | 1980-09-16 | Dapco Industries, Inc. | System for non-destructively acquiring and processing information about a test piece |
US5757970A (en) * | 1992-05-13 | 1998-05-26 | Apple Computer, Inc. | Disregarding changes in data in a location of a data structure based upon changes in data in nearby locations |
US5627765A (en) * | 1994-07-25 | 1997-05-06 | Avid Technology, Inc. | Method and apparatus for compressing and analyzing video and for creating a reference video |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016515204A (en) * | 2013-03-11 | 2016-05-26 | ザ ユニバーシティ オブ ブリストル | Radiation detection apparatus and method |
US10473794B2 (en) | 2013-03-11 | 2019-11-12 | University Of Bristol | Radiation detection device and method |
JP2015187608A (en) * | 2014-03-26 | 2015-10-29 | ゼネラル・エレクトリック・カンパニイ | Particle event recordation |
CN112817028A (en) * | 2020-12-29 | 2021-05-18 | 上海工物高技术产业发展有限公司 | Multichannel analyzer zero clearing method, device and system and storage medium |
CN112817028B (en) * | 2020-12-29 | 2024-02-13 | 上海工物高技术产业发展有限公司 | Multichannel analyzer resetting method, multichannel analyzer resetting device, multichannel analyzer resetting system and storage medium |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4792753A (en) | Local area network protocol analyzer | |
EP0244002A1 (en) | Method of transmitting update information for a stationary video picture | |
US4817080A (en) | Distributed local-area-network monitoring system | |
US20020081037A1 (en) | HVAC system display | |
US4710971A (en) | Channel selecting device for CATV terminal unit | |
EP0662761A1 (en) | A data communication system for efficient data transfer between terminals in a network | |
KR20000060815A (en) | User data transfering apparatus by using of short messageservice fuction in digital portable terminal and methodthereof | |
KR860001790B1 (en) | A paging system | |
CA1252896A (en) | Apparatus and algorithm for compressing and decompressing data | |
WO1995019662A1 (en) | Data compression apparatus and method | |
EP0661819B1 (en) | Data compression | |
WO2004092960A2 (en) | Selectable procession / decompression for data stored in memory | |
WO2001028115A1 (en) | Multichannel analyzer data storage, compression, and transfer | |
US5144295A (en) | Interruption processing system in time division multiplex transmission system | |
US6621428B1 (en) | Entropy codec for fast data compression and decompression | |
EP0429055A2 (en) | Data format for packets of information | |
EP0771083B1 (en) | Audio coding device and audio decoding device | |
US5319574A (en) | Status change monitoring apparatus | |
US5768630A (en) | Apparatus for receiving and transmitting a serial data | |
US5457688A (en) | Signal processor having multiple paralleled data acquisition channels and an arbitration unit for extracting formatted data therefrom for transmission | |
EP3537663A1 (en) | Efficient time series data communication | |
US5375142A (en) | Method and device for detecting and checking the template of digital messages transmitted to a receiver device | |
US5396598A (en) | Event-driven signal processor interface having multiple paralleled microprocessor-controlled data processors for accurately receiving, timing and serially retransmitting asynchronous data with quickly variable data rates | |
US20040204923A1 (en) | Information collecting apparatus and information collecting/analyzing system | |
US4951156A (en) | Facsimile circuit monitor system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): JP RU US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
122 | Ep: pct application non-entry in european phase | ||
NENP | Non-entry into the national phase |
Ref country code: JP |