WO2000022499A2 - Method for transferring information - Google Patents

Method for transferring information Download PDF

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Publication number
WO2000022499A2
WO2000022499A2 PCT/SE1999/001841 SE9901841W WO0022499A2 WO 2000022499 A2 WO2000022499 A2 WO 2000022499A2 SE 9901841 W SE9901841 W SE 9901841W WO 0022499 A2 WO0022499 A2 WO 0022499A2
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WO
WIPO (PCT)
Prior art keywords
signal
clock
true
complementary
data signal
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Application number
PCT/SE1999/001841
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French (fr)
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WO2000022499A3 (en
Inventor
Ingmar Andersson
Original Assignee
Telefonaktiebolaget Lm Ericsson (Publ)
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Application filed by Telefonaktiebolaget Lm Ericsson (Publ) filed Critical Telefonaktiebolaget Lm Ericsson (Publ)
Priority to AU13062/00A priority Critical patent/AU1306200A/en
Publication of WO2000022499A2 publication Critical patent/WO2000022499A2/en
Publication of WO2000022499A3 publication Critical patent/WO2000022499A3/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0008Synchronisation information channels, e.g. clock distribution lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/20Arrangements affording multiple use of the transmission path using different combinations of lines, e.g. phantom working

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)

Abstract

A method and system for transmitting information between a transmitter and a receiver via a transfer means is provided. A differential transmission format (100, 101) is used which enables an easy clock extraction in a receiver. The information to be transmitted is encoded into a true data signal, a complementary data signal, and a clock signal which is synchronous with the data signals. The clock signal is superimposed onto the true data signal making the true transmission signal (100) and superimposed onto the complementary data signal making the complementary transmission signal (101). The differential transmission format comprises the true transmission signal and the complementary transmission signal. Upon reception the clock is recovered by summation of the true transmission signal and the complementary transmission signal. The information is recovered by using the recovered clock and by taking the difference between the true transmission signal and the complementary transmission signal.

Description

Method for transferring information
FIELD OF THE INVENTION
The present invention relates generally to a method of and a system for information transfer, especially digital information transfers and the problems associated with extraction and recovery of a clock signal which is synchronous with the data signal.
BACKGROUND TO THE INVENTION
In digital transmission links it is common that only data is transmitted. A clock signal is usually not transferred separately due to bandwidth restrictions and difficulties in ensuring synchronism between the data and the clock. It is therefore usual to recover a clock signal by means of clock extraction directly from the data. To achieve a correct data recovery of the received data signal it is essential that the clock signal is stable and synchronous with the data signal. This usually leads to complicated clock extraction devices, especially when dealing with high data rates.
Different methods of recovering the clock signal by extraction have been suggested. One method is to device/choose a special encoding of the data signal to simplify the clock extraction. A disadvantage of this method is that usually more bandwidth is needed, which lowers the data rate per system resources used. A primary goal of an information transfer system is usually to optimize the possible data rate in relation to a given system bandwidth.
One way of reducing the necessary bandwidth, or increasing the data rate, is to transfer the data signal encoded with an NRZ (Non-Return-Zero) format. Unfortunately this format complicates the clock extraction even further by necessitating a frequency converter doubling the frequency of the data signal. The frequency converter is necessary because there is no frequency component in an NRZ data signal that corresponds to the bitrate of the data signal. To obtain a clock signal synchronous with the data the frequency doubled signal is filtered in a narrow bandwidth bandpass filter. However, the amplitude of this clock signal varies in dependence on the data sequence in question. One way to reduce this problem is to use bandpass filters with extremely high Q-values. Unfortunately such filters are extremely expensive and extremely difficult to manufacture, especially in the Gbit/s and higher bit rate ranges. Even with such a filter, an extremely phase accurate limiting amplifier has to be used to obtain a reasonable clock signal, which might still not have good enough long term stability.
To obtain a long term stability of the clock signal it can be fed into a phase locked loop (PLL) which includes a voltage controlled oscillator (VCO) . Unfortunately the cost and difficulties in manufacturing a PLL increases with frequency.
There are numerous other methods with which a clock signal can be recovered from a transmitted data signal. However, they all seem to involve very narrow filters in some form which makes the transmission systems very inflexible as to the bit rates used, a change of bit rate will usually lead to the use of new filter parameters. This would necessitate a multiple set of filters, one set for each desired bit rate, or the use of tunable filters, none of which is desirable.
There seems to be no manner in which to transfer information with a flexible bit rate in a simple manner in which the recovery or extraction of a clock signal which is highly accurate can be performed and especially not with bit rates in the giga bit per second and higher ranges.
SUMMARY OF THE INVENTION
An object of the invention is to define a method and a system for an efficient manner of transferring information.
Another object of the invention is to define a method and a system which is able to transfer information in such a manner that a clock recovery or extraction is easily accomplished.
A further object of the invention is to define a method and a system which can transfer information with a variable bit rate.
The above-mentioned objects are achieved in accordance with the invention by a method and a system for transmitting information between a transmitter and a receiver via a transfer means. A differential transmission format is used which enables an easy clock extraction in a receiver. The information to be transmitted is encoded into a true data signal, a complementary data signal, and a clock signal which is synchronous with the data signals. The clock signal is superimposed onto the true data signal making the true transmission signal and superimposed onto the complementary data signal making the complementary transmission signal. The differential transmission format comprises the true transmission signal and the complementary transmission signal. Upon reception the clock is recovered by summation of the true transmission signal and the complementary transmission signal. The information is recovered by using the recovered clock and by taking the difference between the true transmission signal and the complementary transmission signal.
The aforementioned objects are also achieved according to the invention by an information transmitter arranged to transmit a digital data signal. The digital data signal having a data bit rate and being in synchronization with a clock signal having a clock frequency. The transmitter comprises data encoding means which encodes the digital data signal to be transmitted into a true data signal and a complementary data signal. According to the invention the transmitter further comprises a clock encoding means which superimposes the clock signal onto the true data signal making a true transmission signal. The clock encoding means also superimposes the clock signal onto the complementary data signal making a complementary transmission signal. A differential transmission format is thereby created. The differential transmission format thus comprises the true transmission signal with the superimposed clock signal and the complementary transmission signal with the superimposed clock signal. According to the invention this differential transmission format enables a filterless, or virtually filterless, extraction of the digital data signal and the clock signal to be achieved.
The clock frequency of the clock signal that the clock encoding means superimposes is preferably a sub-multiple of the data bit rate, or at least less than the data bit rate. In some embodiments the clock frequency can be equal or larger that the data bit rate. The clock signal that the clock encoding means superimposes is preferably analog and substantially sinusoidal. Preferably the clock encoding means superimposes the clock signal onto the true data signal and the complementary data signal in such a way that the superimposed clock signal is at most 10% of either the true transmission signal or the complementary transmission signal, i.e. the superimposed clock signal adds a maximum of 10% distortion to either transmission signal. Advantageously the data encoding means also encodes the true data signal and the complementary data signal into an NRZ data format.
The aforementioned objects are also achieved according to the invention by an information receiver. The information receiver is arranged to receive a digital data signal having a data bit rate and being encoded in a differential transmission format. The differential transmission format comprises a true transmission signal and a complementary transmission signal. The receiver comprises data decoding means which recovers the digital data signal by taking the difference between the true transmission signal and the complementary transmission signal. According to the invention the receiver further comprises clock extraction means. The clock extraction means recovers and generates a clock signal with a clock frequency by summation of the true transmission signal and the complementary transmission signal.
The aforementioned objects are also achieved according to the invention by a transmission system comprising a transmitter and a receiver. The transmission system is arranged to transfer a digital data signal between the transmitter and the receiver. The digital data signal has a data bit rate and is in synchronization with a clock signal having a clock frequency. The transmitter is arranged to transmit the digital data signal in a differential transmission format. The differential transmission format comprises a true transmission signal and a complementary transmission signal. The transmitter comprises data encoding means which encodes a digital data signal to be transmitted into a true data signal and a complementary data signal. The receiver is arranged to receive a digital data signal encoded in the differential transmission format. The receiver comprises data decoding means. The data decoding means recovers the digital data signal by taking the difference between the received true transmission signal and the received complementary transmission signal. According to the invention the transmitter further comprises a clock encoding means. The clock encoding means superimposes the clock signal onto the true data signal and onto the complementary data signal thereby creating the differential transmission format. The differential transmission format comprises the true data signal with the superimposed clock signal, the true transmission signal, and the complementary data signal with the superimposed clock signal, the complementary transmission signal. Also according to the invention the receiver further comprises clock extraction means. The clock extraction means recovers and generates a clock signal by summation of the received true transmission signal and the received complementary transmission signal.
The aforementioned objects are also achieved according to the invention by a method of transmitting a digital data signal. The digital data signal having a data bit rate and being in synchronization with a clock signal having a clock frequency. The method comprises the step of encoding the digital data to be transmitted into a true data signal and a complementary data signal. According to the invention the method further comprises the steps of superimposing the clock signal onto the true data signal making a true transmission signal and of superimposing the clock signal onto the complementary data signal making a complementary transmission signal. Thereby a differential transmission format is created. The differential transmission format comprises the true data signal with the superimposed clock signal, the true transmission signal, and the complementary data signal with the superimposed clock signal, the complementary transmission signal. From the differential transmission format a filterless, or a near filterless, extraction of the digital data signal and the clock signal can be accomplished.
The aforementioned objects are also achieved according to the invention by a method of coding a digital data signal to be transferred between a transmitter and a receiver. The coding will enable a filterless, or near filterless, extraction of a clock signal in the receiver. The digital data signal has a data bit rate and is in synchronization with a clock signal having a clock frequency. The method comprises the step of encoding the digital data signal into a true data signal and a complementary data signal. According to the invention the method further comprises the step of superimposing the clock signal onto the true data signal and the complementary data signal. A differential transmission format is thereby created. The differential transmission format comprises the true data signal with the superimposed clock signal, the true transmission signal, and the complementary data signal with the superimposed clock signal, the complementary transmission signal. It is possible from the differential transmission format to achieve a filterless, or near filterless, extraction of the digital data signal and the clock signal in the receiver.
The aforementioned objects are also achieved according to the invention by a method of recovering a digital data signal and a clock signal. The digital data signal being encoded in a differential transmission format comprising a true transmission signal and a complementary transmission signal. The method comprises the step of decoding the differential transmission format into the digital data signal by taking the difference between the true transmission signal and the complementary transmission signal. According to the invention the method further comprises the step of recovering and generating the clock signal by summing the true transmission signal and the complementary transmission signal.
The aforementioned objects are also achieved according to the invention by a method for transmitting information between a transmitter and a receiver via a transfer means. The method comprises the steps of encoding the information, transferring the encoded information, receiving the encoded information, and decoding the encoded information. The step of encoding the information comprises encoding the information into a differential transmission format comprising a true transmission signal and a complementary transmission signal. The step of decoding the encoded information comprises recovering the information by taking the difference between the true transmission signal and the complementary transmission signal. According to the invention the step of encoding the information further comprises encoding the information into a true data signal, a complementary data signal, and a clock signal. The step of encoding the information further comprises encoding the clock signal into the differential transmission format. According to the invention the encoding of the clock into the differential transmission format comprises the steps of superimposing the clock signal onto the true data signal making the true transmission signal and superimposing the clock signal onto the complementary data signal making the complementary transmission signal. Further according to the invention the step of decoding the encoded information further comprises recovering the clock signal by summation of the true transmission signal and the complementary transmission signal and further comprises using the recovered clock signal in recovering the information. By providing a new differential transmission format a plurality of advantages over prior art systems are obtained. The transmitter and especially the receiver are simplified in relation to prior art systems, no or very few and simple filters are needed for clock extraction, making it possible to realize the receiver on an integrated circuit. The receiver is not limited to a specific data bit rate due to fixed narrow filters. The differential transmission format is not limited to a specific transport medium. The transport medium can for example be wires with electrical signals, optical cables with optical signals, or the air with radio waves or optical signals such as infra red signals. More advantages of the invention will become apparent from the following.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will now be described in more detail for explanatory, and in no sense limiting, purposes, with reference to the following figures, in which
Fig. 1 shows an example of a time diagram of a differential transmission format according to the invention,
Fig. 2 shows the basic principle of a transmitter according to the invention,
Fig. 3 shows the basic principle of a receiver according to the invention, Fig. 4 shows an example of a transmitter circuit according to the invention,
Fig. 5 shows an example of a receiver circuit according to the invention,
Fig. 6 shows a flow chart of a method of transmitting information according to the invention,
Fig. 7A shows a flow chart of a first method of receiving information according to the invention,
Fig. 7B shows a flow chart of a second method of receiving information according to the invention.
DESCRIPTION OF PREFERRED EMBODIMENTS
In order to clarify the system according to the invention, some examples of its use will now be described in connection with Figures 1 to 7.
Figure 1 shows an example of a time diagram of a differential transmission format according to the invention. The differential transmission format comprises a true transmission signal 100 and a complementary transmission signal 101. There are many advantages in transmitting an information signal differentially and even more with the differential transmission format according to the invention.
Figure 2 shows the basic principle of a transmitter according to the invention and how the differential transmission format is created. The information is digitalized 202 and then its complement 203 is generated synchronously. This creates a true data signal 202 and its complement a complementary data signal 203. According to the invention a clock signal 210 which is synchronous with the data signals is superimposed onto the data signals to make the differential transmission format according to the invention. The superposition takes place by adding the clock signal 210 in an adder 250 with the true data signal 202 to make the true transmission signal 200 and by adding the clock signal 210 in an adder 250 with the complementary data signal 203 to make the complementary transmission signal 201. The clock signal 210 can advantageously be analog and sinusoidal. The clock signal 210 can be of another form such as digital or triangular, for example, without departing from the scope of the invention. The frequency of the clock signal, the clock frequency, can preferably be a sub- multiple of the data bit rate of the true data signal 202. The clock frequency can take other values. The clock signal 210 is thus superimposed on the data signals 202, 203 as a small disturbance. The disturbance is preferably relatively small, in the range of a few percent and preferably not more than 10%.
Figure 3 shows the basic principle of a receiver according to the invention with the recovery of the data signal 306 and the clock signal 311. The true transmission signal 300 and the complementary transmission signal 301 are fed into an adder 351 and a subtractor 352 for the recovery. To be noted is that even if one of the transmission signals disappears a recovery is most likely possible. By subtracting the complementary transmission signal 301 from the true transmission signal 300 in the subtractor 352, the data signal 306 is recovered without the superimposed clock signal. By adding the true transmission signal 300 with the complementary transmission signal 301 in the adder 351, the clock signal 311 is recovered without any data signal. It is thus demonstrated that it is in theory possible to recover a clock signal without any filters. However, in a practical circuit filters might be necessary for other reasons.
Figure 4 shows an example of a transmitter circuit according to the invention. The circuit is basically a differential amplifier comprising three resistors 464, 465, 466, three transistors 461, 462, 463 and a constant current source 460. A true data signal and a complementary data signal are inputed 402, 403 into the amplifier at the base of a respective transistor 462, 463. The clock signal is inputed 410 into the base of the third transistor
461 that modulates the amplifier. The true transmission signal and the complementary transmission signal are attained as outputs
400, 401 at the collectors of the amplifier transistors 462, 463.
The shown circuit uses bipolar technology and is intended as an example only, a transmitter according to the invention can be implemented in many different manners in any arbitrary technology.
Figure 5 shows a diagramatic example of a receiver circuit according to the invention. The circuit comprises impedance matching resistors 571, 572 on the inputs 500, 501 for the true transmission signal and the complementary transmission signal. Possibly the signals needs to be level shifted in level shifters 573, 574 before the adder 551 and subtractor 552. The adder (clock decoder) 551 is schematically illustrated by two transistors 581, 582 and a resistor 585. The clock signal output 511 is connected to the collectors of the transistors 581, 582 to which bases the possibly level shifted true transmission signal and complementary transmission signal are connected. The subtractor (data decoder) 552 schematically illustrated as a differential amplifier with two transistors 583, 584, three resistors 586, 587, 588, and a constant current source 560. At outputs 504, 505 the true data signal and the complementary data signal are obtained, i.e. the data signals without the superimposed clock signal.
Figure 6 shows a flow chart of a method of transmitting information according to the invention. In a first step 648 an information provider provides the information that is to be transferred. In a second step 649 the information is data encoded, i.e. the information is digitalized into a true data signal and a complementary data signal is created. In a third step 650 the encoded data is clock encoded. The true data signal and the complementary data signal are both superimposed with a clock signal. The clock signal is synchronous with the data signals and only superimposed onto the data signals in order to make a very small disturbance/distortion. The third step 650 creates a true transmission signal and a complementary transmission signal by the clock encoding. These signals constitute the differential transmission format. Before the true transmission signal and the complementary transmission signals are transferred 630 via a transport medium they might need to be adapted to the medium in a fourth step 620. The adaptation might, for example, be high frequency modulation and amplification, conversion to light, or just an amplification.
Figure 7A shows a flow chart of a first method of receiving information according to the invention. In a first step 721 the transferred information 730 might optionally need to be adapted to the subsequent circuitry. The adaptation might for example include one or more of demodulation, amplification, or energy conversion. Thereafter in a second step 751 the clock signal is recovered by adding the transferred true transmission signal and complementary transmission signal. In a third step 753 the data signals are recovered by subtracting the complementary transmission signal from the true data signal. Thereafter the information is recovered by using the recovered clock signal. The information is then provided to an information consumer in a fourth step 756.
Figure 7B shows a flow chart of a second method of receiving information according to the invention. As in the first method according to figure 7A in a first step 721 the transferred information 730 might optionally need to be adapted to the subsequent circuitry. The adaptation might for example include one or more of demodulation, amplification, or energy conversion.
Thereafter the clock signal and the data signal are recovered in parallel in clock recovery step 751 and a data recovery step 754 respectively. The clock recovery step 751 adds the true transmission signal with the complementary transmission signal to recover the clock. The data recovery step 754 takes the difference between the true data signal and the complementary data signal to recover the data signal. In a fourth step 755 the information is recovered by means of the recovered clock signal and the recovered data signal. In a final step 756 the information is provided to an information consumer.
The present invention can be put into apparatus-form either as pure hardware, as pure software or as a combination of hardware and software. If the method according to the invention is realised in the form of software, it can be completely independent or it can be one part of a larger program. The software can suitably be located in a general purpose computer or in a dedicated computer.
As a summary, the invention can basically be described as a method with which to transfer high speed data, in the range of Giga bits per second and higher, in a simple manner by utilizing a differential transmission format according to the invention. The invention is not limited to the embodiments described above but may be varied within the scope of the appended patent claims.
FIG 1
100 true transmission signal, i.e. true data signal with superimposed clock signal
101 complementary transmission signal, i.e. complementary data signal with superimposed clock signal
FIG 2
200 true transmission signal, i.e. true data signal with superimposed clock signal
201 complementary transmission signal, i.e. complementary data signal with superimposed clock signal
202 true data signal
203 complementary data signal 210 clock signal
250 clock encoder (transmitter adder)
FIG 3
300 true transmission signal, i.e. true data signal with superimposed clock signal 301 complementary transmission signal, i.e. complementary data signal with superimposed clock signal 306 recovered true data signal (true transmission signal minus complementary transmission signal) 311 recovered/extracted clock signal 351 clock decoder (receiver adder)
352 data decoder (receiver subtracter) FIG 4
400 output of true transmission signal, i.e. true data signal with superimposed clock signal
401 output of complementary transmission signal, i.e. complementary data signal with superimposed clock signal
402 input of true data signal
403 input of complementary data signal 410 input of clock signal
450 clock encoder (transmitter adder) 460 constant current source
461 transistor
462 transistor
463 transistor
464 resistor 465 resistor
466 resistor
FIG 5 500 input of true transmission signal, i.e. true data signal with superimposed clock signal
501 input of complementary transmission signal, i.e. complementary data signal with superimposed clock signal
504 output of recovered true data signal 505 output of recovered complementary data signal
511 output of recovered clock signal
551 clock decoder (receiver adder)
552 data decoder (receiver subtracter) 560 constant current source 571 impedance matching resistor
572 impedance matching resistor
573 level shifter
574 level shifter 581 transistor
582 transistor
583 transistor
584 transistor
585 resistor
586 resistor
587 resistor
588 resistor
FIG 6
(620 transmission medium adaptation)
630 information transfer
648 information provider 649 data encoder
650 clock encoder
FIG 7 (721 transmission medium adaptation)
730 information transfer
751 clock recovery
753 complete data recovery
754 part A data recovery 755 part B data recovery
756 information consumer

Claims

1. An information transmitter arranged to transmit a digital data signal having a data bit rate and being in synchronization with a clock signal having a clock frequency, the transmitter comprises data encoding means which encodes the digital data signal to be transmitted into a true data signal and a complementary data signal, characterized in that the transmitter further comprises a clock encoding means (250, 450) which superimposes the clock signal onto the true data signal making a true transmission signal (100, 200) and which superimposes the clock signal onto the complementary data signal making a complementary transmission signal (101, 201), thereby creating a differential transmission format comprising the true transmission signal with the superimposed clock signal and the complementary transmission signal with the superimposed clock signal, from which differential transmission format a filterless extraction of the digital data signal and the clock signal can be achieved.
2. The transmitter according to claim 1, characterized in that the clock frequency of the the clock signal that the clock encoding means superimposes is a sub-multiple of the data bit rate.
3. The transmitter according to claim 1, characterized in that the clock frequency of the clock signal that the clock encoding means superimposes is less than the data bit rate.
4. The transmitter according to any one of claims 1 to 3, characterized in that the clock signal that the clock encoding means superimposes is analog and substantially sinusoidal.
5. The transmitter according to any one of claims 1 to 4, characterized in that the clock encoding means superimposes the clock signal onto the true data signal and the complementary data signal in such a way that the superimposed clock signal is at most 10% of either the true transmission signal or the complementary transmission signal.
6. The transmitter according to any one of claims 1 to 5, characterized in that the data encoding means also encodes the true data signal and the complementary data signal into an NRZ data format.
7. An information receiver arranged to receive a digital data signal having a data bit rate and being encoded in a differential transmission format comprising a true transmission signal (100, 200) and a complementary transmission signal (101, 201), the receiver comprises data decoding means (352, 552) which recovers the digital data signal (306) by taking the difference between the true transmission signal and the complementary transmission signal, characterized in that the receiver further comprises clock extraction means (351, 551) which recovers and generates a clock signal (311) with a clock frequency by summation of the true transmission signal and the complementary transmission signal.
8. The receiver according to claim 7, characterized in that the clock frequency of the clock signal that the clock extraction means generates is a sub-multiple of the data bit rate of the digital data signal.
9. The receiver according to claim 7, characterized in that the clock frequency of the clock signal that the clock extraction means generates is less than the data bit rate of the digital data signal .
10. The receiver according to any one of claims 7 to 9, characterized in that the clock signal that the clock extraction means generates is analog and substantially sinusoidal.
11. A transmission system, comprising a transmitter and a receiver, arranged to transfer a digital data signal having a data bit rate and being in synchronization with a clock signal having a clock frequency between the transmitter and the receiver, the transmitter being arranged to transmit the digital data signal in a differential transmission format comprising a true transmission signal (100, 200) and a complementary transmission signal (101, 201), the transmitter comprises data encoding means which encodes a digital data signal to be transmitted into a true data signal (202) and a complementary data signal (203), the receiver being arranged to receive a digital data signal encoded in the differential transmission format, the receiver comprises data decoding means (352, 552) which recovers the digital data signal (306) by taking the difference between the received true transmission signal and the received complementary transmission signal, characterized in that the transmitter further comprises a clock encoding means (250, 450) which superimposes the clock signal onto the true data signal and onto the complementary data signal thereby creating the differential transmission format which comprises the true data signal with the superimposed clock signal, the true transmission signal, and the complementary data signal with the superimposed clock signal, the complementary transmission signal, and in that the receiver further comprises clock extraction means (351, 551) which recovers and generates a clock signal (311) by summation of the received true transmission signal and the received complementary transmission signal.
12. The transmission system according to claim 11, characterized in that the clock frequency of the clock signal that the clock encoding means superimposes is a sub-multiple of the data bit rate.
13. The transmission system according to claim 11, characterized in that the clock frequency of the clock signal that the clock encoding means superimposes is less than the data bit rate.
14. The transmission system according to any one of claims 11 to
13, characterized in that the clock signal that the clock encoding means superimposes is analog and substantially sinusoidal.
15. The transmission system according to any one of claims 11 to
14, characterized in that the clock encoding means superimposes the clock signal onto the true data signal and the complementary data signal in such a way that the superimposed clock signal is at most 10% of either the true transmission signal or the complementary transmission signal.
16. The transmission system according to any one of claims 11 to
15, characterized in that the data encoding means also encodes the true data signal and the complementary data signal into an NRZ data format.
17. A method of transmitting a digital data signal having a data bit rate and being in synchronization with a clock signal having a clock frequency, the method comprising the step of encoding (649) the digital data to be transmitted into a true data signal and a complementary data signal, characterized in that the method further comprises the steps of superimposing (650) the clock signal onto the true data signal making a true transmission signal and of superimposing the clock signal onto the complementary data signal making a complementary transmission signal, thereby creating a differential transmission format comprising the true data signal with the superimposed clock signal, the true transmission signal, and the complementary data signal with the superimposed clock signal, the complementary transmission signal, from which differential transmission format a filterless extraction of the digital data signal and the clock signal can be accomplished.
18. The method according to claim 17, characterized in that the clock frequency of the clock signal is a sub-multiple of the data bit rate.
19. The method according to claim 17, characterized in that clock frequency of the clock signal is less than the data bit rate.
20. The method according to any one of claims 17 to 19, characterized in that the clock signal is analog and substantially sinusoidal .
21. The method according to any one of claims 17 to 20, characterized in that the step of superimposing the clock signal onto the true data signal and the complementary data signal comprises the step of limiting the superimposed clock signal to be at most 10% of either the true data signal or the complementary data signal.
22. The method according to any one of claims 17 to 21, characterized in that the step of encoding further comprises a step of encoding the true data signal and the complementary data signal into an NRZ data format.
23. A method of coding a digital data signal to be transferred between a transmitter and a receiver for a filterless extraction of a clock signal in the receiver, the digital data signal having a data bit rate and being in synchronization with a clock signal having a clock frequency, the method comprising the step of encoding (649) the digital data signal into a true data signal and a complementary data signal, characterized in that the method further comprises the step of superimposing (650) the clock signal onto the true data signal and the complementary data signal thereby creating a differential transmission format comprising the true data signal with the superimposed clock signal, the true transmission signal, and the complementary data signal with the superimposed clock signal, the complementary transmission signal, from which differential transmission format a filterless extraction of the digital data signal and the clock signal can be achieved in the receiver.
24. A method of recovering a digital data signal and a clock signal, the digital data signal being encoded in a differential transmission format comprising a true transmission signal and a complementary transmission signal, the method comprising the step of decoding (753) the differential transmission format into the digital data signal by taking the difference between the true transmission signal and the complementary transmission signal, characterized in that the method further comprises the step of recovering (751) and generating the clock signal by summing the true transmission signal and the complementary transmission signal .
25. The method according to claim 24, characterized in that the clock signal has a frequency which is a sub-multiple of a data bit rate of the digital data signal.
26. The method according to claim 24, characterized in that the clock signal has a frequency which is less than a data bit rate of the digital data signal.
27. The method according to any one of claims 24 to 26, characterized in that the clock signal is analog and substantially sinusoidal .
28. A method for transmitting information between a transmitter and a receiver via a transfer means, comprising the steps of encoding the information, transferring the encoded information, receiving the encoded information, and decoding the encoded information, where the step of encoding the information comprises encoding the information into a differential transmission format comprising a true transmission signal and a complementary transmission signal, the step of decoding the encoded information comprises recovering the information by taking the difference between the true transmission signal and the complementary transmission signal, characterized in that the step of encoding the information further comprises encoding the information into a true data signal, a complementary data signal, and a clock signal, and further comprises encoding the clock signal into the differential transmission format by the steps of superimposing the clock signal onto the true data signal making the true transmission signal and superimposing the clock signal onto the complementary data signal making the complementary transmission signal, and in that the step of decoding the encoded information further comprises recovering the clock signal by summation of the true transmission signal and the complementary transmission signal and further comprises using the recovered clock signal in recovering the information.
29. The method according to claim 28, characterized in that the clock signal has a frequency which is a sub-multiple of a data bit rate of the true data signal.
30. The method according to claim 28, characterized in that the clock signal has a frequency which is less than a data bit rate of the true data signal.
31. The method according to any one of claims 28 to 30, characterized in that the clock signal is analog and substantially sinusoidal .
32. The method according to any one of claims 28 to 31, characterized in that the step of superimposing the clock signal onto the true data signal and the complementary data signal comprises the step of limiting the superimposed clock signal to be at most 10% of either the true transmission signal or the complementary transmission signal.
PCT/SE1999/001841 1998-10-14 1999-10-13 Method for transferring information WO2000022499A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU13062/00A AU1306200A (en) 1998-10-14 1999-10-13 Method for transferring information

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Application Number Priority Date Filing Date Title
SE9803498-6 1998-10-14
SE9803498A SE9803498D0 (en) 1998-10-14 1998-10-14 Method of transferring information

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WO2000022499A2 true WO2000022499A2 (en) 2000-04-20
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Cited By (5)

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WO2009058790A1 (en) * 2007-10-30 2009-05-07 Rambus Inc. Signaling with superimposed differential-mode and common-mode signals
WO2010062531A1 (en) * 2008-10-27 2010-06-03 Silicon Image, Inc. Independent link(s) over differential pairs using common-mode signaling
US8159274B2 (en) 2007-10-30 2012-04-17 Rambus Inc. Signaling with superimposed clock and data signals
US9214200B2 (en) 2010-04-05 2015-12-15 Rambus Inc. Methods and apparatus for transmitting data in a phase modulated signal derived from early and late timing signals
CN105284086A (en) * 2013-03-14 2016-01-27 美国莱迪思半导体公司 Driving data of multiple protocols through a single set of pins

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US4531222A (en) * 1982-07-29 1985-07-23 International Standard Electric Corporation Clock extraction circuit for a PCM signal
DE4110533A1 (en) * 1991-03-30 1992-10-01 Messgeraetewerk Zwoenitz Gmbh Information transmission via two binary transmission channels - using simultaneous transmission of data signal and inverted data signal and combining by logical disjunction

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US4531222A (en) * 1982-07-29 1985-07-23 International Standard Electric Corporation Clock extraction circuit for a PCM signal
DE4110533A1 (en) * 1991-03-30 1992-10-01 Messgeraetewerk Zwoenitz Gmbh Information transmission via two binary transmission channels - using simultaneous transmission of data signal and inverted data signal and combining by logical disjunction

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009058790A1 (en) * 2007-10-30 2009-05-07 Rambus Inc. Signaling with superimposed differential-mode and common-mode signals
US8159274B2 (en) 2007-10-30 2012-04-17 Rambus Inc. Signaling with superimposed clock and data signals
US8279976B2 (en) 2007-10-30 2012-10-02 Rambus Inc. Signaling with superimposed differential-mode and common-mode signals
WO2010062531A1 (en) * 2008-10-27 2010-06-03 Silicon Image, Inc. Independent link(s) over differential pairs using common-mode signaling
CN102204156A (en) * 2008-10-27 2011-09-28 晶像股份有限公司 Independent link(s) over differential pairs using common-mode signaling
US9214200B2 (en) 2010-04-05 2015-12-15 Rambus Inc. Methods and apparatus for transmitting data in a phase modulated signal derived from early and late timing signals
CN105284086A (en) * 2013-03-14 2016-01-27 美国莱迪思半导体公司 Driving data of multiple protocols through a single set of pins
US9407469B2 (en) 2013-03-14 2016-08-02 Lattice Semiconductor Corporation Driving data of multiple protocols through a single set of pins
US10033552B2 (en) 2013-03-14 2018-07-24 Lattice Semiconductor Corporation Driving data of multiple protocols through a single set of pins

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AU1306200A (en) 2000-05-01
SE9803498D0 (en) 1998-10-14
WO2000022499A3 (en) 2000-07-27

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