WO1999050960A1 - Novel equalizer using box-car filters - Google Patents

Novel equalizer using box-car filters Download PDF

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Publication number
WO1999050960A1
WO1999050960A1 PCT/AU1999/000241 AU9900241W WO9950960A1 WO 1999050960 A1 WO1999050960 A1 WO 1999050960A1 AU 9900241 W AU9900241 W AU 9900241W WO 9950960 A1 WO9950960 A1 WO 9950960A1
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WO
WIPO (PCT)
Prior art keywords
filter
delay structure
delay
input
outputs
Prior art date
Application number
PCT/AU1999/000241
Other languages
French (fr)
Inventor
David Stanley Mcgrath
Original Assignee
Lake Technology Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from AUPP2720A external-priority patent/AUPP272098A0/en
Priority claimed from AUPP2724A external-priority patent/AUPP272498A0/en
Application filed by Lake Technology Limited filed Critical Lake Technology Limited
Priority to AU31297/99A priority Critical patent/AU3129799A/en
Publication of WO1999050960A1 publication Critical patent/WO1999050960A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/04Recursive filters

Definitions

  • the present invention relates to the field of digital filtering. Background of the Invention
  • Fig. 1 illustrates a first form of equalizing filter which implements a standard FIR filter function.
  • the filter normally uses a series of delays 2 and multipliers 3.
  • the result of multiplication by multiplier 3 is added to summer 4 for summation each cycle to produce an output.
  • Unfortunately it can be inefficient because it provides more flexibility then might otherwise be required in the type of filters it can implement and the delay elements provided are standard delay elements.
  • an apparatus for filtering an input signal comprising: an input source; a cascaded filter/delay structure interconnected to said input source and having a predetermined number of outputs; a set of multiplier units, each connected to one of said outputs of said filter delay structure, each multiplier unit further configured to take a second input from a fixed constant coefficient; and a summing element configured to combine together the outputs of said multipliers, wherein said filter/delay structure is composed of a cascaded collection of elements, wherein each element effects a predetermined delay on the input signal and at least two of said elements effects a filtering function intended to band-limit the input signal as it propagates through said filter/delay structure.
  • the elements can include a variable delay structure.
  • the delay structure includes geometrically increasing delays.
  • an apparatus for filtering an audio input signal comprising: an input source, emitting the audio input signal as a one-bit (sigma-delta modulated) stream; a cascaded filter/delay structure connected with the input source with a predetermined number of outputs; a set of multipliers, each connected to one of the outputs of the filter delay structure, each multiplier configured to take a second input from a fixed constant coefficient; and a summing element configured to combine together the outputs of the multipliers; wherein the filter/delay structure is composed of a cascaded collection of elements, wherein each element effects some delay on the audio signal and at least two of the elements effects a filtering function intended to band-limit the audio signal as it propagates through the filter/delay structure.
  • the elements can include a variable delay structure with geometrically increasing delays.
  • the filter/delay structure can include an up/down/hold counter connected to a corresponding filter input and to a delayed version of the filter input, the counter outputting to a sigma/delta modulator which produces a 1 bit output.
  • Fig. 1 is a schematic block diagram of a standard FIR filter structure
  • Fig. 2 is a schematic block diagram of a filter structure of the present invention
  • Fig. 3 is a schematic block diagram of a box car filter
  • Fig. 4 is a schematic block diagram of a 1-bit box car filter
  • Fig. 5 is a schematic block diagram of one implementation of the present invention.
  • Fig. 6 illustrates the impulse responses for the arrangement of Fig. 5. Description of preferred and other embodiments
  • the preferred embodiment of the present invention provide a filter structure that can implement an FIR filter in which the aforementioned features of the impulse response is used, to reduce the total computation.
  • the traditional tapped-delay line used in FIR filters (with unity delay at each step) is replaced with a filter-delay structure, that low-pass filters the data as it propagates down the delay-line, thus allowing the delays to be made greater than unity.
  • the impulse response may be represented by sampling - 4 - points that are approximately logarithmically spaced in time.
  • Fig. 2 illustrates the filter arrangement 5 of the preferred embodiment. This is similar to the arrangement of Fig. 1 but the delay elements have been changed to filter/delay elements 10 which implement a more complex functionality which can include generic filter functions including variable delays and low pass filtering.
  • filter/delay elements 10 which implement a more complex functionality which can include generic filter functions including variable delays and low pass filtering.
  • variable delay in elements 10 provide for increased functionality.
  • the elements 10, by providing for variable delay and low pass filtering allow for extremely good simulation of impulse response functions by a set of filters 10. This is especially the case as impulse responses have band limited properties in their tails.
  • the filter/delay elements 10 can comprise a box car filters.
  • a box-car filter computes each output sample as the sum of K previous input samples, as follows :
  • the box-car filter becomes a simple delay element.
  • This delayed box-car filter can be implemented as shown in
  • Fig. 4 In the case where the input ⁇ x(n)) is a one-bit signal, the diagram of Fig. 4 shows how the accumulator becomes an up-down counter.
  • Fig. 5 show the corresponding impulse responses for - 5 - xO, xl , x2 , ... xll .
  • the first 2 filtered-delay elements in Fig YYY are simply 1-sample delays (no filter operation) , and so the first 3 curves 20 - 22 Fig. 6 (the bottom 3 curves) follow the same sequence as we would expect with a standard FIR. However, the later curves show a gradual broadening of the peaks (while the time delay from one peak to the next becomes greater than unity) .
  • Each cascaded box-car filter makes the overall impulse response converge toward a Gaussian shape.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Filters That Use Time-Delay Elements (AREA)

Abstract

An improved method and apparatus for audio filtering is disclosed. The method provides a means for complex filtering of audio signals using a transversal filter structure (5) in which the delayed signals are successively filtered to allow the delay taps (10) to be made progressively more sparse. In particular, a novel use of cascaded box-car filters is presented as a preferred embodiment. Embodiments of the invention may be applied to equalisers for use in professsional/studio applications as well as home stereo and home theatre systems.

Description

- 1 - Novel Equalizer Using Box-Car Filters
Field of the Invention
The present invention relates to the field of digital filtering. Background of the Invention
Digital filtering is becoming increasingly important, especially in audio convolution and providing extended FIR filtering.
Fig. 1 illustrates a first form of equalizing filter which implements a standard FIR filter function. The filter normally uses a series of delays 2 and multipliers 3. The result of multiplication by multiplier 3 is added to summer 4 for summation each cycle to produce an output. Unfortunately it can be inefficient because it provides more flexibility then might otherwise be required in the type of filters it can implement and the delay elements provided are standard delay elements.
In a traditional FIR filter, when the desired impulse response is approximately minimum-phase in nature, it often happens that much of the high-frequency information in the impulse response is clustered near the very beginning of the impulse response. This is particularly true in the case where the frequency response of the filter has approximately equal detail a logarithmic frequency scale. In particular, it often occurs that the higher frequency components of the impulse response, above a frequency of (say) F Hz are contained within the first K/F samples of the impulse response, where K is some constant. Hence, according to the well-known Nyquist sampling theorem, later parts of the impulse response may be sampled at a reduced sample rate, without loss of information. Summary of the Invention
It is an object of the present invention to provide an improved form of Digital Filter Implementation which can be advantageously implemented using Sigma Delta techniques. - 2 -
In accordance with a first aspect of the present invention, there is provided an apparatus for filtering an input signal, comprising: an input source; a cascaded filter/delay structure interconnected to said input source and having a predetermined number of outputs; a set of multiplier units, each connected to one of said outputs of said filter delay structure, each multiplier unit further configured to take a second input from a fixed constant coefficient; and a summing element configured to combine together the outputs of said multipliers, wherein said filter/delay structure is composed of a cascaded collection of elements, wherein each element effects a predetermined delay on the input signal and at least two of said elements effects a filtering function intended to band-limit the input signal as it propagates through said filter/delay structure.
The elements can include a variable delay structure. The delay structure includes geometrically increasing delays. In accordance with a further aspect of the present invention, there is provided an apparatus for filtering an audio input signal, comprising: an input source, emitting the audio input signal as a one-bit (sigma-delta modulated) stream; a cascaded filter/delay structure connected with the input source with a predetermined number of outputs; a set of multipliers, each connected to one of the outputs of the filter delay structure, each multiplier configured to take a second input from a fixed constant coefficient; and a summing element configured to combine together the outputs of the multipliers; wherein the filter/delay structure is composed of a cascaded collection of elements, wherein each element effects some delay on the audio signal and at least two of the elements effects a filtering function intended to band-limit the audio signal as it propagates through the filter/delay structure. - 3 - The elements can include a variable delay structure with geometrically increasing delays. The filter/delay structure can include an up/down/hold counter connected to a corresponding filter input and to a delayed version of the filter input, the counter outputting to a sigma/delta modulator which produces a 1 bit output.
Brief Description of the Drawings
Notwithstanding any other forms which may fall within the scope of the present invention, preferred forms of the invention will now be described, by way of example only, with reference to the accompanying drawings in which:
Fig. 1 is a schematic block diagram of a standard FIR filter structure; Fig. 2 is a schematic block diagram of a filter structure of the present invention;
Fig. 3 is a schematic block diagram of a box car filter;
Fig. 4 is a schematic block diagram of a 1-bit box car filter;
Fig. 5 is a schematic block diagram of one implementation of the present invention; and
Fig. 6 illustrates the impulse responses for the arrangement of Fig. 5. Description of preferred and other embodiments
The preferred embodiment of the present invention provide a filter structure that can implement an FIR filter in which the aforementioned features of the impulse response is used, to reduce the total computation. The traditional tapped-delay line used in FIR filters (with unity delay at each step) is replaced with a filter-delay structure, that low-pass filters the data as it propagates down the delay-line, thus allowing the delays to be made greater than unity. In particular, instead of linearly spaced sampling points, the impulse response may be represented by sampling - 4 - points that are approximately logarithmically spaced in time.
Fig. 2 illustrates the filter arrangement 5 of the preferred embodiment. This is similar to the arrangement of Fig. 1 but the delay elements have been changed to filter/delay elements 10 which implement a more complex functionality which can include generic filter functions including variable delays and low pass filtering. By providing for a variable delay in elements 10 provide for increased functionality. Further, the elements 10, by providing for variable delay and low pass filtering, allow for extremely good simulation of impulse response functions by a set of filters 10. This is especially the case as impulse responses have band limited properties in their tails.
The filter/delay elements 10 can comprise a box car filters. A box-car filter computes each output sample as the sum of K previous input samples, as follows :
K-l y(n) = ∑x(n-k)
*=o This defines a box-car filter of length K, and it has a net group-delay of (K-l)/2. Extra group-delay may be added to the filter, by altering the filter function as follows :
K+D-\ y(n) = ∑x(n-k) k=D whereby the parameter, D, indicates an additional delay, built into the filter function. The net delay of this processing unit is D+(K-l)/2. Note that, when K is equal to
1, the box-car filter becomes a simple delay element.
This delayed box-car filter can be implemented as shown in
Fig. 4. In the case where the input {x(n)) is a one-bit signal, the diagram of Fig. 4 shows how the accumulator becomes an up-down counter.
An example of an actual implementation is as shown in
Fig. 5. Fig 6 show the corresponding impulse responses for - 5 - xO, xl , x2 , ... xll . The first 2 filtered-delay elements in Fig YYY are simply 1-sample delays (no filter operation) , and so the first 3 curves 20 - 22 Fig. 6 (the bottom 3 curves) follow the same sequence as we would expect with a standard FIR. However, the later curves show a gradual broadening of the peaks (while the time delay from one peak to the next becomes greater than unity) . Each cascaded box-car filter makes the overall impulse response converge toward a Gaussian shape. By utilizing boxcar filters as the filter elements filtering complexity is substantially reduced allowing for more complex filters for a given hardware cost. The end result is particularly suitable in various applications especially audio convolution with an impulse response function.
It would be further appreciated by a person skilled in the art that numerous variations and/or modifications may be made to the present invention as shown in the specific embodiments without departing from the spirit or scope of the invention as broadly described. The present embodiments are, therefore, to be considered in all respects to be illustrative and not restrictive.

Claims

- 6 -We Claim:
1. An apparatus for filtering an input signal, comprising: an input source; a cascaded filter/delay structure interconnected to said input source and having a predetermined number of outputs; a set of multiplier units, each connected to one of said outputs of said filter delay structure, each multiplier unit further configured to take a second input from a fixed constant coefficient; and a summing element configured to combine together the outputs of said multipliers, wherein said filter/delay structure is composed of a cascaded collection of elements, wherein each element effects a predetermined delay on the input signal and at least two of said elements effects a filtering function intended to band-limit the input signal as it propagates through said filter/delay structure.
2. An apparatus as claimed in claim 1 wherein said signal comprises an audio input signal.
3. An apparatus as claimed in claim 1 wherein said elements include a variable delay structure.
4. An apparatus as claimed in claim 2 wherein said delay structure includes geometrically increasing delays.
5. An apparatus for filtering an audio input signal, comprising : an input source, emitting said audio input signal as a one-bit (sigma-delta modulated) stream; a cascaded filter/delay structure connected with said input source with a predetermined number of outputs; a set of multipliers, each connected to one of said outputs of said filter delay structure, each multiplier configured to take a second input from a fixed constant coefficient; and a summing element configured to combine together the outputs of said multipliers; - 7 - wherein said filter/delay structure is composed of a cascaded collection of elements, wherein each element effects some delay on the audio signal and at least two of said elements effects a filtering function intended to band-limit the audio signal as it propagates through said filter/delay structure.
6. An apparatus as claimed in any previous claim wherein said filter/delay structure includes an up/down/hold counter connected to a corresponding filter input and to a delayed version of said filter input, said counter outputting to a sigma/delta modulator which produces a 1 bit output.
7. An apparatus as claimed in any previous claim wherein said cascaded filter/delay structure comprises a series of box-car filters.
PCT/AU1999/000241 1998-03-31 1999-03-31 Novel equalizer using box-car filters WO1999050960A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU31297/99A AU3129799A (en) 1998-03-31 1999-03-31 Novel equalizer using box-car filters

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
AUPP2720A AUPP272098A0 (en) 1998-03-31 1998-03-31 Novel equalizer using boxcar filters
AUPP2724 1998-03-31
AUPP2724A AUPP272498A0 (en) 1998-03-31 1998-03-31 Novel equalizer using sigma-delta modulators
AUPP2720 1998-03-31

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WO1999050960A1 true WO1999050960A1 (en) 1999-10-07

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0751653A2 (en) * 1995-06-26 1997-01-02 Motorola, Inc. FIR equalizer for data signals
EP0766387A1 (en) * 1995-09-28 1997-04-02 Sony Corporation Digital filter and apparatus for reproducing sound using the digital filter
WO1998043369A1 (en) * 1997-03-25 1998-10-01 Level One Communications, Inc. Combined parallel adaptive equalizer/echo canceller
EP0875992A2 (en) * 1997-04-30 1998-11-04 Alcatel Digital filter with long impulse response

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0751653A2 (en) * 1995-06-26 1997-01-02 Motorola, Inc. FIR equalizer for data signals
EP0766387A1 (en) * 1995-09-28 1997-04-02 Sony Corporation Digital filter and apparatus for reproducing sound using the digital filter
WO1998043369A1 (en) * 1997-03-25 1998-10-01 Level One Communications, Inc. Combined parallel adaptive equalizer/echo canceller
EP0875992A2 (en) * 1997-04-30 1998-11-04 Alcatel Digital filter with long impulse response

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
DERWENT ABSTRACT, Accession No. 97-304696/28, Class U22; & JP 09116388 A (SONY CORP.) 12 May 1997. *
DERWENT ABSTRACT, Accession No. 98-404923/35, Class U22; & JP 10163813 A (MATSUSHITA DENKI SANGYO KK) 19 June 1998. *
DERWENT ABSTRACT, Accession No. 98-474055/41, Class W04; & JP 10201000 A (SONY CORP.) 31 July 1998. *

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